With Window Means Patents (Class 257/434)
  • Patent number: 12166050
    Abstract: A semiconductor package and a method of manufacturing thereof is disclosed. The package includes a package substrate having a die attach region with a die attached thereto. A protective cover with a cover adhesive is disposed over a sensor region of the die and attached to the die by the cover adhesive. The cover adhesive is disposed in a cap bonding region of the protective cover.
    Type: Grant
    Filed: September 20, 2021
    Date of Patent: December 10, 2024
    Assignee: UTAC Headquarters Ptd Ltd.
    Inventors: Jeffrey Punzalan, Il Kwon Shim
  • Patent number: 12147270
    Abstract: Various embodiments disclosed in this document relate to an electronic device comprising a camera module and, more specifically, to an electronic device configured to prevent the optical performance (for example, resolution) of a camera module from being degraded by an uneven surface of cover glass (for example, a window). According to various embodiments disclosed in this document, provided is an electronic device comprising: a housing comprising a first plate and a second plate disposed near a lateral or rear side of the first plate; a display disposed between the first plate and the second plate so as to display a screen through at least a part of the first plate; and a camera module for acquiring external information on the basis of light that has passed through at least a part of the first plate.
    Type: Grant
    Filed: January 21, 2020
    Date of Patent: November 19, 2024
    Assignee: Samsung Electronics Co., Ltd
    Inventors: Doan Xuan Cao, Tung Duc Nguyen, Thai Ba Dao, Jintack Shin, Kukyoul Moon, Taihoon Han
  • Patent number: 12126098
    Abstract: An exemplary RF module includes a dielectric substrate with metal traces on one surface that connect high frequency components and provide reference ground. Other metal traces on the other surface of the substrate also provide high frequency transmission lines and reference ground. An enclosure made using semiconductor manufacturing technology is mounted to the substrate and has conductive interior recesses defined by extending walls that are connected to the reference ground. The recesses surround the respective components and provide electromagnetic shielding. The dimensional precision in the location and smoothness of the walls and recesses due to the semiconductor manufacturing technology provides repeatable unit-to-unit RF characteristics of the RF module. One way of mounting the enclosure to the substrate uses a plurality of metal bonding bumps extending outwardly from the walls to engage reference ground metal traces on the substrate.
    Type: Grant
    Filed: August 31, 2022
    Date of Patent: October 22, 2024
    Assignee: NORTHROP GRUMMAN SYSTEMS CORPORATION
    Inventors: Dah-Weih Duan, Elizabeth T Kunkee
  • Patent number: 12107384
    Abstract: A light emitting device includes: a base having a bottom face and a lateral part surrounding the bottom face and extending upwards from the bottom face, wherein the lateral part has an uppermost face and includes a first stepped portion including a first upper face and a second stepped portion including a second upper face, wherein the first upper face and the second upper face are disposed below the uppermost face, wherein the first upper face and the second upper face are disposed inward of the uppermost face in a top view, and wherein a height of the first stepped portion from the bottom face is lower than a height of the second stepped portion from the bottom face; a semiconductor laser element disposed on the bottom face; and a light reflective member and/or an optical member disposed on the bottom face.
    Type: Grant
    Filed: October 25, 2023
    Date of Patent: October 1, 2024
    Assignee: NICHIA CORPORATION
    Inventors: Shota Murakami, Soichiro Miura
  • Patent number: 12107102
    Abstract: Implementations of semiconductor packages may include: a semiconductor die having a first side and a second side. A first side of an optically transmissive lid may be coupled to the second side of the semiconductor die through one or more dams. The packages may also include a light block material around the semiconductor package extending from the first side of the semiconductor die to a second side of the optically transmissive lid. The package may include an opening in the light block material on the second side of the optically transmissive lid that substantially corresponds with an active area of the semiconductor die.
    Type: Grant
    Filed: August 1, 2023
    Date of Patent: October 1, 2024
    Assignee: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC
    Inventor: Shou-Chian Hsu
  • Patent number: 12087871
    Abstract: Techniques for enhancing the absorption of photons in semiconductors with the use of microstructures are described. The microstructures, such as pillars and/or holes, effectively increase the effective absorption length resulting in a greater absorption of the photons. Using microstructures for absorption enhancement for silicon photodiodes and silicon avalanche photodiodes can result in bandwidths in excess of 10 Gb/s at photons with wavelengths of 850 nm, and with quantum efficiencies of approximately 90% or more.
    Type: Grant
    Filed: October 30, 2023
    Date of Patent: September 10, 2024
    Assignee: W&W Sens Devices, Inc.
    Inventors: Shih-Yuan Wang, Shih-Ping Wang
  • Patent number: 12074183
    Abstract: The present disclosure provides a semiconductor packaging method and a semiconductor package device. The method includes providing a chip, where the chip includes a chip substrate having a front surface and a back surface; soldering pads; a metal part formed on a side of each soldering pad facing away from the chip substrate; and a transparent protective layer formed on the front surface of the chip substrate. The transparent protective layer covers a photosensitive region of the chip substrate and the metal part, and the transparent protective layer contains an opening at a position corresponding to the metal part to expose a first end of the metal part away from the soldering pads. The method further includes electrically connecting the first end of the metal part to a circuit board using a conductive connection part to electrically connect the chip with the circuit board.
    Type: Grant
    Filed: May 5, 2021
    Date of Patent: August 27, 2024
    Assignee: TONGFU MICROELECTRONICS CO., LTD.
    Inventor: Guoqing Yu
  • Patent number: 12063426
    Abstract: An imaging unit (50) includes an imaging sensor chip (1), a package substrate (2) on which the imaging sensor chip (1) is mounted, an adhesion member (5) that adheres a back surface of the imaging sensor chip (1) opposite to a light receiving surface (10) and a bottom surface (2d) that is a surface of the package substrate (2) on which the imaging sensor chip (1) is mounted to each other, and a circuit board (52) that is adhered to a back surface of the package substrate (2) opposite to the bottom surface (2d). The adhesion member (5) is composed of a central adhesion part (5a) adhered to a central portion (1A) of the imaging sensor chip (1) and a peripheral adhesion part (5b) adhered to a peripheral portion (1B) of the imaging sensor chip (1) that is separated from the central portion (1A).
    Type: Grant
    Filed: February 24, 2021
    Date of Patent: August 13, 2024
    Assignee: FUJIFILM Corporation
    Inventor: Kazuya Mayumi
  • Patent number: 12053162
    Abstract: A distal end portion of an endoscope includes: a distal end cover disposed at a distal end of an insertion portion; a distal end member configured to be inserted into and fitted to the distal end cover, the distal end member including a first side surface and a second side surface, the first side surface being configured to come into surface contact with an inner surface of the distal end cover, the second side surface being formed in a radially inward direction with respect to the first side surface, the second side surface forming a space by being separated from the inner surface of the distal end cover by a predetermined distance; an electronic component mounted on a distal end surface of the distal end member; and a wiring electrically connected to the electronic component and disposed in a space formed between the inner surface of the distal end cover and the second side surface of the distal end member.
    Type: Grant
    Filed: June 9, 2021
    Date of Patent: August 6, 2024
    Assignee: OLYMPUS CORPORATION
    Inventor: Mitsuhiko Morita
  • Patent number: 12051711
    Abstract: Implementations of semiconductor packages may include: a semiconductor die having a first side and a second side. A first side of an optically transmissive lid may be coupled to the second side of the semiconductor die through one or more dams. The packages may also include a light block material around the semiconductor package extending from the first side of the semiconductor die to a second side of the optically transmissive lid. The package may include an opening in the light block material on the second side of the optically transmissive lid that substantially corresponds with an active area of the semiconductor die.
    Type: Grant
    Filed: August 1, 2023
    Date of Patent: July 30, 2024
    Assignee: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC
    Inventor: Shou-Chian Hsu
  • Patent number: 12046482
    Abstract: Various embodiments of fanout packages are disclosed. A method of forming a microelectronic assembly is disclosed. The method can include bonding a first surface of at least one microelectronic substrate to a surface of a carrier using a direct bonding technique without an intervening adhesive, the microelectronic substrate having a plurality of conductive interconnections on at least one surface of the microelectronic substrate. The method can include applying a molding material to an area of the surface of the carrier surrounding the microelectronic substrate to form a reconstituted substrate. The method can include processing the microelectronic substrate. The method can include singulating the reconstituted substrate at the area of the surface of the carrier and at the molding material to form the microelectronic assembly.
    Type: Grant
    Filed: October 3, 2022
    Date of Patent: July 23, 2024
    Assignee: ADEIA SEMICONDUCTOR BONDING TECHNOLOGIES, INC.
    Inventor: Belgacem Haba
  • Patent number: 12021096
    Abstract: Semiconductor packages and methods for forming thereof are disclosed. The semiconductor package includes a package substrate having a die attach region with a die attached thereto. A protective cover is disposed over a sensor region of the die and attached to the die by a cover adhesive. The cover adhesive may serve as a standoff structure to support the protective cover. The standoff structure may be configured to form multiple cavities below the protective cover to reduce thermal stress on the protective cover. An encapsulant is disposed to cover the package substrate while leaving the top package surface exposed.
    Type: Grant
    Filed: June 9, 2021
    Date of Patent: June 25, 2024
    Assignee: UTAC Headquarters Pte. Ltd.
    Inventors: Dennis Fernandez Tresnado, Mario Arwin Simon Fabian, Wedanni Linsangan Micla, Allan Pumatong Ilagan
  • Patent number: 11991429
    Abstract: A camera module is provided. A camera module according to one aspect of the present invention comprises: a substrate comprising a window; an image sensor coupled to the lower surface of the substrate; and a filter coupled to the upper surface of the image sensor and arranged on the window.
    Type: Grant
    Filed: February 26, 2020
    Date of Patent: May 21, 2024
    Assignee: LG INNOTEK CO., LTD.
    Inventor: Hyun Ah Oh
  • Patent number: 11990437
    Abstract: In an embodiment, a method for forming a solder bump includes preparing a transfer mold having a solder pillar extending from a mold substrate and through a first photoresist layer and having a shape partially defined by a second photoresist layer that is removed prior to transfer of the solder. In an embodiment, the mold substrate is flexible. In an embodiment, the transfer mold is flexible. In an embodiment, the method includes providing a device substrate having a wettable pad. In an embodiment, the method includes placing the transfer mold and the device substrate into aligned contact such that the solder pillar is in contact with the wettable pad. In an embodiment, the method includes forming a metallic bond between the solder pillar and the wettable pad. In an embodiment, the method includes removing the mold substrate and first photoresist layer.
    Type: Grant
    Filed: August 11, 2020
    Date of Patent: May 21, 2024
    Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Eric Peter Lewandowski, Jae-Woong Nah, Jeng-Bang Yau, Peter Jerome Sorce
  • Patent number: 11990459
    Abstract: The present invention is a method for producing an electronic device having a drive circuit including a solar cell structure, the method including the steps of: obtaining a bonded wafer by bonding a first wafer having a plurality of independent solar cell structures including a compound semiconductor, the solar cell structures being formed on a starting substrate by epitaxial growth, and a second wafer having a plurality of independent drive circuits formed, so that the plurality of solar cell structures and the plurality of drive circuits are respectively superimposed; wiring the bonded wafer so that electric power can be supplied from the plurality of solar cell structures to the plurality of drive circuits respectively; and producing an electronic device having the drive circuit including the solar cell structure by dicing the bonded wafer. This provides a method for producing an electronic device including a drive circuit and a solar cell structure in one chip and having a suppressed production cost.
    Type: Grant
    Filed: March 16, 2020
    Date of Patent: May 21, 2024
    Assignee: SHIN-ETSU HANDOTAI CO., LTD.
    Inventors: Junya Ishizaki, Shogo Furuya, Tomohiro Akiyama
  • Patent number: 11972342
    Abstract: A image sensor includes a first integrated circuit layer including pixel sensors that are grouped based on position into pixel sensor groups, a second integrated circuit layer in electrical communication with the first integrated circuit layer, the second integrated circuit layer including image processing circuitry groups that are configured to each receive pixel information from a corresponding pixel sensor group, the image processing circuitry groups further configured to perform image processing operations on the pixel information to provide processed pixel information during operation of the image sensor, a third integrated circuit layer in electrical communication with the second integrated circuit layer, and the third integrated circuit layer including neural network circuitry groups that are configured to each receive the processed pixel information from a corresponding image processing circuitry group and perform analysis for object detection on the processed pixel information during operation of the
    Type: Grant
    Filed: June 14, 2021
    Date of Patent: April 30, 2024
    Assignee: Waymo LLC
    Inventors: Lucian Ion, Vlad Constantin Cardei, Carl Warren Craddock
  • Patent number: 11974044
    Abstract: In one example, a method comprises: exposing a first photodiode to incident light to generate first charge; exposing a second photodiode to the incident light to generate second charge; converting, by a first charge sensing unit, the first charge to a first voltage; converting, by a second charge sensing unit, the second charge to a second voltage; controlling an ADC to detect, based on the first voltage, that a quantity of the first charge reaches a saturation threshold, and to measure a saturation time when the quantity of the first charge reaches the saturation threshold; stopping the exposure of the first photodiode and the second photodiode to the incident light based on detecting that the quantity of the first charge reaches the saturation threshold; and controlling the ADC to measure, based on the second voltage, a quantity of the second charge generated by the second photodiode before the exposure ends.
    Type: Grant
    Filed: February 19, 2021
    Date of Patent: April 30, 2024
    Assignee: Meta Platforms Technologies, LLC
    Inventors: Xinqiao Liu, Andrew Samuel Berkovich, Song Chen
  • Patent number: 11908755
    Abstract: In one example, a semiconductor device comprises a substrate comprising a top side, a bottom side, and a conductive structure, a body over the top side of the substrate, an electronic component over the top side of the substrate and adjacent to the body, wherein the electronic component comprises an interface element on a top side of the electronic component, a lid over the interface element and a seal between the top side of the electronic component and the lid, and a buffer on the top side of the substrate between the electronic component and the body. Other examples and related methods are also disclosed herein.
    Type: Grant
    Filed: February 21, 2020
    Date of Patent: February 20, 2024
    Assignee: Amkor Technology Singapore Holding Pte. Ltd.
    Inventors: Sang Jae Jang, Weilung Lu, Burt Barber, Adrian Arcedera, Shingo Nakamura
  • Patent number: 11901384
    Abstract: A CMOS image sensor (CIS) package includes a package substrate, a CIS chip arranged on an upper surface of the package substrate and electrically connected with the package substrate, a glass arranged over the CIS chip, and an adhesive layer interposed between an edge portion of an upper surface of the CIS chip and an edge portion of a lower surface of the glass to attach the glass to the CIS chip. An interlocking recess is provided to at least one of the CIS chip and the glass, and the adhesive layer comprises an interlocking protrusion inserted into the interlocking recess.
    Type: Grant
    Filed: January 8, 2021
    Date of Patent: February 13, 2024
    Assignee: Samsung Electronics Co., Ltd.
    Inventor: Kyoungsoon Cho
  • Patent number: 11903142
    Abstract: One embodiment comprises a circuit board including a mounting groove, an image sensor arranged within the mounting groove of the circuit board, and a first epoxy arranged within the mounting groove, wherein the mounting groove comprises a first side surface and a second side surface that face each other, and a third side surface and a fourth side surface that face each other, the circuit board includes at least one application groove provided on the first side surface and/or the second side surface of the mounting groove, the at least one application groove includes an opening opened toward the upper surface of the circuit board, and at least a portion of the first epoxy is arranged in the at least one application groove.
    Type: Grant
    Filed: May 29, 2019
    Date of Patent: February 13, 2024
    Assignee: LG INNOTEK CO., LTD.
    Inventors: Do Yun Kim, Seong Min Lee, Eun Mi Kim, Sang Ok Park
  • Patent number: 11894405
    Abstract: An image sensor package includes a package substrate; an image sensor chip disposed on the package substrate; a dam structure disposed on the image sensor chip and including a dam main body having an opening and a first light absorption layer disposed on an inner wall of the dam main body; a transparent substrate on the dam structure; and an encapsulant contacting the image sensor chip and an outer wall of the dam main body.
    Type: Grant
    Filed: May 26, 2021
    Date of Patent: February 6, 2024
    Assignee: SAMSUNG ELECTRONICS CO., LTD.
    Inventor: Kyongsoon Cho
  • Patent number: 11830903
    Abstract: Implementations of semiconductor packages may include: a semiconductor die having a first side and a second side and an active area on the second side of the die. The semiconductor packages may also include two or more bumps coupled to two or more die pads on a second side of the die. The semiconductor packages may include an optically transmissive lid coupled to the semiconductor die through an adhesive, two or more bumps, and a first redistribution layer (RDL). The semiconductor package may include a second redistribution layer (RDL) coupled with the first RDL on the second side of the semiconductor die. The second RDL may extend to the first side of the semiconductor die. The first RDL may extend to an edge of the semiconductor die.
    Type: Grant
    Filed: February 2, 2022
    Date of Patent: November 28, 2023
    Assignee: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC
    Inventor: Shou-Chian Hsu
  • Patent number: 11768070
    Abstract: [Object] To provide a sheet-like structure capable of highly accurately estimating a sheet-like shape. [Solving Means] A sheet-like structure includes a sheet-like member and a plurality of detection sensors. The sheet-like member extends along an in-plane direction orthogonal to a thickness direction and receives light incident on the sheet-like member. The plurality of detection sensors are dispersedly arranged on the sheet-like member along the in-plane direction and are for detecting an incident angle of the light with respect to the sheet-like member at each arrangement position of the plurality of detection sensors.
    Type: Grant
    Filed: October 28, 2022
    Date of Patent: September 26, 2023
    Assignee: Japan Aerospace Exploration Agency
    Inventors: Osamu Mori, Ralf Christian Boden, Javier Hernando Ayuso
  • Patent number: 11756973
    Abstract: Implementations of semiconductor packages may include: a semiconductor die having a first side and a second side. A first side of an optically transmissive lid may be coupled to the second side of the semiconductor die through one or more dams. The packages may also include a light block material around the semiconductor package extending from the first side of the semiconductor die to a second side of the optically transmissive lid. The package may include an opening in the light block material on the second side of the optically transmissive lid that substantially corresponds with an active area of the semiconductor die.
    Type: Grant
    Filed: July 12, 2021
    Date of Patent: September 12, 2023
    Assignee: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC
    Inventor: Shou-Chian Hsu
  • Patent number: 11749767
    Abstract: The inventive concept discloses a solar cell and a method for manufacturing the same. The solar cell includes a semiconductor substrate, an emitter layer disposed on one surface of the substrate, and a cooling layer disposed on one surface of the emitter layer, and the cooling layer absorbs a far-infrared ray from irradiated sunlight and emits a wavelength of the absorbed far-infrared ray.
    Type: Grant
    Filed: January 19, 2022
    Date of Patent: September 5, 2023
    Assignee: Korea University Research and Business Foundation
    Inventors: Hae-Seok Lee, Yoonmook Kang, Seungwoo Lee, Hoonjoo Choi, Wonwook Oh, Hyeon Ho Kim, HyunJung Park, Yujin Jung, MyeongSeob Sim, Dongjin Choi
  • Patent number: 11700696
    Abstract: Embodiments are generally directed to a buried electrical debug access port. An embodiment of an apparatus includes a substrate or printed circuit board; one or more electronic components coupled with the substrate or printed circuit board; one or more electrical access ports coupled with the substrate or printed circuit board, each electrical access port including electrically conductive material; and an encapsulant material, the encapsulant material encapsulating the one or more access ports, wherein the one or more access ports are electrically connected to one or more circuits of the apparatus to provide debugging access to the apparatus.
    Type: Grant
    Filed: June 3, 2021
    Date of Patent: July 11, 2023
    Assignee: Intel Corporation
    Inventors: Florence R. Neumann, Bilal Khalaf, Saeed S. Shojaie
  • Patent number: 11688750
    Abstract: A fingerprint recognition package may include a circuit board; an image sensor die attached and electrically connected to the circuit board; a light-shielding member applied to the circuit board; and an adhesive member attached to one side of the light-shielding member. The light-shielding member can be cured by being irradiated with ultraviolet rays, and can be thermoset by being irradiated with heat.
    Type: Grant
    Filed: August 24, 2018
    Date of Patent: June 27, 2023
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Mi-Jin Kim, Seong-Jun Kim, Kyo-Ree Lee, Tae-Sang Park, Tack-Mo Lee
  • Patent number: 11650390
    Abstract: A camera module according to the present invention may comprise: a barrel that accommodates a lens therein; a printed circuit board formed under the barrel and mounted with an image sensor; a body portion integrally formed with the barrel; a holder comprising a leg portion formed by being extended downward from the lower end of the body portion to the same height as the image plane of the lens; and a fixing portion formed downward from the leg portion to have a predetermined thickness to fix the holder to the printed circuit board, wherein the thickness of the fixing portion may be equal to the height from the upper surface of the printed circuit board to the image plane of the image sensor.
    Type: Grant
    Filed: November 2, 2017
    Date of Patent: May 16, 2023
    Inventor: Do Young Choi
  • Patent number: 11607158
    Abstract: A sensor may include a light source, a light detector, and a housing. The housing may have a first upper side and extend from the first upper side, a first cavity and a second cavity. The light detector is arranged in the first cavity. The light source is arranged in the second cavity. A strut may be arranged between the first cavity and the second cavity and is made from a material that absorbs or reflects light. A first cover may be mounted above the first cavity and comprises a deflection region and a plane of incidence. The deflection region is designed such that 80% of the light which is incident in the deflection region on the plane of incidence of the first cover from a predetermined direction and which is incident on the light detector, is directed away from the light detector based on an optical element.
    Type: Grant
    Filed: May 22, 2018
    Date of Patent: March 21, 2023
    Assignee: OSRAM OLED GMBH
    Inventor: Simon Schwalenberg
  • Patent number: 11595610
    Abstract: A solid-state imaging device includes a pixel region in which shared pixels which share pixel transistors in a plurality of photoelectric conversion portions are two-dimensionally arranged. The shared pixel transistors are divisionally arranged in a column direction of the shared pixels, the pixel transistors shared between neighboring shared pixels are arranged so as to be horizontally reversed or/and vertically crossed, and connection wirings connected to a floating diffusion portion, a source of a reset transistor and a gate of an amplification transistor in the shared pixels are arranged along the column direction.
    Type: Grant
    Filed: June 7, 2022
    Date of Patent: February 28, 2023
    Assignee: Sony Group Corporation
    Inventors: Hideo Kido, Atsuhiko Yamamoto, Akihiro Yamada
  • Patent number: 11569633
    Abstract: Apparatus for providing optical radiation (15), which apparatus comprises an optical input (13), a coupler (2), a first semiconductor amplifier (3), a controller (4), a preamplifier (61), a power amplifier (62) and an output fibre (5), wherein: the optical input (13) is for receiving input optical radiation (14); the optical input (13) is connected in series to the coupler (2), the first semiconductor amplifier (3), the preamplifier (61), the power amplifier (62), and the output fibre (5); the apparatus being characterized in that: the first semiconductor amplifier (3) comprises a waveguide (6) having a low reflecting facet (8); the first semiconductor amplifier (3) is in a double pass configuration such that the low reflecting facet (8) is connected to both the optical input (13) and the preamplifier (61) via the coupler (2); and the controller (4) is configured to cause the waveguide (6) of the first semiconductor amplifier (3) to operate in saturation thereby enabling the first semiconductor amplifier (3)
    Type: Grant
    Filed: November 23, 2018
    Date of Patent: January 31, 2023
    Assignee: Trumpf Laser UK Limited
    Inventors: Paulo Almeida, Christophe Andre Codemard, Michael Kevan Durkin
  • Patent number: 11569396
    Abstract: An optical sensor package includes an IC die including a light sensor element, an output node, and bond pads including a bond pad coupled to the output node. A leadframe includes a plurality of leads or lead terminals, wherein at least some of the plurality of leads or lead terminals are coupled to the bond pads including to the bond pad coupled to the output node. A mold compound provides encapsulation for the optical sensor package including for the light sensor element. The mold compound includes a polymer-base material having filler particles including at least one of infrared or terahertz transparent particle composition provided in a sufficient concentration so that the mold compound is optically transparent for providing an optical transparency of at least 50% for a minimum mold thickness of 500 ?m in a portion of at least one of an infrared frequency range and a terahertz frequency range.
    Type: Grant
    Filed: November 4, 2020
    Date of Patent: January 31, 2023
    Assignee: TEXAS INSTRUMENTS INCORPORATED
    Inventor: Enis Tuncer
  • Patent number: 11559216
    Abstract: This relates to one or more integrated photodiodes on a back surface of a PPG device. The one or more integrated photodiodes can reduce the gap between one or more windows and the active area of the photodiode(s) to increase the PPG signal strength without affecting the depth of light penetration into skin tissue. In some examples, the photodiode stackup can contact the surface of the windows. In some examples, the photodiode stackups can exclude a separate substrate. In some examples, the photodiode stackup can be deposited on the inner surface of the windows opposite the outer surface of the device. In some examples, the photodiode stackup can be deposited on the back surface and/or outer surface of the device. In this manner, PPG sensors can be included in the device without the need for extra layers and measurement accuracy can be improved due to lower light loss.
    Type: Grant
    Filed: August 11, 2017
    Date of Patent: January 24, 2023
    Assignee: Apple Inc.
    Inventors: Arpit Mehta, Guocheng Shao, Tobias J. Harrison-Noonan
  • Patent number: 11556024
    Abstract: A display assembly of an electronic device, the electronic device, and a method for manufacturing the display assembly are provided. The electronic device includes a display assembly and a camera module. The display assembly includes a cover plate, a display panel, and a backlight module that are sequentially stacked together. The cover plate has a light transmitting region, and the light transmitting region corresponds to a display region of the display panel. The display region of the display panel defines a first mounting through hole. The first mounting through hole is provided with a light blocking layer on a hole wall of the first mounting through hole, and an end of the light blocking layer close to the cover plate is attached to the light transmitting region.
    Type: Grant
    Filed: December 9, 2020
    Date of Patent: January 17, 2023
    Assignee: GUANGDONG OPPO MOBILE TELECOMMUNICATIONS CORP., LTD.
    Inventors: Yimei Tang, Jiao Cheng
  • Patent number: 11546059
    Abstract: A cover for an electronic circuit package, including: a body having an opening extending therethrough; a first element located in the opening and having a surface continuing planar or rounded shapes of a surface of the cover; and a second element of connection of the first element to the body.
    Type: Grant
    Filed: February 5, 2021
    Date of Patent: January 3, 2023
    Assignee: STMICROELECTRONICS (GRENOBLE 2) SAS
    Inventors: Jean-Michel Riviere, Romain Coffy, Karine Saxod
  • Patent number: 11543863
    Abstract: A portable electronic device and an image-capturing module thereof are provided. The image-capturing module includes a circuit substrate, an image-capturing chip, a plurality of first conductive materials, a filter component, a plurality of second conductive materials, and a lens assembly. The circuit substrate includes a plurality of substrate bond pads. The image-capturing chip includes a plurality of chip bond pads. The first conductive materials are respectively disposed on the chip bond pads. The filter component is disposed on the first conductive materials, and the filter component includes a light-transmitting body and a plurality of conductive structures disposed on the light-transmitting body and respectively electrically connected to the first conductive materials. Each of the second conductive materials is electrically connected between the corresponding conductive structure and the corresponding substrate bond pads.
    Type: Grant
    Filed: September 24, 2020
    Date of Patent: January 3, 2023
    Assignee: AZUREWAVE TECHNOLOGIES, INC.
    Inventors: Tseng-Chieh Lee, Kung-An Lin
  • Patent number: 11538268
    Abstract: A fingerprint sensor package includes a package substrate including an upper surface in which a sensing region and a peripheral region surrounding the sensing region are defined, and a lower surface facing the upper surface; a plurality of first sensing patterns located are arranged in the sensing region, are apart from each other in a first direction, and extend in a second direction crossing the first direction; a plurality of second sensing patterns that are arranged in the sensing region, are apart from each other in the second direction, and extend in the first direction; a coating member covering the sensing region; an upper ground pattern in the peripheral region and apart from the coating member to surround the coating member in the first and second directions; and a controller chip on the lower surface of the package substrate; and a plurality of capacitors.
    Type: Grant
    Filed: October 13, 2021
    Date of Patent: December 27, 2022
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Jaehyun Lim, Younghwan Park, Kwangjin Lee, Inho Choi, Hyuntaek Choi
  • Patent number: 11508766
    Abstract: Implementations of a molded image sensor chip scale package may include an image sensor having a first side and a second side. A first cavity wall and a second cavity wall may be coupled to the first side of the image sensor and extend therefrom. The first cavity wall and the second cavity wall may form a cavity over the image sensor. A transparent layer may be coupled to the first cavity wall and the second cavity wall. A redistribution layer (RDL) may be coupled to the second side of the image sensor. At least one interconnect may be directly coupled to the RDL. A mold material may encapsulate a portion of the RDL, a portion of the image sensor, and a side of each cavity wall, and a portion of the transparent layer.
    Type: Grant
    Filed: January 29, 2021
    Date of Patent: November 22, 2022
    Assignee: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC
    Inventor: Weng-Jin Wu
  • Patent number: 11470695
    Abstract: An exemplary semiconductor technology implemented microwave filter includes a dielectric substrate with metal traces on one surface that function as frequency selective circuits and reference ground. Other metal traces on the other surface of the substrate also provide reference ground. Bottom and top enclosures that enclose the substrate have respective interior recesses with deposited continuous metal coatings. A plurality of metal bonding bumps or bonding wall extends outwardly from the projecting walls of the bottom and top enclosures. The bonding bumps on the bottom and top enclosures engage reference ground metal traces on respective surfaces of the substrate. As a result of applied pressure, the bonding bumps and respective reference ground metal traces together with the through-substrate vias form a metal-to-metal singly-connected ground reference structure for the entire circuitry.
    Type: Grant
    Filed: April 28, 2020
    Date of Patent: October 11, 2022
    Assignee: NORTHROP GRUMMAN SYSTEMS CORPORATION
    Inventors: Elizabeth T Kunkee, Dah-Weih Duan, Dino Ferizovic, Chunbo Zhang, Greta S Tsai, Ming-Jong Shiau, Daniel R Scherrer, Martn E Roden
  • Patent number: 11462419
    Abstract: Various embodiments of fanout packages are disclosed. A method of forming a microelectronic assembly is disclosed. The method can include bonding a first surface of at least one microelectronic substrate to a surface of a carrier using a direct bonding technique without an intervening adhesive, the microelectronic substrate having a plurality of conductive interconnections on at least one surface of the microelectronic substrate. The method can include applying a molding material to an area of the surface of the carrier surrounding the microelectronic substrate to form a reconstituted substrate. The method can include processing the microelectronic substrate. The method can include singulating the reconstituted substrate at the area of the surface of the carrier and at the molding material to form the microelectronic assembly.
    Type: Grant
    Filed: July 3, 2019
    Date of Patent: October 4, 2022
    Assignee: INVENSAS BONDING TECHNOLOGIES, INC.
    Inventor: Belgacem Haba
  • Patent number: 11406299
    Abstract: A sensor comprises a microfabricated chip having a surface with one or more cavities formed thereon, the cavities including sensing components, one or more lids, each covering said surface so as to close at least one of said cavities, the lids contacting rims that delimit said cavities on said surface. Electric circuit portions join, each, a respective one of the lids, to allow the lids to be partly dissolved, electrochemically, responsive to being exposed to an electrochemical solution. In addition, masking material portions cover peripheral regions of the lids at the level of the rims, so as to seal the lids and shield such peripheral regions from said electrochemical solution, in operation. Related apparatuses and sensing methods may be provided.
    Type: Grant
    Filed: February 22, 2019
    Date of Patent: August 9, 2022
    Assignee: International Business Machines Corporation
    Inventors: Patrick Ruch, Jonas Weiss
  • Patent number: 11342375
    Abstract: Implementations of image sensor packages may include an image sensor chip, a first layer including an opening therethrough coupled to a first side of the image sensor chip, and a optically transmissive cover coupled to the first layer. The optically transmissive cover, the first layer, and the image sensor chip may form a cavity within the image sensor. The image sensor package may also include at least one electrical contact coupled to a second side of the image sensor chip opposing the first side and an encapsulant coating an entirety of the sidewalls of the image sensor package.
    Type: Grant
    Filed: December 5, 2017
    Date of Patent: May 24, 2022
    Assignee: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC
    Inventor: Shou-Chian Hsu
  • Patent number: 11251174
    Abstract: An image sensor package and a manufacturing method thereof are provided. The image sensor package includes a redistribution circuit structure; an image sensing chip disposed on the redistribution circuit structure and having a sensing surface, on which a sensing area and a first conductive pillar arranged in the periphery of the sensing area are disposed; a lid covering the sensing area; an encapsulant disposed on the redistribution circuit structure and encapsulating at least part of the image sensing chip and the cover; and a top tier semiconductor chip disposed above the image sensing chip and having an active surface on which a first conductor is disposed. The first conductor overlaps the image sensing chip in a direction perpendicular to the sensing surface. The first conductive pillar and the first conductor are aligned and bonded to each other to electrically connect the image sensing chip and the top tier semiconductor chip.
    Type: Grant
    Filed: May 27, 2020
    Date of Patent: February 15, 2022
    Assignee: Industrial Technology Research Institute
    Inventors: Sheng-Tsai Wu, Yu-Min Lin, Yuan-Yin Lo, Ang-Ying Lin, Tzu-Hsuan Ni, Chao-Jung Chen, Shin-Yi Huang
  • Patent number: 11201251
    Abstract: A photodiode has a substrate. A mesa structure is formed on the substrate, wherein the mesa structure has an n region containing an n type dopant formed on the substrate, an intermediate region positioned on the n region and a p region formed on the intermediate region and containing a p type dopant. A contact is formed on a top surface of the mesa and attached to the p region. The contact is formed around an outer perimeter of the mesa. The mesa has a diameter of 30 um or less.
    Type: Grant
    Filed: February 5, 2020
    Date of Patent: December 14, 2021
    Assignee: OEPIC SEMICONDUCTORS, INC.
    Inventors: Yi-Ching Pao, Majid Riaziat, Ta-Chung Wu
  • Patent number: 11163216
    Abstract: An array imaging module includes at least two optical lenses and a molded photosensitive assembly, wherein the molded photosensitive assembly includes at least two photosensitive units, a circuit board that electrically couples to the photosensitive units, and a molded base having at least two optical windows. The molded base is integrally coupled at the circuit board at a peripheral portion thereof, wherein the photosensitive units are aligned with the optical windows respectively. The optical lenses are located along two photosensitive paths of the photosensitive units respectively, such that each of the optical windows forms a light channel through the corresponding photosensitive unit and the corresponding optical lens.
    Type: Grant
    Filed: April 22, 2020
    Date of Patent: November 2, 2021
    Assignee: NINGBO SUNNY OPOTECH CO., LTD.
    Inventors: Mingzhu Wang, Bojie Zhao, Takehiko Tanaka, Zhenyu Chen, Nan Guo, Zhen Huang, Duanliang Cheng, Liang Ding, Feifan Chen, Heng Jiang
  • Patent number: 11139233
    Abstract: A method for forming a semiconductor package is disclosed herein. The method includes forming a package substrate having a first major surface and a second major surface opposite to the first major surface. The package substrate includes a recess region below the first major surface defined with a die region and a non-die region surrounding the die region. A semiconductor die is disposed in the die region within the recess region. A dam structure is disposed within the recess region. The dam structure surrounds the semiconductor die and extends upwardly to a height below the first major surface of the package substrate. The method also includes dispensing a liquid encapsulant material into the recess region. The liquid encapsulant material is surrounded by the dam structure and extends upwardly to a height below the height of the dam structure. A package lid is attached to the package substrate.
    Type: Grant
    Filed: May 28, 2020
    Date of Patent: October 5, 2021
    Assignee: UTAC Headquarters Pte. Ltd.
    Inventors: Hua Hong Tan, Wilson Poh Leng Ong, Kriangsak Sae Le, Saravuth Sirinorakul, Somsak Phukronghin, Paweena Phatto
  • Patent number: 11107742
    Abstract: An electronic device includes a carrier wafer having a front side and a back side, with an electrical connection network configured to connect the front side to the back side. An electronic chip is mounted on the front side of the carrier wafer and electrically connected to front pads of the electrical connection network. A sheet of a thermally conductive graphite or a pyrolytic graphite is added to the back side of the carrier wafer. The sheet includes apertures which leave back pads of the electrical connection network uncovered.
    Type: Grant
    Filed: March 7, 2019
    Date of Patent: August 31, 2021
    Assignee: STMicroelectronics (Grenoble 2) SAS
    Inventor: Didier Campos
  • Patent number: 11032629
    Abstract: A microelectromechanical microphone includes: a substrate; a sensor chip, integrating a microelectromechanical electroacoustic transducer; and a control chip operatively coupled to the sensor chip. In one embodiment, the sensor chip and the control chip are bonded to the substrate, and the sensor chip overlies, or at least partially overlies, the control chip. In another embodiment, the sensor is bonded to the substrate and a barrier is located around at least a portion of the sensor chip.
    Type: Grant
    Filed: December 28, 2018
    Date of Patent: June 8, 2021
    Assignees: STMICROELECTRONICS S.R.L., STMICROELECTRONICS (MALTA) LTD
    Inventors: Roberto Brioschi, Paul Anthony Barbara
  • Patent number: 10978347
    Abstract: A device chip for mounting on a board is provided. The device chip includes a top surface, an undersurface located on an opposite side from the top surface and having a larger area than the top surface, a slope inclined with respect to the top surface and the undersurface and exposed to the top surface side, a circuit portion on the top surface side, the circuit portion including an electronic circuit, and a wiring portion on which wiring electrically connecting the circuit portion and the board to each other is to be formed, the wiring portion including the slope in a part of the wiring portion.
    Type: Grant
    Filed: September 16, 2019
    Date of Patent: April 13, 2021
    Assignee: DISCO CORPORATION
    Inventor: Devin Martin
  • Patent number: 10978537
    Abstract: An organic light emitting diode display includes a substrate, a plurality of pixels disposed on the substrate, a plurality of transmissive windows spaced apart from the pixels, and a light blocking member disposed between one of the pixels and one of the transmissive windows. The pixels display an image, and light is transmitted through the transmissive windows. Each pixel includes a transistor including a plurality of electrode members disposed in different layers on the substrate. The light blocking member includes a plurality of light blocking sub-members respectively disposed in the same layers as the plurality of electrode members.
    Type: Grant
    Filed: May 1, 2017
    Date of Patent: April 13, 2021
    Assignee: SAMSUNG DISPLAY CO., LTD.
    Inventors: Kohei Ebisuno, Yong Ho Yang, Jun Hee Lee, Nak Cho Choi