With Window Means Patents (Class 257/434)
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Patent number: 7709918Abstract: A photoelectric conversion device is provided which is capable of improving the light condensation efficiency without substantially decreasing the sensitivity. The photoelectric conversion device has a first pattern provided above an element isolation region formed between adjacent two photoelectric conversion elements, a second pattern provided above the element isolation region and above the first pattern, and microlenses provided above the photoelectric conversion elements with the first and the second patterns provided therebetween. The photoelectric conversion device further has convex-shaped interlayer lenses in optical paths between the photoelectric conversion elements and the microlenses, the peak of each convex shape projecting in the direction from the electro-optical element to the microlens.Type: GrantFiled: December 21, 2007Date of Patent: May 4, 2010Assignee: Canon Kabushiki KaishaInventor: Sakae Hashimoto
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Patent number: 7709851Abstract: A thin-film light-emitting diode chip, in which the distance between a mirror layer (4) and a light-generating active zone (3) is set in such a way that a radiation emitted by the active zone (3) interferes with a light reflected from the mirror layer (4), the internal quantum efficiency of the active zone (3) being influenced by this interference and the emission characteristic of the active zone (3) of at least one preferred direction thereby being obtained.Type: GrantFiled: April 14, 2005Date of Patent: May 4, 2010Assignee: Osram Opto Semiconductors GmbHInventors: Stefan Bader, Wolfgang Schmid
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Patent number: 7709776Abstract: Microelectronic imager assemblies comprising a workpiece including a substrate and a plurality of imaging dies on and/or in the substrate. The substrate includes a front side and a back side, and the imaging dies comprise imaging sensors at the front side of the substrate and external contacts operatively coupled to the image sensors. The microelectronic imager assembly further comprises optics supports superimposed relative to the imaging dies. The optics supports can be directly on the substrate or on a cover over the substrate. Individual optics supports can have (a) an opening aligned with one of the image sensors, and (b) a bearing element at a reference distance from the image sensor. The microelectronic imager assembly can further include optical devices mounted or otherwise carried by the optics supports.Type: GrantFiled: February 20, 2009Date of Patent: May 4, 2010Assignee: Aptina Imaging CorporationInventors: Warren M. Farnworth, Sidney B. Rigg, William Mark Hiatt, Alan G. Wood, Peter A. Benson, James M. Wark, David R. Hembree, Kyle K. Kirby, Charles M. Watkins, Salman Akram
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Publication number: 20100096717Abstract: To reduce cracks in a functional unit of a semiconductor element in a process for manufacturing an electronic device, a frame member surrounds a functional unit and an optically-transparent layer is formed on a wafer. A resin layer is formed by injecting resin into a cavity of an encapsulating metallic mold while a molding surface of the encapsulating metallic mold segment contacts an upper surface of the frame member. After forming the resin layer, an optically-transparent layer is formed inside the frame member. The resin layer is formed by injecting resin while the frame member contacts the molding surface of the encapsulating metallic mold segment. Therefore, pressure applied in the encapsulation is exerted over the frame member around the functional unit. Further, the optically-transparent layer is formed after encapsulation. This avoids pressure applied to the functional unit from the contact of the encapsulating metallic mold segment with the optically-transparent layer.Type: ApplicationFiled: October 16, 2009Publication date: April 22, 2010Applicant: NEC ELECTRONICS CORPORATIONInventors: Kenji UCHIDA, Koki HIRASAWA
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Patent number: 7701050Abstract: A side-view optical diode package is mounted on a printed circuit board with at least a solder bump. The side-view optical diode package includes a silicon substrate, a holding space, a bonding surface and a positioning structure. The silicon substrate has a first surface and a second surface. The holding space has a top opening in the first surface and a bottom for holding an optical diode thereon. The bonding surface is disposed at a lateral side of the silicon substrate and bonded onto the printed circuit board. The positioning structure has at least a solder-receiving portion beside the bonding surface and corresponding to the solder bump. The solder bump is molten during a soldering process and received in the solder-receiving portion, thereby facilitating positioning the silicon substrate on the printed circuit board.Type: GrantFiled: December 12, 2007Date of Patent: April 20, 2010Assignee: Silicon Base Development Inc.Inventors: Chih-Ming Chen, Deng-Huei Hwang, Ching-Chi Cheng, An-Nong Wen
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Patent number: 7702226Abstract: An apparatus includes a planar member having a first planar surface, a hollow body having first and second end openings, and a window. The planar member is configured to receive a device mounted on the first planar surface and surrounded by at least a track of a first material having a first hardness affixed to the first planar surface. The hollow body has a sharp edge at the second end along a planar section of the hollow body. The hollow body comprises a second material with a second hardness equal to or greater than the first hardness. The window encloses the hollow body first end forming an enclosure interior region configured to surround the device. The window provides the transmission of light into or out of the interior region. The hollow body second end is urged against the first material to form a hermetically sealed enclosure around the device.Type: GrantFiled: July 20, 2006Date of Patent: April 20, 2010Assignee: Siimpel CorporationInventor: Roman C. Gutierrez
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Patent number: 7701025Abstract: A grating structure for channeling and concentrating incident radiation includes a regular pattern of elements each with a metallic shell partially surrounding at least one subcavity. The subcavity is filled with a dielectric or semiconductor. Light of one or more predetermined wavelength ranges can be concentrated in the subcavity(s) and then efficiently channeled through the grooves between adjacent elements. An optoelectronic device includes the structure superposed on a substrate, which can be semiconductive, and the elements of the grating used as electrodes and adapted to allow a potential difference between adjacent (electrode) elements. The optoelectronic devices include photodetectors, e.g., metal-semiconductor-metal, pn, pin, avalanche, LEDs, IR emitting devices, and biological or chemical sensors.Type: GrantFiled: June 6, 2006Date of Patent: April 20, 2010Assignee: Research Foundation of the City University of New YorkInventor: David Crouse
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Patent number: 7696593Abstract: A semiconductor photo detecting element includes a PIN-type photo detecting element and window semiconductor layer. The PIN-type photo detecting element has a semiconductor substrate, a first semiconductor layer, a second semiconductor layer and a third semiconductor layer. The first semiconductor layer is provided on the semiconductor substrate, is lattice-matched to the semiconductor substrate, includes a first conductivity type dopant, and has first band gap energy. The second semiconductor layer is provided on the first semiconductor layer, has the first band gap energy, and has a concentration of the first conductivity type dopant lower than that of the first semiconductor layer or is substantially undoped. The third semiconductor layer is provided on the second semiconductor layer. The window semiconductor layer has second band gap energy larger than the first band gap energy at a light-incoming side with respect to the second semiconductor layer and has a thickness of 5 nm to 50 nm.Type: GrantFiled: June 29, 2007Date of Patent: April 13, 2010Assignee: Eudyna Devices Inc.Inventors: Yoshihiro Yoneda, Ryuji Yamabi
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Patent number: 7696590Abstract: A housing accommodating a semiconductor chip is set out. The housing and chip may be used for sending and/or receiving radiation. Popular applications of the housing may be in light emitting diodes. The housing includes a conductor strip that is punched into two electrically isolated portions. The housing further includes a cavity extending inwards from the top of the housing. The conductor portions include respective areas that are exposed at the bottom of the cavity. The semiconductor chip is bonded to one of the exposed areas and a wire bonds the chip to the second exposed area. The conductor portions also terminate in exposed electrodes, which allow for electrical connection of the chip with external devices. A window is formed in the cavity and the walls of the housing that form the cavity may be made of a reflective material. The electrodes remain unexposed to the window but for any residual areas about the chip and bonding wire within the first and second exposed areas.Type: GrantFiled: March 26, 2008Date of Patent: April 13, 2010Assignee: OSRAM GmbHInventors: Gunter Waitl, Herbert Brunner
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Publication number: 20100084729Abstract: A substrate section that is at least partially fabricated to include contact elements and materials. The substrate section includes doped regions that have a heavily doped N-type region and a heavily doped P-type region adjacent to one another. An exterior surface of the substrate has a topography that includes a light-transparent region in which light, from a light source, is able to reach a surface of the substrate. An application of light onto the light transparent region is sufficient to cause a voltage potential to form across a junction of the heavily doped regions. The substrate section may further comprise one or more electrical contacts, positioned on the substrate section to conduct current, resulting from the voltage potential created with application of light onto the light transparent region, to a circuit on the semiconductor substrate.Type: ApplicationFiled: August 25, 2009Publication date: April 8, 2010Inventors: Gary Steinbrueck, James S. Vickers, Mario M. Pelella, Majid Aghababazadeh, Nader Pakdaman
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Patent number: 7692720Abstract: A solid-state imaging device, comprises: a semiconductor substrate having a first surface; a solid-state imaging element in the first surface of the semiconductor substrate, the solid-state imaging element comprising a light-receiving region; a light-transmission member having a second surface and a third surface, the second surface being opposite to the third surface, wherein the light-transmission member and the first surface of the semiconductor substrate define a gap between the second surface of the light-transmission member and an outer surface of the light-receiving region; and an external connection terminal connected to the solid-state imaging element, wherein a distance between the outer surface of the light-receiving region and the third surface of the light-transmission member is 0.5 mm or more.Type: GrantFiled: August 2, 2004Date of Patent: April 6, 2010Assignee: FUJIFILM CorporationInventors: Kazuhiro Nishida, Hiroshi Maeda, Yoshihisa Negishi, Shunichi Hosaka, Masatoshi Yasumatsu, Eiji Watanabe
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Patent number: 7687819Abstract: An optical semiconductor package includes a support with a passage to receive a ring holding a lens situated facing an optical sensor. The support has, in the passage, at least one local release recess and the ring is equipped peripherally with a locally projecting, elastically deformable element. The local release recess and the elastically deformable element are such that, when the ring occupies an angular mounting position, the locally projecting elastically deformable element is engaged in the local recess of the support and, when the ring is pivoted from the aforementioned angular mounting position, the locally projecting elastically deformable element is moved out of the recess of the support and is compressed against the wall of the passage in order to secure the ring relative to the support.Type: GrantFiled: February 3, 2009Date of Patent: March 30, 2010Assignee: STMicroelectronics S.A.Inventor: Julien Vittu
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Patent number: 7688382Abstract: A solid-state imaging device, comprises: a semiconductor substrate having a first surface; a solid-state imaging element in the first surface of semiconductor substrate, the solid-state imaging element comprising a light-receiving region; a light-transmission member having a second surface and a third surface, the second surface being opposite to the third surface, wherein the light-transmission member and the first surface of the semiconductor substrate define a gap between the second surface of the light-transmission member and an outer surface of the light-receiving region; and an external connection terminal connected to the solid-state imaging element, wherein the light-transmission member comprises low ?-ray glass.Type: GrantFiled: July 22, 2004Date of Patent: March 30, 2010Assignee: FUJIFILM CorporationInventors: Kazuhiro Nishida, Hiroshi Maeda, Yoshihisa Negishi, Shunichi Hosaka, Eiji Watanabe, Masatoshi Yasumatsu
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Patent number: 7679662Abstract: Disclosed herein is a solid-state imaging element which includes a plurality of drive signal inputs, a plurality of bus lines, and a plurality of vertical transfer register electrodes. In the solid-state imaging element, a charge accumulated in light-receiving elements in a pixel region is vertically transferred by the drive signals input to the electrodes. Each of the electrodes has a contact part connected to the second contact and having a width smaller than a width of the electrodes in the pixel region, and a blank region is formed between predetermined adjacent two of the contact parts so that a width of the blank region is larger than a distance between respective two of the contact parts other than the predetermined adjacent two of the contact parts. The first contact is disposed on the blank region.Type: GrantFiled: November 9, 2006Date of Patent: March 16, 2010Assignee: Sony CorporationInventors: Sadamu Suizu, Masaaki Takayama
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Patent number: 7679156Abstract: An optical module has a circuit carrier, a housed semiconductor element placed on the circuit carrier, and a lens unit for projecting electromagnetic radiation onto the semiconductor element. The lens unit, which is constructed separate from the cased semiconductor element, preferably comprises a lens assembly formed of, for example, three lenses and of a diaphragm. The three lenses, optionally together with the diaphragm, are aligned in a well-defined manner due to their geometric design so that no additional optical adjustment is necessary. According to the invention, a support is formed, at least in sections, on the case of the semiconductor element, and the lens unit is placed thereon thus being supported. The concept is that by forming a support directly on the case of a cased semiconductor element even with classically cased semiconductor chips, it is possible to construct a camera module with which every mechanical focus setting can be eliminated.Type: GrantFiled: September 14, 2004Date of Patent: March 16, 2010Assignee: Siemens AktiengesellschaftInventors: Danut Bogdan, Josef Dirmeyer, Henryk Frenzel, Harald Schmidt
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Patent number: 7675132Abstract: A method for producing a surface mounting optoelectronic component comprises the following steps: readying a base body with the optoelectronic transmitter and/or receiver arranged in a recess of the base body, filling the recess of the base body with a transparent, curable casting compound, and placing the optical device onto the base body, whereby the optical device comes into contact with the casting compound.Type: GrantFiled: August 11, 2005Date of Patent: March 9, 2010Assignee: OSRAM GmbHInventors: Günter Waitl, Robert Lutz, Herbert Brunner
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Patent number: 7675131Abstract: There is provided an imager package including an image sensor die attached to a transparent substrate such that sensitive image sensing components on the sensor die face the transparent substrate. In accordance with an embodiment of the present technique, the imager package may be coupled to an external package via bond wires and other interconnect elements. The sensor die and bond wires may be protected by an encapsulant on which the interconnect elements may be disposed. The bond wires may enable placement of the interconnect elements partially or directly above the sensor die, as opposed to around an outer periphery of the sensor die. There is further provided a method of manufacturing an imager package wherein interconnect elements may be located partially or directly above the sensor die, enabling the manufacture of smaller imager packages than previously envisioned.Type: GrantFiled: April 5, 2007Date of Patent: March 9, 2010Assignee: Micron Technology, Inc.Inventor: James M. Derderian
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Publication number: 20100038737Abstract: A package for an image sensor includes a lead frame having a first surface and a second surface opposite the first surface; an image sensor mounted on the first surface of the lead frame; an optical cover spanning the first surface; and a plastic, optically transparent window in the optical cover and aligned with the image sensor.Type: ApplicationFiled: August 18, 2008Publication date: February 18, 2010Inventor: Carlos F. Rezende
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Publication number: 20100038738Abstract: An indirect connection to and across a photodiode array. The backside contact is used as one portion which connects to a capacitor. The capacitor forms a shunt across the bulk substrate, thus shunting across the series resistance of the substrate, and reducing the series resistance.Type: ApplicationFiled: October 20, 2009Publication date: February 18, 2010Applicant: DIGIRAD CORPORATIONInventors: Joel Kindem, Lars S. Carlson
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Patent number: 7663080Abstract: An exemplary light sensor (20) includes a supporting base, a light-sensing unit (21) provided at at least one first location of the supporting base where ambient light is received, and a compensating unit (22) provided at a second location of the supporting base shielded from ambient light, the compensating unit having a structure that is the same as the light-sensing portion. The light-sensing portion includes at least one amorphous silicon thin film transistor (TFT) (210) configured for sensing light, and the compensating unit is configured for providing a reference value current for the light-sensing unit. A display device using the light sensor is also provided.Type: GrantFiled: April 7, 2008Date of Patent: February 16, 2010Assignee: Innolux Display Corp.Inventor: Hung-Chang Tsai
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Patent number: 7663200Abstract: A packaging structure suitable for an integrated circuit device receiving short-wavelength laser light is provided. A lead-mounted substrate is placed on the side of the light receiving surface of the integrated circuit device having a photo detecting part. The lead is electrically connected with the integrated circuit device via an electrode. The integrated circuit device and the substrate are encapsulated with an encapsulation section. The substrate has an opening at a position above the photo detecting part.Type: GrantFiled: March 8, 2005Date of Patent: February 16, 2010Assignee: Panasonic CorporationInventors: Yasufumi Shirakawa, Masaki Taniguchi, Hideo Fukuda, Yuzo Shimizu, Shinya Esaki
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Patent number: 7663096Abstract: Microelectronic imaging devices and associated methods for attaching transmissive elements are disclosed. A manufacturing method in accordance with one embodiment of the invention includes providing an imager workpiece having multiple image sensor dies configured to detect energy over a target frequency. The image sensor dies can include an image sensor and a corresponding lens device positioned proximate to the image sensor. The method can further include positioning standoffs adjacent to the lens devices while the image sensor dies are connected to each other via the imager workpiece. At least one transmissive element can be attached to the workpiece at least proximate to the standoffs so the lens devices are positioned between the corresponding image sensors and the at least one transmissive element. Accordingly, the at least one transmissive element can protect the image sensors while the image sensor dies are still connected.Type: GrantFiled: September 11, 2007Date of Patent: February 16, 2010Assignee: Aptina Imaging CorporationInventors: Warren M. Farnworth, Alan G. Wood
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Publication number: 20100032784Abstract: A solid-state image sensor (1) includes: an imaging device wafer (2A); a plurality of imaging devices (3) which are formed on the imaging device wafer (2A); a spacer (5) which surrounds the imaging devices (3) on the imaging device wafer (2A) and is joined to the imaging device wafer (2A) with an adhesive (7); a transparent protection member (4) which covers the imaging devices (3) on the imaging device wafer (2A) and is attached on the spacer (5); and a plurality of electrostatic discharge protection devices (10A) which are formed on the imaging device wafer (2A), the electrostatic discharge protection devices (10A) being positioned under the spacer (5), each of the electrostatic discharge protection devices (10A) having diffusion layers (12, 13) and a well layer (11) between the diffusion layers (12, 13), the well layer (11) being provided with a channel stopper (20).Type: ApplicationFiled: September 27, 2007Publication date: February 11, 2010Applicant: FUJIFILM CorporationInventors: Kosuke Takasaki, Mamoru Iesaka, Hideki Wako
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Publication number: 20100025795Abstract: An image sensing device and packaging method thereof is disclosed. The packaging method includes the steps of a) providing an image sensing module, having a light-receiving region exposed, on a first substrate; b) forming a plurality of first contacts around the light-receiving region on the image sensing module; c) providing a second substrate, having a plurality of second contacts corresponding to the plurality of first contacts and an opening for allowing the light-receiving region to be exposed while the second substrate is placed over the image sensing module, the plurality of second contacts being disposed around the opening; d) connecting the plurality of first contacts and the plurality of second contacts; and e) disposing a transparent lid above the light-receiving region, on a side of the second substrate which is opposite to the plurality of second contacts.Type: ApplicationFiled: August 1, 2008Publication date: February 4, 2010Applicant: Impac Technology Co., Ltd.Inventors: Chi-Chih Huang, Chih-Yang Hsu
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Publication number: 20100025794Abstract: An image sensor chip package structure includes a transparent substrate, a chip, a sealing ring, a number of conductive posts, and a number of conductive bumps. The transparent substrate has a number of through holes. The through holes pass through the transparent substrate. The chip has an active surface, an image sensitive area, and a number of die pads. The image sensitive area and the die pads are located on the active surface. The sealing ring is disposed between the chip and the transparent substrate and surrounds the image sensitive area and the die pads. The conductive posts are disposed in the through holes, respectively. Here, the chip is electrically connected with the conductive posts via the die pads. The conductive bumps are disposed on the die pads, respectively. The conductive bumps are connected with the conductive posts, respectively.Type: ApplicationFiled: July 31, 2008Publication date: February 4, 2010Applicant: UNIMICRON TECHNOLOGY CORP.Inventor: Chih-Wei Lu
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Patent number: 7654753Abstract: Various embodiments of optical subassemblies, and arrangements and methods for manufacturing same, for an electro-optical assembly are disclosed. One embodiment comprises an optical subassembly for an electro-optical assembly. The optical subassembly comprises a printed circuit board, an optical semiconductor device, and an optical element. The printed circuit board has a first surface, a second surface, and an aperture therethrough. The optical semiconductor device is attached to the first surface with an active region exposed to the aperture. The optical element is attached to the second surface with an optical axis exposed to the aperture and optically aligned with the active region.Type: GrantFiled: June 2, 2008Date of Patent: February 2, 2010Assignee: Avago Technologies Fiber IP (Singapore) Pte. Ltd.Inventors: Tom Sheau Tung Wong, Adrianus J. P. van Haasteren, Tze Wei Lim
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Publication number: 20100019340Abstract: The present invention provides a back illuminated photodetector having a sufficiently small package as well as being capable of suppressing the scattering of to-be-detected light and method for manufacturing the same. A back illuminated photodiode 1 comprises an N-type semiconductor substrate 10, a P+-type impurity semiconductor region 11, a recessed portion 12, and a window plate 13. In the surface layer on the upper surface S1 side of the N-type semiconductor substrate 10 is formed the P+-type impurity semiconductor region 11. In the rear surface S2 of the N-type semiconductor substrate 10 and in an area opposite the P+-type impurity semiconductor region 11 is formed the recessed portion 12 that functions as an incident part for to-be-detected light. Also, the window plate 13 is bonded to the outer edge portion 14 of the recessed portion 12. The window plate 13 covers the recessed portion 12 and seals the rear surface S2 of the N-type semiconductor substrate 10.Type: ApplicationFiled: May 4, 2009Publication date: January 28, 2010Inventor: Katsumi Shibayama
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Publication number: 20100019339Abstract: Apparatuses and methods directed to an integrated circuit package having an optical component are disclosed. The package may include an integrated circuit die having at least one light sensitive region disposed on a first surface thereof. By way of example, the die may be a laser diode that emits light through the light sensitive region, or a photodetector that receives and detects light through the light sensitive region. An optical concentrator may be positioned adjacent the first surface of the first die. The optical concentrator includes a lens portion positioned adjacent the light sensitive region and adapted to focus light.Type: ApplicationFiled: July 22, 2008Publication date: January 28, 2010Applicants: NATIONAL SEMICONDUCTOR CORPORATION, THE REGENTS OF THE UNIVERSITY OF CALIFORNIAInventors: Randall L. WALBERG, Luu T. NGUYEN, Robert DAHLGREN, James B. WIESER, Kenneth PEDROTTI, Jacob A. WYSOCKI
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Patent number: 7649270Abstract: A collective substrate (1) is produced by firing a ceramic green sheet and forming through-holes (11) in the resulting substrate. The through-holes (11) each have an interior surface including taper surfaces (11b, 11c) which are tapered as having an opening size progressively decreasing from a main surface (21) and an external connection surface (22) toward a minimum size hole portion (11a). The taper surfaces (11b, 11c) respectively form obtuse angles ?1, ?2 with the main surface (21) and the external connection surface (22). A semiconductor element mount (BL) includes an insulative member (2) cut out of the collective substrate (1). An imaging device (PE2) includes an imaging element (PE1) mounted in a region surrounded by a frame (4) which is bonded to the main surface (21) of the insulative member (2) and closed by a cover (FL).Type: GrantFiled: July 21, 2005Date of Patent: January 19, 2010Assignee: A. L. M. T. Corp.Inventors: Kenjiro Higaki, Daisuke Takagi, Sadamu Ishidu, Yasushi Tsuzuki
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Publication number: 20100008203Abstract: A semiconductor element is mounted on a rectangular base of a package including the base and ribs provided on a pair of opposite external edges of the base. Electrode pads of the semiconductor element and connection electrodes provided on rib upper surfaces are connected to each other by metal wires. On the rib upper surfaces, spacers are provided at locations closer to the outside than the connection electrodes. A transparent lid adheres to the upper surfaces of the spacers to cover the entire surface of the package. The height of the spacers is greater than the diameter of the metal wires.Type: ApplicationFiled: March 10, 2008Publication date: January 14, 2010Inventors: Junya Furuyashiki, Syouzou Moribe, Hiroki Utatsu, Noriyuki Yoshikawa, Toshiyuki Fukuda, Masanori Minamio, Hiroyuki Ishida
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Patent number: 7646075Abstract: Microelectronic imager assemblies with front side contacts and methods for fabricating such microelectronic imager assemblies are disclosed herein. In one embodiment, a microelectronic imager assembly comprises a workpiece including a substrate having a front side and a backside. The assembly further includes a plurality of imaging dies on and/or in the substrate. The imaging dies include image sensors at the front side of the substrate, integrated circuitry operatively coupled to the image sensors, and bond-pads at the front side of the substrate electrically coupled to the integrated circuitry. The assembly also includes a plurality of stand-offs at the front side of the substrate. The stand-offs have apertures aligned with corresponding image sensors. The assembly further includes a plurality of external contacts electrically coupled to corresponding bond-pads and projecting away from the dies.Type: GrantFiled: July 7, 2005Date of Patent: January 12, 2010Assignee: Micron Technology, Inc.Inventor: Salman Akram
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Publication number: 20090321867Abstract: The invention relates to a method for production of packaged electronic, in particular optoelectronic, components in a composite wafer, in which the packaging is carried out by fitting microframe structures of a cover substrate composed of glass, and the composite wafer is broken up along trenches which are produced in the cover substrate, and to packaged electronic components which can be produced using this method, comprising a composite of a mount substrate and a cover substrate, with at least one functional element and at least one bonding element, which makes contact with the functional element, being arranged on the mount substrate, with the cover substrate being a microstructured glass which is arranged on the mount substrate, and forms a cavity above the functional element, and with the bonding elements being located outside the cavity.Type: ApplicationFiled: April 10, 2006Publication date: December 31, 2009Applicant: SCHOTT AGInventors: Juergen Leib, Dietrich Mund
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Patent number: 7638804Abstract: A solid-state imaging device is disclosed. In the solid-state imaging device, plural unit areas, each having a photoelectric conversion region converting incident light into electric signals are provided adjacently, in which each photoelectric conversion region is provided being deviated from the central position of each unit area to a boundary position between the plural unit areas, a high refractive index material layer is arranged over the deviated photoelectric conversion region, and a low refractive index material layer is provided over the photoelectric conversion regions at the inverse side of the deviated direction being adjacent to the high refractive index material layer, and optical paths of the incident light are changed by the high refractive index material layer and the low refractive index material layer, and the incident light enters the photoelectric conversion region.Type: GrantFiled: March 16, 2007Date of Patent: December 29, 2009Assignee: Sony CorporationInventors: Hideo Kido, Hiroaki Ishiwata
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Patent number: 7635906Abstract: The ultraviolet sensor has a ZnO layer composed of an oxide semiconductor including ZnO; a (Ni,Zn)O layer which is provided in contact with the ZnO layer and which is composed of an oxide semiconductor including NiO and ZnO solid-solved therein; a first terminal electrode electrically connected to the ZnO layer, and a second terminal electrode electrically connected to the (Ni,Zn)O layer. The ZnO layer is disposed at an ultraviolet ray receiving side. The (Ni,Zn)O layer is preferably formed of a sintered body.Type: GrantFiled: October 24, 2008Date of Patent: December 22, 2009Assignee: Murata Manufacturing Co., Ltd.Inventors: Kazutaka Nakamura, Yoshihiro Ito
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Publication number: 20090309179Abstract: A packaging substrate with an embedded photosensitive semiconductor chip and a method for fabricating the same are provided. The method includes the steps of: disposing the semiconductor chip in an through cavity of a core board with the photosensitive portion of the semiconductor chip being exposed from the through cavity; forming a first circuit layer on the core board at a side opposite to the photosensitive portion so as to electrically connect the electrode pads of the semiconductor chip; and forming a light-permeable layer on the core board at the same side with the photosensitive portion via an adhesion layer so as to allow light to penetrate through the light-permeable layer and reach the photosensitive portion of the semiconductor chip. When fabricated by the method, the packaging substrate dispenses with conductive wires and a surrounding dam and thus is efficiently downsized.Type: ApplicationFiled: June 12, 2009Publication date: December 17, 2009Applicant: PHOENIX PRECISION TECHNOLOGY CORPORATIONInventors: Shih-Ping Hsu, Kan-Jung Chia
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Patent number: 7633133Abstract: This invention provides a semiconductor device that solves a problem that a pattern of a wiring formed on a back surface of a semiconductor substrate is reflected on an output image. A light receiving element (e.g. a CCD, an infrared ray sensor, a CMOS sensor, or an illumination sensor) is formed on a front surface of a semiconductor substrate, and a plurality of ball-shaped conductive terminals is disposed on a back surface of the semiconductor substrate. Each of the conductive terminals is electrically connected to a pad electrode on the front surface of the semiconductor substrate through a wiring layer. The wiring layer and the conductive terminal are formed on the back surface of the semiconductor substrate except in a region overlapping the light receiving element in a vertical direction, and are not disposed in a region overlapping the light receiving element.Type: GrantFiled: December 15, 2006Date of Patent: December 15, 2009Assignee: Sanyo Electric Co., Ltd.Inventors: Takashi Noma, Kazuo Okada, Shinzo Ishibe, Katsuhiko Kitagawa, Yuichi Morita, Shigeki Otsuka, Hiroshi Yamada, Noboru Okubo, Hiroyuki Shinogi, Mitsuru Okigawa
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Publication number: 20090294887Abstract: A semiconductor device comprises a semiconductor substrate comprised of an interposer having one surface and a semiconductor element provided on the one surface of the interposer, the semiconductor element including a light receiving portion for receiving light thereon; a transparent substrate having light-transmitting property and one surface facing the light receiving portion, the transparent substrate arranged in a spaced-apart relationship with the one surface of the interposer through a gap formed between the one surface of the interposer and the one surface of the transparent substrate; and a spacer formed in a shape of a frame, the spacer positioned between the one surface of the interposer and the one surface of the transparent substrate for regulating the gap, and the spacer having an inner surface and an outer surface, wherein the one surface of the interposer, the one surface of the transparent substrate and the inner surface of the spacer form a space which is hermetically sealed, and wherein theType: ApplicationFiled: June 19, 2008Publication date: December 3, 2009Inventors: Takashi Hirano, Toyosei Takahashi, Toshihiro Sato, Masakazu Kawata
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Patent number: 7626239Abstract: The invention relates to tunable wavelength-selective optical filters for letting light of a narrow optical spectrum band, centered around an adjustable wavelength, to pass through and to stop wavelengths lying outside this band. More particularly, the invention relates to a process for the collective fabrication of optical filtering components, consisting in producing a plurality of optical filtering components on a transparent substrate. The process further comprises covering the plurality of components with a transparent collective cover, in optically testing each component individually, and in separating the various components from one another. The invention also relates to a wafer of components, comprising a transparent substrate on which a plurality of optical filtering components has been produced, a transparent cover (8) collectively covering the components. The wafer further includes means for individually testing each component.Type: GrantFiled: May 16, 2003Date of Patent: December 1, 2009Assignee: Atmel Grenoble S.A.Inventors: Jean-Pierre Moy, Xavier Hugon
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Patent number: 7626160Abstract: An image sensor package (110) includes a base board (111), a supporter (113), an image sensor (112), a plurality of wires (114), a main adhesive (115) and a cover board (116). The supporter includes a through hole and a plurality of top pads (113c) formed around the through hole, and the supporter is mounted on the base board and electrically connected to the base board. The image sensor is mounted on the base board and received in the through hole, and the image sensor includes a sensing portion (112b) and a plurality of contacts (112a). The wires electrically connect the top pads to the contacts. The main adhesive is applied on the image sensor and surrounds the sensing portion. The cover board supported on the main adhesive, and the cover board and the main adhesive cooperatively enclose the sensing portion of the image sensor.Type: GrantFiled: December 28, 2006Date of Patent: December 1, 2009Assignee: Altus Technology Inc.Inventors: Ying-Cheng Wu, Chun-Hung Lin
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Publication number: 20090289319Abstract: A semiconductor device, that is approximately identical in package size to a semiconductor chip, such as a W-CSP, is devised to secure a wider area for sealing such as laser marking. A semiconductor substrate has a plurality of via electrodes extending from the bottom of the semiconductor substrate to top electrodes, a bottom wire net formed at the bottom of the semiconductor substrate such that the bottom wire net is connected to the via electrodes, and an insulative film covering the bottom wire net. A sealing area having a sealing mark is disposed at the bottom of the semiconductor substrate. The sealing area is located such that the outer circumference of the sealing area is spaced apart from the bottom wire net in a direction parallel to a sealing mark forming surface, and the outer circumference of the sealing area is disposed at the edge of the semiconductor substrate.Type: ApplicationFiled: March 13, 2009Publication date: November 26, 2009Applicant: OKI SEMICONDUCTOR CO., LTD.Inventor: Yoshifumi Sakamoto
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Patent number: 7622786Abstract: A module that provides EMI shielding for imager devices is disclosed which includes a die comprising an imager device and a plurality of contact pads, a stack positioned above the imager device, the stack comprising at least one lens, a conductive layer positioned above the stack, the conductive layer comprising at least one light opening, and a plurality of wire bonds, each of which conductively couples the conductive layer to one of the contact pads on the die. A method of providing EMI shielding for an imager module is also disclosed which includes conductively coupling a conductive layer of the module to a plurality of contact pads on an imager die and forming an encapsulant material that encapsulates at least the plurality of wire bonds, the conductive layer and the contact pads.Type: GrantFiled: December 28, 2007Date of Patent: November 24, 2009Assignee: Aptina Imaging CorporationInventor: Luke England
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Publication number: 20090283664Abstract: A power device is provided in an optically-triggered power system having a controller for generating electrical control signals and a converter for converting the electrical control signals to optical control signals. The power device includes a pair of terminals and a P-body region provided adjacent an N+ source region. An optical window is provided at least partially over the P-body region, and an N? drift region is provided between the two terminals. The P-body region causes current to conduct between the first and second terminal through the N? drift region when an optical control signal is incident on the optical window.Type: ApplicationFiled: June 23, 2006Publication date: November 19, 2009Applicant: THE BOARD OF TRUSTEES OF THE UNIVERSITY OF ILLINOIInventors: Sudip K. Mazumder, Tirthajyoti Sarkar
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Patent number: 7615837Abstract: General purpose methods for the fabrication of integrated circuits from flexible membranes formed of very thin low stress dielectric materials, such as silicon dioxide or silicon nitride, and semiconductor layers. Semiconductor devices are formed in a semiconductor layer of the membrane. The semiconductor membrane layer is initially formed from a substrate of standard thickness, and all but a thin surface layer of the substrate is then etched or polished away. In another version, the flexible membrane is used as support and electrical interconnect for conventional integrated circuit die bonded thereto, with the interconnect formed in multiple layers in the membrane. Multiple die can be connected to one such membrane, which is then packaged as a multi-chip module. Other applications are based on (circuit) membrane processing for bipolar and MOSFET transistor fabrication, low impedance conductor interconnecting fabrication, flat panel displays, maskless (direct write) lithography, and 3D IC fabrication.Type: GrantFiled: January 24, 2005Date of Patent: November 10, 2009Assignee: Taiwan Semiconductor Manufacturing CompanyInventor: Glenn J Leedy
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Patent number: 7616250Abstract: An image capturing device is disclosed that includes a light receiving element having a light receiving surface, a plate-like transparent member provided on the light receiving surface of the light receiving element, and resin provided to at least the periphery of the plate-like transparent member. The plate-like transparent member includes a first principal plane positioned on the light receiving element side and a second principal plane opposite the first principal plane. The first principal plane is greater in area than the second principal plane.Type: GrantFiled: November 23, 2004Date of Patent: November 10, 2009Assignee: Fujitsu Microelectronics LimitedInventors: Naoyuki Watanabe, Toshiyuki Honda, Yoshito Akutagawa, Susumu Moriya, Izumi Kobayashi
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Patent number: 7612385Abstract: Disclosed herein is a package structure including at least one high power light-emitting diode to exhibit excellent heat release properties. In the package structure, a light-emitting diode chip which generates heat is directly attached to a beacon processed to protrude from part of a heat spreader having high heat conductivity, whereby an electrical wiring portion is separated from a heat release portion, thus maximizing heat release properties and realizing high luminance and reliability.Type: GrantFiled: December 30, 2005Date of Patent: November 3, 2009Assignee: Korea Photonics Technology InstituteInventors: Young-Woo Kim, Tae-Hoon Kim, Young-Moon Yu
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Patent number: 7612441Abstract: An image-sensing chip package module adapted to dual-side soldering includes three substrates, an image-sensing chip and a filter lens. The three substrates are stacked together by pressing (using adhesive as adhesion medium), and the image-sensing chip is electrically connected to the top side of the top substrate and the bottom side of the bottom substrate via conductive bodies that are formed on inner surfaces of through holes passing through the three substrates. Hence, the image-sensing chip package module can use the conductive bodies formed on the bottom side of the bottom substrate (positive face electrical conduction) or the conductive bodies formed on the top side of the top substrate (negative face electrical conduction) to electrically connect with a main PCB. Furthermore, the filter lens is received and hidden in an opening of the top substrate in order to prevent the filter lens from being slid, collided and destroyed.Type: GrantFiled: May 5, 2008Date of Patent: November 3, 2009Assignee: Lite-On Semiconductor Corp.Inventor: Meng-Kun Chen
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Publication number: 20090267170Abstract: A packaged image sensor assembly utilizes a spacer paste to control the height of a transparent window above an image sensor die to provide safe wire bond clearance. A dam structure is used to control the height of the transparent window. The dam may be formed either entirely from spacer paste or by depositing the spacer paste on an underlying patterned mesa. An additional encapsulant is provided outside of the dam to encapsulate wirebonds and provide additional protection from moisture permeation.Type: ApplicationFiled: April 29, 2008Publication date: October 29, 2009Applicant: OmniVision Technologies, Inc.Inventors: Yeh-An Chien, Wei-Feng Lin
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Publication number: 20090267171Abstract: A pre-encapsulated cavity interposer, a pre-encapsulated frame, for a semiconductor device.Type: ApplicationFiled: May 28, 2008Publication date: October 29, 2009Applicant: MICRON TECHNOLOGY, INC.Inventors: Tay Wuu Yean, Wang Ai-Chie
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Publication number: 20090267172Abstract: A method of manufacturing a micromodule including the steps of: producing an integrated circuit on an active face of a chip made of a semi-conductive material, making a via passing through the chip, electrically linked to the integrated circuit, and inserting the chip into a box comprising a cavity and an electrically conductive element, the active face of the chip being disposed towards the bottom of the cavity, forming on at least one part of a lateral face of the chip a conductive lateral layer made of an electrically conductive material, electrically linked to a conductive element of the rear face of the chip, and producing a connection between the conductive lateral layer and the conductive element by depositing an electrically conductive material in the cavity.Type: ApplicationFiled: October 20, 2008Publication date: October 29, 2009Applicants: STMicroelectronics Rousset SAS, STMicroelectronics R&D LimitedInventors: Brendan Dunne, Kevin Channon, Eric Christison, Robert Nicol
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Publication number: 20090267173Abstract: A semiconductor device includes a plurality of semiconductor integrated circuits bonded to a structure body in which a fibrous body is impregnated with an organic resin. The plurality of semiconductor integrated circuits are provided at openings formed in the structure body and each include a photoelectric conversion element, a light-transmitting substrate which has stepped sides and in which the width of the projected section on a first surface side is smaller than that of a second surface, a semiconductor integrated circuit portion provided on the second surface of the light-transmitting substrate, and a chromatic color light-transmitting resin layer which covers the first surface and part of side surfaces of the light-transmitting substrate. The plurality of semiconductor integrated circuits include the chromatic color light-transmitting resin layers of different colors.Type: ApplicationFiled: March 16, 2009Publication date: October 29, 2009Inventors: Hidekazu Takahashi, Daiki Yamada, Yohei Monma, Takahiro Iguchi, Hiroki Adachi, Shunpei Yamazaki