With Window Means Patents (Class 257/434)
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Publication number: 20120161271Abstract: A semiconductor device having a substrate including a photodiode; a resin layer formed on an upper surface of the substrate, the resin layer not covering a light receiving region of the photodiode, the resin layer including at least one groove surrounding the light receiving region; and a molding resin portion formed by mold-sealing the photodiode with the resin layer thereon so as not to cover the light receiving region.Type: ApplicationFiled: February 29, 2012Publication date: June 28, 2012Applicant: SONY CORPORATIONInventors: Shuji Yoneda, Masato Oishi, Tamotsu Shinohara, Shinji Watanabe, Koji Miyata, Seiji Fukae, Kenji Yamauchi, Yoichi Goto, Masakazu Baba
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Patent number: 8198120Abstract: An optical article and method of making the same are provided. The optical article has optical multi-aperture operation. The optical article has one or more electrically conductive and selectively passivated patterns.Type: GrantFiled: January 28, 2009Date of Patent: June 12, 2012Assignee: Rohm and Haas Electronic Materials LLCInventors: Jitendra S. Goela, Michael A. Pickering, Neil D. Brown, Angelo Chirafisi, Mark Lefebvre, Jamie L. Triba
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Patent number: 8193599Abstract: A fabricating method includes adhering an exposed surface of a first solid adhesive film to a first substrate. The second surface of the first solid adhesive film is exposed and adhered to a second substrate. A third substrate is adhered to a second substrate via a patterned second solid adhesive film, and a diaphragm layer is adhered to the third substrate via a patterned third solid adhesive film. A fourth solid adhesive film with a removable release film is adhered to the first substrate covered, followed by slicing to form wafer level lens modules.Type: GrantFiled: December 23, 2009Date of Patent: June 5, 2012Assignee: Himax Semiconductor, Inc.Inventors: Hsin-Chang Hsiung, Chih-Wei Tan, Po-Lin Su
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Publication number: 20120133013Abstract: A semiconductor light receiving element includes a first semiconductor layer having a first conduction type, a second semiconductor layer that is provided on the first semiconductor layer and has a light receiving area, the second semiconductor layer having a second conduction type opposite to the first conduction type, an insulation film provided on the second semiconductor layer, and an electrode provided on the insulation film, the insulation film having a plurality of windows in an area in which the electrode overlaps the plurality of windows, the electrode being electrically connected to the second semiconductor layer via the plurality of windows.Type: ApplicationFiled: November 30, 2011Publication date: May 31, 2012Applicant: SUMITOMO ELECTRIC DEVICE INNOVATIONS, INC.Inventor: Yuji Koyama
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Patent number: 8188561Abstract: An integrated vacuum package having an added volume on a perimeter within the perimeter of a bonding seal between two wafers. The added volume of space may be an etching of material from the inside surface of the top wafer. This wafer may have vent holes that may be sealed to maintain a vacuum within the volume between the two wafers after the pump out of gas and air. The inside surface of the top wafer may have an anti-reflective pattern. Also, an anti-reflective pattern may be on the outside surface of the top wafer. The seal between the two wafers may be ring-like and have a spacer material. Also, it may have a malleable material such as solder to compensate for any flatness variation between the two facing surfaces of the wafers.Type: GrantFiled: December 1, 2010Date of Patent: May 29, 2012Assignee: Honeywell International Inc.Inventors: Robert E. Higashi, Karen M. Newstrom-Peitso, Jeffrey A. Ridley
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Patent number: 8169043Abstract: An optical sensor package structure includes a substrate, a metal plate, an optical sensing chip, a plurality of bonding wires and a lens module. The substrate includes a top surface, a bottom surface and a hole penetrating the top surface and the bottom surface. The metal plate covers the hole from the bottom surface of the substrate. The optical sensing chip is received in the hole and mounted on the metal plate. The bonding wires interconnect the optical sensing chip and the top surface of substrate. The lens module is covering on the hole and mounting on the top surface of the substrate to enclose the optical sensing chip and the bonding wires. Because the optical sensing chip is received in the hole of the substrate, the height of the optical sensor package structure can be reduced to adapt to a compact size electrical device.Type: GrantFiled: February 9, 2010Date of Patent: May 1, 2012Assignee: Cheng Uei Precision Industry Co., Ltd.Inventors: Yu-Hsiang Chen, Cheng-I Lu, Min-Nan Yeh, Chi-Hsiang Chang
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Patent number: 8159049Abstract: There is disclosed a photo-detector array including a plurality of sub-arrays of photo-detectors, the photo-detectors of each sub-array being formed on a substrate with an active area of each photo-detector being formed on a surface of the substrate, there further being formed for each photo-detector a conductive via through the substrate from an upper surface thereof to a lower surface thereof to connect the active area of each photo-detector to the lower surface of the substrate, wherein a plurality of said sub-arrays of photo-detectors are placed adjacent to each other in a matrix to form the photo-detector array. An imaging system comprising: a radiation detector including such a photo detector array, a radiation source facing the radiation detector, and means for controlling the radiation detector and the radiation source is also disclosed. A method for making such an array is also disclosed.Type: GrantFiled: July 18, 2003Date of Patent: April 17, 2012Assignee: Detection Technology OyInventor: Iiro Hietanen
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Patent number: 8153467Abstract: A method for manufacturing a semiconductor device, includes the steps of: forming a resin layer on an upper surface of a substrate including a photodiode such that the resin layer does not cover a light receiving region of the photodiode; forming at least one groove in the resin layer so as to surround the light receiving region; and subsequently mold-sealing the photodiode by loading the substrate into a mold and filling the mold with a molding resin.Type: GrantFiled: March 5, 2009Date of Patent: April 10, 2012Assignee: Sony CorporationInventors: Shuji Yoneda, Masato Oishi, Tamotsu Shinohara, Shinji Watanabe, Koji Miyata, Seiji Fukae, Kenji Yamauchi, Yoichi Goto, Masakazu Baba
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Patent number: 8148795Abstract: A functional device includes plural substrates, an encapsulant arranged between the plurality of substrates, and a functional material arranged between the plural of substrates and encapsulated with the encapsulant. The functional device further includes an insulating spacer arranged in an entire region where the encapsulant lies, wherein the insulating spacer bonds with the plural substrates through the encapsulant. The encapsulant and the insulating spacer of the functional device allow avoiding a short circuit by providing a constant separation distance between the plural substrates of the functional device and electrodes adjacent to the plural substrates. The insulating spacer is made of a material that is inert to the functional material.Type: GrantFiled: January 16, 2007Date of Patent: April 3, 2012Assignee: Sony CorporationInventors: Masahiro Morooka, Yusuke Suzuki, Reiko Ogura
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Patent number: 8148811Abstract: This invention is directed to offer a semiconductor device in which a cavity space is easily provided in a specific region when a supporting member is bonded to a semiconductor substrate through an adhesive layer, and its manufacturing method. A resist layer is applied to an entire top surface of the semiconductor substrate 2, and exposure to transfer a pattern is performed. By subsequent development and selective removal of the resist layer, the resist layer is formed into a shape of a plurality of columnar structures 4. Then, an adhesive material made of an epoxy resin or the like is applied to the entire top surface of the semiconductor substrate 2. The adhesive material is gathered around the columnar structures 4 by itself to form an adhesive layer 5. Therefore, in contrast, the adhesive layer 5 does not deposit in a region where the cavity is to be formed. Then, the supporting member 6 is bonded through the columnar structures 4 and the adhesive layer 5.Type: GrantFiled: August 22, 2007Date of Patent: April 3, 2012Assignees: Semiconductor Components Industries, LLC, SANYO Semiconductor Co., Ltd.Inventors: Hiroyuki Shinogi, Katsuhiko Kitagawa, Kazuo Okada, Hiroshi Yamada
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Patent number: 8138565Abstract: An LDMOS device and method for making the same are disclosed. The LDMOS device comprises a first well, a second well, a third well, a first ion implantation region, and a second ion implantation region. The first well is in a semiconductor substrate. The second well is in the first well. The third well is first well adjacent to the second well. The first ion implantation region is in the second well. The second ion implantation region is in the third well. A device isolation layer structure between a P-type well region and a P-type body of the LDMOS device may be eliminated, thereby preventing a reduction in the doping concentration of the P-type well, thus minimizing leakage current and maintaining a high breakdown voltage.Type: GrantFiled: December 10, 2009Date of Patent: March 20, 2012Assignee: Dongbu HiTek Co., Ltd.Inventor: Chan Hee Kang
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Patent number: 8129829Abstract: A packaging substrate with an embedded photosensitive semiconductor chip and a method for fabricating the same are provided. The method includes the steps of: disposing the semiconductor chip in an through cavity of a core board with the photosensitive portion of the semiconductor chip being exposed from the through cavity; forming a first circuit layer on the core board at a side opposite to the photosensitive portion so as to electrically connect the electrode pads of the semiconductor chip; and forming a light-permeable layer on the core board at the same side with the photosensitive portion via an adhesion layer so as to allow light to penetrate through the light-permeable layer and reach the photosensitive portion of the semiconductor chip. When fabricated by the method, the packaging substrate dispenses with conductive wires and a surrounding dam and thus is efficiently downsized.Type: GrantFiled: June 12, 2009Date of Patent: March 6, 2012Assignee: Unimicron Technology Corp.Inventors: Shin-Ping Hsu, Kan-Jung Chia
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Publication number: 20120049309Abstract: The Problems To provide a smartcard that embeds a fingerprint image acquisition sensor, having thickens of 0.76 mm or less compiling with the International Standard organization (ISO). Means for Solving the Problem A smartcard comprising a core substrate which is configured with a film substrate 21 on which a fingerprint image acquisition sensor IC chip 11, an electric circuit pattern and accompanying electrical, and a reinforcing metal or composite plate 1 which is adhered to the back surface of the fingerprint image acquisition sensor IC chip 11; an over sheets 31 and an under sheet 33, which are made of thermoplastic or paper, sandwiching the core substrate 33, where the over sheet 31 and the under sheet 33 are attached with a thermal adhesive sheet, which functions as a mechanical buffer to protect the electrical components from external stress. The adhesive sheet is made of urethane rubber or similar substance.Type: ApplicationFiled: October 16, 2010Publication date: March 1, 2012Inventors: Shoichi Kiyomoto, Shinil Cho
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Patent number: 8125042Abstract: Provided are a semiconductor package and a method of manufacturing the same. The semiconductor package includes a semiconductor chip, a transparent substrate, an adhesive pattern, and at least one dew-proofer. The semiconductor includes a pixel area. The transparent substrate is disposed on the semiconductor chip. The adhesive pattern is disposed between the semiconductor chip and the transparent substrate and provides a space on the pixel area. At least one dew-proofer is disposed between the semiconductor chip and the transparent substrate and spaced from the adhesive pattern.Type: GrantFiled: November 13, 2009Date of Patent: February 28, 2012Assignee: Samsung Electronics Co., Ltd.Inventors: Jung-Hwan Kim, Un-Byoung Kang, Dong-Hun Yi, Woonseong Kwon, Hyung-Sun Jang, Jongkeun Jeon, Yongjin Lee, Keeseok Kim
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Patent number: 8125000Abstract: Disclosed is a light emitting device package. The light emitting device package includes a semiconductor substrate comprising a first surface at a first depth from an upper surface of the semiconductor substrate and a second surface at a second depth from the first surface; and a light emitting part on the second surface of the semiconductor substrate.Type: GrantFiled: June 21, 2011Date of Patent: February 28, 2012Assignee: LG Innotek Co., Ltd.Inventors: Geun Ho Kim, Yu Ho Won
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Patent number: 8115267Abstract: A semiconductor device which comprises an SOI substrate having an insulating layer between a semiconductor substrate layer and a semiconductor layer in a surface of which a semiconductor element is formed, and at least one external terminal provided, via an insulating film, on a surface of the semiconductor substrate layer and electrically connected to the semiconductor element. The semiconductor device further comprises a contact portion constituted by a conductive film reaching through the insulating film to electrically connect to the semiconductor substrate layer; and a potential fixing electrode provided, via the insulating film, on the surface of the semiconductor substrate layer and connected to the contact portion.Type: GrantFiled: July 21, 2009Date of Patent: February 14, 2012Assignee: Lapis Semiconductor Co., Ltd.Inventor: Noriyuki Miura
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Publication number: 20120032284Abstract: According to one aspect of the present invention, a film for a resin spacer (10) comprises an adhesive layer (12) made of a resin composition and a cover film (14) covering a surface of the adhesive layer (12). In the above-described film for a resin spacer (10), an adhesion force C1 between the adhesive layer (12) and the cover film (14) and an adhesion force D between the adhesive layer (12) and a silicone resin are set so as to satisfy the condition C1>D. Consequently, it is possible to reduce resin adherence to a cutting table at the time of cutting the film for a resin spacer (10).Type: ApplicationFiled: March 25, 2010Publication date: February 9, 2012Inventors: Hirohisa Dejima, Masakazu Kawata, Masahiro Yoneyama, Toyosei Takahashi, Fumihiro Shiraishi, Toshihiro Sato
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Patent number: 8106496Abstract: A semiconductor package comprises a semiconductor component (e.g., a die) and a via at least partially covered by an encapsulant. The encapsulant forms substantially parallel top and bottom surfaces, with at least part of the via being exposed on the top surface. At least one conductive pad is exposed on the bottom surface, and the via can electrically couple the top and bottom surfaces, as well as couple the semiconductor component at the top and bottom surfaces. An additional semiconductor component can be coupled to the top surface with a circuit pattern formed on the top surface and coupled to the via.Type: GrantFiled: June 4, 2007Date of Patent: January 31, 2012Assignee: Stats Chippac, Inc.Inventors: Kambhampati Ramakrishna, Il Kwon Shim, Seng Guan Chow
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Publication number: 20120012963Abstract: In one embodiment, a method for making an optical micro device package includes: providing a substrate wafer having a plurality of solid state light sensors integrate therein; providing a transparent cover wafer coated with a material that alters the transparency characteristics of the cover wafer; forming a layer of light sensitive, photo definable adhesive material on the substrate wafer; selectively removing part of the layer of adhesive material in a pattern for a plurality of adhesive spacers between the substrate wafer and the cover wafer with each spacer surrounding a corresponding one of the light sensors; bonding the substrate wafer and the cover wafer together at the spacers to form a wafer assembly in which each spacer surrounds and seals a corresponding one of the light sensors within a cavity bounded by a spacer and the two wafers; and singulating individual device packages from the wafer assembly.Type: ApplicationFiled: February 27, 2009Publication date: January 19, 2012Inventors: Zhuqing Zhang, Steve P. Hanson, Chien-Hua Chen
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Patent number: 8093674Abstract: A manufacturing method for molding an image sensor package structure and the image sensor package structure thereof are disclosed. The manufacturing method includes following steps of providing a half-finished image sensor for packaging, arranging a dam on the peripheral of a transparent lid of the half-finished image sensor, positioning the half-finished image sensor within a mold, and injecting a mold compound into the mold cavity of the mold. The dam is arranged on the top surface of the transparent lid and the inner surface of the mold can exactly contact with the top surface of dam so that the mold compound injected into the mold cavity is prevented from overflowing to the transparent lid by the dam. Furthermore, the arrangement of the dam and the mold compound can increase packaged areas and extend blockage to invasive moisture so as to enhance the reliability of the image sensor package structure.Type: GrantFiled: October 22, 2009Date of Patent: January 10, 2012Assignee: Kingpak Technology, Inc.Inventors: Hsiu-Wen Tu, Ren-Long Kuo, Young-Houng Shiao, Tsao-Pin Chen, Mon-Nan Ho, Chih-Cheng Hsu, Chin-Fu Lin, Chung-Hsien Hsin
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Patent number: 8084790Abstract: An image sensing device and packaging method thereof is disclosed. The packaging method includes the steps of a) providing an image sensing module, having a light-receiving region exposed, on a first substrate; b) forming a plurality of first contacts around the light-receiving region on the image sensing module; c) providing a second substrate, having a plurality of second contacts corresponding to the plurality of first contacts and an opening for allowing the light-receiving region to be exposed while the second substrate is placed over the image sensing module, the plurality of second contacts being disposed around the opening; d) connecting the plurality of first contacts and the plurality of second contacts; and e) disposing a transparent lid above the light-receiving region, on a side of the second substrate which is opposite to the plurality of second contacts.Type: GrantFiled: August 2, 2010Date of Patent: December 27, 2011Assignee: Tong Hsing Electronic Industries, Inc.Inventors: Chi-Chih Huang, Chih-Yang Hsu
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Patent number: 8084731Abstract: A light transmitting optical fiber shines light at a side edge portion of a hemispherical lens. The light is transmitted along the outer periphery of the lens to a second side edge portion located opposite the first side edge portion. A light sensitive component detects light at the second edge portion which light originated at the first side edge portion. The intensity of light detected at the second side edge portion is indicative of the fluid to which the lens is exposed.Type: GrantFiled: September 7, 2007Date of Patent: December 27, 2011Inventor: Douglas M. Johnson
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Patent number: 8076744Abstract: A photosensitizing chip package construction and manufacturing method thereof is comprised of photosensitizing chips constructed on one side of a wafer using a bonding layer; a color attachment array being disposed over those photosensitizing chips; a glass substrate provided with weir and covered up over the color attachment array; a proper gap being defined between the glass substrate and the color attachment array to promote permeability of stream of light by direct receiving stream of light from those photosensitizing chips constructed over the wafer.Type: GrantFiled: January 25, 2007Date of Patent: December 13, 2011Inventor: Chien-Hung Liu
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Patent number: 8076745Abstract: An imaging photodetection device includes a plurality of photodetectors (6) arrayed on a substrate (5) one-dimensionally or two-dimensionally, a low refractive index transparent layer (12) formed above the plural photodetectors, and a plurality of columnar or plate-like high refractive index transparent sections (13) embedded in the low refractive index transparent layer along the array direction of the plural photodetectors. At least two of the photodetectors correspond to one of the high refractive index transparent sections. Light entering the low refractive index transparent layer and the high refractive index transparent sections passes therethrough to be separated into a 0th-order diffracted light, a 1st-order diffracted light and a ?1st-order diffracted light by a phase shift occurring on the wavefront. Thereby, improvement in the efficiency for light utilization and pixel densification can be realized.Type: GrantFiled: July 22, 2008Date of Patent: December 13, 2011Assignee: Panasonic CorporationInventor: Seiji Nishiwaki
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Patent number: 8076742Abstract: An image sensor according to embodiments may include a semiconductor substrate, photodiodes disposed over the semiconductor substrate, a dielectric layer formed over the photodiodes, a color filter layer formed over the dielectric layer, a planarization layer formed over the color filter layer, a phase change material formed over the planarization layer, and a plurality of microlenses formed over the planarization layer, wherein the phase change material is positioned in the microlens. Further, a method for manufacturing an image sensor according to embodiments may include forming a dielectric layer over a semiconductor substrate with a plurality of photodiodes, sequentially forming a color filter layer and a planarization layer over the dielectric layer, forming a phase change material over the planarization layer, forming a patterned phase change material by partially etching the phase change material, and forming microlenses over the planarization layer and the phase change material.Type: GrantFiled: November 3, 2009Date of Patent: December 13, 2011Assignee: Dongbu HiTek Co., Ltd.Inventor: Byung-Ho Lee
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Patent number: 8067782Abstract: An exemplary LED package includes a dielectric plate, a heat conductor, a first planar electrode and a second planar electrode, a LED chip, and metal wires. The dielectric plate comprises a receiving groove defined therein. The heat conductor is positioned in the dielectric plate opposite to the receiving groove, and the heat conductor comprises a holding portion exposed on bottom of the receiving groove. The first and second planar electrodes are respectively received in the dielectric plate extending to the receiving groove and are spaced from the heat conductor. The first and second electrodes are respectively electrically connected to the LED chip by the metal wires. The LED chip is mounted on the holding portion of the heat conductor.Type: GrantFiled: April 7, 2009Date of Patent: November 29, 2011Assignee: Advanced Optoelectric Technology, Inc.Inventors: Chung-Min Chang, Chih-Peng Hsu, Chun-Wei Wang
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Publication number: 20110284983Abstract: A photodiode device and the manufacturing method of the same are provided. The photodiode device includes a substrate; an epitaxy layer on the substrate, the epitaxy layer including a window layer and a cap layer on the window layer, the cap layer covering a portion of the window layer; and a patterned conductive layer on the cap layer, the patterned conductive layer being formed with a bottom area and a top area wherein the bottom area is greater than the top area.Type: ApplicationFiled: February 1, 2011Publication date: November 24, 2011Applicant: SOLAPOINT CORPORATIONInventors: Chan Shin WU, Yung-Yi TU, Shan Hua WU
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Patent number: 8063462Abstract: A semiconductor device includes a semiconductor substrate having a first surface in which a light-receiving portion and electrodes are provided. The semiconductor substrate has a penetrating wiring layer connecting the first surface and the second surface. A light-transmissive protective member is disposed on the semiconductor substrate so as to cover the first surface. A gap is provided between the semiconductor substrate and the light-transmissive protective member. A protective film is formed at a surface of the light-transmissive protective member. The protective film has an opening provided at a region corresponding to the light-receiving portion.Type: GrantFiled: September 18, 2008Date of Patent: November 22, 2011Assignee: Kabushiki Kaisha ToshibaInventors: Kazumasa Tanida, Masahiro Sekiguchi, Susumu Harada
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Publication number: 20110278692Abstract: A solid-state image sensing element includes an effective pixel section in a central area of a light receiving surface thereof, and a ridge-shaped protruding portion is provided around the effective pixel section. A liquid transparent adhesive is applied on the effective pixel section, and a light transparent substrate is placed thereon. The light transparent substrate is in contact with the protruding portion, and is therefore prevented from sliding with the liquid adhesive serving as a lubricant. Thus, the light transparent substrate can be fixed at a predetermined position.Type: ApplicationFiled: July 27, 2011Publication date: November 17, 2011Applicant: Panasonic CorporationInventors: Yasuo TAKEUCHI, Tomoko Komatsu, Masashi Kuroda, Tetsushi Nishio, Kiyokazu Itoi
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Patent number: 8058177Abstract: Winged via structures to increase overlay margin are generally described. In one example, a method comprises depositing a sacrificial layer to an interlayer dielectric, the interlayer dielectric being coupled with a semiconductor substrate, forming at least one trench structure in the sacrificial layer wherein the trench structure comprises a first direction along a length of the trench structure and a second direction along a width of the trench structure wherein the second direction is substantially perpendicular to the first direction, depositing a light sensitive material to the trench structure and the sacrificial layer, and patterning at least one winged via structure in the light sensitive material to overlay the trench structure wherein the winged via structure extends in the second direction beyond the width of the trench structure onto the sacrificial layer.Type: GrantFiled: July 31, 2008Date of Patent: November 15, 2011Assignee: Intel CorporationInventors: Martin Weiss, Ruth Brain, Bob Bigwood, Shannon Daviess
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Patent number: 8053857Abstract: Methods for forming electrically conductive through-wafer interconnects in microelectronic devices and microelectronic devices are disclosed herein. In one embodiment, a microelectronic device can include a monolithic microelectronic substrate with an integrated circuit has a front side with integrated circuit interconnects thereon. A bond-pad is carried by the substrate and electrically coupled to the integrated circuit. An electrically conductive through-wafer interconnect extends through the substrate and is in contact with the bond-pad. The interconnect can include a passage extending completely through the substrate and the bond-pad, a dielectric liner deposited into the passage and in contact with the substrate, first and second conductive layers deposited onto at least a portion of the dielectric liner, and a conductive fill material deposited into the passage over at least a portion of the second conductive layer and electrically coupled to the bond-pad.Type: GrantFiled: December 23, 2010Date of Patent: November 8, 2011Assignee: Round Rock Research, LLCInventors: Salman Akram, Charles M. Watkins, Kyle K. Kirby, Alan G. Wood, William M. Hiatt
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Patent number: 8049290Abstract: Package (1) having a sensor assembly (2) with at least one sensitive surface (21) and an attachment surface (22), a carrier element (3) with a sensor attachment area (31), and a sensor attach material (4) for attaching the sensor assembly (2) to the sensor attachment area (31) of the carrier element. The package (1) comprises an encapsulation (5) of a first material, in which the encapsulation (5) covers the sensor attachment area (31) of the carrier element (3) and the sensor attach material (4) and leaves the at least one sensitive surface (21) free from the first material.Type: GrantFiled: February 12, 2009Date of Patent: November 1, 2011Assignee: Sencio B.V.Inventor: Jurgen Leonardus Theodorus Maria Raben
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Patent number: 8044946Abstract: The present invention intends to realize a narrow frame of a system on panel. In addition to this, a system mounted on a panel is intended to make higher and more versatile in the functionality. In the invention, on a panel on which a pixel portion (including a liquid crystal element, a light-emitting element) and a driving circuit are formed, integrated circuits that have so far constituted an external circuit are laminated and formed. Specifically, of the pixel portion and the driving circuit on the panel, on a position that overlaps with the driving circuit, any one kind or a plurality of kinds of the integrated circuits is formed by laminating according to a transcription technique.Type: GrantFiled: June 25, 2010Date of Patent: October 25, 2011Assignee: Semiconductor Energy Laboratory Co., Ltd.Inventors: Shunpei Yamazaki, Toru Takayama, Junya Maruyama, Yuugo Goto, Yumiko Ohno, Yasuyuki Arai, Noriko Shibata
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Patent number: 8039915Abstract: A solid-state image sensor (1) includes: an imaging device wafer (2A); a plurality of imaging devices (3) which are formed on the imaging device wafer (2A); a spacer (5) which surrounds the imaging devices (3) on the imaging device wafer (2A) and is joined to the imaging device wafer (2A) with an adhesive (7); a transparent protection member (4) which covers the imaging devices (3) on the imaging device wafer (2A) and is attached on the spacer (5); and a plurality of electrostatic discharge protection devices (10A) which are formed on the imaging device wafer (2A), the electrostatic discharge protection devices (10A) being positioned under the spacer (5), each of the electrostatic discharge protection devices (10A) having diffusion layers (12, 13) and a well layer (11) between the diffusion layers (12, 13), the well layer (11) being provided with a channel stopper (20).Type: GrantFiled: September 27, 2007Date of Patent: October 18, 2011Assignee: FUJIFILM CorporationInventors: Kosuke Takasaki, Mamoru Iesaka, Hideki Wako
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Patent number: 8035179Abstract: Microelectronic imagers, methods for packaging microelectronic imagers, and methods for forming electrically conductive through-wafer interconnects in microelectronic imagers are disclosed herein. In one embodiment, a microelectronic imaging die can include a microelectronic substrate, an integrated circuit, and an image sensor electrically coupled to the integrated circuit. A bond-pad is carried by the substrate and electrically coupled to the integrated circuit. An electrically conductive through-wafer interconnect extends partially through the substrate and is in contact with the bond-pad.Type: GrantFiled: February 2, 2009Date of Patent: October 11, 2011Assignee: Micron Technology, Inc.Inventors: Kyle K. Kirby, Salman Akram, William M. Hiatt
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Publication number: 20110241147Abstract: The present invention discloses a wafer level image sensor packaging structure and a manufacturing method of the same. The manufacturing method includes the following steps: providing a silicon wafer, dicing the silicon wafer, providing a plurality of transparent lids, fabricating a plurality of semi-finished products, performing a packaging process, mounting solder balls, and cutting an encapsulant between the semi-finished products. The manufacturing method of the invention has the advantage of being straightforward, uncomplicated, and cost-saving. Thus, the wafer level image sensor package structure is lightweight, thin, and compact. To prevent the image sensor chip from cracking on impact during handling, the encapsulant will be arranged on the lateral sides of the semi-finished products during the packaging process.Type: ApplicationFiled: January 25, 2011Publication date: October 6, 2011Applicant: Kingpak Technology Inc.Inventors: Hsiu-Wen Tu, Chung-Hsien Hsin, Han-Hsing Chen, Ming-Hui Chen, Ren-Long Kuo, Chih-Cheng Hsu, Young-Houng Shiao, Tsao-Pin Chen
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Publication number: 20110233619Abstract: An exposure mask according to an embodiment of the invention includes a first transmission region where a plurality of dots through which light is shielded or transmitted are arrayed into a matrix form having rows and columns and a second transmission region where a plurality of dots through which the light is shielded or transmitted are arrayed into a matrix form having rows and columns and is disposed adjacent to the first transmission region. The dots arrayed in a row or a column of the first transmission region, which is adjacent to the second transmission region, have an area intermediate between areas of dots arrayed on both sides of the row or the column.Type: ApplicationFiled: March 16, 2011Publication date: September 29, 2011Applicant: Kabushiki Kaisha ToshibaInventor: Ken TOMITA
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Patent number: 8025950Abstract: According to one embodiment, a sensor-securing apparatus has a frame having a sensor-mount region to hold an image sensor that generates heat while operating. The frame has a first adhesive-applying hole and a plurality of second adhesive-applying holes. The first adhesive-applying hole opens in the sensor-mount region and faces the center part of the image sensor. The second adhesive-applying holes are smaller than the first adhesive-applying hole, open in the sensor-mount region and are arranged around the first adhesive-applying hole. Adhesive is filled in the first adhesive-applying hole and the second adhesive-applying holes. The adhesive secures the image sensor to the frame.Type: GrantFiled: November 10, 2009Date of Patent: September 27, 2011Assignee: Kabushiki Kaisha ToshibaInventor: Tetsuo Saito
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Patent number: 8026122Abstract: A method for forming a thin film photovoltaic device. The method includes providing a transparent substrate including a surface region. A first electrode layer is formed overlying the surface region. A copper layer is formed overlying the first electrode layer and an indium layer overlying the copper layer to form a multi-layered structure. The method subjects at least the multi-layered structure to a thermal treatment process in an environment containing a sulfur bearing species and form a copper indium disulfide material. The copper indium disulfide material includes a thickness of substantially copper sulfide material. The thickness of the copper sulfide material is removed to expose a surface region having a copper poor surface characterized by a copper to indium atomic ratio of less than about 0.95:1. The method subjects the copper poor surface to a metal cation species to convert the copper poor surface from an n-type semiconductor characteristic to a p-type semiconductor characteristic.Type: GrantFiled: September 24, 2009Date of Patent: September 27, 2011Assignee: Stion CorporationInventor: Howard W. H. Lee
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Patent number: 8022495Abstract: A PIN photodiode having a substrate, a first type electrode layer disposed on the substrate, a first layer of intrinsic material disposed over a portion of the first-type electrode layer, and a first type window layer disposed over the intrinsic layer. An island shaped region of intrinsic material is disposed over the window layer and a dielectric layer is disposed over the island region and at least the peripheral portion of said island shaped region whereby an opening is formed in the island shaped region. A dopant is diffused through the opening so as to form a PN junction that extends into the first layer of intrinsic material.Type: GrantFiled: April 8, 2009Date of Patent: September 20, 2011Assignee: Emcore CorporationInventors: Xiang Gao, Alex Ceruzzi, Linlin Liu, Stephen Schwed
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Publication number: 20110224487Abstract: Size reduction of an image pickup module is promoted, and reliability of electric connection and electric noise resistance are improved by decreasing the numbers of components and connection spots. The problems are solved by providing an image pickup module including a solid-state image pickup element chip having an image pickup surface, a cover glass that covers the image pickup surface, and a wiring board on which the solid-state image pickup element chip is mounted, in which the solid-state image pickup element chip and the wiring board have an overlap structure in which end portions thereof are overlapped with each other, and a first electrode portion formed on the end portion of the solid-state image pickup element chip and a second electrode portion formed on the end portion of the wiring board are electrically connected through a bump.Type: ApplicationFiled: January 25, 2011Publication date: September 15, 2011Applicant: FUJIFILM CORPORATIONInventor: Teppei OGAWA
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Patent number: 8018014Abstract: A semiconductor device according to the present invention includes a semiconductor substrate: a photodiode responsive to a light, which is formed in the semiconductor substrate; at least an interlayer insulating layer formed over the semiconductor substrate, the at least an interlayer insulating layer comprising an upper most insulating layer; at least a conductive wiring layer, comprising an upper most conductive wiring layer formed on the upper most insulating layer; and a first passivation layer formed over the upper-most conductive wiring layer. The upper-most wiring layer is not formed directly above the photodiode. The first passivation layer is made of a permeability-resist material and is not formed directly above the photodiode.Type: GrantFiled: May 29, 2008Date of Patent: September 13, 2011Assignee: OKI Semiconductor Co., Ltd.Inventor: Kousuke Hara
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Patent number: 8013350Abstract: An optical device is equipped with a light receiving region 16a and a peripheral circuit region 22 located around the light receiving region 16a on a major surface of an light receiving element 11a; electrodes for external connection 15 electrically connected to the peripheral circuit region 22 formed on a back surface opposite to the major surface of the light receiving element 11a; a transparent member 12 covering the light receiving region 16a adhered on the major surface of the light receiving element 11a with a light-transmitting adhesive 13; and a molding resin 14 for coating side surfaces of the transparent member 12 and the major surface of the light receiving element 11a excluding the region covered with the transparent member 12.Type: GrantFiled: January 3, 2008Date of Patent: September 6, 2011Assignee: Panasonic CorporationInventors: Kiyokazu Itoi, Toshiyuki Fukuda, Yoshiki Takayama, Tetsushi Nishio, Tetsumasa Maruo
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Patent number: 8013409Abstract: A photoelectric conversion device comprises a high-refractive-index portion at a position close to a photoelectric conversion element therein. And, the high-refractive-index portion has first and second horizontal cross-section surfaces. The first cross-section surface is at a position closer to the photoelectric conversion element rather than the second cross-section surface, and is larger than an area of the second cross-section surface, so as to guide an incident light into the photoelectric conversion element without reflection.Type: GrantFiled: September 21, 2006Date of Patent: September 6, 2011Assignee: Canon Kabushiki KaishaInventor: Masatsugu Itahashi
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Patent number: 8008762Abstract: Packaging assemblies for optically interactive devices and methods of forming the packaging assemblies in an efficient manner that eliminates or reduces the occurrence of process contaminants. In a first embodiment, a transparent cover is attached to a wafer of semiconductor material containing a plurality of optically interactive devices. The wafer is singulated, and the optically interactive devices are mounted on an interposer and electrically connected with wire bonds. In a second embodiment, the optically interactive devices are electrically connected to the interposer with back side conductive elements. In a third embodiment, the optically interactive devices are mounted to the interposer prior to attaching a transparent cover. A layer of encapsulant material is formed over the interposer, and the interposer and encapsulant material are cut to provide individual packaging assemblies. In a fourth embodiment, the optically interactive devices are mounted in a preformed leadless chip carrier.Type: GrantFiled: December 28, 2006Date of Patent: August 30, 2011Assignee: Round Rock Research, LLCInventors: Todd O. Bolken, Chad A. Cobbley
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Publication number: 20110204465Abstract: In an optical device having a direct attachment structure and a method of manufacturing the optical device, a light-transmissive member can be bonded to an element region without being misaligned. In the optical device, the element region is formed in a top surface of a semiconductor substrate. The light-transmissive member is bonded to the element region with a light-transmissive adhesive interposed therebetween. A dam portion is formed outside the element region on the top surface of the semiconductor substrate. A raised portion is formed on a top surface of the dam portion.Type: ApplicationFiled: November 11, 2010Publication date: August 25, 2011Inventor: Hu MENG
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Patent number: 7999284Abstract: A solid-state imaging device 1 is arranged so that a hollow section 9 is formed between a solid-state imaging element 2 and a covering section 4 and an air path 7 is formed in an adhesive section 5 so as to extend from the hollow section 9 to the outside, wherein the adhesive section 5 is formed so as not to be positioned on a signal processing section 8 for processing a signal of the solid-state imaging element 2. This makes it possible to reduce noises occurring in the signal processing section of the semiconductor element while preventing occurrence of condensation in the covering section for covering the semiconductor element.Type: GrantFiled: May 29, 2008Date of Patent: August 16, 2011Assignee: Sharp Kabushiki KaishaInventors: Kiyoshi Kumata, Kazuya Fujita
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Patent number: 7994420Abstract: A photovoltaic solar cell including an upper electrode, a layer with light scattering and/or reflection properties, and a lower electrode. The layer with light scattering and/or reflection properties is located between the upper electrode and the lower electrode.Type: GrantFiled: July 5, 2005Date of Patent: August 9, 2011Assignee: Saint-Gobain Glass FranceInventors: Nils-Peter Harder, Paul Mogensen, Ulf Blieske
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Patent number: 7989836Abstract: A light emitting device includes a light emitting element, including a substrate including group III nitride compound semiconductor, a luminous layer structure including group III nitride compound semiconductor, the luminous layer structure formed on a first surface of the substrate, and an irregular surface formed on a second surface of the substrate, the second surface including a principal light emission surface, and a translucent sealing member for sealing the light emitting element, the translucent sealing member being separated from the second surface. At least one of translucent gel material and an inert gas is filled between the light emitting element and the translucent sealing member.Type: GrantFiled: February 3, 2010Date of Patent: August 2, 2011Assignee: Toyoda Gosei Co., Ltd.Inventor: Toshiya Uemura
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Patent number: 7989938Abstract: A semiconductor device is disclosed that performs fingerprint recognition on the electrostatic-capacity principle. A finger sweeping across a fingerprint recognition area of a semiconductor chip provides positive fingerprint recognition operations with improved reliability. The semiconductor device includes the semiconductor chip having a sensor unit that performs fingerprint recognition, and a substrate having an opening formed in the position corresponding to the sensor unit. The semiconductor chip is flip chip bonded to the substrate such that the sensor unit corresponds to the opening, and except for the formed position of the opening, an under-fill material is provided between the semiconductor chip and the substrate.Type: GrantFiled: March 18, 2009Date of Patent: August 2, 2011Assignee: Fujitsu Semiconductor LimitedInventors: Akira Okada, Mitsuru Sato