With Particular Electrode Configuration Patents (Class 257/448)
  • Patent number: 10985202
    Abstract: Provided is a solid-state imaging apparatus, an electronic device, and a driving method for obtaining an output signal irrespective of temperature-induced changes in characteristics. The solid-state imaging apparatus includes a pixel array section including a first pixel that has a first photoelectric converting section and obtains an output signal with logarithmic characteristics, and a second pixel that obtains a temperature detection signal for detecting temperature, the first and the second pixels being arranged in a matrix pattern, and a correcting section that corrects the output signal on the basis of temperature information obtained from the temperature detection signal.
    Type: Grant
    Filed: January 17, 2018
    Date of Patent: April 20, 2021
    Assignee: SONY SEMICONDUCTOR SOLUTIONS CORPORATION
    Inventor: Yoshiaki Tashiro
  • Patent number: 10697919
    Abstract: A reduction-oxidation sensor device and a manufacturing method thereof are provided. The reduction-oxidation sensor device includes a first electrode, at least one sensing structure and a second electrode. The first electrode is located on a substrate. The at least one sensing structure is located on the first electrode and the substrate. The at least one sensing structure includes a metal nanowire layer and a metal oxide layer. The metal nanowire layer is disposed on the first electrode and the substrate. The metal nanowire layer is wrapped by the metal oxide layer. The second electrode is located on the at least one sensing structure.
    Type: Grant
    Filed: January 11, 2018
    Date of Patent: June 30, 2020
    Assignee: Winbond Electronics Corp.
    Inventors: Ming-Chih Tsai, Yu-Hsuan Ho, Yen-Jui Chu, Ming-Hung Hsieh
  • Patent number: 10658301
    Abstract: An image pickup apparatus includes an optical device, a transparent conductive film, an electrode pad, and a penetrating electrode. In the optical device, an optical element area for receiving light is formed on a first surface side of a substrate, and an external connection terminal is formed on a side of a second surface opposite to the first surface of the substrate. The transparent conductive film is formed to face the first surface of the substrate. The electrode pad is formed on the first surface of the substrate and configured to perform connection with a fixed potential. The penetrating electrode is connected to the electrode pad and formed to penetrate the substrate between the first surface and second surface. The transparent conductive film is connected to the electrode pad, and the penetrating electrode is connected to the external connection terminal on the side of the second surface of the substrate.
    Type: Grant
    Filed: July 10, 2017
    Date of Patent: May 19, 2020
    Assignee: Sony Corporation
    Inventors: Masami Suzuki, Yoshihito Higashitsutsumi
  • Patent number: 10635883
    Abstract: A flat-panel display embedded with a fingerprint sensor includes a substrate, a first dielectric layer formed on the substrate, a photo sensor formed in the first dielectric layer, and a lens region disposed above and substantially aligned with the photo sensor vertically.
    Type: Grant
    Filed: December 28, 2017
    Date of Patent: April 28, 2020
    Assignee: Himax Technologies Limited
    Inventor: Ilin Wu
  • Patent number: 10510792
    Abstract: A semiconductor device includes a first semiconductor chip including a first substrate, a plurality of first dielectric layers and a plurality of conductive lines formed in the first dielectric layers over the first substrate. The semiconductor device further includes a second semiconductor chip having a surface bonded to a first surface of the first semiconductor chip, the second semiconductor chip including a second substrate, a plurality of second dielectric layers and a plurality of second conductive lines formed in the second dielectric layers over the second substrate. The semiconductor device further includes a first conductive feature extending from the first semiconductor chip to one of the plurality of second conductive lines, and a first seal ring structure extending from the first semiconductor chip to the second semiconductor chip.
    Type: Grant
    Filed: October 11, 2017
    Date of Patent: December 17, 2019
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Cheng-Ying Ho, Pao-Tung Chen, Wen-De Wang, Jen-Cheng Liu, Dun-Nian Yaung
  • Patent number: 10468363
    Abstract: A component includes a plurality of electrical connections on a process side opposed to a back side of the component. Each electrical connection includes an electrically conductive multi-layer connection post protruding from the process side. A printed structure includes a destination substrate and one or more components. The destination substrate has two or more electrical contacts and each connection post is in contact with, extends into, or extends through an electrical contact of the destination substrate to electrically connect the electrical contacts to the connection posts. The connection posts or electrical contacts are deformed. Two or more connection posts can be electrically connected to a common electrical contact.
    Type: Grant
    Filed: August 10, 2015
    Date of Patent: November 5, 2019
    Assignee: X-Celeprint Limited
    Inventors: Carl Prevatte, Christopher Bower, Ronald S. Cok, Matthew Meitl
  • Patent number: 10396107
    Abstract: A photodiode array 1 has a plurality of photodetector channels 10 which are formed on an n-type substrate 2 having an n-type semiconductor layer 12, with a light to be detected being incident to the plurality of photodetector channels 10. The photodiode array 1 comprises: a p?-type semiconductor layer 13 formed on the n-type semiconductor layer 12 of the substrate 2; resistors 4 each of which is provided to each of the photodetector channels 10 and is connected to a signal conductor 3 at one end thereof; and an n-type separating part 20 formed between the plurality of photodetector channels 10. The p?-type semiconductor layer 13 forms a pn junction at the interface between the substrate 2, and comprises a plurality of multiplication regions AM for avalanche multiplication of carriers produced by the incidence of the light to be detected so that each of the multiplication regions corresponds to each of the photodetector channels.
    Type: Grant
    Filed: July 20, 2018
    Date of Patent: August 27, 2019
    Assignee: HAMAMATSU PHOTONICS K.K.
    Inventors: Kazuhisa Yamamura, Kenichi Sato
  • Patent number: 10380408
    Abstract: Provided is a method of detecting fraud during use of a device for capturing an imprint of a body part using a principle of total internal reflection with dark field and including a transparent plate on which a body part to be verified is placed. The method includes: using the device to acquire a first imprint image with a lighting of the body part such that the whole surface of the body part in contact with the transparent plate returns light; using the device to acquire a least one second imprint image by illuminating the body part with a single LED; obtaining for each second imprint image an item of information representative of a light level re-emitted by the body part by using each image obtained; and comparing each item of information obtained with a reference item of information to validate that the body part is a true body part.
    Type: Grant
    Filed: April 9, 2018
    Date of Patent: August 13, 2019
    Assignee: IDEMIA IDENTITY & SECURITY FRANCE
    Inventors: Joël-Yann Fourre, Jean Beaudet
  • Patent number: 10374003
    Abstract: A semiconductor light emitting device includes a plurality of light emitting cells having first and second surface opposing each other, the plurality of light emitting cells including a first conductivity-type semiconductor layer, a second conductivity-type semiconductor layer, and an active layer therebetween, an insulating layer on the second surface of the plurality of light emitting cells and having first and second openings defining a first contact region of the first conductivity-type semiconductor layer and a second contact region of the second conductivity-type semiconductor layer, respectively, a connection electrode on the insulating layer and connecting a first contact region and a second contact region of adjacent light emitting cells, a transparent support substrate on the first surface of the plurality of light emitting cells, and a transparent bonding layer between the plurality of light emitting cells and the transparent support substrate.
    Type: Grant
    Filed: December 21, 2017
    Date of Patent: August 6, 2019
    Assignee: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Pun Jae Choi, Jacob Chang-Lin Tarn, Han Kyu Seong, Jin Hyuk Song, Yoon Joon Choi
  • Patent number: 10340324
    Abstract: An organic light-emitting diode (OLED) display is disclosed. In one aspect, the display includes a substrate, a scan line formed over the substrate and configured to provide a scan signal, and a data line crossing the scan line and configured to provide a data voltage. The display also includes a driving voltage line crossing the scan line and configured to provide a driving voltage, a switching transistor electrically connected to the scan line and the data line, and a driving transistor electrically connected to the switching transistor and including a driving gate electrode and a driving channel overlapping each other in the depth dimension of the display. A first storage capacitor overlaps the driving channel in the depth dimension and includes a portion of the driving voltage line. A second storage capacitor is separated from the first storage capacitor and overlaps the portion of the driving voltage line.
    Type: Grant
    Filed: April 25, 2016
    Date of Patent: July 2, 2019
    Assignee: SAMSUNG DISPLAY CO., LTD.
    Inventor: Chang Soo Pyon
  • Patent number: 10249673
    Abstract: A microelectronic unit includes a semiconductor element having a front surface to which a packaging layer is attached, and a rear surface remote from the front surface. The element includes a light detector including a plurality of light detector element arranged in an array disposed adjacent to the front surface and arranged to receive light through the rear surface. The semiconductor element also includes an electrically conductive contact at the front surface connected to the light detector. The conductive contact includes a thin region and a thicker region which is thicker than the thin region. A conductive interconnect extends through the packaging layer to the thin region of the conductive contact, and a portion of the conductive interconnect is exposed at a surface of the microelectronic unit.
    Type: Grant
    Filed: October 31, 2016
    Date of Patent: April 2, 2019
    Assignee: Invensas Corporation
    Inventors: Giles Humpston, Moshe Kriman
  • Patent number: 10236400
    Abstract: The present disclosure describes quantum dot film based demodulation structures and optical ranging systems including an array of QDF demodulation structures.
    Type: Grant
    Filed: January 30, 2017
    Date of Patent: March 19, 2019
    Assignee: Heptagon Micro Optics Pte. Ltd.
    Inventors: Daniel Furrer, Stephan Beer, Bernhard Buettgen
  • Patent number: 10224769
    Abstract: The present technology relates to a solid-state imaging device that can reduce the number of steps and enhance mechanical strength, a method of manufacturing the solid-state imaging device, and an electronic apparatus. The solid-state imaging device includes a laminate including a first semiconductor substrate having a pixel region and at least one second semiconductor substrate having a logic circuit, the at least one second semiconductor substrate being bonded to the first semiconductor substrate such that the first semiconductor substrate becomes an uppermost layer, and a penetration connecting portion that penetrates from the first semiconductor substrate into the second semiconductor substrate and connects a first wiring layer formed in the first semiconductor substrate to a second wiring layer formed in the second semiconductor substrate. The first wiring layer is formed with Al or Cu. The present technology is applicable, for example, to a back-surface irradiation type CMOS image sensor.
    Type: Grant
    Filed: June 16, 2017
    Date of Patent: March 5, 2019
    Assignee: SONY CORPORATION
    Inventor: Hajime Yamagishi
  • Patent number: 10170724
    Abstract: Although an ink jet method known as a method of selectively forming a film of a high molecular species organic compound, can coat to divide an organic compound for emitting three kinds (R, G, B) of light in one step, film forming accuracy is poor, it is difficult to control the method and therefore, uniformity is not achieved and the constitution is liable to disperse. In contrast thereto, according to the invention, a film comprising a high molecular species material is formed over an entire face of a lower electrode connected to a thin film transistor by a coating method and thereafter, the film comprising the high molecular species material is etched by etching by plasma to thereby enable to selectively form a high molecular species material layer. Further, the organic compound layer is constituted by a material for carrying out luminescence of white color or luminescence of single color and combined with a color changing layer or a coloring layer to thereby realize full color formation.
    Type: Grant
    Filed: March 2, 2015
    Date of Patent: January 1, 2019
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Shunpei Yamazaki, Masakazu Murakami, Satoshi Seo
  • Patent number: 10089514
    Abstract: An input device for capacitive sensing includes: a plurality of sensor electrodes, the plurality of sensor electrodes comprising a plurality of transmitter electrodes and a plurality of receiver electrodes, wherein the plurality of transmitter electrodes is configured to be driven by sensing signals and the plurality of receiver electrodes is configured to receive detected signals corresponding to respective sensing signals driven onto the plurality of transmitter electrodes; and a processing system, configured to: determine which receiver electrodes of the plurality of receiver electrodes are covered by an input biometric object; and scan the input biometric object to determine features of the input biometric object, wherein scanning the input biometric object comprises performing a differential measurement for one or more receiver electrodes with other receiver electrodes providing a reference, based on detected signals received on the one or more receiver electrodes and the other receiver electrodes, where
    Type: Grant
    Filed: March 31, 2017
    Date of Patent: October 2, 2018
    Assignee: Synaptics Incorporated
    Inventors: Guozhong Shen, Ozan Ersan Erdogan, Mandar Kulkarni, Taehee Cho
  • Patent number: 10074680
    Abstract: A CMOS image sensor and a method of forming are provided. The CMOS image sensor may include a device wafer. A conductive feature may be formed on a back-side surface of the device wafer. The device wafer may include a pixel formed therein. A passivation layer may be formed over the back-side surface of the device wafer and the conductive feature. A grid film may be formed over the passivation layer. The grid film may be patterned to accommodate a color filter. The grid film pattern may align the color filter to corresponding pixel in the device wafer. A portion of the grid film formed over the conductive feature may be reduced to be substantially planar with portions of the grid film adjacent to the conductive feature. The patterning and reducing may be performed according to etching processes, chemical mechanical processes, and combinations thereof.
    Type: Grant
    Filed: March 4, 2016
    Date of Patent: September 11, 2018
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Chien-Hsien Tseng, Nai-Wen Cheng, Shou-Gwo Wuu, Ming-Tsong Wang, Tung-Ting Wu
  • Patent number: 10068942
    Abstract: The invention concerns a photodiode array, and the method for producing same, comprising—a cathode comprising at least one substrate layer (4) made from a material from the indium phosphide family and one active layer (5) made from a material from the gallium indium arsenide family, and characterized in that the array further comprises at least two sorts of doped regions of the same type at least partially formed in the active layer (5):—first doped regions (3) forming, with the cathode, photodiodes for forming images,—at least one second doped region (8) absorbing excess charge carriers so as to discharge them.
    Type: Grant
    Filed: January 31, 2014
    Date of Patent: September 4, 2018
    Assignee: NEW IMAGING TECHNOLOGIES
    Inventor: Yang Ni
  • Patent number: 10020460
    Abstract: An electroluminescence device and a display device including an electroluminescence device are provided. The electroluminescence device includes an anode including silver, wherein at least a portion of the anode substantially extends in a horizontal direction; a first layer provided over the anode; an organic layer including a luminescent layer; a cathode provided over the organic layer; and an insulating layer provided over an end portion of the anode and an end portion of the first layer, wherein at least a portion of the cathode substantially extends in the horizontal direction in a light emission region, wherein a surface of the insulating layer has a curved portion, and wherein at least a portion of the cathode within a region of the insulating layer above the curved portion extends along a first angled upward direction between the horizontal direction and the thickness direction of the anode.
    Type: Grant
    Filed: May 25, 2016
    Date of Patent: July 10, 2018
    Assignee: Sony Corporation
    Inventors: Koji Hanawa, Jiro Yamada, Takashi Hirano
  • Patent number: 9954126
    Abstract: Various stamping methods may reduce defects and increase throughput for manufacturing metamaterial devices. Metamaterial devices with an array of photovoltaic bristles, and/or vias, may enable each photovoltaic bristle to have a high probability of photon absorption. The high probability of photon absorption may lead to increased efficiency and more power generation from an array of photovoltaic bristles. Reduced defects in the metamaterial device may decrease manufacturing cost, increase reliability of the metamaterial device, and increase the probability of photon absorption for a metamaterial device. The increase in manufacturing throughput and reduced defects may reduce manufacturing costs to enable the embodiment metamaterial devices to reach grid parity.
    Type: Grant
    Filed: October 1, 2015
    Date of Patent: April 24, 2018
    Assignee: Q1 NANOSYSTEMS CORPORATION
    Inventors: Robert Smith, Larry Bawden, John Bohland
  • Patent number: 9953206
    Abstract: A fingerprint sensor package includes a substrate, a fingerprint sensor chip, and a flexible printed circuit board (FPC). The substrate includes a first portion and a second portion. A line layer is disposed on the first portion. The fingerprint sensor chip is disposed on the substrate. The fingerprint sensor chip is electrically connected to the FPC by the line layer. The package is simple, reliable, and easy for manufacturing process, reducing materials and processing costs.
    Type: Grant
    Filed: August 4, 2016
    Date of Patent: April 24, 2018
    Assignee: SHUNSIN TECHNOLOGY (ZHONG SHAN) LIMITED
    Inventor: Jun Yang
  • Patent number: 9917124
    Abstract: An image sensor arranged inside and on top of a semi-conductor substrate having a front surface and a rear surface, the sensor including a plurality of pixels, each including: a photosensitive area, a reading area, and a storage area extending between the photosensitive area and the reading area; a vertical insulated electrode including an opening of transfer between the photosensitive area and the storage area; and at least one insulation element among the following: a) a layer of an insulating material extending under the surface of the photosensitive area and of the storage area and having its front surface in contact with the rear surface of the electrode; and b) an insulating wall extending vertically in the opening, or under the opening.
    Type: Grant
    Filed: October 22, 2015
    Date of Patent: March 13, 2018
    Assignee: Commissariat à l'Energie Atomique et aux Energies Alternatives
    Inventors: Yvon Cazaux, François Roy, Arnaud Laflaquiere, Marie Guillon
  • Patent number: 9899634
    Abstract: An OLED display and a method of manufacturing thereof are disclosed. In one aspect, the display includes a scan line formed over a substrate and configured to transfer a scan signal, a data line and a driving voltage line crossing the scan line and respectively configured to transfer a data voltage and a driving voltage, and a switching transistor electrically connected to the scan line and the data line and including a switching drain electrode configured to output the data voltage. The display also includes a driving transistor including a driving gate electrode, a driving drain electrode, and a driving source electrode electrically connected to the switching drain electrode. The display further includes a storage capacitor including a first storage electrode electrically connected to the driving gate electrode and a second storage electrode formed on the same layer as the driving voltage line.
    Type: Grant
    Filed: May 8, 2015
    Date of Patent: February 20, 2018
    Assignee: SAMSUNG DISPLAY CO., LTD.
    Inventors: Myoung Geun Cha, Jin Goo Jung, Yoon Ho Khang, Se Mi Kim
  • Patent number: 9837456
    Abstract: A solid-state imaging device includes a plurality of pixels each of which includes a photoelectric conversion unit that generates charges by photoelectrically converting light, and a transistor that reads a pixel signal of a level corresponding to the charges generated in the photoelectric conversion unit. A phase difference pixel which is at least a part of the plurality of pixels is configured in such a manner that the photoelectric conversion unit is divided into a plurality of photoelectric conversion units and an insulated light shielding film is embedded in a region for separating the plurality of photoelectric conversion units, which are divided, from each other.
    Type: Grant
    Filed: October 7, 2016
    Date of Patent: December 5, 2017
    Assignee: Sony Corporation
    Inventor: Hirotoshi Nomura
  • Patent number: 9818376
    Abstract: A technique for improving the spatial and/or temporal uniformity of a light-emitting display by providing a faster calibration of reference current sources and reducing the noise effect by improving the dynamic range, despite instability and non-uniformity of the transistor devices. A calibration circuit for a display panel having an active area having a plurality of light emitting devices arranged on a substrate, and a peripheral area of the display panel separate from the active area is provided. The calibration circuit includes a first row of calibration current source or sink circuits and a second row of calibration current source or sink circuits. A first calibration control line is configured to cause the first row of calibration current source or sink circuits to calibrate the display panel with a bias current while the second row of calibration current source or sink circuits is being calibrated by a reference current.
    Type: Grant
    Filed: April 29, 2015
    Date of Patent: November 14, 2017
    Assignee: Ignis Innovation Inc.
    Inventors: Gholamreza Chaji, Arokia Nathan
  • Patent number: 9806119
    Abstract: A semiconductor device includes a first semiconductor chip including a first substrate, a plurality of first dielectric layers and a plurality of conductive lines formed in the first dielectric layers over the first substrate. The semiconductor device further includes a second semiconductor chip having a surface bonded to a first surface of the first semiconductor chip, the second semiconductor chip including a second substrate, a plurality of second dielectric layers and a plurality of second conductive lines formed in the second dielectric layers over the second substrate. The semiconductor device further includes a first conductive feature extending from the first semiconductor chip to one of the plurality of second conductive lines, and a first seal ring structure extending from the first semiconductor chip to the second semiconductor chip.
    Type: Grant
    Filed: January 9, 2014
    Date of Patent: October 31, 2017
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Cheng-Ying Ho, Pao-Tung Chen, Wen-De Wang, Jen-Cheng Liu, Dun-Nian Yaung
  • Patent number: 9786579
    Abstract: There is provided an imaging device including a semiconductor having a light-receiving portion that performs photoelectric conversion of incident light, electrically conductive wirings, and a contact group including contacts that have different sizes and connect the semiconductor and the electrically conductive wirings.
    Type: Grant
    Filed: January 12, 2016
    Date of Patent: October 10, 2017
    Assignee: SONY SEMICONDUCTOR SOLUTIONS CORPORATION
    Inventors: Shunsuke Ishii, Satoshi Keino, Tomohiro Wada
  • Patent number: 9711469
    Abstract: A manufacturing method of a semiconductor structure includes the following steps. A first isolation layer is formed on a first surface of a wafer substrate. A conductive pad is formed on the first isolation layer. A hollow region through the first surface and a second surface of the wafer substrate is formed, such that the first isolation layer is exposed through the hollow region. A laser etching treatment is performed on the first isolation layer that is exposed through the hollow region, such that a first opening is formed in the first isolation layer, and a concave portion exposed through the first opening is formed in the conductive pad.
    Type: Grant
    Filed: May 18, 2015
    Date of Patent: July 18, 2017
    Assignee: XINTEC INC.
    Inventors: Geng-Peng Pan, Yi-Ming Chang, Chia-Sheng Lin
  • Patent number: 9705024
    Abstract: The present invention provides an invisible light flat plate detector and a manufacturing method thereof, an imaging apparatus, relates to the field of detection technology, can solve problems that the structure of the invisible light flat plate detector in the prior art is complex and the manufacturing method thereof is tedious. The invisible light flat plate detector of the present invention comprises a plurality of detection units and an invisible light conversion layer provided above the detection units for converting invisible light into visible light, each of the detection units comprising a thin film transistor provided on a substrate, and a first insulation layer, a first electrode, a semiconductor photoelectronic conversion module, a second electrode which are successively provided above the thin film transistor and of which projections on the substrate at least partially overlap with a projection of the thin film transistor on the substrate.
    Type: Grant
    Filed: January 26, 2016
    Date of Patent: July 11, 2017
    Assignee: BOE TECHNOLOGY GROUP CO., LTD.
    Inventors: Feng Jiang, Xingdong Liu, Chungchun Lee
  • Patent number: 9685637
    Abstract: An apparatus and method for repairing a display panel are provided. The apparatus includes a laser emitter that etches a faulty portion of the display panel and a first surrounding portion of the faulty portion by irradiating the faulty portion and the first surrounding portion with a laser and a guide disposed to face the laser emitter and configured to adjust at least one of a temperature of the faulty portion or a temperature of the first surrounding portion.
    Type: Grant
    Filed: October 9, 2014
    Date of Patent: June 20, 2017
    Assignee: Samsung Display Co., Ltd.
    Inventor: Joon-Geol Kim
  • Patent number: 9590119
    Abstract: A device comprises a semiconductor substrate having first and second implant regions and an electrode above and between the first and second implant regions of a first dopant type. A contact structure is in direct contact with the first and second implant regions and the electrode. A third implant region has a second dopant type different from the first dopant type. A bulk contact is provided on the third implant.
    Type: Grant
    Filed: January 13, 2012
    Date of Patent: March 7, 2017
    Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventor: Chung-Hui Chen
  • Patent number: 9547125
    Abstract: A method of forming an integrated photonic semiconductor structure having a photodetector and a CMOS device may include forming the CMOS device on a first silicon-on-insulator region, forming a silicon optical waveguide on a second silicon-on-insulator region, and forming a shallow trench isolation (STI) region surrounding the silicon optical waveguide such that the shallow trench isolation electrically isolating the first and second silicon-on-insulator region. Within a first region of the STI region, a first germanium material is deposited adjacent a first side wall of the semiconductor optical waveguide. Within a second region of the STI region, a second germanium material is deposited adjacent a second side wall of the semiconductor optical waveguide, whereby the second side wall opposes the first side wall. The first and second germanium material form an active region that evanescently receives propagating optical signals from the first and second side wall of the semiconductor optical waveguide.
    Type: Grant
    Filed: April 23, 2015
    Date of Patent: January 17, 2017
    Assignee: GLOBALFOUNDRIES INC.
    Inventors: Solomon Assefa, William M. Green, Steven M. Shank, Yurii A. Vlasov
  • Patent number: 9484379
    Abstract: A microelectronic unit includes a semiconductor element having a front surface to which a packaging layer is attached, and a rear surface remote from the front surface. The element includes a light detector including a plurality of light detector element arranged in an array disposed adjacent to the front surface and arranged to receive light through the rear surface. The semiconductor element also includes an electrically conductive contact at the front surface connected to the light detector. The conductive contact includes a thin region and a thicker region which is thicker than the thin region. A conductive interconnect extends through the packaging layer to the thin region of the conductive contact, and a portion of the conductive interconnect is exposed at a surface of the microelectronic unit.
    Type: Grant
    Filed: December 2, 2014
    Date of Patent: November 1, 2016
    Assignee: Invensas Corporation
    Inventors: Giles Humpston, Moshe Kriman
  • Patent number: 9448445
    Abstract: An electrode structure comprises an introduction electrode and a body electrode, and a first isolating layer and a second isolating layer arranged between the introduction electrode and the body electrode. A first via hole is formed in the first isolating layer, a second via hole is formed in the second isolating layer. The hole axes of the first via hole and the second via hole are on the same straight line passing through the body electrode, so that a part of the body electrode is exposed via the first and the second via holes. The introduction electrode is electrically connected with the body electrode through the part of the body electrode. The diameter of the first via hole is smaller than that of the second via hole, and the first isolating layer extends to completely cover the hole wall of the second via hole.
    Type: Grant
    Filed: May 27, 2014
    Date of Patent: September 20, 2016
    Assignees: BOE TECHNOLOGY GROUP CO., LTD., HEFEI BOE OPTOELECTRONICS TECHNOLOGY CO., LTD.
    Inventors: Min Zhang, Minsu Kim
  • Patent number: 9431466
    Abstract: The present invention is to provide a light emitting device capable of obtaining a certain luminance without influence by the temperature change, and a driving method thereof. A current mirror circuit formed by using a transistor is provided for each pixel. The first transistor and the second transistor of the current mirror circuit are connected such that the drain currents thereof are maintained at proportional values regardless of the load resistance value. Thereby, a light emitting device capable of controlling the OLED driving current and the luminance of the OLED by controlling the drain current of the first transistor at a value corresponding to a video signal in a driving circuit, and supplying the drain current of the second transistor to the OLED, is provided.
    Type: Grant
    Filed: May 22, 2015
    Date of Patent: August 30, 2016
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventor: Jun Koyama
  • Patent number: 9406903
    Abstract: An objective is to increase the reliability of a light emitting device structured by combining TFTs and organic light emitting elements. A TFT (1201) and an organic light emitting element (1202) are formed on the same substrate (1203) as structuring elements of a light emitting device (1200). A first insulating film (1205) which functions as a blocking layer is formed on the substrate (1203) side of the TFT (1201), and a second insulating film (1206) is formed on the opposite upper layer side as a protective film. In addition, a third insulating film (1207) which functions as a barrier film is formed on the lower layer side of the organic light emitting element (1202). The third insulating film (1207) is formed by an inorganic insulating film such as a silicon nitride film, a silicon oxynitride film, an aluminum nitride film, an aluminum oxide film, or an aluminum oxynitride film.
    Type: Grant
    Filed: August 3, 2015
    Date of Patent: August 2, 2016
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Shunpei Yamazaki, Toru Takayama
  • Patent number: 9343499
    Abstract: An integrated circuit system includes a first device and second device wafer. A wafer bonding region is disposed at an interface of a front side of a first dielectric layer of the first device wafer and a front side of a second dielectric layer of the second device wafer such that wafer bonding region bonds the first device wafer to the second device wafer. The wafer bonding region includes dielectric material having a higher silicon concentration than a dielectric material of the first and second dielectric layers of the first and second device wafers. A conductive path couples a first conductor of the first device wafer to a second conductor of the second device wafer. The conductive path is formed in a cavity etched through the wafer bonding region between the first conductor and the second conductor.
    Type: Grant
    Filed: April 23, 2015
    Date of Patent: May 17, 2016
    Assignee: OmniVision Technologies, Inc.
    Inventors: Hsin-Neng Tai, Hung-Ming Weng, Michael Chen, Chih-Huei Wu
  • Patent number: 9041137
    Abstract: A light emitting diode includes a first semiconductor layer, an active layer, a second semiconductor layer, a first electrode, a second electrode. The second electrode includes a treated patterned carbon nanotube film. The treated patterned carbon nanotube film includes at least two carbon nanotube linear units spaced from each other; and carbon nanotube groups spaced from each other. The carbon nanotube groups are located between the at least two carbon nanotube linear units, and combined with the at least two carbon nanotube linear units.
    Type: Grant
    Filed: April 19, 2013
    Date of Patent: May 26, 2015
    Assignee: Beijing FUNATE Innovation Technology Co., LTD.
    Inventors: Chen Feng, Li Qian, Yu-Quan Wang
  • Patent number: 9041138
    Abstract: An organic light emitting diode includes a substrate, a first electrode, an organic functional layer; and a second electrode. One of the first electrode and the second electrode includes a treated patterned carbon nanotube film. The treated patterned carbon nanotube film includes at least two carbon nanotube linear units spaced from each other; and carbon nanotube groups spaced from each other. The carbon nanotube groups are located between the at least two carbon nanotube linear units, and combined with the at least two carbon nanotube linear units.
    Type: Grant
    Filed: April 19, 2013
    Date of Patent: May 26, 2015
    Assignee: Beijing FUNATE Innovation Technology Co., LTD.
    Inventors: Chen Feng, Yu-Quan Wang, Li Qian
  • Patent number: 9035412
    Abstract: The present invention is directed toward a detector structure, detector arrays, and a method of detecting incident radiation. The present invention comprises a photodiode array and method of manufacturing a photodiode array that provides for reduced radiation damage susceptibility, decreased affects of crosstalk, reduced dark current (current leakage) and increased flexibility in application.
    Type: Grant
    Filed: May 19, 2014
    Date of Patent: May 19, 2015
    Assignee: OSI Optoelectronics, Inc.
    Inventors: Peter Steven Bui, Narayan Dass Taneja
  • Patent number: 9025139
    Abstract: A first photoelectric conversion element, which detects light and converts the light into photoelectrons has: one first MOS diode having a first electrode formed on a semiconductor base body with an insulator therebetween; and a plurality of second MOS diodes, each of which has a second electrode formed on the semiconductor base body with the insulator therebetween. The first electrode of the first MOS diode has, when viewed from the upper surface, a comb-like shape wherein a plurality of branch portions are branched from one electrode portion. Each second electrode of each of the second MOS diodes is, when viewed from the upper surface, separated from the first electrode, and is disposed to nest between the branch portions of the first electrode.
    Type: Grant
    Filed: October 1, 2010
    Date of Patent: May 5, 2015
    Assignee: Honda Motor Co., Ltd.
    Inventors: Tomoyuki Kamiyama, Keisuke Korekado
  • Patent number: 9025060
    Abstract: A solid-state image sensor which comprises a pixel group in which unit pixels each including a microlens and a plurality of photo-electric converters are arrayed two-dimensionally, wherein a shielding unit that shields part of all of a plurality of photo-electric converters corresponding to a single microlens is provided in a portion of the unit pixels.
    Type: Grant
    Filed: March 23, 2012
    Date of Patent: May 5, 2015
    Assignee: Canon Kabushiki Kaisha
    Inventors: Akihiro Nishio, Ichiro Onuki, Koichi Fukuda, Ryo Yamasaki, Hideaki Yamamoto, Makoto Oikawa
  • Patent number: 9018654
    Abstract: According to one embodiment, a semiconductor light emitting device includes a p-type semiconductor layer, an n-type semiconductor layer, a light emitting layer, a p-side electrode and an n-side electrode. The p-type semiconductor layer includes a nitride semiconductor and has a first major surface. The n-type semiconductor layer includes a nitride semiconductor and has a second major surface. The light emitting layer is provided between the n-type semiconductor layer and the p-type semiconductor layer. The p-side electrode contacts a part of the p-type semiconductor layer on the first major surface. The n-side electrode contacts a part of the n-type semiconductor layer on the second major surface. The n-side electrode is provided outside and around the p-side electrode in a plan view along a direction from the p-type semiconductor layer to the n-type semiconductor layer.
    Type: Grant
    Filed: May 19, 2014
    Date of Patent: April 28, 2015
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Taisuke Sato, Shigeya Kimura, Kotaro Zaima, Koichi Tachibana, Shinya Nunoue
  • Patent number: 9018020
    Abstract: Provided are methods and systems for treating shunts on solar cell substrates. Also provided are solar cells including such substrates. A shunt detected on a substrate proximate to a metallized grid pattern is electrically disconnected from at least the bus portion of the grid, which reduces shunt's impact on performance on the solar cell. An antireflective layer may be disposed between the shunt and a portion of the grid extending over the shunt. The exposure pattern of a photoresist used to form the antireflective layer may be adjusted accordingly to achieve this result. In some embodiments, the metallized grid may be modified by adjusting the exposure pattern of a photoresist used to form this grid. The grid may be modified to avoid any contact between the grid and the shunt or to disconnect a portion of the grid contacting the shunt from the bus portion area of the grid.
    Type: Grant
    Filed: May 24, 2013
    Date of Patent: April 28, 2015
    Assignee: The Boeing Company
    Inventors: Philip Chiu, Shoghig Mesropian, Dimitri D. Krut
  • Patent number: 9018728
    Abstract: A semiconductor apparatus includes: a first sheet-like member having a light receiving surface of an imaging device and a first connection terminal disposed thereon, the imaging device generating an image by receiving incident light from a light collecting section for collecting external light disposed thereon; a second sheet-like member having a second connection terminal to be connected to the first connection terminal provided thereon; a conductive bonding portion made of a conductive material and bonded with the first connection terminal; and a bonding wire connecting the conductive bonding portion and the second connection terminal, wherein the bonding wire is disposed along the plane of the first sheet-like member such that reflected light from the bonding wire does not impinge on the light receiving surface.
    Type: Grant
    Filed: January 18, 2012
    Date of Patent: April 28, 2015
    Assignee: Sony Corporation
    Inventors: Toshiaki Iwafuchi, Masahiko Shimizu
  • Patent number: 9018727
    Abstract: The invention relates to an InGaAs photodiode army (101) and to the method for manufacturing same, wherein said array includes: a cathode including at least one indium-phosphide substrate layer (4) and an active gallium-indium arsenide layer (5); and a plurality of anodes (3) at least partially formed in the active gallium-indium arsenide layer by diffusing a P-type dopant, the interaction between an anode (3) and the cathode forming a photodiode. According to said method, an indium-phosphide passivation layer (6) is arranged on the active layer before the diffusion of the P-type dopant forming the anodes (3), and a first selective etching is performed so as to remove, over the entire thickness thereof, an area (10) of the passivation layer (6) surrounding each anode (3).
    Type: Grant
    Filed: July 11, 2012
    Date of Patent: April 28, 2015
    Assignee: New Imaging Technologies
    Inventor: Yang Ni
  • Patent number: 9012900
    Abstract: An organic light emitting diode display device capable of improving capacitance Cst of a storage capacitor and transmittance and a method of fabricating the same are disclosed. The organic light emitting diode display device includes a driving thin film transistor (TFT) formed on the substrate, a passivation film formed to cover the TFT driver, a color filter formed on the passivation film in a luminescent region, a planarization film formed to cover the color filter, a transparent metal layer formed on the planarization film, an insulating film formed on the transparent metal layer, a first electrode connected to the TFT driver and overlapping the transparent metal layer while interposing the insulating film therebetween, an organic light emitting layer and a second electrode which are sequentially formed on the first electrode. The transparent metal layer, the insulating film, and the first electrode constitute a storage capacitor in the luminescent region.
    Type: Grant
    Filed: July 22, 2013
    Date of Patent: April 21, 2015
    Assignee: LG Display Co., Ltd.
    Inventors: Jung-Sun Beak, Jeong-Oh Kim, Yong-Min Kim
  • Patent number: 9013020
    Abstract: Disclosed is a photodiode carrier which can equalize the frequency response characteristics of a plurality of mounted photodiodes. A photodiode carrier as disclosed includes a diode array connection region, first and second signal side electrodes connected to the diode array connection region, first and second bias side electrodes connected to the diode array connection region, and first and second condensers connected between the electrode disposed on the way of the first and the second bias side electrodes and the ground electrode, wherein the electrodes disposed on the way of the first and the second bias side electrodes are located in the about equal distance from the diode array connection region 7 as a start point.
    Type: Grant
    Filed: March 9, 2012
    Date of Patent: April 21, 2015
    Assignee: NEC Corporation
    Inventors: Takeshi Takeuchi, Naoki Kimura
  • Patent number: 9006637
    Abstract: The invention discloses a photo detector with first and second groups of electrodes. The electrodes of each group are connected to a first common conductor for the group, and are located on a layer of photosensitive material. The electrodes are parallel to and interlaced with each other. The first common conductors are essentially plane, arranged at the same end of their group of electrodes, and arranged as upper and lower conductors parallel to and overlapping each other separated by a dielectric material, and form a signal electrode and a ground plane of a first microstrip line. The first microstrip line acts as a first combiner for currents induced in the electrodes of the two groups and as a matching network for the electrodes and for a load which can be connected to the photo detector.
    Type: Grant
    Filed: November 12, 2008
    Date of Patent: April 14, 2015
    Assignee: Optis Cellular Technology, LLC
    Inventors: Anatoli Deleniv, Spartak Gevorgyan, Arne Alping
  • Patent number: 9006759
    Abstract: A light-emitting device is provided that aims not to affect a service life and characteristics of light emission and includes two electrodes formed on the upper surface of a substrate with a gap at a central portion of the upper surface of the substrate between the two electrodes, a first light-emitting diode element mounted on the first electrode, and a second light-emitting diode element mounted on the second electrode. The first light-emitting diode element includes a pair of element electrodes on an upper surface of the first light-emitting diode element and the second light-emitting diode element includes a pair of element electrodes on an upper surface of the second light-emitting diode element. The first light-emitting diode element is connected by a wire to the first electrode and/or the second electrode. The second light-emitting diode element is connected by a wire to the first electrode and/or the second electrode.
    Type: Grant
    Filed: April 14, 2011
    Date of Patent: April 14, 2015
    Assignees: Citizen Electronics Co., Ltd., Citizen Holdings Co., Ltd.
    Inventors: Junji Miyashita, Kosuke Tsuchiya, Nodoka Oyamada
  • Patent number: 9000389
    Abstract: Radiation detectors and methods of fabricating radiation detectors are provided. One method includes mechanically polishing at least a first surface of a semiconductor wafer using a polishing sequence including a plurality of polishing steps. The method also includes growing a passivation oxide layer on a top of the polished first surface and depositing patterned metal contacts on a top of the passivation oxide layer. The method further includes applying a protecting layer on the patterned deposited metal contacts, etching a second surface of the semiconductor and applying a monolithic cathode electrode on the etched second surface of the semiconductor. The method additionally includes removing the protecting layer from the patterned metal contacts on the first surface, wherein the patterned metal contacts are formed from one of (i) reactive metals and (ii) stiff-rigid metals for producing inter-band energy-levels in the passivation oxide layer.
    Type: Grant
    Filed: March 14, 2012
    Date of Patent: April 7, 2015
    Assignee: General Electric Company
    Inventors: Peter Rusian, Arie Shahar