With Particular Electrode Configuration Patents (Class 257/448)
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Patent number: 8734008Abstract: An active sensor apparatus includes an array of sensor elements arranged in a plurality of columns and rows of sensor elements. The sensor apparatus includes a plurality of column and row thin film transistor switches for selectively activating the sensor elements, and a plurality of column and row thin film diodes for selectively accessing the sensor elements to obtain information from the sensor elements. The thin film transistor switches and thin film diodes are formed on a common substrate.Type: GrantFiled: November 3, 2009Date of Patent: May 27, 2014Assignee: Next Biometrics ASInventor: Matias N. Troccoli
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Patent number: 8736728Abstract: An image sensor includes front-side and backside photodetectors of a first conductivity type disposed in a substrate layer of the first conductivity type. A front-side pinning layer of a second conductivity type is connected to a first contact. The first contact receives a predetermined potential. A backside pinning layer of the second conductivity type is connected to a second contact. The second contact receives an adjustable and programmable potential.Type: GrantFiled: July 29, 2011Date of Patent: May 27, 2014Assignee: Truesense Imaging, Inc.Inventors: John P. McCarten, Robert Michael Guidash
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Patent number: 8736008Abstract: Photodiode arrays and methods of fabrication are provided. One photodiode array includes a silicon wafer having a first surface and an opposite second surface and a plurality of conductive vias through the silicon wafer. The photodiode array further includes a patterned doped epitaxial layer on the first surface, wherein the patterned doped epitaxial layer and the substrate form a plurality of diode junctions. A patterned etching defines an array of the diode junctions.Type: GrantFiled: January 4, 2012Date of Patent: May 27, 2014Assignee: General Electric CompanyInventors: Abdelaziz Ikhlef, Wen Li
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Patent number: 8730362Abstract: An image sensor includes front-side and backside photodetectors of a first conductivity type disposed in a substrate layer of the first conductivity type. A front-side pinning layer of a second conductivity type is connected to a first contact. The first contact receives a predetermined potential. A backside pinning layer of the second conductivity type is connected to a second contact. The second contact receives an adjustable and programmable potential.Type: GrantFiled: July 29, 2011Date of Patent: May 20, 2014Assignee: Truesense Imaging, Inc.Inventors: John P. McCarten, Robert Michael Guidash
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Publication number: 20140124889Abstract: An integrated circuit system includes a first device wafer bonded to a second device wafer at a bonding interface of dielectrics. Each wafer includes a plurality of dies, where each die includes a device, a metal stack, and a seal ring that is formed at an edge region of the die. Seal rings included in dies of the second device wafer each include a first conductive path provided with metal formed in a first opening that extends from a backside of the second device wafer, through the second device wafer, and through the bonding interface to the seal ring of a corresponding die in the first device wafer.Type: ApplicationFiled: November 5, 2012Publication date: May 8, 2014Applicant: OmniVision Technologies, Inc.Inventors: Yin Qian, Hsin-Chih Tai, Tiejun Dai, Duli Mao, Cunyu Yang, Howard E. Rhodes
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Patent number: 8716712Abstract: An object of the invention is to improve the accuracy of light detection in a photosensor, and to increase the light-receiving area of the photosensor. The photosensor includes: a light-receiving element which converts light into an electric signal; a first transistor which transfers the electric signal; and a second transistor which amplifies the electric signal. The light-receiving element includes a silicon semiconductor, and the first transistor includes an oxide semiconductor. The light-receiving element is a lateral-junction photodiode, and an n-region or a p-region included in the light-receiving element overlaps with the first transistor.Type: GrantFiled: February 15, 2011Date of Patent: May 6, 2014Assignee: Semiconductor Energy Laboratory Co., Ltd.Inventors: Munehiro Kozuma, Yoshiyuki Kurokawa
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Publication number: 20140117486Abstract: A solid-state imaging apparatus having a plurality of pixels, comprising: a substrate; a wiring layer formed on the substrate and including an insulating film and a plurality of wires; a plurality of lower electrodes formed on the wiring layer in one-to-one correspondence with the plurality of pixels; a photoelectric conversion film formed covering the plurality of lower electrodes; a light-transmissive upper electrode formed on the photoelectric conversion film; and a shield electrode extending through a gap between each pair of adjacent lower electrodes among the plurality of lower electrodes, the shield electrode having a fixed potential and being electrically insulated from the plurality of lower electrodes.Type: ApplicationFiled: December 27, 2013Publication date: May 1, 2014Applicant: PANASONIC CORPORATIONInventors: Hiroyuki DOI, Mitsuo YASUHIRA, Ryohei MIYAGAWA, Yoshiyuki OHMORI
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Patent number: 8703525Abstract: A solar cell includes; a substrate; a first electrode disposed on the substrate, and including a first groove formed therein, a semiconductor layer disposed on the first electrode, and including a second groove formed therein, and a second electrode disposed on the semiconductor layer and connected to the first electrode via the second groove, wherein a third groove passing through the first electrode, the semiconductor layer, and the second electrode is formed in a first region, a fourth groove passing through only the semiconductor layer and the second electrode is formed in a second region, and the first region and the second region are alternately disposed along a direction of extension of the third groove.Type: GrantFiled: June 3, 2010Date of Patent: April 22, 2014Assignees: Samsung SDI Co., Ltd., Samsung Display Co., Ltd.Inventor: Joong-Hyun Park
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Patent number: 8698267Abstract: An electrode includes a substantially planar metallic thin film layer with a patterned structure including a plurality of parallel lines or a plurality of crossed lines, the metallic thin film layer configured to transmit an incident light through the metallic thin film layer.Type: GrantFiled: September 8, 2011Date of Patent: April 15, 2014Assignee: South China Normal UniversityInventors: Yang Wang, Krzysztof Kempa, Zhifeng Ren
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Patent number: 8698269Abstract: A wiring board with a built-in imaging element includes a substrate having an accommodation portion and a first surface and a second surface on the opposite side of the first surface, an imaging device having a light receiver and positioned in the accommodation portion of the substrate such that the light receiver faces the first surface of the substrate, and a buildup structure formed on the first surface of the substrate and having insulation layers and conductive layers. The buildup structure has an opening portion formed such that the light receiver of the imaging device is exposed from the opening portion of the buildup structure, and the insulation layers in the buildup structure include a first insulation layer formed on the first surface of the substrate.Type: GrantFiled: February 23, 2012Date of Patent: April 15, 2014Assignee: Ibiden Co., Ltd.Inventors: Nobuhiro Hanai, Takaya Endo, Mitsuhiro Tomikawa
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Patent number: 8698141Abstract: A solid-state image pickup device includes a plurality of photoelectric conversion units, a plurality of signal read-out circuits, and a test terminal for testing the photoelectric conversion units. Each of the photoelectric conversion units includes a pixel electrode film, an opposing electrode film opposing the pixel electrode film and a light receiving layer disposed between the pixel electrode film and the opposing electrode film. The photoelectric conversion units are arranged in a two-dimensional array above a semiconductor substrate. Each of the signal read-out circuits are configured to read out a signal corresponding to an amount of electrical charges generated in the light receiving layer and transferred to the pixel electrode film. The test terminal is disposed outside of an area where the photoelectric conversion units are disposed, disposed on the same plane as the pixel electrode film, and made of the same material as the pixel electrode film.Type: GrantFiled: March 15, 2011Date of Patent: April 15, 2014Assignee: FUJIFILM CorporationInventor: Hiroshi Inomata
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Patent number: 8686528Abstract: A semiconductor device of the present invention includes: a lower electrode (110); a contact layer (130) including a first contact layer (132), a second contact layer (134) and a third contact layer (136) overlapping with a semiconductor layer (120); and an upper electrode (140) including a first upper electrode (142), a second upper electrode (144) and a third upper electrode (146). The second contact layer (134) includes a first region (134a), and a second region (134b) separate from the first region (134a), and the second upper electrode (144) is directly in contact with the semiconductor layer (120) in a region between the first region (134a) and the second region (134b) of the second contact layer (134).Type: GrantFiled: January 29, 2010Date of Patent: April 1, 2014Assignee: Sharp Kabushiki KaishaInventors: Yudai Takanishi, Masao Moriguchi
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Publication number: 20140061843Abstract: The present specification discloses front-side contact back-side illuminated (FSC-BSL) photodiode array having improved characteristics such as high speed of each photodiode, uniformity of the bias voltage applied to different photodiode, low bias voltage, reduced resistance of each photodiode, and an associated reduction in noise. The photodiode array is made of photodiodes with front metallic cathode pads, front metallic anode pad, back metallic cathode pads, n+ doped regions and a p+ doped region. The front metallic cathode pads physically contact the n+ doped regions and the front metallic anode pad physically contacts the p+ doped region. The back metallic cathode pads physically contact the n+ doped region.Type: ApplicationFiled: July 31, 2013Publication date: March 6, 2014Applicant: OSI OptoelectronicsInventors: Peter Steven Bui, Narayan Dass Taneja
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Publication number: 20140061842Abstract: A method includes forming an opening extending from a back surface of a semiconductor substrate to a metal pad on a front side of the semiconductor substrate, and forming a first conductive layer including a first portion overlapping active image sensors in the semiconductor substrate, a second portion overlapping black reference image sensors in the semiconductor substrate, and a third portion in the opening to contact the metal pad. A second conductive layer is formed over and contacting the first conductive layer. A first patterning step is performed to remove the first and the second portions of the second conductive layer, wherein the first conductive layer is used as an etch stop layer. A second patterning step is performed to remove a portion of the first portion of the first conductive layer. The second and the third portions of the first conductive layer remain after the second patterning step.Type: ApplicationFiled: September 5, 2012Publication date: March 6, 2014Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.Inventors: Shyh-Fann Ting, Jiech-Fun Lu, Ming-I Wang, Yeur-Luen Tu, Ching-Chun Wang
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Patent number: 8664512Abstract: The present invention provides a photovoltaic module with bypass diodes that has a high electricity generating capacity per unit area and high productivity. This photovoltaic module includes a photovoltaic cell assembly in which a plurality of photovoltaic cells are electrically connected in series, and a diode assembly in which a plurality of diodes are formed on a substrate in the arrangement that is consistent with the arrangement of the photovoltaic cells to which the diodes are to be attached. The diode assembly is disposed on a non-light receiving side of the photovoltaic cells, and the diodes are electrically connected to the photovoltaic cells. The photovoltaic cell assembly and the diode assembly are sealed and united by a sealant.Type: GrantFiled: December 9, 2011Date of Patent: March 4, 2014Assignee: Fuji Electric Co., Ltd.Inventors: Makoto Shimosawa, Shinji Fujikake, Hiroki Sato
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Patent number: 8653619Abstract: A range image sensor 1 is provided with a semiconductor substrate 1A having a light incident surface 1BK and a surface 1FT opposite to the light incident surface 1BK, a photogate electrode PG, first and second gate electrodes TX1, TX2, first and second semiconductor regions FD1, FD2, and a third semiconductor region SR1. The photogate electrode PG is provided on the surface 1FT. The first and second gate electrodes TX1, TX2 are provided next to the photogate electrode PG. The first and second semiconductor regions FD1, FD2 accumulate respective charges flowing into regions immediately below the respective gate electrodes TX1, TX2. The third semiconductor region SR1 is located away from the first and second semiconductor regions FD1, FD2 and on the light incident surface 1BK side and has the conductivity type opposite to that of the first and second semiconductor regions FD1, FD2.Type: GrantFiled: June 4, 2012Date of Patent: February 18, 2014Assignee: Hamamatsu Photonics K.K.Inventors: Mitsuhito Mase, Takashi Suzuki, Tomohiro Yamazaki
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Patent number: 8633440Abstract: Demultiplexing systems and methods are discussed which may be small and accurate without moving parts. In some cases, demultiplexing embodiments may include optical filter cavities that include filter baffles and support baffles which may be configured to minimize stray light signal detection and crosstalk. Some of the demultiplexing assembly embodiments may also be configured to efficiently detect U.V. light signals and at least partially compensate for variations in detector responsivity as a function of light signal wavelength.Type: GrantFiled: June 30, 2011Date of Patent: January 21, 2014Assignee: Newport CorporationInventor: Jamie Knapp
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Patent number: 8624103Abstract: A backside illuminated multi junction solar cell module includes a substrate, multiple multi junction solar cells, and a cell interconnection that provides a series connection between at least two of the multi junction solar cells. The substrate may include a material that is substantially transparent to solar radiation. Each multi junction solar cell includes a first active cell, grown over the substrate, for absorbing a first portion of the solar radiation for conversion into electrical energy and a second active cell, grown over the first active cell, for absorbing a second portion of the solar radiation for conversion into electrical energy. At least one of the first and second active cells includes a nitride.Type: GrantFiled: September 27, 2010Date of Patent: January 7, 2014Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.Inventor: Jizhong Li
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Publication number: 20140000713Abstract: A device includes a plurality of wires of nanometric or micrometric dimensions formed by a semiconductor material chosen from silicon, germanium and a silicon and germanium alloy. The device further includes pellets enhancing the mechanical strength and the optical absorption properties of the device. The pellets have a diameter between 100 nm and 1 ?m and are formed by spherical agglomerates of zinc oxide particles with a diameter between 10 mn and 200 nm. The pellets are in particular obtained by immersing the wires in a bath containing an alcohol-based solvent and zinc acetate under temperature and pressure conditions keeping the alcohol-based solvent in the liquid state and by thermal annealing of the wires transforming the zinc acetate into zinc oxide.Type: ApplicationFiled: March 6, 2012Publication date: January 2, 2014Applicant: COMMISSARIAT A L'ENERGIE ATOMIQUE ET AUX ENERGIES ALTERNATIVESInventors: David Kohen, Nicolas Karst, Simon Perraud
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Publication number: 20140001591Abstract: Disclosed is a photodiode carrier which can equalize the frequency response characteristics of a plurality of mounted photodiodes. A photodiode carrier as disclosed includes a diode array connection region, first and second signal side electrodes connected to the diode array connection region, first and second bias side electrodes connected to the diode array connection region, and first and second condensers connected between the electrode disposed on the way of the first and the second bias side electrodes and the ground electrode, wherein the electrodes disposed on the way of the first and the second bias side electrodes are located in the about equal distance from the diode array connection region 7 as a start point.Type: ApplicationFiled: March 9, 2012Publication date: January 2, 2014Applicant: NEC CorporationInventors: Takeshi Takeuchi, Naoki Kimura
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Publication number: 20130341655Abstract: The invention relates to a method for producing an electrical terminal support for an optoelectronic semiconductor body, comprising the following steps: providing a carrier assembly (1), which comprises a carrier body (11), an intermediate layer (12) arranged on an outer surface (111) of the carrier body (11), and a use layer (13) arranged on the intermediate layer (12); introducing at least two openings (4), which are mutually spaced in the lateral direction (L), in the use layer (13) via an outer surface (131) of the use layer (13), wherein the openings extend completely through the use layer (13) in the vertical direction (V); electrically insulating lateral surfaces (41) of the openings (4) and of the outer face (131) of the use layer (13); arranging electrically conductive material (6) at least in the openings (4), wherein after completion of the terminal carrier (100), the electrically conductive material (6) has an interruption (U) in the progression thereof along the outer surface (131) of the use layType: ApplicationFiled: December 16, 2011Publication date: December 26, 2013Applicant: OSRAM OPTO SEMICONDUCTORS GMBHInventor: Andreas Plössl
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Patent number: 8610232Abstract: An hyperspectral imaging device comprising semiconductor nanocrystals is provided.Type: GrantFiled: September 22, 2008Date of Patent: December 17, 2013Assignee: QD Vision, Inc.Inventors: Seth Coe-Sullivan, Gregory V. Moeller
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Patent number: 8610231Abstract: A photodiode array 1 has a plurality of photodetector channels 10 which are formed on an n-type substrate 2 having an n-type semiconductor layer 12, with a light to be detected being incident to the plurality of photodetector channels 10. The photodiode array 1 comprises: a p?-type semiconductor layer 13 formed on the n-type semiconductor layer 12 of the substrate 2; resistors 4 each of which is provided to each of the photodetector channels 10 and is connected to a signal conductor 3 at one end thereof; and an n-type separating part 20 formed between the plurality of photodetector channels 10. The p?-type semiconductor layer 13 forms a pn junction at the interface between the substrate 2, and comprises a plurality of multiplication regions AM for avalanche multiplication of carriers produced by the incidence of the light to be detected so that each of the multiplication regions corresponds to each of the photodetector channels.Type: GrantFiled: May 26, 2011Date of Patent: December 17, 2013Assignee: Hamamatsu Photonics K.K.Inventors: Kazuhisa Yamamura, Kenichi Sato
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Patent number: 8598673Abstract: A quad photoreceiver includes a low capacitance quad InGaAs p-i-n photodiode structure formed on an InP (100) substrate. The photodiode includes a substrate providing a buffer layer having a metal contact on its bottom portion serving as a common cathode for receiving a bias voltage, and successive layers deposited on its top portion, the first layer being drift layer, the second being an absorption layer, the third being a cap layer divided into four quarter pie shaped sections spaced apart, with metal contacts being deposited on outermost top portions of each section to provide output terminals, the top portions being active regions for detecting light. Four transimpedance amplifiers have input terminals electrically connected to individual output terminals of each p-i-n photodiode.Type: GrantFiled: August 23, 2010Date of Patent: December 3, 2013Assignee: Discovery Semiconductors, Inc.Inventors: Abhay M. Joshi, Shubhashish Datta
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Patent number: 8598674Abstract: A range image sensor 1 is provided with a semiconductor substrate 1A having a light incident surface 1BK and a surface 1FT opposite to the light incident surface 1BK, a photogate electrode PG, first and second gate electrodes TX1, TX2, first and second semiconductor regions FD1, FD2, and a third semiconductor region SR1. The photogate electrode PG is provided on the surface 1FT. The first and second gate electrodes TX1, TX2 are provided next to the photogate electrode PG The first and second semiconductor regions FD1, FD2 accumulate respective charges flowing into regions immediately below the respective gate electrodes TX1, TX2. The third semiconductor region SR1 is located away from the first and second semiconductor regions FD1, FD2 and on the light incident surface 1BK side and has the conductivity type opposite to that of the first and second semiconductor regions FD1, FD2.Type: GrantFiled: November 18, 2010Date of Patent: December 3, 2013Assignee: Hamamatsu Photonics K.K.Inventors: Mitsuhito Mase, Takashi Suzuki, Tomohiro Yamazaki
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Patent number: 8592854Abstract: The invention relates to a substantially transparent electronic device comprising a first contact surface provided with a first pattern of electrically conductive lines and a second contact surface provided with a second pattern of electrically conductive lines, the first contact surface extending parallel to the second contact surface, wherein the first pattern is rotationally displaced with respect to the second pattern by an angle between 15 and 165 degrees. The electrically conductive lines of the said first pattern and the said second pattern are substantially not transparent for visible light and are preferably used as shunting lines. The invention further relates to a method of manufacturing such device.Type: GrantFiled: April 21, 2010Date of Patent: November 26, 2013Assignee: Nederlandse Organisatie Voor toegepast-natuurwetenschappelijk Onderzoek TNOInventors: Peter G. M. Kruijt, Eric Rubingh, Andrea Maione, Joanne Sarah Wilson
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Patent number: 8592243Abstract: A method for forming a buffer layer in a dye-sensitized solar cell including a transparent electrode, a counter electrode, an electrolyte layer disposed between the electrodes, and a photocatalyst film disposed between the electrodes and near the transparent electrode, the buffer layer being disposed between the transparent electrode and photocatalyst film, the method including: forming the buffer layer by sintering a mixed solution of an alcohol solution and 0.03% to 5% by mass of metal alkoxide by laser beam irradiation after applying the mixed solution to the surface of the transparent electrode by spin coating, the transparent electrode being rotated by a rotating table.Type: GrantFiled: December 22, 2010Date of Patent: November 26, 2013Assignee: Hitachi Zosen CorporationInventors: Takeshi Sugiyo, Tetsuya Inoue
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Patent number: 8592863Abstract: A photodetector with internal gain comprising a semiconductor structure in which impact ionization events are produced mostly by minority charge carriers; a first biasing contact and a second biasing contact located in the semiconductor structure; a means of defining, in the semiconductor structure, a photon collection region close to first biasing contact; a P-N type junction formed in the semiconductor structure between the two biasing contacts and close to the second biasing contact; and a collector contact which is located in the P-N junction and used to collect current in the P-N junction.Type: GrantFiled: November 5, 2009Date of Patent: November 26, 2013Assignee: Commissariat a l'Energie AtomiqueInventors: Johan Rothman, Jean-Paul Chamonal
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Patent number: 8581358Abstract: A photoelectric conversion device is provided which is capable of improving the light condensation efficiency without substantially decreasing the sensitivity. The photoelectric conversion device has a first pattern provided above an element isolation region formed between adjacent two photoelectric conversion elements, a second pattern provided above the element isolation region and above the first pattern, and microlenses provided above the photoelectric conversion elements with the first and the second patterns provided therebetween. The photoelectric conversion device further has convex-shaped interlayer lenses in optical paths between the photoelectric conversion elements and the microlenses, the peak of each convex shape projecting in the direction from the electro-optical element to the microlens.Type: GrantFiled: August 16, 2012Date of Patent: November 12, 2013Assignee: Canon Kabushiki KaishaInventor: Sakae Hashimoto
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Publication number: 20130285189Abstract: In a semiconductor device including unit cells which are aligned in one direction, wirings disposed along end portions in the one direction have high Young's moduli.Type: ApplicationFiled: March 14, 2013Publication date: October 31, 2013Applicant: CANON KABUSHIKI KAISHAInventors: Masanori Ogura, Hideo Kobayashi, Tetsunobu Kochi, Masashi Kitani
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Patent number: 8569853Abstract: A semiconductor light-receiving device includes a semiconductor light-receiving element that has a first electrode and a second electrode, a first wiring coupled to the first electrode, and a second wiring coupled to the second electrode, a width of the second wiring being smaller than a width of the first wiring.Type: GrantFiled: July 26, 2012Date of Patent: October 29, 2013Assignee: Sumitomo Electric Device Innovations, Inc.Inventor: Yuji Koyama
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Publication number: 20130248862Abstract: According to one embodiment, a solid-state image sensing device includes a semiconductor substrate having a first and second surface, an insulating film covering an element on the first surface, a pixel array including pixels configured to photoelectrically convert light applied on the side of the second surface, contact regions in the semiconductor substrate, one or more through-electrodes respectively provided in the contact regions, and first pads provided on the side of the second surface to correspond to the respective contact regions. The first pad extends in a first direction from the contact regions toward the pixel array.Type: ApplicationFiled: March 22, 2013Publication date: September 26, 2013Applicant: KABUSHIKI KAISHA TOSHIBAInventors: Ikuko INOUE, Masahiro Baba, Eiji Sato, Haruhide Kikuchi
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Patent number: 8530990Abstract: Optoelectronic devices with heat spreader units are described. An optoelectronic device includes a back-contact optoelectronic cell including a plurality of back-contact metallization regions. One or more heat spreader units are disposed above the plurality of back-contact metallization regions. A heat sink is disposed above the one or more heat spreader units.Type: GrantFiled: October 12, 2009Date of Patent: September 10, 2013Assignee: SunPower CorporationInventors: Ryan Linderman, Matthew Dawson, Itai Suez
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Publication number: 20130228889Abstract: A silicon-based photoelectric multiplier comprises a plurality of cells and a number of read-out lines, and at least one of a number read-out pads or a ring-like line, wherein the plurality of cells may be divided into a number of segments, and each one of the read-out lines may be electrically connected with the cells of at least one segment.Type: ApplicationFiled: February 9, 2013Publication date: September 5, 2013Applicant: Max-Planck-Gesellschaft zur Forderung der Wissenschaften e.VInventors: Ljudmila Aseeva, Max-Planck-Gesellschaft zur Forderung der Wissenschaften e.V
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Patent number: 8525911Abstract: Disclosed herein is a solid-state imaging device including: a plurality of common pixel sections arranged in a matrix form so that pixel signals of a plurality of photoelectric conversion elements arranged in the same row can be output; a plurality of row address lines used to select some of the photoelectric conversion elements in each row; and a scan section that allows for the pixel signals of the plurality of photoelectric conversion elements to be output through addressing adapted to select the plurality of row address lines one at a time in sequence, in which the plurality of row address lines are connected to the plurality of photoelectric conversion elements arranged in the same row in each of the common pixel sections so that the scan section can individually select the plurality of photoelectric conversion elements arranged in the same row in each of the common pixel sections during addressing.Type: GrantFiled: March 22, 2011Date of Patent: September 3, 2013Assignee: Sony CorporationInventor: Takashi Shoji
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Publication number: 20130222657Abstract: A solid-state image sensor includes a semiconductor layer, a multilayer wiring layer, an opening which extends through the semiconductor layer, and reaches an electrically conductive layer in the multilayer wiring layer, an electrically conductive member arranged in the opening so as to be connected to the electrically conductive layer, and a trench which surrounds the opening, and extends through the semiconductor layer, the trench having a space with no solid substance, and the semiconductor layer including a wall portion arranged between a side face defining the opening, and an inner-side face defining the trench to surround the electrically conductive member.Type: ApplicationFiled: February 19, 2013Publication date: August 29, 2013Applicant: CANON KABUSHIKI KAISHAInventor: CANON KABUSHIKI KAISHA
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Patent number: 8513760Abstract: An image sensor includes a plurality of unit pixels. Each unit pixel has a photo diode for sensing external light to generate photo charges. A transfer transistor is connected to the photo diode for storing the photo charges generated in the photo diode into a floating diffusion region when being turned-on. An amplification transistor amplifies the photo charges stored into the floating diffusion region. A select transistor, connected to the amplification transistor, performs a switching operation. An output line, extended in a column direction, outputs the photo charges in accordance with the switching operation of the select transistor. The photo diode may be formed in such a manner to share the output line with its adjacent photo diode in a horizontal direction, so that the photo charges generated in the photo diode and its adjacent photo diode are outputted through the output line.Type: GrantFiled: August 20, 2012Date of Patent: August 20, 2013Assignee: Dongbu HiTek Co., Ltd.Inventor: So Eun Park
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Patent number: 8508014Abstract: According to an aspect of the invention, a solid-state image sensor having a plurality of pixels includes a plurality of lower electrode, a photoelectric conversion layer, an upper electrode, a wiring portion and a plurality of connection portions. The plurality of lower electrodes respectively corresponds to the plurality of pixels. The photoelectric conversion layer is stacked on the lower electrodes. The upper electrode is stacked on the photoelectric conversion layer. The wiring portion supplies, to the upper electrode, a voltage to generate an electric field between the upper electrode and the lower electrode. The plurality of connection portions connects the wiring portion and the upper electrode. The plurality of connection portions are disposed in a circumference region which is a region other than a sensor region in which a plurality of photoelectric conversion elements are arranged. The plurality of connection portions is disposed in a symmetrical arrangement.Type: GrantFiled: November 17, 2010Date of Patent: August 13, 2013Assignee: Fujifilm CorporationInventor: Takuya Takata
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Patent number: 8502333Abstract: A display device and a fabricating method of the same are disclosed.Type: GrantFiled: December 7, 2010Date of Patent: August 6, 2013Assignee: LG Display Co., Ltd.Inventor: Myoung-Kee Baek
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Publication number: 20130182162Abstract: A solid-state image sensor having a pixel region and a peripheral circuit region, includes wiring lines arranged in the pixel region and the peripheral circuit region, dummy patterns arranged in the peripheral circuit region, and a planarizing layer arranged on the wiring lines and containing a resin. The wiring lines in the peripheral circuit region include a plurality of electrically conductive patterns. The dummy patterns are arranged between the plurality of electrically conductive patterns. The dummy patterns are electrically insulated from the wiring lines.Type: ApplicationFiled: December 18, 2012Publication date: July 18, 2013Applicant: CANON KABUSHIKI KAISHAInventor: Canon Kabushiki Kaisha
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Patent number: 8487395Abstract: A thin-film transistor array device includes a passivation film above first and second bottom gate transistors. A gate wire is below the passivation film. A source wire and a relay wire are above the passivation film. The source wire is electrically connected to a source electrode of the first transistor via a first hole in the passivation film. A conductive oxide film is between the passivation film and both the source wire and the relay electrode and not electrically connected between the source wire and the relay electrode. The conductive oxide film covers an end portion of the gate wire that is exposed via a second hole in the passivation film. The conductive oxide film is between the relay electrode and a current-supply electrode of the second transistor and electrically connects the relay electrode and the current-supply electrode via a third hole in the passivation film.Type: GrantFiled: September 28, 2011Date of Patent: July 16, 2013Assignees: Panasonic Corporation, Panasonic Liquid Crystal Display Co., Ltd.Inventors: Arinobu Kanegae, Genshiro Kawachi
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Patent number: 8487397Abstract: An integrated circuit with a self-aligned contact includes a substrate with a transistor formed thereover, a dielectric spacer, a protection barrier, and a conductive layer. The transistor includes a mask layer and a pair of insulating spacers formed on opposite sides of the mask layer. The dielectric spacer partially covers at least one of the insulating spacers of the transistor. The protection barrier is formed over the dielectric spacer. The conductive layer is formed over the mask layer, the protection barrier, the dielectric spacer, the insulating spacer and the dielectric spacer as a self-aligned contact for contacting a source/drain region of the transistor.Type: GrantFiled: April 25, 2011Date of Patent: July 16, 2013Assignee: Nanya Technology CorporationInventors: Jar-Ming Ho, Yi-Nan Chen, Hsien-Wen Liu
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Patent number: 8481844Abstract: In the solar cell module 1, one finger electrode 30 is branched into multiple branched portions 30a in an intersecting region ? where the one finger electrode 30 intersects a conductive body including a wiring member 40 configured to collect photo-generated carriers from the finger electrode 30.Type: GrantFiled: December 19, 2007Date of Patent: July 9, 2013Assignee: Sanyo Electric Co., Ltd.Inventors: Toyozo Nishida, Shigeharu Taira
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Publication number: 20130168797Abstract: A thin film photovoltaic device includes a substrate and a first conductive layer coupled to the substrate. The first conductive layer includes at least one first groove extending through a first portion of the first conductive layer to a portion of the substrate. The device also includes at least one semiconductor layer coupled to a remaining portion of the first conductive layer and the portion of the substrate. The at least one semiconductor layer includes a plurality of non-overlapping vias, each via extending through a portion of the at least one semiconductor layer to a portion of the first conductive layer. The device further includes a second conductive layer coupled to a remaining portion of the at least one semiconductor layer and portions of the first conductive layer. The second conductive layer includes at least one second groove extending through a portion of the second conductive layer to a portion of the at least one semiconductor layer.Type: ApplicationFiled: January 4, 2012Publication date: July 4, 2013Applicant: ESI-PyroPhotonics Lasers, Inc.Inventor: Matthew Rekow
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Publication number: 20130168796Abstract: Photodiode arrays and methods of fabrication are provided. One photodiode array includes a silicon wafer having a first surface and an opposite second surface. The photodiode array also includes a plurality of refilled conductive vias through the silicon wafer, wherein the refilled conductive vias have a doping type different than the doping type of the substrate, and an interface between the refilled conductive vias and the substrate form diode junctions. The photodiode array further includes a patterned doped layer on the first surface overlapping the refilled conductive vias, wherein the patterned doped layer defines an array of photodiodes.Type: ApplicationFiled: January 4, 2012Publication date: July 4, 2013Applicant: GENERAL ELECTRIC COMPANYInventors: Abdelaziz Ikhlef, Wen Li
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Publication number: 20130168643Abstract: A light detecting array structure and a light detecting module are provided. The light detecting array structure includes a plurality of first electrodes, a plurality of second electrodes, a first carrier selective layer, a second carrier selective layer, and a light-absorbing active layer. The second electrodes are disposed on one side of the first electrodes. Between the first electrodes and the second electrodes, a first carrier selective layer, a light-absorbing active layer and a second carrier selective layer are disposed. The light detecting module includes the light detecting array structure and a control unit. The control unit is coupled to the first electrodes and second electrodes, selectively provides at least two cross voltages between each of the first electrodes and each of the second electrodes, and reads photocurrents flowing through the first electrodes and second electrodes.Type: ApplicationFiled: May 17, 2012Publication date: July 4, 2013Applicants: NATIONAL TSING HUA UNIVERSITY, INDUSTRIAL TECHNOLOGY RESEARCH INSTITUTEInventors: Yan-Rung Lin, Chang-Ho Liou, Sheng-Fu Horng, Jen-Chun Wang, Yun-Ru Hong, Ming-Kun Lee, Hsin-Fei Meng
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Patent number: 8476101Abstract: A method of making a semiconductor radiation detector includes the steps of providing a semiconductor substrate having front and rear major opposing surfaces, forming a solder mask layer over the rear major surface, patterning the solder mask layer into a plurality of pixel separation regions, and after the step of patterning the solder mask layer, forming anode pixels over the rear major surface. Each anode pixel is formed between adjacent pixel-separation regions and a cathode electrode is located over the front major surface of the substrate. The solder mask can be used as a permanent photoresist in developing patterned electrodes on CdZnTe/CdTe devices as well as a permanent reliability protection coating. The method is very robust and ensures long-term reliability, outstanding detector performance, and may be used in applications such as medical imaging and for demanding other highly spectroscopic applications.Type: GrantFiled: December 28, 2009Date of Patent: July 2, 2013Assignee: Redlen TechnologiesInventors: Henry Chen, Pramodha Marthandam, Salah Awadalla, Pinghe Lu
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Patent number: 8476725Abstract: The present invention is a front-side contact, back-side illuminated (FSC-BSL) photodiode arrays and front-side illuminated, back-side contact (FSL-BSC) photodiode arrays having improved characteristics, including high production throughput, low-cost manufacturing via implementation of batch processing techniques; uniform, as well as high, photocurrent density owing to presence of a large continuous homogeneous, heavily doped layer; and back to front intrachip connections via the homogenous, heavily doped layers on the front and back sides of the substrate.Type: GrantFiled: May 18, 2011Date of Patent: July 2, 2013Assignee: OSI Optoelectronics, Inc.Inventors: Peter Steven Bui, Narayan Dass Taneja
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Patent number: 8466534Abstract: The construction of this invention includes an active matrix substrate, an amorphous selenium layer, a high resistance layer, a gold electrode layer, an insulating layer and an auxiliary plate laminated in this order. In one aspect of the present invention, the insulating layer has an inorganic anion exchanger added thereto in order to provide a radiation detector which prevents void formation and pinhole formation in the amorphous semiconductor layer and carrier selective high resistance film, without accumulating electric charges on the auxiliary plate. The inorganic anion exchanger adsorbs chloride ions in the insulating layer, thereby preventing destruction of X-ray detector due to the chloride ions drawn to the gold electrode layer.Type: GrantFiled: March 26, 2010Date of Patent: June 18, 2013Assignee: Shimadzu CorporationInventors: Shingo Furui, Toshinori Yoshimuta, Junichi Suzuki, Koji Watadani, Satoru Morita
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Patent number: 8466402Abstract: An imaging system may include imaging pixels. Each imaging pixel may include floating diffusion metal lines associated with a floating diffusion node in that imaging pixel, pixel output metal lines associated with a pixel output, and additional metal lines. The floating diffusion metal lines node may be at least partially surrounded by the pixel output metal lines. Because the floating diffusion metal lines are at least partially surrounded by the pixel output metal lines, the parasitic capacitance between the floating diffusion metal lines and the additional metal lines may be reduced. A source-follower transistor in each imaging pixel may provide a gain between the floating diffusion metal lines and the pixel output metal lines. Due to the Miller effect, the gain induced by the source-follower transistor may reduce the parasitic capacitance between the floating diffusion metal lines and the pixel output metal lines.Type: GrantFiled: October 25, 2010Date of Patent: June 18, 2013Assignee: Aptina Imaging CorporationInventors: Chung Chun Wan, Xiangli Li