Light Responsive Pn Junction Patents (Class 257/461)
  • Patent number: 8222516
    Abstract: A bipolar solar cell includes a backside junction formed by an N-type silicon substrate and a P-type polysilicon emitter formed on the backside of the solar cell. An antireflection layer may be formed on a textured front surface of the silicon substrate. A negative polarity metal contact on the front side of the solar cell makes an electrical connection to the substrate, while a positive polarity metal contact on the backside of the solar cell makes an electrical connection to the polysilicon emitter. An external electrical circuit may be connected to the negative and positive metal contacts to be powered by the solar cell. The positive polarity metal contact may form an infrared reflecting layer with an underlying dielectric layer for increased solar radiation collection.
    Type: Grant
    Filed: February 20, 2008
    Date of Patent: July 17, 2012
    Assignee: SunPower Corporation
    Inventor: Peter John Cousins
  • Patent number: 8217479
    Abstract: An embodiment of the invention provides a solid-state image pickup element, including: a semiconductor layer having a photodiode, photoelectric conversion being carried out in the photodiode; a silicon oxide film formed on the semiconductor layer in a region having at least the photodiode by using plasma; and a film formed on the silicon oxide film and having negative fixed charges.
    Type: Grant
    Filed: January 21, 2010
    Date of Patent: July 10, 2012
    Assignee: Sony Corporation
    Inventors: Itaru Oshiyama, Susumu Hiyama
  • Patent number: 8207562
    Abstract: An image sensor can include a gate insulation layer, a gate electrode, a photodiode, and a floating diffusion region. The gate insulation layer can be formed on and/or over a semiconductor substrate for a transfer transistor. The gate insulation layer includes a first gate insulation layer having a central opening and a second gate insulation layer formed on and/or over an uppermost surface of the first gate insulation layer including the opening. The gate electrode can be formed on and/or over the gate insulation layer. The photodiode can be formed in the semiconductor substrate at one side of the gate electrode so as to generate an optical charge. The floating diffusion region can be formed in the semiconductor at the other side of the gate electrode opposite to the photodiode. The floating diffusion region can be electrically connected to the photodiode through a channel so as to store the optical charge generated from the photodiode.
    Type: Grant
    Filed: October 19, 2009
    Date of Patent: June 26, 2012
    Assignee: Dongbu Hitek Co., Ltd.
    Inventor: Ji-Hoon Hong
  • Publication number: 20120146172
    Abstract: High speed optoelectronic devices and associated methods are provided. In one aspect, for example, a high speed optoelectronic device can include a silicon material having an incident light surface, a first doped region and a second doped region forming a semiconductive junction in the silicon material, and a textured region coupled to the silicon material and positioned to interact with electromagnetic radiation. The optoelectronic device has a response time of from about 1 picosecond to about 5 nanoseconds and a responsivity of greater than or equal to about 0.4 A/W for electromagnetic radiation having at least one wavelength from about 800 nm to about 1200 nm.
    Type: Application
    Filed: June 20, 2011
    Publication date: June 14, 2012
    Applicant: SiOnyx, Inc.
    Inventors: James Carey, Drake Miller
  • Publication number: 20120147286
    Abstract: The light use efficiency of a thin film diode is improved even when the semiconductor layer of the diode has a small thickness, thereby improving the light detection sensitivity of the diode. A thin film diode (130) having a first semiconductor layer (131) including, at least, an n-type region (131n) and a p-type region (131p) is provided on one side of a substrate (101), and a light-blocking layer (160) is provided between the substrate and the first semiconductor layer. Asperities are provided on the side of the light-blocking layer facing the first semiconductor layer. The first semiconductor layer has a geometry of asperities conforming with the asperities on the light-blocking layer. Light incident on the light-blocking layer is diffusely reflected and enters the first semiconductor layer.
    Type: Application
    Filed: July 22, 2010
    Publication date: June 14, 2012
    Applicant: SHARP KABUSHIKI KAISHA
    Inventors: Akihiro Oda, Makoto Nakazawa
  • Publication number: 20120139074
    Abstract: Disclosed is an electronic apparatus in which a thermoelectric conversion element and at least one of a photoelectric conversion element and a transistor or a diode are monolithically integrated, or which prevents interference between a p-type thermoelectric conversion unit and an n-type thermoelectric conversion unit. This electronic apparatus includes a thermoelectric conversion element (100) including a semiconductor layer (38) which performs thermoelectric conversion and at least one of a photoelectric conversion element (102) in which at least a portion of the semiconductor layer (38) performs photoelectric conversion and a transistor (104) or a diode having at least a portion of the semiconductor layer (38) as an operating layer.
    Type: Application
    Filed: August 5, 2010
    Publication date: June 7, 2012
    Inventor: Masayuki Abe
  • Patent number: 8193601
    Abstract: A method of forming a sensor array. The method includes depositing a source/drain contact layer; depositing a semiconductor layer on the source/drain contact layer; and patterning the source/drain contact layer and the semiconductor layer substantially simultaneously, wherein the patterned semiconductor layer forms part of a sensor of the sensor array.
    Type: Grant
    Filed: January 22, 2010
    Date of Patent: June 5, 2012
    Assignee: Palo Alto Research Center Incorporated
    Inventors: Sanjiv Sambandan, William S. Wong, Rene A. Lujan, Scott J. Limb
  • Patent number: 8188562
    Abstract: Thin film photovoltaic devices are provided that generally include a transparent conductive oxide layer on the glass, a multi-layer n-type stack on the transparent conductive oxide layer, and a cadmium telluride layer on the multi-layer n-type stack. The multi-layer n-type stack generally includes a first layer and a second layer, where the first layer comprises cadmium and sulfur and the second layer comprises cadmium and oxygen. The multi-layer n-type stack can, in certain embodiments, include additional layers (e.g., a third layer, a fourth layer, etc.). Methods are also generally provided for manufacturing such thin film photovoltaic devices.
    Type: Grant
    Filed: May 31, 2011
    Date of Patent: May 29, 2012
    Assignee: PrimeStar Solar, Inc.
    Inventors: Scott Daniel Feldman-Peabody, Robert Dwayne Gossman
  • Publication number: 20120126357
    Abstract: Provided are light detection devices and methods of manufacturing the same. The light detection device includes a first conductive pattern on a surface of a substrate, an insulating pattern on the substrate and having an opening exposing at least a portion of the first conductive pattern, a light absorbing layer filling the opening of the insulating pattern and having a top surface disposed at a level substantially higher than a top surface of the insulating pattern, a second conductive pattern on the light absorbing layer, and connecting terminals electrically connected to the first and second conductive patterns, respectively.
    Type: Application
    Filed: October 28, 2011
    Publication date: May 24, 2012
    Applicant: Electronics and Telecommunications Research Institute
    Inventors: Sang Hoon KIM, Gyungock Kim, In Gyoo Kim, JiHo Joo, Ki Seok Jang
  • Patent number: 8183083
    Abstract: Disclosed is a method for manufacturing a back side illumination image sensor. The method includes defining a pixel area by forming a first isolation area in a first substrate; forming a photo detecting unit buried in the pixel area; forming an ion implantation layer on the photo detecting unit; growing a second substrate on the first substrate having the ion implantation layer; forming a logic unit electrically connected to the first substrate on the second substrate; forming an insulting layer and an interconnection on the second substrate; and exposing the photo detecting unit by grinding a backside of the first substrate.
    Type: Grant
    Filed: December 18, 2009
    Date of Patent: May 22, 2012
    Assignee: Dongbu Hitek Co., Ltd.
    Inventor: Yong Geun Lee
  • Patent number: 8178912
    Abstract: An image sensor includes a first substrate, readout circuitry, an electrical junction region, a metal interconnection and an image sensing device. The readout circuitry is formed on and/or over the first substrate and the electrical junction region is formed in the first substrate and electrically connected to the readout circuitry. The metal interconnection is electrically connected to the electrical junction region. The image sensing device is formed on and/or over the metal interconnection.
    Type: Grant
    Filed: October 3, 2008
    Date of Patent: May 15, 2012
    Assignee: Dongbu HiTek Co., Ltd.
    Inventor: Joon Hwang
  • Patent number: 8173476
    Abstract: There is provided an image pickup device, including a photoelectric conversion element converting light into charges, a transfer gate for transferring the converted charges to a floating node, a source follower transistor for outputting a signal based on a voltage of the floating node to a signal line, and a clip circuit clipping the signal line at a first voltage and a second voltage.
    Type: Grant
    Filed: June 9, 2009
    Date of Patent: May 8, 2012
    Assignee: Canon Kabushiki Kaisha
    Inventors: Takanori Watanabe, Tetsuya Itano, Mahito Shinohara
  • Patent number: 8174087
    Abstract: The present invention is to provide an electromagnetic wave detecting element that can prevent a decrease in light utilization efficiency at sensor portions. The sensor portions are provided so as to correspond to respective intersection portions of scan lines and signal lines, and have semiconductor layer that generate charges due to electromagnetic waves being irradiated, and at whose electromagnetic wave irradiation surface sides upper electrodes are formed, and at whose electromagnetic wave non-irradiation surface sides lower electrodes are formed. Bias voltage is supplied to the respective upper electrodes via respective contact holes by a common electrode line that is formed further toward an electromagnetic wave downstream side than the semiconductor layer.
    Type: Grant
    Filed: January 22, 2009
    Date of Patent: May 8, 2012
    Assignee: FUJIFILM Corporation
    Inventor: Yoshihiro Okada
  • Publication number: 20120098028
    Abstract: A photoelectric conversion element in accordance with an embodiment includes a photoelectric conversion layer, a cathode electrode, and an anode electrode. The cathode electrode is arranged on one surface of the photoelectric conversion layer and includes monolayer graphene and/or multilayer graphene in which a portion of carbon atoms is substituted with at least nitrogen atoms. The anode electrode is arranged on the other surface of the photoelectric conversion layer.
    Type: Application
    Filed: September 18, 2011
    Publication date: April 26, 2012
    Applicant: KABUSHIKI KAISHA TOSHIBA
    Inventor: Katsuyuki NAITO
  • Patent number: 8159011
    Abstract: A charge transfer transistor includes: a first diffusion region and a second diffusion region; a gate for controlling a charge transfer from the first diffusion region to the second diffusion region by a control signal; and a potential well incorporated under the gate, wherein the first diffusion region is a pinned photodiode. A pixel of an image sensor includes: a photodiode for generating and collecting a photo generated charge; a floating diffusion region for serving as a photo generated charge sensing node; a transfer gate for controlling a charge transfer from the photodiode to the floating diffusion region by a control signal; and a potential well incorporated under the transfer gate.
    Type: Grant
    Filed: February 28, 2007
    Date of Patent: April 17, 2012
    Assignee: Intellectual Ventures II LLC
    Inventor: Jaroslav Hynecek
  • Patent number: 8154098
    Abstract: A reverse image sensor module includes first and second semiconductor chips, and first and second insulation layers. The first semiconductor chip includes a first semiconductor chip body having a first surface and a second surface facing away from the first surface, photodiodes disposed on the first surface, and a wiring layer disposed on the second surface and having wiring lines electrically connected to the photodiodes and bonding pads electrically connected to the wiring lines. The second semiconductor chip includes a second semiconductor chip body having a third surface facing the wiring layer, and through-electrodes electrically connected to the bonding pads and passing through the second semiconductor chip body. The first insulation layer is disposed on the wiring layer, and the second insulation layer is disposed on the third surface of the second semiconductor chip body facing the first insulation layer and is joined to the first insulation layer.
    Type: Grant
    Filed: December 28, 2009
    Date of Patent: April 10, 2012
    Assignee: Hynix Semiconductor Inc.
    Inventor: Seung Taek Yang
  • Publication number: 20120081638
    Abstract: A light sensing element includes a photodiode formed on a semiconductor substrate surface, and a laminated structure formed on the photodiode, wherein the laminated structure includes a first layer formed of a silicon oxide film, a second layer formed on the first layer and formed of a silicon nitride film, and a third layer formed on the second layer and formed of a polysilicon film.
    Type: Application
    Filed: September 23, 2011
    Publication date: April 5, 2012
    Applicant: SONY CORPORATION
    Inventors: Hiroshi Yumoto, Shuji Yoneda, Yusuke Murakawa, Hideo Yamagata
  • Patent number: 8143688
    Abstract: A device with increased photo-sensitivity using laser treated semiconductor as detection material is disclosed. In some embodiments, the laser treated semiconductor may be placed between and an n-type and a p-type contact or two Schottky metals. The field within the p-n junction or the Schottky metal junction may aid in depleting the laser treated semiconductor section and may be capable of separating electron hole pairs. Multiple device configurations are presented, including lateral and vertical configurations.
    Type: Grant
    Filed: May 18, 2010
    Date of Patent: March 27, 2012
    Assignee: SiOnys, Inc.
    Inventors: Nathaniel J. McCaffrey, James E. Carey
  • Patent number: 8143687
    Abstract: A broadband radiation detector includes a first layer having a first type of electrical conductivity type. A second layer has a second type of electrical conductivity type and an energy bandgap responsive to radiation in a first spectral region. A third layer has the second type of electrical conductivity type and an energy bandgap responsive to radiation in a second spectral region comprising longer wavelengths than the wavelengths of the first spectral region. The broadband radiation detector further includes a plurality of internal regions. Each internal region may be disposed at least partially within the third layer and each internal region may include a refractive index that is different from a refractive index of the third layer. The plurality of internal regions may be arranged according to a regularly repeating pattern.
    Type: Grant
    Filed: December 17, 2009
    Date of Patent: March 27, 2012
    Assignee: Raytheon Company
    Inventors: Justin G. A. Wehner, Scott M. Johnson
  • Patent number: 8138531
    Abstract: Pixel sensor cells, method of fabricating pixel sensor cells and design structure for pixel sensor cells. The pixel sensor cells including: a photodiode body in a first region of a semiconductor layer; a floating diffusion node in a second region of the semiconductor layer, a third region of the semiconductor layer between and abutting the first and second regions; and dielectric isolation in the semiconductor layer, the dielectric isolation surrounding the first, second and third regions, the dielectric isolation abutting the first, second and third regions and the photodiode body, the dielectric isolation not abutting the floating diffusion node, portions of the second region intervening between the dielectric isolation and the floating diffusion node.
    Type: Grant
    Filed: September 17, 2009
    Date of Patent: March 20, 2012
    Assignee: International Business Machines Corporation
    Inventors: James William Adkisson, John Joseph Ellis-Monaghan, Mark David Jaffe, Richard John Rassel
  • Patent number: 8138485
    Abstract: A radiation detector, a method of manufacturing a radiation detector, and a lithographic apparatus comprising a radiation detector. The radiation detector has a radiation sensitive surface. The radiation sensitive surface is sensitive to radiation wavelengths between 10-200 nm and charged particles. The radiation detector has a silicon substrate, a dopant layer, a first electrode, and a second electrode. The silicon substrate is provided in a surface area at a first surface side with doping profile of a certain conduction type. The dopant layer is provided on the first surface side of the silicon substrate. The dopant layer has a first layer of dopant material and a second layer. The second layer is a diffusion layer in contact with the surface area at the first surface side of the silicon substrate. The first electrode is connected to dopant layer. The second electrode is connected to the silicon substrate.
    Type: Grant
    Filed: June 24, 2008
    Date of Patent: March 20, 2012
    Assignee: ASML Netherlands B.V.
    Inventors: Stoyan Nihtianov, Arie Johan Van Der Sijs, Bearrach Moest, Petrus Wilhelmus Joseph Maria Kemper, Marc Antonius Maria Haast, Gerardus Wilhelmus Petrus Baas, Lis Karen Nanver, Francesco Sarubbi, Antonius Andreas Johannes Schuwer, Gregory Micha Gommeren, Martijn Pot, Thomas Ludovicus Maria Scholtes
  • Patent number: 8138568
    Abstract: Disclosed is a transparent carbon nanotube (CNT) electrode using a conductive dispersant° The transparent CNT electrode comprises a transparent substrate and a CNT thin film formed on a surface the transparent substrate wherein the CNT thin film is formed of a CNT composition comprising CNTs and a doped dispersant. Further disclosed is a method for producing the transparent CNT electrode. The transparent CNT electrode exhibits excellent conductive properties, can be produced in an economical and simple manner by a room temperature wet process, and can be applied to flexible displays. The transparent CNT electrode can be used to fabricate a variety of devices, including image sensors, solar cells, liquid crystal displays, organic electroluminescence (EL) displays and touch screen panels, that are required to have both light transmission properties and conductive properties.
    Type: Grant
    Filed: April 13, 2007
    Date of Patent: March 20, 2012
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Seon Mi Yoon, Jae Young Choi, Dong Kee Yi, Seong Jae Choi, Hyeon Jin Shin
  • Patent number: 8134217
    Abstract: Bypass diodes for solar cells are described. In one embodiment, a bypass diode for a solar cell includes a substrate of the solar cell. A first conductive region is disposed above the substrate, the first conductive region of a first conductivity type. A second conductive region is disposed on the first conductive region, the second conductive region of a second conductivity type opposite the first conductivity type.
    Type: Grant
    Filed: December 14, 2010
    Date of Patent: March 13, 2012
    Assignee: SunPower Corporation
    Inventors: Seung Bum Rim, Taeseok Kim, David D. Smith, Peter J. Cousins
  • Patent number: 8134190
    Abstract: To provide a solid-state image pickup apparatus with little or no difference in the dark currents between adjacent photoelectric conversion elements and providing a high sensitivity and a low dark current even in a high-speed readout operation. A well 302 is formed on a wafer 301, and semiconductor layers 101a, 101b are formed in the well to constitute photodiodes. A well contact 306 is formed between the semiconductor layers 101a, 101b. Element isolation regions 303b, 303a are provided between the well contact and the semiconductor layers, and channel stop layers 307b, 307a are provided under the element isolation regions 303b, 303a. A conductive layer 304 is provided on the element isolation region 303b, and a side wall 308 is provided on a side face of the conductive layer 304. A distance a between an end of the element isolation region 303b and the conductive layer 304, a width b of the side wall 308 and a device isolation width c satisfy a relation c>a?b.
    Type: Grant
    Filed: February 23, 2009
    Date of Patent: March 13, 2012
    Assignee: Canon Kabushiki Kaisha
    Inventors: Akira Okita, Masanori Ogura, Seiichiro Sakai, Takanori Watanabe
  • Patent number: 8134069
    Abstract: A solar cell includes a substrate, a first electrode located over the substrate, where the first electrode comprises a first transition metal layer, at least one p-type semiconductor absorber layer located over the first electrode, an n-type semiconductor layer located over the p-type semiconductor absorber layer, and a second electrode located over the n-type semiconductor layer. The first transition metal layer contains (i) an alkali element or an alkali compound and (ii) a lattice distortion element or a lattice distortion compound. The p-type semiconductor absorber layer includes a copper indium selenide (CIS) based alloy material.
    Type: Grant
    Filed: April 13, 2009
    Date of Patent: March 13, 2012
    Assignee: MiaSole
    Inventors: Neil M. Mackie, John Corson
  • Patent number: 8134179
    Abstract: A photodiode in which a pn junction is formed between the doped region (DG) formed in the surface of a crystalline semiconductor substrate and a semiconductor layer (HS) deposited above said doped region. An additional doping (GD) is provided in the edge region of the doped zone, by means of which additional doping the pn junction is shifted deeper into the substrate (SU). With the greater distance of the pn junction from defects at phase boundaries that is achieved in this way, the dark current within the photodiode is reduced.
    Type: Grant
    Filed: April 28, 2006
    Date of Patent: March 13, 2012
    Assignee: austriamicrosystems AG
    Inventors: Jochen Kraft, Bernhard Löffler, Gerald Meinhardt
  • Publication number: 20120055532
    Abstract: A semiconductor optoelectronic device comprises a growth substrate; a semiconductor epitaxial stack formed on the growth substrate comprising a sacrificial layer with electrical conductivity formed on the growth substrate; a first semiconductor material layer having a first electrical conductivity formed on the sacrificial layer, and a second semiconductor material layer having a second electrical conductivity formed on the first semiconductor material layer; and a first electrode directly formed on the growth substrate and electrically connected to the semiconductor epitaxial stack via the growth substrate.
    Type: Application
    Filed: September 6, 2011
    Publication date: March 8, 2012
    Applicant: Epistar Corporation
    Inventors: Hsin-Ying Wang, Yi-Ming Chen, Tzu-Chieh Hsu, Chi-Hsing Chen, Chien-Kai Chung, Min-Hsun Hsieh, Chia-Liang Hsu, Chao-Hsing Chen, Chiu-Lin Yao, Chien-Fu Huang, Hsin-Mao Liu, Hsiang-Ling Chang
  • Patent number: 8129813
    Abstract: The present invention relates to an optoelectronic sensor for 5 demodulating a modulated photon flux (50), and to a measuring device, in particular for 3D distance measurement, having at least one optoelectronic sensor of this type. The optoelectronic sensor has at least two collecting zones 10 introduced in a semiconductor region (10), which collecting zones are for example diffused into the semiconductor region and doped inversely with respect to the semiconductor region (10). The collecting zones serve for collecting and tapping off minority carriers generated upon penetration of a modulated photon flux (50). Furthermore, at least two control zones are introduced in the semiconductor region (10), which control zones generate a drift field in a manner dependent on a control voltage that can be applied to the control zones, the control zones being of the same doping type as the semiconductor region (10).
    Type: Grant
    Filed: July 28, 2004
    Date of Patent: March 6, 2012
    Assignee: IC-Haus GmbH
    Inventor: Manfred Herz
  • Patent number: 8124958
    Abstract: Electronic and opto-electronic devices having epitaxially-deposited III/V compounds on vicinal group IV substrates and method for making same. The devices include an AlAs nucleating layer on a Ge substrate. The group IV substrate contains a p-n junction whose change of characteristics during epitaxial growth of As-containing layers is minimized by the AlAs nucleating layer. The AlAs nucleating layer provides improved morphology of the devices and a means to control the position of a p-n junction near the surface of the group IV substrate through diffusion of As and/or P and near the bottom of the III/V structure through minimized diffusion of the group IV element.
    Type: Grant
    Filed: December 3, 2010
    Date of Patent: February 28, 2012
    Assignee: Cyrium Technologies Incorporated
    Inventors: Norbert Puetz, Simon Fafard, Bruno J. Riel
  • Publication number: 20120043637
    Abstract: In accordance with the invention, an improved image sensor comprises an array of germanium photosensitive elements integrated with a silicon substrate and integrated with silicon readout circuits. The silicon transistors are formed first on a silicon substrate, using well known silicon wafer fabrication techniques. The germanium elements are subsequently formed overlying the silicon by epitaxial growth. The germanium elements are advantageously grown within surface openings of a dielectric cladding. Wafer fabrication techniques are applied to the elements to form isolated germanium photodiodes. Since temperatures needed for germanium processing are lower than those for silicon processing, the formation of the germanium devices need not affect the previously formed silicon devices. Insulating and metallic layers are then deposited and patterned to interconnect the silicon devices and to connect the germanium devices to the silicon circuits.
    Type: Application
    Filed: May 26, 2011
    Publication date: February 23, 2012
    Applicant: Infrared Newco, Inc.
    Inventors: Clifford Alan King, Conor S. Rafferty
  • Patent number: 8120080
    Abstract: An image sensor includes a trench formed in a semiconductor substrate, a first reflection part formed in the trench and having an inclined, curved surface, a second reflection part formed on the first reflection part such that a remaining space of the trench is filled with the second reflection part, and a vertical type photodiode formed on a region of the substrate between trenches. A method for forming the image sensor includes forming a trench in a semiconductor substrate, forming a first reflection part having an inclined, curved surface in the trench, forming a second reflection part on the first reflection part such that a remaining space of the trench is filled with the second reflection part, and forming a vertical type photodiode on a region of the substrate between trenches.
    Type: Grant
    Filed: October 7, 2009
    Date of Patent: February 21, 2012
    Assignee: Dongbu HiTek Co., Ltd.
    Inventor: Jeong-Su Park
  • Patent number: 8119436
    Abstract: An image sensor and a method for manufacturing the same are disclosed. The image sensor can include a semiconductor substrate that includes photodiodes arranged for each unit pixel; an interlayer dielectric layer and metal wirings disposed on the semiconductor substrate; and a photorefractive unit that is formed on the periphery of an optical path incident on the photodiodes. The photorefractive unit has a lower refractive index than the interlayer dielectric layer. The slantly incident light can be incident on the photodiodes, while maintaining the slanted optical path as it is. The light sensitivity of the photodiodes can be improved, thereby improving image quality.
    Type: Grant
    Filed: October 29, 2009
    Date of Patent: February 21, 2012
    Assignee: Dongbu Hitek Co., Ltd.
    Inventor: Seung Ryong Park
  • Patent number: 8120078
    Abstract: A photodiode structure including a semiconductor of a first conductivity type, the semiconductor having a main surface, a first well formed in the semiconductor at the main surface thereof, the first well being of a second conductivity type opposite to the first conductivity type. A second well formed in the semiconductor at the main surface thereof laterally outside the first well, the second well being of the second conductivity type, and a first terminal electrically connecting the first well and the second well, and a second terminal connecting the semiconductor such that a depletion region of laterally varying distance to the main surface results from applying a reverse voltage to the first and second terminals.
    Type: Grant
    Filed: November 19, 2007
    Date of Patent: February 21, 2012
    Assignee: Infineon Technologies AG
    Inventor: Stefan Hermann Groiss
  • Patent number: 8110828
    Abstract: A method of manufacturing a semiconductor layer is provided. In a first deposition during a first period of time, at least one Group IIIA element and at least one Group VIA element are deposited on a substrate or on a layer optional disposed on the substrate such as a back-electrode. During a second deposition during a second period of time, at least one Group IB element and the at least one group VIA element are deposited on the substrate or the optional layer. The one Group IB element combines with the Group VIA element to form a IB2VIA composition. A first deposition state is monitored, during the second deposition by making a first plurality of measurements of a first deposition state. The second deposition is terminated or attenuated based on a function of the first plurality of measurements of the indicia of the first deposition state.
    Type: Grant
    Filed: June 9, 2011
    Date of Patent: February 7, 2012
    Assignee: Solyndra LLC
    Inventors: Vedapuram S. Achutharaman, Wen Chang, Tarpan Dixit, Philip Kraus
  • Patent number: 8106473
    Abstract: A germanium (Ge) photodiode array on a glass substrate is provided with a corresponding fabrication method. A Ge substrate is provided that is either not doped or lightly doped with a first dopant. The first dopant can be either an n or p type dopant. A first surface of the Ge substrate is moderately doped with the first dopant and bonded to a glass substrate top surface. Then, a first region of a Ge substrate second surface is heavily doped with the first dopant. A second region of the Ge substrate second surface is heavily doped with a second dopant, having the opposite electron affinity than the first dopant, forming a pn junction. An interlevel dielectric (ILD) layer is formed overlying the Ge substrate second surface and contact holes are etched in the ILD layer overlying the first and second regions of the Ge substrate second surface. The contact holes are filled with metal and metal pads are formed overlying the contact holes.
    Type: Grant
    Filed: March 17, 2011
    Date of Patent: January 31, 2012
    Assignee: Sharp Laboratories of America, Inc.
    Inventors: Jong-Jan Lee, Steven R. Droes, John W. Hartzell, Jer-Shen Maa
  • Publication number: 20120001284
    Abstract: Various embodiments for etching of silicon nitride (SixNy) lightpipes, waveguides and pillars, fabricating photodiode elements, and integration of the silicon nitride elements with photodiode elements are described. The results show that the quantum efficiency of the photodetectors (PDs) can be increased using vertical silicon nitride vertical waveguides.
    Type: Application
    Filed: December 13, 2010
    Publication date: January 5, 2012
    Applicants: PRESIDENT AND FELLOWS OF HARVARD COLLEGE, ZENA TECHNOLOGIES, INC.
    Inventors: Turgut TUT, Peter Duane, Young-June Yu, Winnie N. Ye, Munib Wober, Kenneth B. Crozier
  • Patent number: 8089066
    Abstract: To provide a light emitting device high in reliability with a pixel portion having high definition with a large screen. According to a light emitting device of the present invention, on an insulator (24) provided between pixel electrodes, an auxiliary electrode (21) made of a metal film is formed, whereby a conductive layer (20) made of a transparent conductive film in contact with the auxiliary electrode can be made low in resistance and thin. Also, the auxiliary electrode (21) is used to achieve connection with an electrode on a lower layer, whereby the electrode can be led out with the transparent conductive film formed on an EL layer. Further, a protective film (32) made of a film containing hydrogen and a silicon nitride film which are laminated is formed, whereby high reliability can be achieved.
    Type: Grant
    Filed: March 16, 2010
    Date of Patent: January 3, 2012
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Shunpei Yamazaki, Masaaki Hiroki, Masakazu Murakami, Hideaki Kuwabara
  • Publication number: 20110315861
    Abstract: It is an object to provide a photoelectric conversion device whose power consumption and a mounting area are reduced and yield is improved and further to provide a photoelectric conversion device whose number of manufacturing processes and manufacturing cost are reduced. A photoelectric conversion device includes a photoelectric conversion element for outputting photocurrent corresponding to illuminance, and a resistor changing resistance corresponding to illuminance. In the photoelectric conversion device, one terminal of the photoelectric conversion element and one terminal of the resistor are electrically connected in series; the other terminal of the photoelectric conversion element is connected to a high power supply potential; the other terminal of the resistor is connected to a low power supply potential; and a light intensity adjusting unit is provided on a light reception surface side of the photoelectric conversion element or the resistor to adjust illuminance.
    Type: Application
    Filed: June 17, 2011
    Publication date: December 29, 2011
    Applicant: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.
    Inventors: Yukinori SHIMA, Atsushi HIROSE
  • Patent number: 8084836
    Abstract: A photodiode array PD1 comprises an n-type semiconductor substrate one face of which is an incident surface of light to be detected; a plurality of pn junction-type photosensitive regions 3 as photodiodes formed on the side of a detecting surface that is opposite to the incident surface of the semiconductor substrate; and a carrier capturing portion 12 formed between adjacent photosensitive regions 3 from among the plurality of photosensitive regions 3 on the detecting surface side of the semiconductor substrate. The carrier capturing portion 12 has one or plurality of carrier capturing regions 13 respectively including pn-junctions, arranged at intervals. Thereby can be realized a semiconductor photodetector and a radiation detecting apparatus which can favorably restrain crosstalk from occurring.
    Type: Grant
    Filed: December 27, 2006
    Date of Patent: December 27, 2011
    Assignee: Hamamatsu Photonics K.K.
    Inventors: Tatsumi Yamanaka, Masanori Sahara, Hideki Fujiwara
  • Patent number: 8080857
    Abstract: The present invention provides a semiconductor photodetecting device that suppresses sensitivity of a short wavelength component of irradiated light as well as a long wavelength component thereof and has a spectral sensitivity characteristic approximately coincident with a human visibility characteristic, and an illuminance sensor including the semiconductor photodetecting device. The semiconductor photodetecting device has a P-type well region and an N-type well region provided side by side along the surface of a P-type semiconductor substrate, a high-concentration N-type region formed in the neighborhood of the surface of the P-type well region, and a high-concentration P-type region formed in the neighborhood of the surface of the N-type well region.
    Type: Grant
    Filed: September 29, 2008
    Date of Patent: December 20, 2011
    Assignee: Oki Electric Industry Co., Ltd.
    Inventor: Noriko Tomita
  • Patent number: 8076672
    Abstract: A semiconductor device which includes a passivation structure formed with a conductive strip of resistive material that crosses itself once around the active region of the device to form a first closed loop, a continuous strip that loops around the first closed loop without crossing itself which crosses itself a second time to form a second closed loop.
    Type: Grant
    Filed: December 28, 2006
    Date of Patent: December 13, 2011
    Assignee: International Rectifier Corporation
    Inventor: Niraj Ranjan
  • Publication number: 20110291220
    Abstract: According to one embodiment, a solid-state imaging device includes a first diffusion layer for accumulating carriers generated by a photoelectric effect; a second diffusion layer adjoining the first diffusion layer, the second diffusion layer having a polarity opposite to that of the first diffusion layer; and a reference voltage setting unit that applies a changing voltage that temporally changes to the first diffusion layer through the second diffusion layer and sets a voltage based on an amplitude of the applied changing voltage as a reference voltage of the first diffusion layer.
    Type: Application
    Filed: March 21, 2011
    Publication date: December 1, 2011
    Applicant: Kabushiki Kaisha Toshiba
    Inventor: Takeshi YOSHIDA
  • Publication number: 20110291221
    Abstract: A semiconductor light receiving device includes: a substrate having a rectangular shape with first through fourth corners, a multilayer structure formed on the substrate, a light receiving part having a mesa structure positioned at a first corner side from a center part of the rectangular shape of the substrate, a first electrode pad provided on the semiconductor substrate, and a second electrode pad provided on the semiconductor substrate so as to be close to a second corner diagonally opposite to the first corner, a first minimum distance between the second electrode pad and an edge of the substrate being longer than a second minimum distance between the first electrode pad and the edge of the substrate.
    Type: Application
    Filed: May 27, 2011
    Publication date: December 1, 2011
    Applicant: SUMITOMO ELECTRIC DEVICE INNOVATIONS, INC.
    Inventor: Ryuji Yamabi
  • Patent number: 8063461
    Abstract: To provide a back-illuminated type solid-state imaging device capable of color separation of pixels without using a color filter, and a camera module and an electronic equipment module which incorporate the solid-state imaging device. A solid-state imaging device including: a photoelectric conversion element PD formed in a semiconductor substrate 22; a reading-out part which reads out signal charges from the photoelectric conversion element PD formed on one surface side of the semiconductor substrate 22; the other surface of the semiconductor substrate 22 made to a light incidence surface; and a pixel which exclusively makes light of a specific wavelength or longer photoelectrically converted, by adjusting pn junction depths h2 [h2 r, h2 g, h2 b] between the photoelectric conversion element PD and an accumulation layer 28 on the light incidence surface side. A camera module and an electronic equipment module which incorporate the solid-state imaging device.
    Type: Grant
    Filed: May 1, 2009
    Date of Patent: November 22, 2011
    Assignee: Sony Corporation
    Inventor: Takayuki Ezaki
  • Patent number: 8049294
    Abstract: The present invention is a photodiode detector array for use in computerized tomography (CT) and non-CT applications. Specifically, the present invention is a high-density photodiode arrays, with low dark current, low capacitance, high signal to noise ratio, high speed, and low crosstalk that can be fabricated on relatively large substrate wafers. More specifically the photodiode array of the present invention is fabricated such that the PN-junctions are located on both the front side and back side surfaces of the array, and wherein the front side PN-junction is in electrical communication with the back side PN-junction. Still more specifically, the present invention is a photodiode array awing PN-junctions that are electrically connected from the front to back surfaces and which can be operated in a fully depleted mode at low reverse bias.
    Type: Grant
    Filed: December 14, 2009
    Date of Patent: November 1, 2011
    Assignee: UDT Sensors, Inc.
    Inventors: Peter Steven Bui, Narayan Dass Taneja
  • Patent number: 8044484
    Abstract: The present invention provides an ultraviolet detecting device which comprises a silicon semiconductor layer having a thickness ranging from greater than or equal to 3 nm to less than or equal to 36 nm, which is formed over an insulating layer, lateral PN-junction type first and second photodiodes formed in the silicon semiconductor layer, an interlayer insulating film formed over the silicon semiconductor layer, a first filter layer made of silicon nitride, which is formed over the interlayer insulating film provided over the first photodiode and causes light lying in a wavelength range of an UV-B wave or higher to pass therethrough, and a second filter layer made of silicon nitride, which is formed over the interlayer insulating film provided over the second photodiode and allows light lying in a wavelength range of an UV-A wave or higher to pass therethrough.
    Type: Grant
    Filed: October 29, 2010
    Date of Patent: October 25, 2011
    Assignee: Oki Semiconductor Co., Ltd.
    Inventors: Noriyuki Miura, Tadashi Chiba
  • Patent number: 8044476
    Abstract: A radiation detector comprising a II-VI compound semiconductor substrate that absorbs radiation having a first energy, a II-VI compound semiconductor layer of a first conductivity type provided on a main surface of the II-VI compound semiconductor substrate, a metal layer containing at least one of a group III element and a group V element provided on the II-VI compound semiconductor layer, a IV semiconductor layer having a second conductivity type opposite to the first conductivity type provided on the metal layer, and a IV semiconductor substrate that absorbs radiation having a second energy different from the first energy provided on the IV semiconductor layer.
    Type: Grant
    Filed: June 16, 2006
    Date of Patent: October 25, 2011
    Assignee: National University Corporation Shizuoka University
    Inventors: Yoshinori Hatanaka, Toru Aoki
  • Patent number: 8044478
    Abstract: Provided is an image sensor. The image sensor can include a readout circuitry on a first substrate. An interlayer dielectric is formed on the first substrate, and comprises a lower line therein. A crystalline semiconductor layer is bonded to the interlayer dielectric. A photodiode can be formed in the crystalline semiconductor layer, and comprises a first impurity region and a second impurity region. A via hole can be formed passing through the crystalline semiconductor layer and the interlayer dielectric to expose the lower line. A plug is formed inside the first via hole to connect with only the lower line and the first impurity region. A device isolation region can be formed in the crystalline semiconductor layer to separate the photodiode according to unit pixel.
    Type: Grant
    Filed: September 5, 2008
    Date of Patent: October 25, 2011
    Assignee: Dongbu Hitek Co., Ltd.
    Inventor: Joon Hwang
  • Publication number: 20110254117
    Abstract: The present invention relates generally to electrical devices. The present invention relates more particularly to electrical devices including dendritic metal electrodes. One aspect of the present invention is an electrical device comprising a first electrode comprising at least one dendritic metal structure; a second electrode; and an electrically active structure disposed between the dendritic metal structure and the second electrode.
    Type: Application
    Filed: December 8, 2009
    Publication date: October 20, 2011
    Inventor: Michael Kozicki
  • Patent number: 8039359
    Abstract: In one embodiment, the ESD device uses highly doped P and N regions deep within the ESD device to form a zener diode that has a controlled breakdown voltage.
    Type: Grant
    Filed: February 27, 2009
    Date of Patent: October 18, 2011
    Assignee: Semiconductor Components Industries, LLC
    Inventors: Thomas Keena, Ki Chang, Francine Y. Robb, Mingjiao Liu, Ali Salih, John Michael Parsey, Jr., George Chang