Responsive To Nonelectrical External Signals (e.g., Light) Patents (Class 257/53)
  • Patent number: 7214971
    Abstract: A semiconductor light-receiving device has a substrate including upper, middle and lower regions in its front side. A p-type layer on the lower region has a top surface including a portion on a level with the middle region. An electrode covers at least part of the boundary between the portion of the p-type layer and the middle region. An n-type layer on the p-type layer has a top surface including a portion on a level with the upper region. Another electrode covers at least part of the boundary between the portion of the n-type layer and the upper region.
    Type: Grant
    Filed: June 10, 2004
    Date of Patent: May 8, 2007
    Assignee: Hamamatsu Photonics K.K.
    Inventors: Minoru Niigaki, Kazutoshi Nakajima
  • Patent number: 7214570
    Abstract: An encapsulation for an electrical device is disclosed. A cap support is provided in the non-active regions of the device to prevent the package from contacting the active components of the device due to mechanical stress induced in the package.
    Type: Grant
    Filed: January 27, 2005
    Date of Patent: May 8, 2007
    Assignee: Osram GmbH
    Inventor: Ewald Karl Michael Guenther
  • Patent number: 7202511
    Abstract: Electromagnetic energy is detected with high efficiency in the spectral range having wavelengths of about 1–2 microns by coupling an absorber layer having high quantum efficiency in the spectral range having wavelengths of about 1–2 microns to an intrinsic semiconducting blocking region of an impurity band semiconducting device included in a solid state photon detector.
    Type: Grant
    Filed: August 18, 2004
    Date of Patent: April 10, 2007
    Assignee: DRS Sensors & Targeting Systems, Inc.
    Inventors: Maryn G. Stapelbroek, Henry H. Hogue, Arvind I. D'Souza
  • Patent number: 7199303
    Abstract: An optical energy conversion apparatus 10 includes a first impurity doped semiconductor layer 5, formed on a substrate, and which is of a semiconductor material admixed with a first impurity, an optically active layer 6, formed on the first impurity doped semiconductor layer 5, and which is of a hydrogen-containing amorphous semiconductor material, and a second impurity doped semiconductor layer 7, admixed with a second impurity and formed on the optically active semiconductor layer 6. The second impurity doped semiconductor layer is of a polycrystallized semiconductor material lower in hydrogen concentration than the material of the optically active semiconductor layer 6. The average crystal grain size in the depth-wise direction in an interfacing structure between the optically active semiconductor layer 6 and the second impurity doped semiconductor layer 7 is decreased stepwise in a direction proceeding from the surface of the second impurity doped semiconductor layer towards the substrate 1.
    Type: Grant
    Filed: March 13, 2001
    Date of Patent: April 3, 2007
    Assignee: Sony Corporation
    Inventors: Akio Machida, Setsuo Usui, Kazumasa Nomoto
  • Patent number: 7199395
    Abstract: An i-type amorphous silicon film and an anti-reflection film made of amorphous silicon nitride or the like are formed in this order on a main surface of an n-type single-crystalline silicon substrate. On a back surface of the n-type single-crystalline silicon substrate are provided a positive electrode and a negative electrode next to each other. The positive electrode includes an i-type amorphous silicon film, a p-type amorphous silicon film, a back electrode, and a collector electrode formed in this order on the back surface of the n-type single-crystalline silicon substrate. The negative electrode includes an i-type amorphous silicon film, an n-type amorphous silicon film, a back electrode, and a collector electrode formed in this order on the back surface of the n-type single-crystalline silicon substrate.
    Type: Grant
    Filed: September 24, 2004
    Date of Patent: April 3, 2007
    Assignee: Sanyo Electric Co., Ltd.
    Inventors: Akira Terakawa, Toshio Asaumi
  • Patent number: 7186020
    Abstract: According to embodiments of the present invention, a very thin thermal interface material (TIM) is developed, which is composed of carbon nanotubes, silicon thermal grease, and chloroform. The carbon nanotubes and chloroform comprise the filler and the silicone thermal grease comprises the matrix.
    Type: Grant
    Filed: December 13, 2004
    Date of Patent: March 6, 2007
    Assignee: University of Washington
    Inventors: Minoru Taya, Jong-Jin Park
  • Patent number: 7187020
    Abstract: A solid-state imaging device of a three-transistor pixel configuration having no selection transistor has a problem of a non-selection hot carrier white point, which is specific to this apparatus. A bias current during a non-reading period of pixels is made to flow to a pixel associated with an immediately previous selection pixel, for example, the immediately previous selection pixel itself. As a result, dark current only for one line occurs in each pixel, and the dark current for one line itself can be reduced markedly. Consequently, defective pixels due to non-selection hot carrier white points can be virtually eliminated.
    Type: Grant
    Filed: May 13, 2004
    Date of Patent: March 6, 2007
    Assignee: Sony Corporation
    Inventor: Keiji Mabuchi
  • Patent number: 7169628
    Abstract: A process for producing a cold cathode field emission device. A cathode electrode is formed on a front surface of a support member that transmits exposure light. An insulating layer is formed on an entire surface. A gate electrode is formed on the insulating layer. The support member is irradiated with exposure light from a back surface side of the support member through the hole as a mask for exposure. An electron-emitting-portion-forming-layer composed of a photosensitive material is formed at least inside the opening portion. The support member is irradiated with exposure light from a back surface side of the support member through the hole as a mask for exposure.
    Type: Grant
    Filed: April 14, 2005
    Date of Patent: January 30, 2007
    Assignee: Sony Corporation
    Inventors: Motohiro Toyota, Ichiro Saito, Toshiki Shimamura, Masakazu Muroyama
  • Patent number: 7166482
    Abstract: A process for producing a cold cathode field emission device. A cathode electrode is formed on a front surface of a support member that transmits exposure light. An insulating layer is formed on an entire surface. A gate electrode is formed on the insulating layer. The support member is irradiated with exposure light from a back surface side of the support member through the hole as a mask for exposure. An electron-emitting-portion-forming-layer composed of a photosensitive material is formed at least inside the opening portion. The support member is irradiated with exposure light from a back surface side of the support member through the hole as a mask for exposure.
    Type: Grant
    Filed: April 14, 2005
    Date of Patent: January 23, 2007
    Assignee: Sony Corporation
    Inventors: Motohiro Toyota, Ichiro Saito, Toshiki Shimamura, Masakazu Muroyama
  • Patent number: 7135698
    Abstract: A multi-spectral super-pixel photodetector for detecting four or more different bands of infrared radiation is described. The super-pixel photodetector includes two or more sub-pixel photodetectors, each of which includes a diffractive resonant optical cavity that resonates at two or more infrared radiation bands of interest. By detecting infrared radiation at two or more different applied biases and by generating a spectral response curve for each of the sub-pixel photodetectors at each of these biases, the response to each of the individual bands of infrared radiation can be calculated. The response to each band of infrared radiation can be found by deconvolving the response at each bias. The super-pixel photodetector finds use in military and medical imaging applications and can cover a broad portion of the infrared spectrum.
    Type: Grant
    Filed: December 5, 2002
    Date of Patent: November 14, 2006
    Assignee: Lockheed Martin Corporation
    Inventor: Pradip Mitra
  • Patent number: 7132598
    Abstract: A photoelectric conversion device comprising a semiconductor and an organic electrically conducting agent, wherein the organic electrically conducting agent exhibits a melting temperature Tm which is lower than the operation temperature of the photoelectric conversion device.
    Type: Grant
    Filed: December 3, 2003
    Date of Patent: November 7, 2006
    Assignee: Sony Deutschland GmbH
    Inventors: Gabriele Nelles, Akio Yasuda, Hans-Werner Schmidt, Thelakkat Mukundan, Haridas R. Karickal, Donal Lupo
  • Patent number: 7115925
    Abstract: An active pixel includes a a photosensitive element formed in a semiconductor substrate. A transfer transistor is formed between the photosensitive element and a floating diffusion and selectively operative to transfer a signal from the photosensitive element to the floating diffusion. The floating diffusion is formed from an n-type implant with a dosage in the range of 5e13 to 5e14 ions/cm2. Finally, an amplification transistor is controlled by the floating diffusion.
    Type: Grant
    Filed: January 14, 2005
    Date of Patent: October 3, 2006
    Assignee: OmniVision Technologies, Inc.
    Inventor: Howard E. Rhodes
  • Patent number: 7102185
    Abstract: An interline transfer type image sensing device that can be operated at high speed and with low image smear is described. The device incorporates a refractory metal layer which is used for both a light shield over the vertical charge transfer region and as a wiring layer for low resistance strapping of poly crystalline silicon (polysilicon) gate electrodes for the vertical charge transfer region. Plugs provided by a separate metallization layer connect the refractory light shield to the polysilicon gate electrode. These plugs allow high temperature processing after refractory light shield patterning for improved sensor performance without degradation of the polysilicon gate electrode or the refractory lightshield layer.
    Type: Grant
    Filed: June 21, 2004
    Date of Patent: September 5, 2006
    Assignee: Eastman Kodak Company
    Inventors: David N. Nichols, David L. Losee, Christopher Parks
  • Patent number: 7102159
    Abstract: An image sensor package having at least one chip supporting bar secured to a top surface of an image sensor chip. The thickness of the chip supporting bar is absorbed within a vertical dimension of wire loops that connect bonding pads to leads so that the chip supporting bar does not contribute to the thickness of the image sensor package. An exposed back surface of the image sensor chip enhances thermal dissipation.
    Type: Grant
    Filed: June 12, 2004
    Date of Patent: September 5, 2006
    Assignee: Macronix International Co., Ltd.
    Inventors: Chen Jung Tsai, Chih-Wen Lin
  • Patent number: 7057222
    Abstract: A magnetic memory includes digit lines, bit lines, and magnetic tunnel junctions (MTJs) that are between the bits lines and the digit lines. The digit lines intersect the bit lines at an oblique angle. The digit lines may intersect the bit lines at an oblique angle of from 15° to 75°.
    Type: Grant
    Filed: October 16, 2003
    Date of Patent: June 6, 2006
    Assignee: Samsung Electronics Co., Ltd.
    Inventor: Won-Cheol Jeong
  • Patent number: 7042008
    Abstract: An image sensor has a CdTe plate, a plurality of hole-type electrodes, and a voltage-applying unit. The hole-type electrodes are arranged at predetermined intervals in the direction of thickness. The voltage-applying unit applies a voltage to the hole-type electrodes. One of the electrodes is not adjacent to any other electrode and is used as an anode. The remaining electrodes are used as cathodes. A sensor-element array is provided on the detecting surface of the image sensor. The array comprises a plurality of sensor elements arranged in the form of a matrix. Each sensor element comprises an anode, a plurality of cathodes, and CdTe lying between the anode and the cathodes.
    Type: Grant
    Filed: August 8, 2003
    Date of Patent: May 9, 2006
    Assignees: Mitsubishi Heavy Industries, Ltd., Japan as represented by the Director-General of the Institute of Space and Astronautical Science
    Inventors: Yoshikatsu Kuroda, Tadayuki Takahashi, Yasushi Mizuno
  • Patent number: 7038238
    Abstract: A semiconductor device including a conductive substrate or a first conductive layer formed on the substrate, a non-single-crystal semiconductor layer member is disposed on the conductive substrate or the conductive layer, the non-single-crystal semiconductor layer member having at least one intrinsic, non-single-crystal semiconductor layer, and a second conductive layer disposed on the non-single-crystal semiconductor layer. The intrinsic non-single-crystal semiconductor layer contains sodium and oxygen in very low concentrations where each concentration is 5×1018 atoms/cm3 or less.
    Type: Grant
    Filed: April 18, 1996
    Date of Patent: May 2, 2006
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventor: Shunpei Yamazaki
  • Patent number: 7034333
    Abstract: A semiconductor sensor for direct detection of electrons has a pixel structure in which a capacitance is designed to each pixel that stores a charge and converts the charge into a readable voltage. A conductive layer substantially covers the pixel structure. The conductive layer includes pixel surface coatings, each of which cover an individual pixel. Each pixel surface coating is separated from each adjoining pixel surface coating by a gap. A second conductive layer covers a surface of the gap. An insulation insulates the pixel surface coating from the second conductive layer. The conductive layers may be metal or other conductive, light impervious materials. The second conductive layer may include a capacitor electrode.
    Type: Grant
    Filed: June 13, 2000
    Date of Patent: April 25, 2006
    Inventor: Lutz Fink
  • Patent number: 7030551
    Abstract: An area sensor of the present invention has a function of displaying an image in a sensor portion by using light-emitting elements and a reading function using photoelectric conversion devices. Therefore, an image read in the sensor portion can be displayed thereon without separately providing an electronic display on the area sensor. Furthermore, a photoelectric conversion layer of a photodiode according to the present invention is made of an amorphous silicon film and an N-type semiconductor layer and a P-type semiconductor layer are made of a polycrystalline silicon film. The amorphous silicon film is formed to be thicker than the polycrystalline silicon film. As a result, the photodiode according to the present invention can receive more light.
    Type: Grant
    Filed: August 8, 2001
    Date of Patent: April 18, 2006
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Shunpei Yamazaki, Jun Koyama, Masato Yonezawa, Hajime Kimura, Yu Yamazaki
  • Patent number: 7026654
    Abstract: To provide a package for an optical semiconductor having a light-emitting device and a light-receiving device in one package, in which a groove is provided between the light-emitting device and the light-receiving device to thereby avoid rays of light from the light-emitting device to directly enter the light-receiving device.
    Type: Grant
    Filed: April 3, 2003
    Date of Patent: April 11, 2006
    Assignee: Canon Kabushiki Kaisha
    Inventors: Masahiko Igaki, Makoto Ogura, Akio Atsuta, Tadashi Kosaka
  • Patent number: 7005312
    Abstract: The method for manufacturing a CMOS image sensor is employed to pattern uniformly an overlying layer on a gate structure regardless of a gate width. The method includes steps of: preparing a semiconductor substrate by a predetermined process where a pixel area, a peripheral area and an input/output (I/O) area are defined by FOX therebetween; forming a first, a second and a third gate structures in the pixel, the peripheral and the I/O areas, respectively; forming a salicide barrier layer and a BARC layer over the resultant structure in sequence; forming a first photoresist mask on the BARC layer in the I/O area; carrying out a first etchback process by using the first photoresist mask as an etch mask; forming a second photoresist mask on the BARC layer in the pixel area; carrying out a second etchback process by using the second photoresist mask as the etch mask; and carrying out a third etchback process so as to expose top faces of the first and the second gate structures.
    Type: Grant
    Filed: December 23, 2003
    Date of Patent: February 28, 2006
    Assignee: Hynix Semiconductor Inc.
    Inventor: Won-Ho Lee
  • Patent number: 6995411
    Abstract: An image sensor has a vertically integrated thin-film photodiode.
    Type: Grant
    Filed: February 18, 2004
    Date of Patent: February 7, 2006
    Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Dun-Nian Yaung, Sou-Kuo Wu, Ho-Ching Chien
  • Patent number: 6967349
    Abstract: The present invention describes a plurality of scatterometry test structures for use in process control during fabrication of a semiconductor wafer having multilevel integrated circuit chips, many of said levels having a feature size of a critical dimension. The scatterometry test structures on the wafer are at each level, suitable to measure critical dimensions. The second level and each subsequent level of the test structures are located to fit into the same footprint area as the first level.
    Type: Grant
    Filed: September 20, 2002
    Date of Patent: November 22, 2005
    Assignee: Texas Instruments Incorporated
    Inventors: Thomas D. Bonifield, Vladimir A. Ukraintsev
  • Patent number: 6963120
    Abstract: A photovoltaic element is provided which has a high conversion efficiency, a low-cost producibility, a light weight and good overall characteristics in a final product form with a transparent protective member. The photovoltaic element comprises a first pin junction comprising an i-type amorphous semiconductor, a second pin junction comprising an i-type microcrystalline semiconductor, and a third pin junction comprising an i-type microcrystalline semiconductor provided in the mentioned order from a light incidence side, wherein at least a transparent protective member and a transparent electrode layer are provided on the light incidence side of the first pin junction, and wherein of the photocurrents generated at the plurality of pin junctions, the photocurrent generated at the third pin junction is the smallest.
    Type: Grant
    Filed: November 12, 2003
    Date of Patent: November 8, 2005
    Assignee: Canon Kabushiki Kaisha
    Inventors: Atsushi Shiozaki, Shuichiro Sugiyama
  • Patent number: 6927417
    Abstract: In a back-surface electrode type photoelectric conversion element having electrodes and semiconductor layers for collecting carriers disposed only on a back surface side of a semiconductor substrate, a semiconductor thin film that is larger in band gap than the semiconductor substrate and that contains an element causing a conductivity identical to or different from a conductivity of the semiconductor substrate is provided on a light-receiving surface side of the semiconductor substrate, and a diffusion layer is formed on a surface of the semiconductor substrate.
    Type: Grant
    Filed: November 12, 2002
    Date of Patent: August 9, 2005
    Assignee: Toyota Jidosha Kabushiki Kaisha
    Inventors: Tomonori Nagashima, Kenichi Okumura
  • Patent number: 6911594
    Abstract: A photovoltaic device including a plurality of unit devices stacked, each unit device comprising a silicon-based non-single-crystal semiconductor material and having a pn or pin structure, in which an oxygen atom concentration and/or a carbon atom concentration has a maximum peak in the vicinity of a p/n interface between the plurality of unit devices.
    Type: Grant
    Filed: June 2, 2003
    Date of Patent: June 28, 2005
    Assignee: Canon Kabushiki Kaisha
    Inventor: Atsushi Yasuno
  • Patent number: 6909161
    Abstract: A photodiode has an optical absorption layer composed of a depleted first semiconductor optical absorption layer with a layer width WD and a p-type neutral second semiconductor optical absorption layer with a layer width WA. The ratio between WA and WD is set such that the total carrier transit time ?tot becomes minimum in the optical absorption layer. The photodiode can further include a depleted semiconductor optical transmission layer with a bandgap greater than that of the first semiconductor optical absorption layer, between the first semiconductor optical absorption layer and an n-type semiconductor electrode layer.
    Type: Grant
    Filed: December 3, 2002
    Date of Patent: June 21, 2005
    Assignee: NTT Electronics Corporation
    Inventors: Tadao Ishibashi, Yukihiro Hirota, Yoshifumi Muramoto
  • Patent number: 6894359
    Abstract: Nanostructure sensing devices for detecting an analyte are described. The devices include nanostructures connected to conductive elements, all on a substrate. Contact regions adjacent to points of contact between the nanostructures and the conductive elements are given special treatment. The proportion of nanostructure surface area within contact regions can be maximized to effect sensing at very low analyte concentrations. The contact regions can be passivated in an effort to prevent interaction between the environment and the contact regions for sensing at higher analyte concentrations and for reducing cross-sensing. Both contact regions and at least some portion of the nanostructures can be covered with a material that is at least partially permeable to the analyte of interest and impermeable to some other species to tune selectivity and sensitivity of the nanostructure sensing device.
    Type: Grant
    Filed: October 26, 2002
    Date of Patent: May 17, 2005
    Assignee: Nanomix, Inc.
    Inventors: Keith Bradley, Philip G. Collins, Jean-Christophe P. Gabriel, George Gruner, Alexander Star
  • Patent number: 6891193
    Abstract: A magnetic random access memory (MRAM) device is provided which includes a conductive line configured to induce a magnetic field with a higher magnitude along at least a portion of a magnetic cell junction than along a spacing arranged adjacent to the magnetic cell junction. In some embodiments, the conductive line may include first portions aligned with a plurality of magnetic cell junctions and second portions aligned with spacings arranged between the plurality of magnetic cell junctions. In such an embodiment, the first portions preferably include different peripheral profiles than the second portions. A method for fabricating such an MRAM device is also provided herein. The method may include aligning magnetic cell junctions and first portions of a field-inducing line with each other such that at least part of the first portions of the field-inducing line are configured to conduct a higher density of current than second portions of the field-inducing line.
    Type: Grant
    Filed: June 28, 2002
    Date of Patent: May 10, 2005
    Assignee: Silicon Magnetic Systems
    Inventor: Benjamin C. E. Schwarz
  • Patent number: 6855957
    Abstract: A TFT is manufactured using at least five photomasks in a conventional liquid crystal display device, and therefore the manufacturing cost is high. By performing the formation of the pixel electrode, the source region and the drain region by using three photomasks in three photolithography steps, a liquid crystal display device prepared with a pixel TFT portion, having a reverse stagger type n-channel TFT, and a storage capacitor can be realized.
    Type: Grant
    Filed: May 9, 2000
    Date of Patent: February 15, 2005
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Shunpei Yamazaki, Jun Koyama
  • Patent number: 6852566
    Abstract: A PIN active pixel sensor array including self aligned encapsulated electrodes and a method for forming the same the method including forming an electrically conductive layer over a substrate; forming a first doped semiconductor layer over the conductive layer; photolithographically patterning and etching through a thickness portion of the first doped semiconductor layer and conductive layer to expose the substrate to form a plurality of spaced apart electrodes having an upper portion comprising the first doped semiconductor layer; blanket depositing a second doped semiconductor layer to cover the spaced apart electrodes including the exposed substrate; and, etching through at least a thickness portion of the second doped semiconductor layer.
    Type: Grant
    Filed: March 12, 2003
    Date of Patent: February 8, 2005
    Assignee: Taiwan Semiconductor Manufacturing Co., Ltd
    Inventor: Dun-Nian Yaung
  • Patent number: 6849873
    Abstract: In liquid crystal display device having a multi-layer conductive layer, such conductive layer is formed using a photoresist pattern having different thicknesses depending on the position. Upper layer of the gate pad is removed using an etch mask of the photoresist pattern of different thickness. A gate insulating layer, a semiconductor layer, and an ohmic contact layer are sequentially formed. A conductive material is deposited and patterned to form a data wire. Finally passivation layer is formed and an indium tin oxide layer is deposited and patterned to form a pixel electrode, a redundant gate pad, and a redundant data pad.
    Type: Grant
    Filed: November 25, 2002
    Date of Patent: February 1, 2005
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Bum-Ki Baek, Mun-Pyo Hong, Jang-Soo Kim, Sung-Wook Huh, Jong-Soo Yoon, Dong-Gyu Kim
  • Patent number: 6825492
    Abstract: The number of masks is reduced in a method of manufacturing a semiconductor device that has a transistor and a photoelectric conversion element on an insulating surface. In a manufacturing method of the present invention, semiconductor layers functioning as a source region, a drain region, and a channel formation region of a transistor are formed at the same time an n type semiconductor layer and p type semiconductor layer of a photoelectric conversion element are formed. Connection wiring lines to be electrically connected to the n type semiconductor layer and p type semiconductor layer of the photoelectric conversion element are formed at the same time a source wiring line and a drain wiring line of a transistor are formed.
    Type: Grant
    Filed: February 11, 2004
    Date of Patent: November 30, 2004
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Masato Yonezawa, Hajime Kimura, Yu Yamazaki, Jun Koyama, Yasuko Watanabe
  • Patent number: 6825491
    Abstract: The present invention concerns an integrated variable capacitance device comprising at least one membrane (12) forming at least one mobile armature and having at least one principal face facing at least one fixed armature. In accordance with the invention, the membrane has at least one rigidity rib (32) lying in a perpendicular direction to said principal face. Application in the production of resonant filters.
    Type: Grant
    Filed: October 15, 2002
    Date of Patent: November 30, 2004
    Assignee: Commissariat a l'Energie Atomique
    Inventor: Gilles Delapierre
  • Publication number: 20040232415
    Abstract: A vacuum processing method including placing an article to be processed in a reaction container and simultaneously supplying at least two high-frequency powers having different frequencies to the same high-frequency electrode to generate plasma in the reaction container by the high-frequency powers introduced into the reaction container from the high-frequency electrode. The frequencies and power values of the at least two high-frequency powers supplied satisfy a required relationship.
    Type: Application
    Filed: June 25, 2004
    Publication date: November 25, 2004
    Applicant: CANON KABUSHIKI KAISHA
    Inventors: Makoto Aoki, Toshiyasu Shirasuna, Hiroaki Niino, Kazuyoshi Akiyama, Hitoshi Murayama, Shinji Tsuchida, Daisuke Tazawa, Yukihiro Abe
  • Patent number: 6822157
    Abstract: In a thin film solar battery module, a flat glass substrate with non-monocrystal silicon type thin film solar cells formed thereon, a space layer, and a chilled figured glass are sequentially stacked in this order. The chilled figured glass has fine unevenness on at least its incident side surface to achieve an anti-glare effect.
    Type: Grant
    Filed: October 15, 2002
    Date of Patent: November 23, 2004
    Assignee: Sharp Kabushiki Kaisha
    Inventor: Yasushi Fujioka
  • Patent number: 6821808
    Abstract: The present invention provides a pixel which utilizes a charge multiplying photoconversion element. An output control circuit contains an operational amplifier that serves to fix the voltage level at the storage node to thereby maintain a constant effective operating potential across the charge multiplying photoconversion layer. The detected light signal may be converted to provide linear, logarithmic, and linear-logarithmic output signals.
    Type: Grant
    Filed: August 23, 2002
    Date of Patent: November 23, 2004
    Assignee: Micron Technology, Inc.
    Inventors: Junichi Nakamura, Isao Takayanagi
  • Patent number: 6815247
    Abstract: A thin-film opto-electronic device on a conductive silicon-containing substrate includes a sequence of layers. The layers include a layer of a porous medium preferably a porous silicon, on a substrate. The porous layer has both light diffusing and light reflecting properties. In addition, a non-porous layer is located on said porous silicon layer, with at least one first region and at least one second region being in said non-porous layer. The first region is of a first conductivity type acting as a light absorber and the second region has a conductivity of a second type, different from said first conductivity type. The sequence of layers is such that optical confinement is realised in the device.
    Type: Grant
    Filed: August 19, 2003
    Date of Patent: November 9, 2004
    Assignee: Interuniversitair Microelektronica Centrum (IMEC)
    Inventors: Lieven Stalmans, Jef Poortmans, Matty Caymax, Khalid Said, Johan Nijs
  • Publication number: 20040188680
    Abstract: A photoelectric conversion device taking the form of a thin film and having a substrate exhibiting poor thermal resistance. The device prevents thermal deformation which would normally be caused by local application of excessive heat to the substrate. The device has output terminals permitting the output from the device to be taken out. The output terminals are formed on the surface of the substrate opposite to the photoelectric conversion device. The device further includes electrical connector portions for electrically connecting the electrodes of the device with the output terminals. The present invention also provides a method of treating a substrate having poor thermal resistance with a plasma with a high throughput. The substrate is continuously supplied into a reaction chamber and treated with a plasma. This supply operation is carried out in such a way that the total length of the substrate existing in a plasma processing region formed by electrodes is longer than the length of the electrodes.
    Type: Application
    Filed: April 12, 2004
    Publication date: September 30, 2004
    Applicant: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Setsuo Nakajima, Yasuyuki Arai, Hisato Shinohara, Masayoshi Abe
  • Patent number: 6798033
    Abstract: An active pixel sensor for producing images from electron-hole producing radiation includes a crystalline semiconductor substrate having an array of electrically conductive diffusion regions, an interlayer dielectric (ILD) layer formed over the crystalline semiconductor substrate and comprising an array of contact electrodes, and an interconnect structure formed over the ILD layer, wherein the interconnect structure includes at least one layer comprising an array of conductive vias. An array of patterned metal pads is formed over the interconnect structure and are electrically connected to an array of charge collecting pixel electrodes. A radiation absorbing structure includes a photoconductive N-I-B-P photodiode layer formed over the interconnect structure, and a surface electrode layer establishes an electrical field across the radiation absorbing structure and between the surface electrode layer and each of the array of charge collecting pixel electrodes.
    Type: Grant
    Filed: August 27, 2002
    Date of Patent: September 28, 2004
    Assignee: e-Phocus, Inc.
    Inventors: Calvin Chao, Tzu-Chiang Hsieh, Michael Engelmann, Milam Pender
  • Patent number: 6774444
    Abstract: A method for making a solid-state imaging device that can form a first P-type well region deep in a substrate without being affected by the heat applied during an epitaxial growth process is disclosed. The method includes a first step of preparing a substrate composite comprising an first substrate and a second substrate on the first substrate, a second step of implanting impurity ions from the surface of the second substrate at an energy exceeding 3 MeV so as to form a barrier layer, and a third step of forming a photosensor in the second substrate.
    Type: Grant
    Filed: January 22, 2003
    Date of Patent: August 10, 2004
    Assignee: Sony Corporation
    Inventor: Hideshi Abe
  • Publication number: 20040149988
    Abstract: A photovoltaic element is provided which has a high conversion efficiency, a low-cost producibility, a light weight and good overall characteristics in a final product form with a transparent protective member. The photovoltaic element comprises a first pin junction comprising an i-type amorphous semiconductor, a second pin junction comprising an i-type microcrystalline semiconductor, and a third pin junction comprising an i-type microcrystalline semiconductor provided in the mentioned order from a light incidence side, wherein at least a transparent protective member and a transparent electrode layer are provided on the light incidence side of the first pin junction, and wherein of the photocurrents generated at the plurality of pin junctions, the photocurrent generated at the third pin junction is the smallest.
    Type: Application
    Filed: November 12, 2003
    Publication date: August 5, 2004
    Applicant: Canon Kabushiki Kaisha
    Inventors: Atsushi Shiozaki, Shuichiro Sugiyama
  • Patent number: 6770808
    Abstract: A thermoelectric module includes plural thermoelectric semiconductor chips connected in series, first and second substrates, plural first and second electrodes formed on the first and second substrates, first solder through which the first and second electrodes are bonded to end portions of the thermoelectric semiconductor chips. The first substrate includes two or more protrusions protruding toward opposite sides with respect to the second substrate when being viewed vertically. A method of assembling a thermoelectric module in a radiating member includes the steps of mounting the first substrate on a radiating member through the second solder having a liquidus temperature lower than a solidus temperature of the first solder; holding the protrusions by leading edges of support arms where the second solder is melted to push the first substrate toward the radiating member under pressure while rocking the first substrate in a direction orthogonal to the pushing direction.
    Type: Grant
    Filed: February 27, 2002
    Date of Patent: August 3, 2004
    Assignees: Aisin Seiki Kabushiki Kaisha, Oki Electric Industry Co., Ltd.
    Inventors: Masato Itakura, Hirotsugu Sugiura, Shunji Sakai
  • Patent number: 6753548
    Abstract: The laser heat treatment of an amorphous or polycrystalline silicon film material is conducted by forming a laser beam generated from a pulse laser source having a wavelength of 350 nm to 800 nm into a linear beam having a width and a length, and directing the linear beam onto a film material formed on a substrate.
    Type: Grant
    Filed: April 23, 2003
    Date of Patent: June 22, 2004
    Assignees: Mitsubishi Denki Kabushiki Kaisha, Seiko Epson Corporation
    Inventors: Tetsuya Ogawa, Hidetada Tokioka, Yukio Sato, Mitsuo Inoue, Tomohiro Sasagawa, Mitsutoshi Miyasaka
  • Patent number: 6747290
    Abstract: Problems exist in areas such as image visibility, endurance of the device, precision, miniaturization, and electric power consumption in an information device having a conventional resistive film method or optical method pen input function. Both EL elements and photoelectric conversion elements are arranged in each pixel of a display device in an information device of the present invention having a pen input function. Information input is performed by the input of light to the photoelectric conversion elements in accordance with a pen that reflects light by a pen tip. An information device with a pen input function, capable of displaying a clear image without loss of brightness in the displayed image, having superior endurance, capable of being miniaturized, and having good precision can thus be obtained.
    Type: Grant
    Filed: December 12, 2001
    Date of Patent: June 8, 2004
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Shunpei Yamazaki, Jun Koyama
  • Patent number: 6737123
    Abstract: A silicon-based film is formed superimposing a direct-current potential on the high-frequency power to set the potential of the high-frequency power feed section to a potential which is lower by V1 than the ground potential; the V1 satisfying |V2|≦|V1|≦50×|V2|, where V2 is the potential difference from the ground potential, produced in the electrode in the state the plasma has taken place under the same conditions except that the direct-current potential is not superposed on the high-frequency power and the electrode is brought into a non-grounded state. This can provide a silicon-based film having superior characteristics at a high film formation rate, and a semiconductor device making use of this silicon-based film, having superior adherence, environmental resistance, and can enjoy a short tact time at the time of manufacture.
    Type: Grant
    Filed: June 12, 2002
    Date of Patent: May 18, 2004
    Assignee: Canon Kabushiki Kaisha
    Inventors: Takaharu Kondo, Masafumi Sano, Akira Sakai, Tadashi Sawayama, Ryo Hayashi, Shuichiro Sugiyama, Hiroyuki Ozaki, Yoshinori Sugiura
  • Patent number: 6737719
    Abstract: An image sensor is disclosed that has a concave micro-lens structure. The image sensor includes a plurality of pixels formed in a semiconductor substrate, each pixel including a light sensitive element. Further, a base material having a first index of refraction is formed over the pixels. Micro-lens cavities are formed in the base material over the light sensitive elements, the micro-lens cavity having a concave shape. Finally, color filters are formed into the micro-lens cavities, the color filters having a second index of refraction that is higher than the first index of refraction.
    Type: Grant
    Filed: October 25, 2002
    Date of Patent: May 18, 2004
    Assignee: OmniVision International Holding Ltd
    Inventor: Katsumi Yamamoto
  • Patent number: 6734352
    Abstract: The present invention provides a photoelectric conversion device that improves photoelectric conversion efficiency with the interaction between a transparent substrate with a transparent conductive film, an antireflection film, and a photoelectric conversion unit. The antireflection film contains fine particles having an average particle diameter of 0.01 to 1.0 &mgr;m and has an uneven surface derived from the fine particles. The glass sheet with a transparent conductive film has a light transmittance of 75% or more in the wavelength region of 800 nm to 900 nm. The photoelectric conversion unit includes at least a photoelectric conversion unit including a photoelectric conversion layer having a band gap of 1.85 eV or less.
    Type: Grant
    Filed: November 13, 2002
    Date of Patent: May 11, 2004
    Assignees: Nippon Sheet Glass Company, Limited, Kaneka Corporation
    Inventors: Masahiro Hirata, Tsuyoshi Otani, Yuko Tawada
  • Patent number: 6724010
    Abstract: A solid state imager is provided that comprises an imaging array of gated photodiodes. The imager comprises a plurality of photosensor pixels arranged in a pixel array, and each of the photosensor pixels includes a photodiode having a sidewall, the sidewall having a gate dielectric layer disposed thereon, and a field plate disposed around the photodiode body. The field plate comprises amorphous silicon disposed on the gate dielectric layer and extends substantially completely around the sidewall of said photodiode. The field plate is electrically coupled to the common electrode of the imaging array so that the field plate creates an electric field around the photodiode body in correspondence with the potential of said common electrode. A method of fabricating the gated photodiode array is also provided.
    Type: Grant
    Filed: August 3, 2000
    Date of Patent: April 20, 2004
    Assignee: General Electric Company
    Inventors: Robert Forrest Kwasnick, George Edward Possin, Ching-Yeu Wei
  • Patent number: RE39393
    Abstract: A device for reading an image (an image reading device) according to this invention comprises therein at least one photoelectric conversion semiconductor device provided on a substrate and at least one thin film transistor circuit element provided on the substrate wherein said photoelectric conversion semiconductor device and said thin film transistor circuit element comprise semiconductor regions obtained from one semiconductor film provided on said substrate.
    Type: Grant
    Filed: November 16, 1995
    Date of Patent: November 14, 2006
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventor: Shunpei Yamazaki