Responsive To Nonelectrical External Signals (e.g., Light) Patents (Class 257/53)
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Publication number: 20130043471Abstract: Reading margin is improved in a MTJ designed for MRAM applications by employing a pinned layer with an AP2/Ru/AP1 configuration wherein the AP1 layer is a CoFeB/CoFe composite and by forming a MgO tunnel barrier adjacent to the CoFe AP1 layer by a sequence that involves depositing and oxidizing a first Mg layer with a radical oxidation (ROX) process, depositing and oxidizing a second Mg layer with a ROX method, and depositing a third Mg layer on the oxidized second Mg layer. The third Mg layer becomes oxidized during a subsequent anneal. MTJ performance may be further improved by selecting a composite free layer having a Fe/NiFeHf or CoFe/Fe/NiFeHf configuration where the NiFeHf layer adjoins a capping layer in a bottom spin valve configuration. As a result, read margin is optimized simultaneously with improved MR ratio, a reduction in bit line switching current, and a lower number of shorted bits.Type: ApplicationFiled: August 15, 2011Publication date: February 21, 2013Inventors: Wei Cao, Witold Kula, Chyu-Jiuh Torng
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Publication number: 20130020573Abstract: A pressure detecting device includes a glass substrate as a substrate, a lower electrode arranged on the glass substrate, an upper electrode spaced apart from the lower electrode and facing the lower electrode, the upper electrode having holes as one or more through-openings, and a source line as a change extracting wiring for detecting a change in electrical state caused by the upper electrode receiving pressure to deflect toward the lower electrode.Type: ApplicationFiled: March 16, 2010Publication date: January 24, 2013Inventors: Keiichi Fukuyama, Tomohiro Kimura, Tokuaki Kuniyoshi
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Publication number: 20130001556Abstract: A thin film transistor and a press sensing device using the thin film transistor are disclosed. The thin film transistor, comprises a source electrode; a drain electrode spaced from the source electrode; a semiconductor layer electrically connected with the source electrode and the drain electrode, a channel defined in the semiconductor layer and located between the source electrode and the drain electrode; and a gate electrode electrically insulated from the semiconductor layer; and an insulative layer configured for insulating the source electrode, the drain electrode, and the semiconductor layer from each other, wherein the insulative layer is made of a polymeric material with an elastic modulus ranged from about 0.1 megapascal (MPa) to about 10 MPa.Type: ApplicationFiled: December 13, 2011Publication date: January 3, 2013Applicants: HON HAI PRECISION INDUSTRY CO., LTD., TSINGHUA UNIVERSITYInventors: CHUN-HUA HU, CHANG-HONG LIU, SHOU-SHAN FAN
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Patent number: 8339492Abstract: An image sensor and a method for manufacturing the same are provided. An image sensor comprises a readout circuitry, an interlayer dielectric, an interconnection, an image sensing device, and a contact. The readout circuitry is formed at a first substrate. The interlayer dielectric is formed on the first substrate. The interconnection is formed in the interlayer dielectric. The interconnection is electrically connected to the readout circuitry. The image sensing device is formed on the interconnection. The image sensing device comprises a first conductive type layer and a second conductive type layer. The contact connects the first conductive type layer of the image sensing device and the interconnection electrically. The contact is isolated from the second conductive type layer by a trench formed in the second conductive layer around the contact.Type: GrantFiled: September 25, 2009Date of Patent: December 25, 2012Assignee: Dongbu Hitek Co., Ltd.Inventor: Joon Hwang
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Patent number: 8338221Abstract: A method for manufacturing a thin film type solar cell is disclosed, which is capable of reducing degradation of solar cell by decreasing the number of dangling bonding sites or SiH2 bonding sites existing in amorphous silicon owing to an optimal content ratio of ingredient gases, an optimal chamber pressure, or an optimal substrate temperature during a process for depositing an I-type semiconductor layer of amorphous silicon by a plasma CVD method, the method comprising forming a front electrode layer on a substrate; sequentially depositing P-type, I-type, and N-type semiconductor layers on the front electrode layer; and forming a rear electrode layer on the N-type semiconductor layer, wherein the process for forming the I-type semiconductor layer comprises forming an amorphous silicon layer by the plasma CVD method under such circumstances that at least one of the aforementioned conditions is satisfied, for example, a content ratio of silicon-containing gas to hydrogen-containing gas is within a range betweType: GrantFiled: December 1, 2009Date of Patent: December 25, 2012Assignee: Jusung Engineering Co., Ltd.Inventors: Chang Ho Lee, Hyung Dong Kang, Hyun Ho Lee, Yong Hyun Lee, Seon Myung Kim
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Publication number: 20120319111Abstract: A thin-film photoelectric conversion device includes a crystalline germanium photoelectric conversion layer having improved open circuit voltage, fill factor, and photoelectric conversion efficiency for light having a longer wavelength. The photoelectric conversion device comprises a first electrode layer, one or more photoelectric conversion units, and a second electrode layer sequentially stacked on a substrate, wherein each of the photoelectric conversion units comprises a photoelectric conversion layer arranged between a p-type semiconductor layer and an n-type semiconductor layer. At least one of the photoelectric conversion units includes a crystalline germanium photoelectric conversion layer comprising a crystalline germanium semiconductor that is substantially intrinsic or weak n-type and is essentially free of silicon.Type: ApplicationFiled: January 27, 2011Publication date: December 20, 2012Applicant: KANEKA CORPORATIONInventors: Naoki Kadota, Toshiaki Sasaki
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Patent number: 8330036Abstract: A method of fabricating a multi-junction solar cell on a separable substrate, and structure formed thereby are provided. The method comprises establishing a substrate having a semiconductive composition and forming a sacrificial layer upon the substrate. A solar cell portion is formed upon the sacrificial layer, such that the solar cell portion includes a plurality of multi junction layers. A stabilizing cell layer of semiconductor material is then formed on the solar cell portion, with the stabilizing cell layer having a predetermined thickness greater than a thickness of any individual one of the III-V multi junction layers. Etching is thereafter carried out to remove the sacrificial layer for releasing the solar cell portion from the substrate.Type: GrantFiled: August 31, 2009Date of Patent: December 11, 2012Inventor: Seoijin Park
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Electronic photosensitive body and manufacturing method for same, as well as image forming apparatus
Patent number: 8330161Abstract: Disclosed is an electrophotographic photoreceptor which comprises a base material and a photoconductive layer. The photoconductive layer is formed on the base material, and comprises a non-single-crystal material mainly composed of silicon. In the photoconductive layer, with regard to a characteristic energy E (eV) which has the relationship with a light absorption coefficient ?(cm?1) represented by the following formula (1), the characteristic energy E1 (eV) for an exposure wavelength in larger than the characteristic energy E2 (eV) for a neutralization wavelength. [Formula (1) a=C exp(h?/E) C: a constant h?: a photon energy h: a rationalized Planck's ?: the number of frequency.Type: GrantFiled: July 31, 2008Date of Patent: December 11, 2012Assignee: Kyocera CorporationInventor: Yoshinobu Ishii -
Publication number: 20120292619Abstract: The absorption coefficient of silicon for infrared light is very low and most solar cells absorb very little of the infrared light energy in sunlight. Very thick cells of crystalline silicon can be used to increase the absorption of infrared light energy but the cost of thick crystalline cells is prohibitive. The present invention relates to the use of less expensive microcrystalline silicon solar cells and the use of backside texturing with diffusive scattering to give a very large increase in the absorption of infrared light. Backside texturing comprises a plurality of cusped features providing diffusive scattering. Constructing the solar cell with a smooth front surface results in multiple internal reflections, light trapping, and a large enhancement of the absorption of infrared solar energy.Type: ApplicationFiled: May 23, 2012Publication date: November 22, 2012Inventor: Leonard Forbes
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Patent number: 8309843Abstract: Novel structures of photovoltaic cells (also treated as solar cells) are provided. The Cells are based on the nanometer-scaled wire, tubes, and/or rods, which are made of the electronics materials covering semiconductors, insulator or metallic in structure. These photovoltaic cells have large power generation capability per unit physical area over the conventional cells. These cells can have also high radiation tolerant capability. These cells will have enormous applications such as in space, in commercial, residential and industrial applications.Type: GrantFiled: August 18, 2005Date of Patent: November 13, 2012Assignee: Banpil Photonics, Inc.Inventors: Nobuhiko P. Kobayashi, Achyut K. Dutta
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Publication number: 20120280232Abstract: A photoelectric conversion device includes a first photoelectric conversion unit on a substrate and having a first energy bandgap, a second photoelectric conversion unit having a second energy bandgap that is different from the first energy bandgap, the second photoelectric conversion unit being on the first photoelectric conversion unit, and an intermediate unit between the first and second photoelectric conversion units, the intermediate unit including a stack of a first intermediate layer and a second intermediate layer, each of the first intermediate layer and the second intermediate layer having a refractive index that is smaller than that of the first photoelectric conversion unit, the first intermediate layer having a first refractive index, and the second intermediate layer having a second refractive index that is smaller than the first refractive index.Type: ApplicationFiled: March 5, 2012Publication date: November 8, 2012Inventors: Seung-Jae JUNG, Yuk-Hyun NAM, Ki-Won Jeon
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Publication number: 20120273785Abstract: A photosensor element (6a) is provided with a gate electrode (11da) disposed on an insulating substrate (10), a gate insulating film (12) disposed so as to cover the gate electrode (11da), a semiconductor layer (15db) disposed on the gate insulating film (12) so as to overlap the gate electrode (11da), and a source electrode (16da) and a drain electrode (16db) provided on the semiconductor layer (15db) so as to overlap the gate electrode (11da) and so as to face each other. The photosensor element (6a) has the semiconductor layer (15db) provided with an intrinsic semiconductor layer (13db) in which a channel region (C) is defined and an extrinsic semiconductor layer (14db) that is laminated on the intrinsic semiconductor layer (13db) such that the channel region (C) is exposed. The extrinsic semiconductor layer (14db) protrudes from the drain electrode (16db) on the side close to the channel region (C).Type: ApplicationFiled: November 11, 2010Publication date: November 1, 2012Applicant: SHARP KABUSHIKI KAISHAInventors: Masao Moriguchi, Yohsuke Kanzaki, Tsuyoshi Inoue
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Patent number: 8297837Abstract: This invention generally relates to sensors made of granular thin films in the discontinuous phase. More particularly, the invention relates to microbolometers and displacement sensors fabricated from thin films that are close to the metal insulator transition (MIT) or metal semiconductor transition (MST) regime. Sensors of various designs have been fabricated according to the invention and may be used for deflection measurements, nano-indentation, visco-elastic measurements, topographical scanning, explosive detection, low abundance biomolecular detection, electromagnetic radiation detection and other similar detection and measurement systems.Type: GrantFiled: April 1, 2010Date of Patent: October 30, 2012Inventor: Angelo Gaitas
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Patent number: 8299465Abstract: An X-ray detector constructed as an exemplary embodiment of the present invention includes a semiconductor layer, a data line including a source electrode covering a first portion of the semiconductor layer, a drain electrode disposed opposite to the source electrode, a first lower electrode formed on the upper portion of a second portion of the semiconductor layer and a gate insulating layer and elongated from the drain electrode, and a passivation layer formed on the upper portion of one part of the lower electrode including the drain electrode. Further, the second lower electrode is formed approaching the gate electrode. The X-ray detector constructed as the exemplary embodiment of the present invention includes a second lower electrode formed on the passivation layer and placed approaching a gate electrode. The area in which a diode is disposed may be maximized, and the amount of leakage current may be reduced.Type: GrantFiled: December 17, 2010Date of Patent: October 30, 2012Assignee: Samsung Display Co., Ltd.Inventors: Kwan-Wook Jung, Dong-Hyuk Kim
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Patent number: 8288648Abstract: A solar cell comprises a substrate configured to have a plurality of via holes and a first conductive type, an emitter layer placed in the substrate and configured to have a second conductive type opposite to the first conductive type, a plurality of first electrodes electrically coupled to the emitter layer, a plurality of current collectors electrically coupled to the first electrodes through the plurality of via holes, and a plurality of second electrodes electrically coupled to the substrate. The plurality of via holes comprises at least two via holes having different angles.Type: GrantFiled: October 22, 2010Date of Patent: October 16, 2012Assignee: LG Electronics Inc.Inventors: Daehee Jang, Jihoon Ko, Juwan Kang, Jonghwan Kim
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Patent number: 8283746Abstract: A solid state imaging device having a back-illuminated type structure in which a lens is formed on the back side of a silicon layer with a light-receiving sensor portion being formed thereon. Insulating layers are buried into the silicon layer around an image pickup region, with the insulating layer being buried around a contact layer that connects an electrode layer of a pad portion and an interconnection layer of the surface side. A method of manufacturing such a solid-state imaging device is also provided.Type: GrantFiled: March 19, 2007Date of Patent: October 9, 2012Assignee: Sony CorporationInventors: Yuichi Yamamoto, Hayato Iwamoto
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Publication number: 20120241717Abstract: A photosensitive optoelectronic device (1) comprises a plurality of organic semiconductor sub-cells (10, 11, 12, 13) arranged in a stack between electrodes (3, 5), each sub-cell comprising donor material (14, 16, 23, 25) and acceptor material (15, 17, 24, 26) providing a heterojunction. There is a recombination layer (19, 22, 28) between adjacent sub-cells. The sub-cells are arranged in two groups (20, 29). The sub-cells (10, 11; 12, 13) within a group (20; 29) are responsive over substantially the same part of the light spectrum. The groups (20, 29) differ substantially from each other in respect of the parts of the light spectrum over which their respective sub-cells are responsive.Type: ApplicationFiled: September 3, 2010Publication date: September 27, 2012Applicant: UNIVERSITY OF WARWICKInventors: Timothy Jones, Ross Hatton
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Patent number: 8263853Abstract: A method of forming a plurality of discrete, interconnected solar cells mounted on a carrier by providing a first semiconductor substrate; depositing on the first substrate a sequence of layers of semiconductor material forming a solar cell structure; forming a metal back contact layer over the solar cell structure; mounting a carrier on top of the metal back contact; removing the first substrate; and lithographically patterning and etching the solar cell structure to form a plurality of discrete solar cells mounted on the carrier.Type: GrantFiled: August 7, 2008Date of Patent: September 11, 2012Assignee: Emcore Solar Power, Inc.Inventor: Tansen Varghese
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Publication number: 20120211749Abstract: To improve the performance of a protection circuit including a diode formed using a semiconductor film. A protection circuit is inserted between two input/output terminals. The protection circuit includes a diode which is formed over an insulating surface and is formed using a semiconductor film. Contact holes for connecting an n-type impurity region and a p-type impurity region of the diode to a first conductive film in the protection circuit are distributed over the entire impurity regions. Further, contact holes for connecting the first conductive film and a second conductive film in the protection circuit are dispersively formed over the semiconductor film. By forming the contact holes in this manner, wiring resistance between the diode and a terminal can be reduced and the entire semiconductor film of the diode can be effectively serve as a rectifier element.Type: ApplicationFiled: May 2, 2012Publication date: August 23, 2012Applicant: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.Inventors: Osamu FUKUOKA, Masahiko HAYAKAWA, Hideaki SHISHIDO
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Publication number: 20120205655Abstract: It is advantageous to create texture at the surface of a photovoltaic cell to reduce reflection and increase travel length of light within the cell. A method is disclosed to create texture at the surface of a silicon body by reacting a silicide-forming metal at the surface, where the silicide-silicon interface is non-planar, then stripping the silicide, leaving behind a textured surface. Depending on the metal and the conditions of silicide formation, the resulting surface may be faceted. The peak-to-valley height of this texturing will generally be between about 300 and about 5000 angstroms, which is well-suited for use in photovoltaic cells comprising a thin silicon lamina.Type: ApplicationFiled: April 13, 2012Publication date: August 16, 2012Applicant: TWIN CREEKS TECHNOLOGIES, INC.Inventor: S. Brad Herner
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Publication number: 20120205649Abstract: A photoelectric conversion device includes circuit portions disposed on a substrate, a first electrode electrically connected to one of the circuit portions, an optically transparent second electrode opposing the first electrode, and a photoelectric conversion portion disposed between the first electrode and the second electrode. The photoelectric conversion portion has a multilayer structure including a light absorption layer made of a p-type compound semiconductor film having a chalcopyrite structure, an amorphous oxide semiconductor layer, and a window layer made of an n-type semiconductor film.Type: ApplicationFiled: February 7, 2012Publication date: August 16, 2012Applicant: SEIKO EPSON CORPORATIONInventors: Yasunori HATTORI, Tomotaka MATSUMOTO, Tsukasa EGUCHI
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Publication number: 20120205646Abstract: A display with a photo sensor is provided, wherein the photo sensor is integrated with an active device array substrate of the display and fabricated through an existing process to reduce the manufacturing cost. A photosensitive silicon-rich dielectric layer or any other photosensitive material layer having similar photosensitive characteristics (for example, a photosensitive semiconductor layer) is adopted to form the photo sensor with a lower electrode and a transparent upper electrode. Thereby, the fill factor of the photo sensor is maximized and noises caused by a backlight source electrode are eliminated.Type: ApplicationFiled: July 7, 2011Publication date: August 16, 2012Applicant: AU OPTRONICS CORPORATIONInventors: An-Thung Cho, Wei-Ting Lin, Jiun-Jye Chang, Tien-Hao Chang, Po-Lun Chen, Wei-Lung Liao
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Patent number: 8242498Abstract: A compound semiconductor substrate 10 according to the present invention is comprised of a Group III nitride and has a surface layer 12 containing a chloride of not less than 200Ă—1010 atoms/cm2 and not more than 12000Ă—1010 atoms/cm2 in terms of Cl and an oxide of not less than 3.0 at % and not more than 15.0 at % in terms of O, at a surface. The inventors conducted elaborate research and newly discovered that when the surface layer 12 at the surface of the compound semiconductor substrate 10 contained the chloride of not less than 200Ă—1010 atoms/cm2 and not more than 12000Ă—1010 atoms/cm2 in terms of Cl and the oxide of not less than 3.0 at % and not more than 15.0 at % in terms of O, Si was reduced at an interface between the compound semiconductor substrate 10 and an epitaxial layer 14 formed thereon and, as a result, the electric resistance at the interface was reduced.Type: GrantFiled: November 24, 2010Date of Patent: August 14, 2012Assignee: Sumitomo Electric Industries, Ltd.Inventors: Keiji Ishibashi, Fumitake Nakanishi
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Publication number: 20120199833Abstract: A radiation detector of this invention has a barrier layer on the upper surface of a high resistance film along the outer edge of a common electrode, which enables prevention of a chemical reaction between an amorphous semiconductor layer and a curable synthetic resin. The barrier layer is adhesive to the curable synthetic resin film, and this can prevent strength being insufficient, such that temperature changes cause separation in interfaces between the barrier layer and curable synthetic resin film, thereby reducing the effect of inhibiting warpage and cracking. The material for the barrier layer is an insulating material not including a substance that would chemically react with the amorphous semiconductor layer. This can prevent components of the material for the barrier layer from chemically reacting with the semiconductor layer. Consequently, creeping discharge at the outer edge of the common electrode where electric fields concentrate can be prevented.Type: ApplicationFiled: October 5, 2009Publication date: August 9, 2012Inventors: Kenji Sato, Hisao Tsuji, Osamu Sasaki, Daisuke Murakami, Yoichi Yamaguchi, Takeshi Yamamoto, Hidetoshi Kishimoto
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Patent number: 8237161Abstract: Amorphous semiconductor films with enhanced charged carrier transport are disclosed. Also disclosed is a method for fabricating and treating the film to produce the enhanced transport. Also disclosed are semiconductor p-n junctions fabricated with the films which demonstrate the enhanced transport. The films are amorphous and include boron, carbon, and hydrogen.Type: GrantFiled: August 10, 2010Date of Patent: August 7, 2012Assignee: North Dakota State University Research FoundationInventors: Anthony N. Caruso, Joseph A. Sandstrom, David A. Bunzow
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Patent number: 8236603Abstract: A semiconductor structure may include a polycrystalline substrate comprising a metal, the polycrystalline substrate having substantially randomly oriented grains, as well as a buffer layer disposed thereover. The buffer layer may comprise a plurality of islands having an average island spacing therebetween. A polycrystalline semiconductor layer is disposed over the buffer layer.Type: GrantFiled: September 4, 2009Date of Patent: August 7, 2012Assignees: Solexant Corp., Rochester Institute of TechnologyInventors: Leslie G. Fritzemeier, Ryne P. Raffaelle, Christopher Leitz
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Publication number: 20120181537Abstract: A MTJ in an MRAM array is disclosed with a composite free layer having a lower crystalline layer contacting a tunnel barrier and an upper amorphous NiFeX layer for improved bit switching performance. The crystalline layer is Fe, Ni, or FeB with a thickness of at least 6 Angstroms which affords a high magnetoresistive ratio. The X element in the NiFeX layer is Mg, Hf, Zr, Nb, or Ta with a content of 5 to 30 atomic %. NiFeX thickness is preferably between 20 to 40 Angstroms to substantially reduce bit line switching current and number of shorted bits. In an alternative embodiment, the crystalline layer may be a Fe/NiFe bilayer. Optionally, the amorphous layer may have a NiFeM1/NiFeM2 configuration where M1 and M2 are Mg, Hf, Zr, Nb, or Ta, and M1 is unequal to M2. Annealing at 300° C. to 360° C. provides a high magnetoresistive ratio of about 150%.Type: ApplicationFiled: January 19, 2011Publication date: July 19, 2012Inventors: Wei Cao, Cheng T. Horng, Witold Kula, Chyu Jiuh Torng
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Patent number: 8212250Abstract: The absorption coefficient of silicon for infrared light is very low and most solar cells absorb very little of the infrared light energy in sunlight. Very thick cells of crystalline silicon can be used to increase the absorption of infrared light energy but the cost of thick crystalline cells is prohibitive. The present invention relates to the use of less expensive microcrystalline silicon solar cells and the use of backside texturing with diffusive scattering to give a very large increase in the absorption of infrared light. Backside texturing comprises a plurality of cusped features providing diffusive scattering. Constructing the solar cell with a smooth front surface results in multiple internal reflections, light trapping, and a large enhancement of the absorption of infrared solar energy.Type: GrantFiled: June 16, 2011Date of Patent: July 3, 2012Inventor: Leonard Forbes
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Publication number: 20120161130Abstract: A minute electrode, a photoelectric conversion device including the minute electrode, and manufacturing methods thereof are provided. A plurality of parallel groove portions and a region sandwiched between the groove portions are formed in a substrate, and a conductive resin is supplied to the groove portions and the region and is fixed, whereby the groove portions are filled with the conductive resin and the region is covered with the conductive resin. The supplied conductive resin is not expanded outward, and the electrode with a designed width can be formed. Part of the electrode is formed over the region sandwiched between the groove portions, thus, the area of a cross section in the short axis direction can be large, and a low resistance in the long axis direction can be obtained.Type: ApplicationFiled: December 14, 2011Publication date: June 28, 2012Applicant: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.Inventors: Yuji ODA, Takashi Hirose, Koichiro Tanaka, Sho Kato, Emi Koezuka
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Publication number: 20120154335Abstract: A photoelectric element including a transparent bottom electrode, a photosensitive layer, a first electrode, a second electrode and a transparent top electrode is provided. The photosensitive layer is located above the transparent bottom electrode. The first electrode and the second electrode are disposed on the photosensitive layer. The transparent top electrode is located above the photosensitive layer.Type: ApplicationFiled: December 20, 2010Publication date: June 21, 2012Applicant: INDUSTRIAL TECHNOLOGY RESEARCH INSTITUTEInventor: Isaac Wing-Tak Chan
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Publication number: 20120154704Abstract: The light use efficiency of a thin film diode is improved even when the semiconductor layer of the diode has a small thickness, thereby improving the light detection sensitivity of the diode. A thin film diode (130) having a first semiconductor layer (131) including, at least, an n-type region (131n) and a p-type region (131p) is provided on one side of a substrate (101), and a silicon layer (171) is provided between the substrate and the first semiconductor layer, facing the first semiconductor layer. Asperities are formed on the side of the silicon layer facing the first semiconductor layer, and asperities are provided on the side of the first semiconductor layer facing the silicon layer and the side thereof opposite the side facing the silicon layer.Type: ApplicationFiled: July 16, 2010Publication date: June 21, 2012Applicant: SHARP KABUSHIKI KAISHAInventors: Makoto Nakazawa, Tomohiro Kimura
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Publication number: 20120146027Abstract: An adverse effect of parasitic capacitance on optical data output from a photodetector circuit is suppressed. A photodetector circuit includes a photoelectric conversion element; a first field-effect transistor; a second field-effect transistor; a first conductive layer functioning as a gate of the first field-effect transistor; an insulating layer provided over the first conductive layer; a semiconductor layer overlapping with the first conductive layer with the insulating layer interposed therebetween; a second conductive layer electrically connected to the semiconductor layer; and a third conductive layer electrically connected to the semiconductor layer, whose pair of side surfaces facing each other overlaps with at least one conductive layer including the first conductive layer with the insulating layer interposed therebetween, and which functions as the other of the source and the drain of the first field-effect transistor.Type: ApplicationFiled: December 7, 2011Publication date: June 14, 2012Applicant: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.Inventors: Hikaru TAMURA, Yoshiyuki KUROKAWA, Takayuki IKEDA
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Publication number: 20120146025Abstract: A light energy reuse type light-emitting device with low power consumption is provided by converting light from a light-emitting device into electric power efficiently for reuse. Also, a light energy reuse type light-emitting device with high yield is provided. A light-blocking film of the light-emitting device is replaced to a photoelectric conversion element, so that light is converted into electric power. That is, conventionally, light is not emitted in a portion of a light-blocking film. In the disclosed invention, light which is not emitted can be converted into electric power by a photoelectric conversion element, and can be reused. Therefore, a light-emitting device with low power consumption is realized.Type: ApplicationFiled: November 29, 2011Publication date: June 14, 2012Inventors: Satoshi Seo, Kaoru Hatano
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Publication number: 20120146028Abstract: The light use efficiency of a thin film diode is improved even when the semiconductor layer of the diode has a small thickness, thereby improving the light detection sensitivity of the diode. Further, a short circuit between the electrodes of the thin film diode via the light-blocking layer is prevented. A thin film diode (130) having a first semiconductor layer (131) including, at least, an n-type region (131n) and a p-type region (131p) is provided on one side of a substrate (101), and a light-blocking layer (160) is provided between the substrate and the first semiconductor layer. A metal oxide layer (180) is provided on the side of the light-blocking layer facing the first semiconductor layer. Asperities are provided on the side of the metal oxide layer facing the first semiconductor layer, and the first semiconductor layer has a geometry of asperities conforming with the asperities on the metal oxide layer.Type: ApplicationFiled: July 26, 2010Publication date: June 14, 2012Applicant: SHARP KABUSHIKI KAISHAInventors: Akihiro Oda, Seiji Kaneko
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Publication number: 20120146026Abstract: A photoelectric conversion, element including a first gate electrode, a first gate insulating layer, a crystalline semiconductor layer an amorphous semiconductor layer, an impurity semiconductor layer, a source electrode and a drain electrode in contact with the impurity semiconductor layer, a second gate insulating layer covering; a region between the source electrode and the drain electrode, and a second gate electrode over the second gate insulating layer. In the photoelectric conversion element, a Sight-receiving portion is provided in the region between the source electrode and the drain electrode, the first gate electrode includes a light-shielding material and overlaps with the entire surface of the crystalline semiconductor layer and the amorphous semiconductor layer, the second gate electrode includes a light-transmitting material and overlaps with, the light-receiving portion, and the first gate electrode is electrically connected to the source electrode or the drain electrode is provided.Type: ApplicationFiled: December 6, 2011Publication date: June 14, 2012Applicant: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.Inventors: Tsudoi Nagi, Koji Dairiki
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Patent number: 8198629Abstract: To provide a photoelectric conversion device with improved photoelectric conversion characteristics and cost competitiveness. A photoelectric conversion device including a semiconductor junction has a semiconductor layer in which a needle-like crystal is made to grow over an impurity semiconductor layer. The impurity semiconductor layer is formed of a microcrystalline semiconductor and includes an impurity imparting one conductivity type. An amorphous semiconductor layer is deposited on a microcrystalline semiconductor layer by setting the flow rate of a dilution gas (typically silane) to 1 time to 6 times the flow rate of a semiconductor source gas (typically hydrogen) at the time of deposition. Thus, a crystal with a three-dimensional shape tapered in a direction of the deposition of a film, i.e., in a direction from the microcrystalline semiconductor layer to the amorphous semiconductor layer is made to grow.Type: GrantFiled: February 9, 2011Date of Patent: June 12, 2012Assignee: Semiconductor Energy Laboratory Co., Ltd.Inventors: Shunpei Yamazaki, Satoshi Toriumi, Tomokazu Yokoi, Makoto Furuno
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Publication number: 20120138929Abstract: An IR sensing transistor according to an exemplary embodiment of the present invention includes: a light blocking layer formed on a substrate; a gate insulating layer formed on the light blocking layer; a semiconductor formed on the gate insulating layer; a pair of ohmic contact members formed on the semiconductor; a source electrode and a drain electrode formed on respective ones of the ohmic contact members; a passivation layer formed on the source electrode and the drain electrode; and a gate electrode formed on the passivation layer, wherein substantially all of the gate insulating layer lies on the light blocking layer.Type: ApplicationFiled: July 13, 2011Publication date: June 7, 2012Inventors: Suk Won JUNG, Byeong Hoon CHO, Sung Hoon YANG, Woong Kwon KIM, Sang Youn HAN, Dae Cheol KIM, Ki-Hun JEONG, Kyung-Sook JEON, Seung Mi SEO, Jung-Suk BANG, Kun-Wook HAN
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Publication number: 20120126231Abstract: An electric double layer capacitor, a lithium ion capacitor, and a charging device including a solar cell and either of the capacitors are disclosed. The electric double layer capacitor includes a first and second light-transmitting substrates; a pair of current collectors provided perpendicular to the substrates; active material layers provided on facing planes of the current collectors; and an electrolyte in a region surrounded by the substrates and the facing active material layers. The lithium ion capacitor includes a first and second light-transmitting substrates; a positive and negative electrode active material layers provided perpendicular to the substrates; and an electrolyte in a region surrounded by the facing substrates and the positive and negative electrode active material layers.Type: ApplicationFiled: November 17, 2011Publication date: May 24, 2012Inventors: Junpei MOMO, Yumiko SAITO, Rie MATSUBARA, Hiroatsu TODORIKI
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Patent number: 8183566Abstract: A hetero-crystalline semiconductor device and a method of making the same include a non-single crystalline semiconductor layer and a nanostructure layer that comprises a single crystalline semiconductor nanostructure integral to a crystallite of the non-single crystalline semiconductor layer.Type: GrantFiled: March 1, 2007Date of Patent: May 22, 2012Assignee: Hewlett-Packard Development Company, L.P.Inventors: Nobuhiko Kobayashi, Shih Yuan Wang
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Patent number: 8173891Abstract: Modeling a monolithic, multi-bandgap, tandem, solar photovoltaic converter or thermophotovoltaic converter by constraining the bandgap value for the bottom subcell to no less than a particular value produces an optimum combination of subcell bandgaps that provide theoretical energy conversion efficiencies nearly as good as unconstrained maximum theoretical conversion efficiency models, but which are more conducive to actual fabrication to achieve such conversion efficiencies than unconstrained model optimum bandgap combinations. Achieving such constrained or unconstrained optimum bandgap combinations includes growth of a graded layer transition from larger lattice constant on the parent substrate to a smaller lattice constant to accommodate higher bandgap upper subcells and at least one graded layer that transitions back to a larger lattice constant to accommodate lower bandgap lower subcells and to counter-strain the epistructure to mitigate epistructure bowing.Type: GrantFiled: May 15, 2008Date of Patent: May 8, 2012Assignee: Alliance for Sustainable Energy, LLCInventors: Mark W. Wanlass, Angelo Mascarenhas
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Patent number: 8168972Abstract: A method for simultaneous recrystallization and doping of semiconductor layers, in particular for the production of crystalline silicon thin layer solar cells. A substrate base layer 1 is produced, and subsequently, an intermediate layer system 2 which has at least one doped partial layer is deposited on the base layer. An absorber layer 3 which is undoped or likewise doped is deposited on the intermediate layer system 2, and in a recrystallisation step, the absorber layer 3 is heated, melted, cooled and tempered. Alternately, instead of an undoped capping layer, a capping layer system 4 which has at least one partial layer can also be applied on the absorber layer 3.Type: GrantFiled: October 5, 2010Date of Patent: May 1, 2012Assignee: Fraunhofer-Gesellschaft zur Förderung der angewandten Forschung e.V.Inventor: Stefan Reber
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Publication number: 20120097946Abstract: A photo-detecting device including a plurality of pixels, each including at least one alternate stack of photodiodes and electrically conducting electrodes. Each photodiode includes one intrinsic amorphous semiconductor layer in contact with one doped amorphous semiconductor layer distinct from the amorphous semiconductor layers in other photodiodes, and is arranged between two electrodes. Each pair of photodiodes includes one of the electrodes arranged between photodiodes. In each pixel: each electrode includes an electrically conducting portion not superposed on other electrodes of the pixel and electrically connected to one interconnection hole filled with an electrically conducting material; and portions of an electrically conducting material are superposed approximately on each of non-superposed portions of electrodes.Type: ApplicationFiled: July 5, 2010Publication date: April 26, 2012Applicant: COMMISSARIAT A L'ENERGIE ATOMIQUE ET AUX ENE ALTInventors: Pierre Gidon, Benoit Giffard, Norbert Moussy
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Patent number: 8164092Abstract: Provided herein are PIN structures including a layer of amorphous n-type silicon, a layer of intrinsic GaAs disposed over the layer of amorphous n-type silicon, and a layer of amorphous p-type silicon disposed over the layer of intrinsic GaAs. The layer of intrinsic GaAs may be engineered by the disclosed methods to exhibit a variety of structural properties that enhance light absorption and charge carrier mobility, including oriented polycrystalline intrinsic GaAs, embedded particles of intrinsic GaAs, and textured surfaces. Also provided are devices incorporating the PIN structures, including photovoltaic devices.Type: GrantFiled: January 12, 2011Date of Patent: April 24, 2012Assignee: The University of Utah Research FoundationInventors: Ashutosh Tiwari, Makarand Karmarkar, Nathan Wheeler Gray
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Publication number: 20120085890Abstract: An object is to reduce the size and manufacturing cost of a photodetector. In order to reduce the area where a visible light sensor and an infrared light sensor are provided, a first photodiode that detects visible light and a second photodiode that detects infrared light are arranged to overlap with each other so that visible light is absorbed first by the first photodiode, whereby significantly little visible light enters the second photodiode. Further, the first photodiode overlapping with the second photodiode is used as an optical filter for the second photodiode. Therefore, a semiconductor layer included in the first photodiode absorbs visible light and transmits infrared light, and a semiconductor layer included in the second photodiode absorbs infrared light.Type: ApplicationFiled: October 5, 2011Publication date: April 12, 2012Inventor: Yoshiyuki Kurokawa
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Publication number: 20120086007Abstract: Provided herein are PIN structures including a layer of amorphous n-type silicon, a layer of intrinsic GaAs disposed over the layer of amorphous n-type silicon, and a layer of amorphous p-type silicon disposed over the layer of intrinsic GaAs. The layer of intrinsic GaAs may be engineered by the disclosed methods to exhibit a variety of structural properties that enhance light absorption and charge carrier mobility, including oriented polycrystalline intrinsic GaAs, embedded particles of intrinsic GaAs, and textured surfaces. Also provided are devices incorporating the PIN structures, including photovoltaic devices.Type: ApplicationFiled: December 15, 2011Publication date: April 12, 2012Inventors: Ashutosh Tiwari, Makarand Karmarkar, Nathan Wheeler Gray
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Publication number: 20120086005Abstract: A photoelectric conversion device including a single crystal silicon substrate; a first amorphous silicon layer in contact with a surface (a light-receiving surface) of the single crystal silicon substrate; a first polarity (p-type) impurity diffusion layer in contact with the first amorphous silicon layer; a second amorphous silicon layer in contact with a back surface of the single crystal silicon substrate; and a second polarity (n-type) impurity diffusion layer in contact with the second amorphous silicon layer, in which the first and second polarity impurity diffusion layers are microcrystalline silicon layers formed under a deposition condition where a pressure in a reaction chamber is adjusted to be greater than or equal to 450 Pa and less than or equal to 10000 Pa is provided.Type: ApplicationFiled: October 4, 2011Publication date: April 12, 2012Applicant: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.Inventors: Yoshikazu HIURA, Fumito Isaka
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Publication number: 20120085892Abstract: In a photoelectric conversion device including a photodiode and a current mirror circuit, a diode-connected transistor is provided in parallel with the photodiode. The transistor serves as a leakage path for rapidly discharging charge stored in the gate capacitance in the current mirror circuit. Thus, the response speed of the photoelectric conversion device is increased, and output of an abnormal value is reduced.Type: ApplicationFiled: October 4, 2011Publication date: April 12, 2012Applicant: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.Inventor: Atsushi HIROSE
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Publication number: 20120086006Abstract: Techniques are provided for obtaining a photoelectric conversion device having a favorable spectral sensitivity characteristic and reduced variation in output current without a contamination substance mixed into a photoelectric conversion layer or a transistor, and for obtaining a highly reliable semiconductor device including a photoelectric conversion device. A semiconductor device may include, over an insulating surface, a first electrode; a second electrode; a color filter between the first electrode and the second electrode; an overcoat layer covering the color filter; and a photoelectric conversion layer over the overcoat layer, where one end portion of the photoelectric conversion layer is in contact with the first electrode, and where an end portion of the color filter lies inside the other end portion of the photoelectric conversion layer.Type: ApplicationFiled: October 12, 2011Publication date: April 12, 2012Applicant: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.Inventors: Tatsuya Arao, Daiki Yamada, Hidekazu Takahashi, Naoto Kusumoto, Kazuo Nishi, Yuusuke Sugawara, Hironobu Takahashi
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Patent number: 8153456Abstract: An improved bifacial solar cell is disclosed. In some embodiments, the front side includes an n-type field surface field, while the back side includes a p-type emitter. In other embodiments, the p-type emitter is on the front side. To maximize the diffusion of majority carriers and lower the series resistance between the contact and the substrate, the regions beneath the metal contacts are more heavily doped. Thus, regions of higher dopant concentration are created in at least one of the FSF or the emitter. These regions are created through the use of selective implants, which can be performed on one or two sides of the bifacial solar cell to improve efficiency.Type: GrantFiled: January 20, 2011Date of Patent: April 10, 2012Assignee: Varian Semiconductor Equipment Associates, Inc.Inventors: Atul Gupta, Nicholas P. T. Bateman
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Patent number: 8154020Abstract: A photo-voltaic cell device includes a first electrode, an N-type doped silicon-rich dielectric layer, a P-type doped silicon-rich dielectric layer, and a second electrode. The N-type doped silicon-rich dielectric layer is disposed on the first electrode, and the N-type doped silicon-rich dielectric layer is doped with an N-type dopant. The P-type doped silicon-rich dielectric layer is disposed on the N-type doped silicon-rich dielectric layer, and the P-type doped silicon-rich dielectric layer is doped with a P-type dopant. The second electrode is disposed on the P-type doped silicon-rich dielectric layer. A display panel including the photo-voltaic cell device is also provided.Type: GrantFiled: May 12, 2009Date of Patent: April 10, 2012Assignee: Au Optronics CorporationInventors: An-Thung Cho, Chia-Tien Peng, Yu-Cheng Chen, Hong-Zhang Lin, Yi-Chien Wen, Wei-Min Sun, Chi-Mao Hung, Chun-Hsiun Chen