Responsive To Nonelectrical External Signals (e.g., Light) Patents (Class 257/53)
  • Publication number: 20120126231
    Abstract: An electric double layer capacitor, a lithium ion capacitor, and a charging device including a solar cell and either of the capacitors are disclosed. The electric double layer capacitor includes a first and second light-transmitting substrates; a pair of current collectors provided perpendicular to the substrates; active material layers provided on facing planes of the current collectors; and an electrolyte in a region surrounded by the substrates and the facing active material layers. The lithium ion capacitor includes a first and second light-transmitting substrates; a positive and negative electrode active material layers provided perpendicular to the substrates; and an electrolyte in a region surrounded by the facing substrates and the positive and negative electrode active material layers.
    Type: Application
    Filed: November 17, 2011
    Publication date: May 24, 2012
    Inventors: Junpei MOMO, Yumiko SAITO, Rie MATSUBARA, Hiroatsu TODORIKI
  • Patent number: 8183566
    Abstract: A hetero-crystalline semiconductor device and a method of making the same include a non-single crystalline semiconductor layer and a nanostructure layer that comprises a single crystalline semiconductor nanostructure integral to a crystallite of the non-single crystalline semiconductor layer.
    Type: Grant
    Filed: March 1, 2007
    Date of Patent: May 22, 2012
    Assignee: Hewlett-Packard Development Company, L.P.
    Inventors: Nobuhiko Kobayashi, Shih Yuan Wang
  • Patent number: 8173891
    Abstract: Modeling a monolithic, multi-bandgap, tandem, solar photovoltaic converter or thermophotovoltaic converter by constraining the bandgap value for the bottom subcell to no less than a particular value produces an optimum combination of subcell bandgaps that provide theoretical energy conversion efficiencies nearly as good as unconstrained maximum theoretical conversion efficiency models, but which are more conducive to actual fabrication to achieve such conversion efficiencies than unconstrained model optimum bandgap combinations. Achieving such constrained or unconstrained optimum bandgap combinations includes growth of a graded layer transition from larger lattice constant on the parent substrate to a smaller lattice constant to accommodate higher bandgap upper subcells and at least one graded layer that transitions back to a larger lattice constant to accommodate lower bandgap lower subcells and to counter-strain the epistructure to mitigate epistructure bowing.
    Type: Grant
    Filed: May 15, 2008
    Date of Patent: May 8, 2012
    Assignee: Alliance for Sustainable Energy, LLC
    Inventors: Mark W. Wanlass, Angelo Mascarenhas
  • Patent number: 8168972
    Abstract: A method for simultaneous recrystallization and doping of semiconductor layers, in particular for the production of crystalline silicon thin layer solar cells. A substrate base layer 1 is produced, and subsequently, an intermediate layer system 2 which has at least one doped partial layer is deposited on the base layer. An absorber layer 3 which is undoped or likewise doped is deposited on the intermediate layer system 2, and in a recrystallisation step, the absorber layer 3 is heated, melted, cooled and tempered. Alternately, instead of an undoped capping layer, a capping layer system 4 which has at least one partial layer can also be applied on the absorber layer 3.
    Type: Grant
    Filed: October 5, 2010
    Date of Patent: May 1, 2012
    Assignee: Fraunhofer-Gesellschaft zur Förderung der angewandten Forschung e.V.
    Inventor: Stefan Reber
  • Publication number: 20120097946
    Abstract: A photo-detecting device including a plurality of pixels, each including at least one alternate stack of photodiodes and electrically conducting electrodes. Each photodiode includes one intrinsic amorphous semiconductor layer in contact with one doped amorphous semiconductor layer distinct from the amorphous semiconductor layers in other photodiodes, and is arranged between two electrodes. Each pair of photodiodes includes one of the electrodes arranged between photodiodes. In each pixel: each electrode includes an electrically conducting portion not superposed on other electrodes of the pixel and electrically connected to one interconnection hole filled with an electrically conducting material; and portions of an electrically conducting material are superposed approximately on each of non-superposed portions of electrodes.
    Type: Application
    Filed: July 5, 2010
    Publication date: April 26, 2012
    Applicant: COMMISSARIAT A L'ENERGIE ATOMIQUE ET AUX ENE ALT
    Inventors: Pierre Gidon, Benoit Giffard, Norbert Moussy
  • Patent number: 8164092
    Abstract: Provided herein are PIN structures including a layer of amorphous n-type silicon, a layer of intrinsic GaAs disposed over the layer of amorphous n-type silicon, and a layer of amorphous p-type silicon disposed over the layer of intrinsic GaAs. The layer of intrinsic GaAs may be engineered by the disclosed methods to exhibit a variety of structural properties that enhance light absorption and charge carrier mobility, including oriented polycrystalline intrinsic GaAs, embedded particles of intrinsic GaAs, and textured surfaces. Also provided are devices incorporating the PIN structures, including photovoltaic devices.
    Type: Grant
    Filed: January 12, 2011
    Date of Patent: April 24, 2012
    Assignee: The University of Utah Research Foundation
    Inventors: Ashutosh Tiwari, Makarand Karmarkar, Nathan Wheeler Gray
  • Publication number: 20120085892
    Abstract: In a photoelectric conversion device including a photodiode and a current mirror circuit, a diode-connected transistor is provided in parallel with the photodiode. The transistor serves as a leakage path for rapidly discharging charge stored in the gate capacitance in the current mirror circuit. Thus, the response speed of the photoelectric conversion device is increased, and output of an abnormal value is reduced.
    Type: Application
    Filed: October 4, 2011
    Publication date: April 12, 2012
    Applicant: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.
    Inventor: Atsushi HIROSE
  • Publication number: 20120085890
    Abstract: An object is to reduce the size and manufacturing cost of a photodetector. In order to reduce the area where a visible light sensor and an infrared light sensor are provided, a first photodiode that detects visible light and a second photodiode that detects infrared light are arranged to overlap with each other so that visible light is absorbed first by the first photodiode, whereby significantly little visible light enters the second photodiode. Further, the first photodiode overlapping with the second photodiode is used as an optical filter for the second photodiode. Therefore, a semiconductor layer included in the first photodiode absorbs visible light and transmits infrared light, and a semiconductor layer included in the second photodiode absorbs infrared light.
    Type: Application
    Filed: October 5, 2011
    Publication date: April 12, 2012
    Inventor: Yoshiyuki Kurokawa
  • Publication number: 20120086007
    Abstract: Provided herein are PIN structures including a layer of amorphous n-type silicon, a layer of intrinsic GaAs disposed over the layer of amorphous n-type silicon, and a layer of amorphous p-type silicon disposed over the layer of intrinsic GaAs. The layer of intrinsic GaAs may be engineered by the disclosed methods to exhibit a variety of structural properties that enhance light absorption and charge carrier mobility, including oriented polycrystalline intrinsic GaAs, embedded particles of intrinsic GaAs, and textured surfaces. Also provided are devices incorporating the PIN structures, including photovoltaic devices.
    Type: Application
    Filed: December 15, 2011
    Publication date: April 12, 2012
    Inventors: Ashutosh Tiwari, Makarand Karmarkar, Nathan Wheeler Gray
  • Publication number: 20120086006
    Abstract: Techniques are provided for obtaining a photoelectric conversion device having a favorable spectral sensitivity characteristic and reduced variation in output current without a contamination substance mixed into a photoelectric conversion layer or a transistor, and for obtaining a highly reliable semiconductor device including a photoelectric conversion device. A semiconductor device may include, over an insulating surface, a first electrode; a second electrode; a color filter between the first electrode and the second electrode; an overcoat layer covering the color filter; and a photoelectric conversion layer over the overcoat layer, where one end portion of the photoelectric conversion layer is in contact with the first electrode, and where an end portion of the color filter lies inside the other end portion of the photoelectric conversion layer.
    Type: Application
    Filed: October 12, 2011
    Publication date: April 12, 2012
    Applicant: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.
    Inventors: Tatsuya Arao, Daiki Yamada, Hidekazu Takahashi, Naoto Kusumoto, Kazuo Nishi, Yuusuke Sugawara, Hironobu Takahashi
  • Publication number: 20120086005
    Abstract: A photoelectric conversion device including a single crystal silicon substrate; a first amorphous silicon layer in contact with a surface (a light-receiving surface) of the single crystal silicon substrate; a first polarity (p-type) impurity diffusion layer in contact with the first amorphous silicon layer; a second amorphous silicon layer in contact with a back surface of the single crystal silicon substrate; and a second polarity (n-type) impurity diffusion layer in contact with the second amorphous silicon layer, in which the first and second polarity impurity diffusion layers are microcrystalline silicon layers formed under a deposition condition where a pressure in a reaction chamber is adjusted to be greater than or equal to 450 Pa and less than or equal to 10000 Pa is provided.
    Type: Application
    Filed: October 4, 2011
    Publication date: April 12, 2012
    Applicant: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.
    Inventors: Yoshikazu HIURA, Fumito Isaka
  • Patent number: 8153456
    Abstract: An improved bifacial solar cell is disclosed. In some embodiments, the front side includes an n-type field surface field, while the back side includes a p-type emitter. In other embodiments, the p-type emitter is on the front side. To maximize the diffusion of majority carriers and lower the series resistance between the contact and the substrate, the regions beneath the metal contacts are more heavily doped. Thus, regions of higher dopant concentration are created in at least one of the FSF or the emitter. These regions are created through the use of selective implants, which can be performed on one or two sides of the bifacial solar cell to improve efficiency.
    Type: Grant
    Filed: January 20, 2011
    Date of Patent: April 10, 2012
    Assignee: Varian Semiconductor Equipment Associates, Inc.
    Inventors: Atul Gupta, Nicholas P. T. Bateman
  • Patent number: 8154020
    Abstract: A photo-voltaic cell device includes a first electrode, an N-type doped silicon-rich dielectric layer, a P-type doped silicon-rich dielectric layer, and a second electrode. The N-type doped silicon-rich dielectric layer is disposed on the first electrode, and the N-type doped silicon-rich dielectric layer is doped with an N-type dopant. The P-type doped silicon-rich dielectric layer is disposed on the N-type doped silicon-rich dielectric layer, and the P-type doped silicon-rich dielectric layer is doped with a P-type dopant. The second electrode is disposed on the P-type doped silicon-rich dielectric layer. A display panel including the photo-voltaic cell device is also provided.
    Type: Grant
    Filed: May 12, 2009
    Date of Patent: April 10, 2012
    Assignee: Au Optronics Corporation
    Inventors: An-Thung Cho, Chia-Tien Peng, Yu-Cheng Chen, Hong-Zhang Lin, Yi-Chien Wen, Wei-Min Sun, Chi-Mao Hung, Chun-Hsiun Chen
  • Publication number: 20120080676
    Abstract: The absorption coefficient of silicon for infrared light is very low and most solar cells absorb very little of the infrared light energy in sunlight. Very thick cells of crystalline silicon can be used to increase the absorption of infrared light energy but the cost of thick crystalline cells is prohibitive. The present invention relates to the use of less expensive microcrystalline silicon solar cells and the use of backside texturing with diffusive scattering to give a very large increase in the absorption of infrared light. Backside texturing with diffusive scattering and with a smooth front surface of the solar cell results in multiple internal reflections, light trapping, and a large enhancement of the absorption of infrared solar energy.
    Type: Application
    Filed: November 3, 2011
    Publication date: April 5, 2012
    Inventor: Leonard Forbes
  • Publication number: 20120080675
    Abstract: A photoelectric converter includes a pair of electrodes and a plurality of organic layers. The pair of electrodes is provided above a substrate. The plurality of organic layers is interposed between the pair of electrodes and includes a photoelectric conversion layer and a given organic layer being formed on one electrode of the pair of electrodes. The one electrode is one of pixel electrodes arranged two-dimensionally. The given organic layer has a concave portion that is formed in a corresponding position located above a step portion among the arranged pixel electrodes. An angle ? of the concave portion is less than 50°, where an inclination angle of a tangent plane at a given point on the concave portion to a surface plane of the substrate is defined as ?.
    Type: Application
    Filed: September 30, 2011
    Publication date: April 5, 2012
    Applicant: FUJIFILM CORPORATION
    Inventors: Toshihiro NAKATANI, Takashi GOTO, Yoshiki MORITA, Shinji IMAI, Hideyuki SUZUKI, Daigo SAWAKI
  • Publication number: 20120074406
    Abstract: A photosensor includes a photosensor array in which plural photosensor pixels are arranged in a matrix form and a backlight arranged below the photosensor array. The photosensor array includes a surface light-shielding film (for example, Al film), and the surface light-shielding film includes an incident hole through which light from an opposite side to the backlight is incident on the respective photosensor pixels, and a passage hole which is provided around the incident hole and irradiates the opposite side with irradiation light from the backlight.
    Type: Application
    Filed: September 23, 2011
    Publication date: March 29, 2012
    Inventors: Terunori Saitou, Toshio Miyazawa, Atsushi Hasegawa, Takeshi Yonekura
  • Patent number: 8143587
    Abstract: An intermediate layer is located between a recording photoconductive layer and an electrode, which is either one of a bias electrode and a reference electrode, and which is located on the side at positive electric potential with respect to a charge accumulating section at the time of readout of electric charges of the charge accumulating section. The intermediate layer is an a-Se layer containing, as a specific substance, at least one kind of substance selected from the group consisting of an alkali metal fluoride, an alkaline earth metal fluoride, an alkali metal oxide, an alkaline earth metal oxide, SiOx, and GeOx, where x represents a number satisfying 0.5?x?1.5, in a concentration falling within the range of 0.003 mol % to 0.03 mol %.
    Type: Grant
    Filed: October 13, 2010
    Date of Patent: March 27, 2012
    Assignee: Fujifilm Corporation
    Inventor: Shinji Imai
  • Patent number: 8138499
    Abstract: To provide a stacked photoelectric conversion device capable of inhibiting extreme decrease of the output in the morning and evening. A stacked photoelectric conversion device of the present invention comprises a first photoelectric conversion layer, a second photoelectric conversion layer and a third photoelectric conversion layer stacked in this order from a light entrance side, each photoelectric conversion layer having a p-i-n junction and formed of a silicon based semiconductor, wherein a short-circuit photocurrent of the first photoelectric conversion layer is larger than a short-circuit photocurrent of the second photoelectric conversion layer or a short-circuit photocurrent of the third photoelectric conversion layer under a condition of light source: xenon lamp, irradiance: 100 mW/cm2, AM: 1.5, and temperature: 25° C.
    Type: Grant
    Filed: May 29, 2008
    Date of Patent: March 20, 2012
    Assignee: Sharp Kabushiki Kaisha
    Inventors: Yoshiyuki Nasuno, Yasuaki Ishikawa
  • Publication number: 20120056179
    Abstract: A photo sensor, a method of manufacturing the photo sensor, and a display apparatus, the photo sensor including a substrate; a light receiving unit on the substrate, the light receiving unit including an amorphous semiconductor material; a first adjacent unit and a second adjacent unit formed as one body with the light receiving unit, the first adjacent unit and the second adjacent unit being separated from each other by the light receiving unit; a first photo sensor electrode electrically connected to the first adjacent unit; and a second photo sensor electrode electrically connected to the second adjacent unit, wherein at least one of the first adjacent unit and the second adjacent unit includes a crystalline semiconductor material.
    Type: Application
    Filed: August 16, 2011
    Publication date: March 8, 2012
    Inventors: Won-Kyu Lee, Jae-Hwan Oh, Seong-Hyun Jin, Young-Jin Chang, Jae-Beom Choi
  • Patent number: 8129713
    Abstract: A photoelectric conversion element includes a first electrode, a second electrode, and a photoelectric conversion element provided between the first electrode and the second electrode. The photoelectric conversion element includes a polymer. The polymer includes at least one light absorber which absorbs light and generates at least one kind of carrier. An end part of the polymer combines with a surface, which faces the second electrode, of the first electrode.
    Type: Grant
    Filed: January 19, 2007
    Date of Patent: March 6, 2012
    Assignee: Seiko Epson Corporation
    Inventor: Takashi Miyazawa
  • Patent number: 8120027
    Abstract: The absorption coefficient of silicon for infrared light is very low and most solar cells absorb very little of the infrared light energy in sunlight. Very thick cells of crystalline silicon can be used to increase the absorption of infrared light energy but the cost of thick crystalline cells is prohibitive. The present invention relates to the use of less expensive microcrystalline silicon solar cells and the use of backside texturing with diffusive scattering to give a very large increase in the absorption of infrared light. Backside texturing with diffusive scattering and with a smooth front surface of the solar cell results in multiple internal reflections, light trapping, and a large enhancement of the absorption of infrared solar energy.
    Type: Grant
    Filed: November 15, 2010
    Date of Patent: February 21, 2012
    Inventor: Leonard Forbes
  • Publication number: 20120037904
    Abstract: Amorphous semiconductor films with enhanced charged carrier transport are disclosed. Also disclosed is a method for fabricating and treating the film to produce the enhanced transport. Also disclosed are semiconductor p-n junctions fabricated with the films which demonstrate the enhanced transport. The films are amorphous and include boron, carbon, and hydrogen.
    Type: Application
    Filed: August 10, 2010
    Publication date: February 16, 2012
    Applicant: NORTH DAKOTA STATE UNIVERSITY RESEARCH FOUNDATION
    Inventors: Anthony N. Caruso, Joseph A. Sandstrom, David A. Bunzow
  • Publication number: 20120037905
    Abstract: A display device of the present invention includes a display panel (101) including a photodiode (17), which generates a current having a magnitude corresponding to an intensity of light incident on the photoelectric conversion element; and, a backlight (108) for irradiating light from behind the photodiode (17) to beyond a front surface of the display panel (101), wherein: the photodiode (17) includes an activating layer made of hydrogenated a-Si; the light source (108) has a peak wavelength within a range from 780 nm or more to 830 nm or less; and the display device further includes a light blocking member (15) for blocking light having a wavelength less than 780 nm, the light blocking member (15) being provided between a front surface of the display panel (101) and the photodiode (17) and over the photodiode (17).
    Type: Application
    Filed: November 20, 2009
    Publication date: February 16, 2012
    Applicant: Sharp Kabushiki Kaisha
    Inventors: Atsuhito Murai, Yoshiharu Kataoka, Takuya Watanabe, Hajime Imai, Hideki Kitagawa
  • Patent number: 8115203
    Abstract: An infrared photodiode structure is provided. The infrared photodiode structure includes a doped semiconductor layer having ions of certain conductivity. An active photodetecting region is positioned on the doped semiconductor layer for detecting an infrared light signal. The active photodetecting region includes one or more amorphous semiconductor materials so as to allow for high signal-to-noise ratio being achieved by invoking carrier hopping and band conduction, under dark and illuminated conditions.
    Type: Grant
    Filed: January 26, 2009
    Date of Patent: February 14, 2012
    Assignee: Massachusetts Institute of Technology
    Inventors: Juejun Hu, Anuradha Agarwal, Lionel C. Kimerling
  • Patent number: 8115097
    Abstract: Electrical contact to the front side of a photovoltaic cell is provided by an array of conductive through-substrate vias, and optionally, an array of conductive blocks located on the front side of the photovoltaic cell. A dielectric liner provides electrical isolation of each conductive through-substrate via from the semiconductor material of the photovoltaic cell. A dielectric layer on the backside of the photovoltaic cell is patterned to cover a contiguous region including all of the conductive through-substrate vias, while exposing a portion of the backside of the photovoltaic cell. A conductive material layer is deposited on the back surface of the photovoltaic cell, and is patterned to form a first conductive wiring structure that electrically connects the conductive through-substrate vias and a second conductive wiring structure that provides electrical connection to the backside of the photovoltaic cell.
    Type: Grant
    Filed: November 19, 2009
    Date of Patent: February 14, 2012
    Assignee: International Business Machines Corporation
    Inventors: Supratik Guha, Yves Martin, Naim Moumen, Robert L. Sandstrom, Theodore G. van Kessel
  • Publication number: 20120032170
    Abstract: The present invention relates to a solar power generation device which includes an electric double-layer capacitor and a solar cell. The electric double-layer capacitor includes a pair of current collectors formed using a light-transmitting conductive material; active materials which are dispersed on the pair of current collectors; a light-transmitting electrolyte layer which is provided between the pair of current collectors; and a terminal portion which is electrically connected to the current collector. The solar cell includes, over a light-transmitting substrate, a first light-transmitting conductive film; a photoelectric conversion layer which is provided in contact with the first light-transmitting conductive film; and a second light-transmitting conductive film which is provided in contact with the photoelectric conversion layer.
    Type: Application
    Filed: August 2, 2011
    Publication date: February 9, 2012
    Inventors: Yumiko Saito, Junpei Momo, Rie Matsubara, Kuniharu Nomoto, Hiroatsu Todoriki
  • Publication number: 20120032169
    Abstract: The present invention relates to a visible ray sensor and a light sensor capable of improving photosensitivity by preventing photodegradation. The visible ray sensor may include: a substrate, a light blocking member formed on the substrate, and a visible ray sensing thin film transistor formed on the light blocking member. The light blocking member may be made of a transparent electrode, a band pass filter, or an opaque metal.
    Type: Application
    Filed: December 28, 2010
    Publication date: February 9, 2012
    Applicant: Samsung Electronics Co., Ltd.
    Inventors: Sang-Youn Han, Jun-Ho Song, Kyung-Sook Jeon, Mi-Seon Seo, Sung-Hoon Yang, Suk-Won Jung, Seung Mi Seo
  • Publication number: 20120033161
    Abstract: A photosensor includes a substrate, a gate line, and a data line disposed on the substrate. A thin film transistor is connected to the gate line and the data line. A first photo-sensing member is disposed on the substrate, and a first electrode is connected to the thin film transistor and the first photo-sensing member. A second photo-sensing member is disposed on the first photo-sensing member, and a second electrode is connected to the first electrode and the second photo-sensing member.
    Type: Application
    Filed: December 3, 2010
    Publication date: February 9, 2012
    Applicant: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Sang-Youn HAN, Sung-Hoon YANG, Suk-Won JUNG, Kyung-Sook JEON, Seung Mi SEO, Mi-Seon SEO
  • Publication number: 20120025189
    Abstract: Provided are a sensor array substrate and a method of fabricating the same. The sensor array substrate includes: a substrate in which a switching element region and a sensor region that senses light are defined; a first semiconductor layer which is formed in the sensor region; a first gate electrode which is formed on the first semiconductor layer and overlaps the first semiconductor layer; a second gate electrode which is formed in the switching element region; a second semiconductor layer which is formed on the second gate electrode and overlaps the second gate electrode; and a light-blocking pattern which is formed on the second semiconductor layer and overlaps the second semiconductor layer, wherein the first semiconductor layer and the second semiconductor layer are disposed on different layers, and the second gate electrode and the light-blocking pattern are electrically connected to each other.
    Type: Application
    Filed: May 6, 2011
    Publication date: February 2, 2012
    Applicant: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Kyung-Sook JEON, Jun-Ho SONG, Sang-Youn HAN, Sung-Hoon YANG, Dae-Cheol KIM, Ki-Hun JEONG, Mi-Seon SEO
  • Publication number: 20120001178
    Abstract: A thin film transistor with favorable electric characteristics is provided. The thin film transistor includes a gate electrode, a gate insulating layer, a semiconductor layer which includes a microcrystalline semiconductor region and an amorphous semiconductor region, an impurity semiconductor layer, a wiring, a first oxide region provided between the microcrystalline semiconductor region and the wiring, and a second oxide region provided between the amorphous semiconductor region and the wiring. wherein a line tangent to the highest inclination of an oxygen profile in the first oxide region (m1) and a line tangent to the highest inclination of an oxygen profile in the second oxide region (m2) satisfy a relation of 1<m1/m2<10, on the semiconductor layer side from an intersection of a profile of an element included in the wiring and a profile of an element included in the semiconductor layer.
    Type: Application
    Filed: December 23, 2010
    Publication date: January 5, 2012
    Applicant: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.
    Inventors: Hiekazu MIYAIRI, Shinya Sasagawa, Motomu Kurata, Asami Tadokoro
  • Publication number: 20110309361
    Abstract: A photoelectric conversion element includes a first conductive layer over a substrate; a first insulating layer covering the first conductive layer; a first semiconductor layer over the first insulating layer; a second conductive layer formed over the first semiconductor layer; an impurity semiconductor layer over the second semiconductor layer; a second conductive layer over the impurity semiconductor layer; a second insulating layer covering the first semiconductor layer and the second conductive layer; and a light-transmitting third conductive layer over the second insulating layer. A first opening and a second opening are formed in the second insulating layer. In the first opening, the first semiconductor layer is connected to the third conductive layer. In the second opening, the first conductive layer is connected to the third conductive layer. In the first opening, a light-receiving portion surrounded by an electrode formed of the second conductive layer is provided.
    Type: Application
    Filed: June 17, 2011
    Publication date: December 22, 2011
    Inventors: Koji Dairiki, Hidekazu Miyairi, Tsudoi Nagi
  • Patent number: 8080825
    Abstract: An image sensor may include a first substrate having circuitry including wires and a silicon layer formed on and/or over the first substrate to selectively contact the wires. The image sensor may include photodiodes bonded to the first substrate while contacting the silicon layer and electrically connected to the wires. Each unit pixel may be implemented having complicated circuitry without a reduction in photosensitivity. Additional on-chip circuitry may also be implanted in the design.
    Type: Grant
    Filed: December 26, 2008
    Date of Patent: December 20, 2011
    Assignee: Dongbu HiTek Co., Ltd.
    Inventor: Chang-Hun Han
  • Publication number: 20110297936
    Abstract: A semiconductor device 700 includes a substrate and an optical sensor unit 700 formed on the substrate for sensing light and for generating a sensing signal, the optical sensor unit 700 including a first thin film diode 701A for detection of light in a first wavelength range, a second thin film diode 701B detecting light in a second wavelength range that contains wavelengths longer than the longest wavelength in the first wavelength range. The first thin film diode 701A and the second thin film diode 701B are connected in parallel to each other. The sensing signal is generated based on the output from one of the first thin film diode 701A and the second thin film diode 701B. By this means, the wavelength range that can be detected by the optical sensor unit can be expanded and the sensing sensitivity can be increased.
    Type: Application
    Filed: February 12, 2010
    Publication date: December 8, 2011
    Applicant: SHARP KABUSHIKI KAISHA
    Inventors: Naoki Makita, Masahiro Fujiwara
  • Publication number: 20110291090
    Abstract: A manufacturing method of a photoelectric conversion device includes the following steps: forming a first electrode over a substrate; and, over the first electrode, forming a photoelectric conversion layer that includes a first conductive layer having one conductivity, a second semiconductor layer, and a third semiconductor layer having a conductivity opposite to the one conductivity of the second semiconductor layer over the first electrode. The manufacturing method further includes the step of removing a part of the second semiconductor layer and a part of the third semiconductor layer in a region of the photoelectric conversion layer so that the third semiconductor layer does not overlap the first electrode.
    Type: Application
    Filed: August 10, 2011
    Publication date: December 1, 2011
    Applicant: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.
    Inventors: Yuusuke Sugawara, Kazuo Nishi, Tatsuya Arao, Daiki Yamada, Hidekazu Takahashi, Naoto Kusumoto
  • Patent number: 8067687
    Abstract: A monolithic, multi-bandgap, tandem solar photovoltaic converter has at least one, and preferably at least two, subcells grown lattice-matched on a substrate with a bandgap in medium to high energy portions of the solar spectrum and at least one subcell grown lattice-mismatched to the substrate with a bandgap in the low energy portion of the solar spectrum, for example, about 1 eV.
    Type: Grant
    Filed: December 30, 2004
    Date of Patent: November 29, 2011
    Assignee: Alliance for Sustainable Energy, LLC
    Inventor: Mark W. Wanlass
  • Patent number: 8053666
    Abstract: A p type amorphous silicon layer is stacked, by a CVD method, on a main surface of an n type single-crystalline silicon substrate; an n type amorphous silicon layer is stacked, by the CVD method, on a surface opposite to the surface on which the p type amorphous silicon layer is stacked; and, by using a laser ablation processing method, through-holes are formed in the n type single-crystalline silicon substrate, the p type amorphous silicon layer, and the n type amorphous silicon layer. Subsequently, an insulating layer is formed on an inner wall surface of each of the through-holes, and then a conductive material is filled therein.
    Type: Grant
    Filed: May 15, 2008
    Date of Patent: November 8, 2011
    Assignee: Sanyo Electric Co., Ltd.
    Inventor: Yuji Hishida
  • Publication number: 20110260164
    Abstract: A multiple-junction photoelectric device includes a substrate with a first conducting layer thereon, at least two elementary photoelectric devices of p-i-n or p-n configuration, with a second conducting layer thereon, and at least one intermediate layer between two adjacent elementary photoelectric devices. The intermediate layer has, on the incoming light side, opposite top and bottom faces, the top and bottom faces having respectively a surface morphology including inclined elementary surfaces so ?90bottom is smaller than ?90top by at least 3°, preferably 6°, more preferably 10°, and even more preferably 15°; where ?90top is the angle for which 90% of the elementary surfaces of the top face of the intermediate layer have an inclination equal to or less than this angle, and ?90bottom is the angle for which 90% of the elementary surfaces of the bottom face of the intermediate layer have an inclination equal to or less than this angle.
    Type: Application
    Filed: November 18, 2009
    Publication date: October 27, 2011
    Applicant: UNIVERSITE DE NEUCHATEL
    Inventors: Didier Domine, Peter Cuony, Julien Bailat
  • Publication number: 20110260163
    Abstract: An improved piezoresistive-based sensor (78) can include a cavity (66) in a substantially solid substrate (68). A reactive agent can optionally be present in the cavity (66). A flexible machined membrane can form a wall of the cavity (66). The flexible machined membrane can include an array of channels (76) configured to permit selective passage of a target material into and out of the cavity. Additionally, the flexible machined membrane can include a piezoresistive features (74) associated with the membrane. The reactive agent included in the cavity (66) can be volumetrically responsive to the presence of the target material or fluid. These sensors can be configured as pressure sensors, chemical sensors, flow sensors, and the like.
    Type: Application
    Filed: March 13, 2009
    Publication date: October 27, 2011
    Inventors: Florian Solzbacher, Michael Orthner
  • Patent number: 8044445
    Abstract: A photoelectric conversion device includes a thin film transistor that is placed on a substrate, a photodiode that is connected to a drain electrode of the thin film transistor and includes an upper electrode, a lower electrode and a photoelectric conversion layer placed between the upper and lower electrodes, a first interlayer insulating film that covers at least the upper electrode, a second interlayer insulating film that is placed in an upper layer of the first interlayer insulating film and covers the thin film transistor and the photodiode, and a line that is connected to the upper electrode through a contact hole disposed in the first interlayer insulating film and the second interlayer insulating film.
    Type: Grant
    Filed: September 9, 2009
    Date of Patent: October 25, 2011
    Assignee: Mitsubishi Electric Corporation
    Inventors: Masami Hayashi, Takashi Miyayama
  • Patent number: 8039277
    Abstract: Disclosed are methods for providing wafer parasitic current control to a semiconductor wafer (1240) having a substrate (1240), at least one active layer (1240) and at least one surface layer (1240), Current control can be achieved through the formation of patterns (1240) surrounding contacts (1215), said patterns (1240) including insulating implants and/or sacrificial layers formed between active devices represented by said contacts (1215). Current flows through active regions (1260) associated with said contacts (1215) and active devices. Methods of and systems for wafer level burn-in (WLBI) of semiconductor devices are also disclosed. Current control at the wafer level is important when using WLBI methods and systems.
    Type: Grant
    Filed: August 12, 2002
    Date of Patent: October 18, 2011
    Assignee: Finisar Corporation
    Inventors: Michael J. Haji-Sheikh, James R. Biard, James K. Guenter, Bobby M. Hawkins
  • Publication number: 20110248265
    Abstract: The absorption coefficient of silicon for infrared light is very low and most solar cells absorb very little of the infrared light energy in sunlight. Very thick cells of crystalline silicon can be used to increase the absorption of infrared light energy but the cost of thick crystalline cells is prohibitive. The present invention relates to the use of less expensive microcrystalline silicon solar cells and the use of backside texturing with diffusive scattering to give a very large increase in the absorption of infrared light. Backside texturing comprises a plurality of cusped features providing diffusive scattering. Constructing the solar cell with a smooth front surface results in multiple internal reflections, light trapping, and a large enhancement of the absorption of infrared solar energy.
    Type: Application
    Filed: June 16, 2011
    Publication date: October 13, 2011
    Inventor: Leonard Forbes
  • Patent number: 8030651
    Abstract: To manufacture a micro structure and an electric circuit included in a micro electro mechanical device over the same insulating surface in the same step. In the micro electro mechanical device, an electric circuit including a transistor and a micro structure are integrated over a substrate having an insulating surface. The micro structure includes a structural layer having the same stacked-layer structure as a layered product of a gate insulating layer of the transistor and a semiconductor layer provided over the gate insulating layer. That is, the structural layer includes a layer formed of the same insulating film as the gate insulating layer and a layer formed of the same semiconductor film as the semiconductor layer of the transistor. Further, the micro structure is manufactured by using each of conductive layers used for a gate electrode, a source electrode, and a drain electrode of the transistor as a sacrificial layer.
    Type: Grant
    Filed: December 28, 2009
    Date of Patent: October 4, 2011
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Mayumi Yamaguchi, Konami Izumi
  • Patent number: 8030745
    Abstract: The present invention provides an ID chip or an IC card in which the mechanical strength of an integrated circuit can be enhanced without suppressing a circuit scale. An ID chip or an IC card of the present invention has an integrated circuit in which a TFT (a thin film transistor) is formed from an insulated thin semiconductor film. Further, an ID chip or an IC card of the present invention has a light-emitting element and a light-receiving element each using a non-single-crystal thin film for a layer conducting photoelectric conversion. Such a light-emitting element or a light-receiving element may be formed consecutively to (integrally with) an integrated circuit or may be formed separately and attached to an integrated circuit.
    Type: Grant
    Filed: February 28, 2005
    Date of Patent: October 4, 2011
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventor: Shunpei Yamazaki
  • Publication number: 20110234893
    Abstract: A solid state imaging device according to one embodiment of the present invention includes a substrate with a solid state imaging element, a first impurity layer, a plurality of external electrodes, and a translucent substrate. The first impurity layer is formed on a back surface side of the substrate, and forms a pn junction with the substrate. The plurality of external electrodes is formed on the back surface of the substrate and is electrically connected to the solid state imaging element. The translucent substrate is fixed to the substrate.
    Type: Application
    Filed: March 16, 2011
    Publication date: September 29, 2011
    Applicant: KABUSHIKI KAISHA TOSHIBA
    Inventor: Yoshiteru KOSEKI
  • Publication number: 20110233549
    Abstract: A display apparatus including gyro sensors with a simple structure, and a method of manufacturing the same are disclosed. The display apparatus includes a first substrate and a second substrate, a space between the first substrate and second substrate, including a display area and a non-display area, and a first gyro sensor formed in a sensor area disposed within the non-display area, where the first gyro sensor includes: a first lower base electrode placed at a central portion of the first gyro sensor on the first substrate, a pair of first lower direction electrodes formed to be symmetrical to each other around the first lower base electrode in a first direction on the first substrate, and a first conductor configured to contact with the first lower base electrode within the first gyro sensor.
    Type: Application
    Filed: February 1, 2011
    Publication date: September 29, 2011
    Applicant: SAMSUNG MOBILE DISPLAY CO., LTD.
    Inventor: Sang-Min YI
  • Publication number: 20110215323
    Abstract: In a CMOS image sensor in which a plurality of pixels is arranged in a matrix, a transistor in which a channel formation region includes an oxide semiconductor is used for each of a charge accumulation control transistor and a reset transistor which are in a pixel portion. After a reset operation of the signal charge accumulation portion is performed in all the pixels arranged in the matrix, a charge accumulation operation by the photodiode is performed in all the pixels, and a read operation of a signal from the pixel is performed per row. Accordingly, an image can be taken without a distortion.
    Type: Application
    Filed: March 1, 2011
    Publication date: September 8, 2011
    Applicant: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.
    Inventors: Yoshiyuki KUROKAWA, Takayuki IKEDA, Hikaru TAMURA, Munehiro KOZUMA, Masataka IKEDA, Takeshi AOKI
  • Publication number: 20110198484
    Abstract: A transistor a gate of which, one of a source and a drain of which, and the other are electrically connected to a selection signal line, an output signal line, and a reference signal line, respectively and a photodiode one of an anode and a cathode of which and the other are electrically connected to a reset signal line and a back gate of the transistor, respectively are included. The photodiode is forward biased to initialize the back-gate potential of the transistor, the back-gate potential is changed by current of the inversely-biased photodiode flowing in an inverse direction in accordance with the light intensity, and the transistor is turned on to change the potential of the output signal line, so that a signal in accordance with the intensity is obtained.
    Type: Application
    Filed: February 4, 2011
    Publication date: August 18, 2011
    Applicant: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.
    Inventor: Yoshiyuki KUROKAWA
  • Publication number: 20110193087
    Abstract: To provide a photoelectric conversion device with improved photoelectric conversion characteristics and cost competitiveness. A photoelectric conversion device including a semiconductor junction has a semiconductor layer in which a needle-like crystal is made to grow over an impurity semiconductor layer. The impurity semiconductor layer is formed of a microcrystalline semiconductor and includes an impurity imparting one conductivity type. An amorphous semiconductor layer is deposited on a microcrystalline semiconductor layer by setting the flow rate of a dilution gas (typically silane) to 1 time to 6 times the flow rate of a semiconductor source gas (typically hydrogen) at the time of deposition. Thus, a crystal with a three-dimensional shape tapered in a direction of the deposition of a film, i.e., in a direction from the microcrystalline semiconductor layer to the amorphous semiconductor layer is made to grow.
    Type: Application
    Filed: February 9, 2011
    Publication date: August 11, 2011
    Applicant: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.
    Inventors: Shunpei YAMAZAKI, Satoshi TORIUMI, Tomokazu YOKOI, Makoto FURUNO
  • Patent number: 7994602
    Abstract: A thin-film metal-oxide compound includes a titanium dioxide layer having a thickness of about 100 to 1000 nanometers. The titanium dioxide layer has a single-phase anatase structure. The titanium dioxide layer is directly disposed on a substrate comprised of glass, sapphire, or silicon. A solar cell includes a backing layer, a p-n junction layer, a metal-oxide layer, a top electrical layer and a contact layer. The backing layer includes a p-type semiconductor material. The p-n junction layer has a first side disposed on a front side of the backing layer. The metal-oxide layer includes an n-type titanium dioxide film having a thickness in the range of about 100 to about 1000 nanometers. The metal-oxide layer is disposed on a second side of the p-n junction layer. The top electrical layer is disposed on the metal-oxide layer, and the contact layer is disposed on a back side of the backing layer.
    Type: Grant
    Filed: November 5, 2009
    Date of Patent: August 9, 2011
    Assignee: Wayne State University
    Inventors: Ibrahim Abdullah Al-Homoudi, Golam Newaz, Gregory W. Auner
  • Patent number: 7989142
    Abstract: An exemplary method for fabricating a TFT array substrate includes providing an insulating substrate (201); coating a gate metal layer (202) on the substrate; forming a plurality of gate electrodes (212) using a first photo-mask process; forming a gate insulating layer (203), a semiconducting layer (205), and a source/drain metal layer (206) on the substrate having the gate electrodes; forming a plurality of source electrodes (217) and a plurality of drain electrodes (218) using a second photo-mask process; forming a passivation material layer (209) and a photo resist layer on the gate insulating layer, the source electrodes and the drain electrodes; forming a passivation layer (219) and the photo resist pattern (234) using a third photo-mask process; forming a transparent conductive metal layer (204) on the photo resist pattern, the drain electrode and the gate insulating layer; and forming a pixel electrode (214) through removing the photo resist pattern.
    Type: Grant
    Filed: March 19, 2007
    Date of Patent: August 2, 2011
    Assignee: Chimel Innolux Corporation
    Inventor: Jian-Jhong Fu