Abstract: Semiconductor package lid thermal interface material standoffs are disclosed and may include a substrate, a semiconductor die bonded to the substrate, a package lid bonded to the substrate and the semiconductor die thermal interface material in contact the semiconductor die, and standoffs that define a distance between the package lid and the substrate. The package lid may comprise thermal conducting material. The standoff may be within a portion of the thermal interface material. The package lid may provide a hermetic seal with the substrate. A passive device may be bonded to the substrate and covered by the package lid. A standoffs may also be formed on portions of the lid that are not in contact with the substrate. The standoff may be formed on four edges of the package lid. The standoff may comprise structures pressed into the lid.

Abstract: A microphone includes a base and a microelectromechanical system (MEMS) die mounted to the base. The microphone also includes an integrated circuit fixed to the base. The microphone further includes a lid mounted to the base that encloses the MEMS die and the integrated circuit within a cavity formed by the base and the lid. The lid has an indented portion extending into but not fully through the lid.

Abstract: Electronic device package technology is disclosed. In one example, an electronic device package can include a bottom surface and a side surface extending from the bottom surface. The side surface can be oriented at a non-perpendicular angle relative to the bottom surface. In another example, an electronic device package can include a top planar surface having a first area, a bottom planar surface having a second area, and a side surface extending between the top surface and the bottom surface. The second area can be larger than the first area. In yet another example, an electronic device package can include a substrate defining a plane, an electronic component disposed on the substrate, and a layer of material disposed about a lateral side of the electronic component. The layer of material can be oriented at an angle of less than 90 degrees relative to the plane.

Abstract: A display device including a plurality of semiconductor light emitting devices, each corresponding semiconductor light emitting device having a first conductive electrode, a second conductive electrode and a light-emitting surface configured to emit light; a first wiring line electrically connected to the first conductive electrode; and a second wiring line disposed to cross the first conductive electrode, and be electrically connected to the second conductive electrode. Further, the second wiring line is formed to surround a periphery of the light-emitting surface of the semiconductor light emitting devices to reflect light emitted by the light emitting devices toward a front surface of the display device.

Abstract: An integrated circuit structure includes a substrate, a photosensitive molding on a first side of the substrate, a via formed in the molding, and a conformable metallic layer deposited over the first side of the substrate and in the via. A through via may be formed through the substrate aligned with the via in the molding with an electrically conductive liner deposited in the through via in electrical contact with the conformable metallic layer. The integrated circuit structure may further include a connector element such as a solder ball on an end of the through via on a second side of the substrate opposite the first side. The integrated circuit structure may further include a die on the first side of the substrate in electrical contact with another through via or with a redistribution layer.

Abstract: Assemblies including a device layer of a silicon-on-insulator (SOI) substrate and a replacement substrate replacing a handle wafer of the SOI substrate, and methods for transferring the device layer of the SOI substrate from the handle wafer to the replacement substrate. A device structure is formed in a first section of the handle wafer, and a second section of the handle wafer adjoining the first section of the handle wafer is removed to expose a surface of the buried dielectric layer of the silicon-on-insulator substrate. A permanent substrate is attached to the surface of the buried dielectric layer. When the permanent substrate is attached to the surface of the buried dielectric layer, the section of the handle wafer is received inside a cavity defined in the permanent substrate.

Abstract: A method of fabricating a micro electro mechanical system (MEMS) structure includes providing a first substrate structure including a bonding pad structure. The bonding pad structure has at least one recess therein. A second substrate structure is provided and bonded with the bonding pad structure of the first substrate structure.

Abstract: A semiconductor structure and a method of fabricating the same. The semiconductor structure comprises: a layer element, one or more supporting elements disposed on a first surface of the layer element, and one or more anchoring elements disposed within the layer element and connected to the one or more supporting elements to couple the one or more supporting elements to the layer element to strengthen the layer element.

Abstract: A light-emitting element according to the present invention includes a semiconductor light-emitting element having a front surface and a rear surface so that light is extracted from the rear surface, and having a first n-side electrode and a first p-side electrode on the front surface, and a support element having a conductive substrate having a front surface and a rear surface as well as a second n-side electrode and a second p-side electrode formed on the front surface of the conductive substrate, the first n-side electrode and the second n-side electrode, and the first p-side electrode and the second p-side electrode are so bonded to one another respectively that the semiconductor light-emitting element is supported by the support element in a facedown posture downwardly directing the front surface, and the support element has an n-side external electrode and a p-side external electrode formed on the rear surface of the conductive substrate, a conductive via passing through the conductive substrate from th

Abstract: The present invention is directed to a liquid and solid phase power connect for packaging of an electrical device using a using a phase changing metal. The phase changing metal transitions back and forth between a liquid phase and a solid phase while constantly maintaining connection to the electrical device. The packaging uses a substrate, a restraining housing, and a lid to encase an electrical contact on the electrical device and restrain the phase changing metal. In one embodiment, the entire electrical device is encased and a voltage isolator is utilized to limit the contact areas between the phase changing metal and the electrical device. A method for relieving contact stress by transitioning the phase changing metal from a solid to a liquid is also taught.

Abstract: A sensing module is provided. The sensing module includes a sensing device. The sensing device includes a first substrate having a first surface and a second surface opposite thereto. The sensing device also includes a sensing region adjacent to the first surface and a conducting pad on the first surface. The sensing device further includes a redistribution layer on the second surface and electrically connected to the conducting pad. The sensing module also includes a second substrate and a cover plate bonded to the sensing device so that the sensing device is between the second substrate and the cover plate. The conducting pad is electrically connected to the second substrate through the redistribution layer. The sensing module further includes an encapsulating layer filled between the second substrate and the cover plate to surround the sensing device.

Abstract: A wafer-level packaged optical subassembly includes: a substrate element, the substrate element including a top layer and a base layer being bonded with the top layer; a top window cover being bonded with the top layer of the substrate element; and a plurality of active optoelectronic elements disposed within the substrate element. At least one primary cavity is defined in the substrate element by the top layer and the base layer, and configured for accommodating the active optoelectronic elements. A plurality of peripheral cavities are defined around the at least one primary cavity as alignment features for external opto-mechanical parts.

Abstract: A heat dissipation package structure includes a substrate, a chip disposed on the substrate and a heat dissipation sheet. The heat dissipation sheet comprises a covering portion disposed on a back surface of the chip, a first lateral covering portion disposed on a first lateral surface of the chip and a first conducting portion disposed on the substrate. The back surface comprises a first width, the covering portion comprises a second width, the chip comprises a thickness, and there is an interval between the chip and the substrate. The second width is not larger than summation of the first width, double the interval and double the thickness for making the chip disposed between the heat dissipation sheet and the substrate is not within a completely sealed space so as to prevent the heat dissipation sheet from deformation and separation from the chip or the substrate cause of air expansion.

Abstract: A method of making a magnetoresistive structure is disclosed. The method includes forming a pillar structure including a magnetic tunnel junction on a substrate that includes a first electrode, depositing a stressed layer onto a pillar structure sidewall, and depositing a second electrode above the magnetic tunnel junction.

Abstract: The present disclosure relates to a method of gettering that provides for a high efficiency gettering process by increasing an area in which a getter layer is deposited, and an associated apparatus. In some embodiments, the method is performed by providing a substrate into a processing chamber having one or more residual gases. A cavity is formed within a top surface of the substrate. The cavity has a bottom surface and sidewalls extending from the bottom surface to the top surface. A getter layer, which absorbs the one or more residual gases, is deposited over the substrate at a position extending from the bottom surface of the cavity to a location on the sidewalls. By depositing the getter layer to extend to a location on the sidewalls of the cavity, the area of the substrate that is able to absorb the one or more residual gases is increased.

Abstract: An integrated circuit packaging structure comprises at least one Micro Electrical Mechanical Systems (MEMS) gyroscope die mounted directly on a multi-layer flexible substrate having at least one metal layer and wire-bonded to the flexible substrate and a lid or die coating protecting the MEMS die and wire bonds.

Abstract: An electronic device is provided, which includes an electronic element and a heat dissipating element disposed on the electronic element through a thermal conductor, wherein a width of the thermal conductor is smaller than a width of the electronic element. The thermal conductor includes silver to thereby greatly increase the thermal conductivity of the thermal conductor and hence improve the thermal conduction efficiency of the electronic device.

Abstract: According to an embodiment of the present invention, a chip package is provided. The chip package includes a substrate. A chip is disposed on the substrate. A stiffener is disposed on the substrate. The thermal conductivity of the stiffener is higher than the thermal conductivity of the substrate.

Abstract: A method of making a magnetoresistive structure is disclosed. The method includes forming a pillar structure including a magnetic tunnel junction on a substrate that includes a first electrode, depositing a stressed layer onto a pillar structure sidewall, and depositing a second electrode above the magnetic tunnel junction.

Abstract: Various implementations relating to an illumination package including an edge-emitting laser diode (EELD) are disclosed. In one embodiment, an illumination package includes a heat spreader including a base and a stub that extends from the base, an EELD configured to generate illumination light, the EELD being mounted to a side surface of the stub, and a substrate coupled to the base at a location spaced from the EELD, the substrate being electrically connected to the EELD.

Abstract: A system and method for forming a wafer level package. In one example, a substrate used in the wafer level package includes a surface defined by a wafer level package (WLP) region and an external region, and a layer of getter material is disposed on at least a portion of the external region. According to one embodiment, the external region comprises a saw-to-reveal (STR) region of the wafer.

Abstract: A package includes a base portion, and a lid which is placed on the base portion to define an inner space with the base portion and has a metal plate layer and a brazing material layer that is laminated on the metal plate layer, in which the base portion has a metalized layer which is joined with the brazing material layer around the inner space in a plane view, and the brazing material layer has a protrusion which protrudes in a opposite direction of the base portion on an outer peripheral side surface of the metal plate layer.

Abstract: An optical filter device includes a variable wavelength interference filter having a stationary substrate, a movable substrate, a stationary reflecting film, and a movable reflecting film, and a housing adapted to house the variable wavelength interference filter therein. The housing has a base substrate, a lid bonded to the base substrate, and forming an internal space between the base substrate and the lid, and a lid-side glass substrate adapted to block a light passage hole provided to the lid. Further, the lid-side glass substrate has a substrate edge located outside the outer peripheral edge of the light passage hole, and is bonded to the lid in an area extending from the outer peripheral edge of the light passage hole to the substrate edge.

Abstract: The present invention provides a packaging method of a substrate and a packaging structure. The method includes: (1) providing a substrate and a packaging cover plate; (2) coating a loop of first enclosing resin on the packaging cover plate; (3) coating a loop of second enclosing resin on an external circumferential area of the first enclosing resin on the packaging cover plate; (4) laminating the packaging cover plate and the substrate together; (5) applying ultraviolet (UV) light to irradiate the first enclosing resin and the second enclosing resin for curing; and (6) carrying out cutting operations on the substrate and the packaging cover plate to remove portions of the substrate and the packaging cover plate that contact the second enclosing resin so as to achieve packaging of the substrate with the packaging cover plate.

Abstract: The present disclosure relates to a structure and method of forming a MEMS-CMOS integrated circuit with an outgassing barrier and a stable electrical signal path. An additional poly or metal layer is embedded within the MEMS die to prevent outgassing from the CMOS die. Patterned conductors formed by a damascene process and a direct bonding between the two dies provide a stable electrical signal path.

Abstract: An electronic device comprising a substrate, a cover delimiting at least a part of a main surface of the substrate to thereby form a cover-substrate arrangement enclosing a hollow space and having a through hole, an electroacoustic transducer configured for converting between an electric signal and an acoustic signal and being mounted on the substrate acoustically coupled with the hollow space in such a way that the hollow space constitutes a back volume of the electroacoustic transducer, wherein the electroacoustic transducer provides an acoustical coupling between the hollow space and an exterior of the cover-substrate arrangement via the through hole, an electronic chip mounted within the cover-substrate arrangement and electrically coupled with the electroacoustic transducer for communicating electric signals between the electronic chip and the electroacoustic transducer, and at least one electronic member mounted on the substrate within the cover-substrate arrangement and configured for providing an elec

Abstract: The semiconductor device has insulating films 40, 42 formed over a substrate 10; an interconnection 58 buried in at least a surface side of the insulating films 40, 42; insulating films 60, 62 formed on the insulating film 42 and including a hole-shaped via-hole 60 and a groove-shaped via-hole 66a having a pattern bent at a right angle; and buried conductors 70, 72a buried in the hole-shaped via-hole 60 and the groove-shaped via-hole 66a. A groove-shaped via-hole 66a is formed to have a width which is smaller than a width of the hole-shaped via-hole 66. Defective filling of the buried conductor and the cracking of the inter-layer insulating film can be prevented. Steps on the conductor plug can be reduced. Accordingly, defective contact with the upper interconnection layer and the problems taking place in forming films can be prevented.

Abstract: A Microelectromechanical System (MEMS) microphone includes a base printed circuit board (PCB), the base PCB having customer pads; at least one wall coupled to the base; a lid PCB coupled to the at least wall, the lid having a port extending there through; an electrically conductive through-hole via extending through the wall electrically connecting the lid PCB to the base PCB; an integrated circuit embedded in the lid and coupled to the electrically conductive through-hole via; and a micro electro mechanical system (MEMS) device coupled to the integrated circuit in the lid and disposed over the port. Sound energy is converted to an electrical signal by the MEMS device and transmitted to the integrated circuit. The integrated circuit processes the signals and sends the processed signals to the customer pads via the electrically conductive through-hole via.

Abstract: Die (110) are attached to an interposer (420), and the interposer/die assembly is placed into a lid cavity (510). The lid (210) is attached to the top of the assembly, possibly to the encapsulant (474) at the top. The lid's legs (520) surround the cavity and extend down below the top surface of the interposer's substrate (420S), possibly to the level of the bottom surface of the substrate or lower. The legs (520) may or may not be attached to the interposer/die assembly. In fabrication, the interposer wafer (420SW) has trenches (478) which receive the lid's legs during the lid placement. The interposer wafer is later thinned to remove the interposer wafer portion below the legs and to dice the interposer wafer. The thinning process also exposes, on the bottom, conductive vias (450) passing through the interposer substrate. Other features are also provided.

Abstract: A microelectromechanical system (MEMS) microphone assembly includes a base and a cover. The cover is coupled to the base and together with the base defines a cavity. The base forms a recess and the recess has dimensions and a shape so as to hold a MEMS die. The MEMS die includes a diaphragm and back plate.

Abstract: An electronic device may include an integrated circuit (IC), electrically conductive connectors coupled to the IC, and a heat sink layer adjacent the IC and opposite the electrically conductive connectors. The electronic device may include an encapsulation material surrounding the IC and the electrically conductive connectors, a redistribution layer having electrically conductive traces coupled to the electrically conductive connectors, a stiffener between the heat sink layer and the redistribution layer, and a fan-out component between the heat sink layer and the redistribution layer and being in the encapsulation material.

Abstract: A method of fabricating electrical connections in an integrated MEMS device is disclosed. The method comprises providing a MEMS substrate which includes forming one or more cavities in a first semiconductor layer; forming a second semiconductor layer; and providing a dielectric layer between the first semiconductor layer and the second semiconductor layer The MEMS substrate providing step further includes bonding the first semiconductor layer to a second semiconductor layer; etching at least one via through the second semiconductor layer and the dielectric layer; and depositing a first conductive material onto the second semiconductor layer surface and filling the at least one via.

Abstract: The present invention relates to a method and apparatus for an isolating structure. Embodiments of the present invention provide a robust packaging process and a mechanical filter to reduce the mechanical shock from impact. The mechanical filter can be integrated within the package substrate as part of the packaging process, reducing the assembly complexity.

Abstract: The semiconductor device has insulating films 40, 42 formed over a substrate 10; an interconnection 58 buried in at least a surface side of the insulating films 40, 42; insulating films 60, 62 formed on the insulating film 42 and including a hole-shaped via-hole 60 and a groove-shaped via-hole 66a having a pattern bent at a right angle; and buried conductors 70, 72a buried in the hole-shaped via-hole 60 and the groove-shaped via-hole 66a. A groove-shaped via-hole 66a is formed to have a width which is smaller than a width of the hole-shaped via-hole 66. Defective filling of the buried conductor and the cracking of the inter-layer insulating film can be prevented. Steps on the conductor plug can be reduced. Accordingly, defective contact with the upper interconnection layer and the problems taking place in forming films can be prevented.

Abstract: An integrated circuit (IC) package includes an IC die having a first surface and a second surface opposite of the first surface. The IC package includes first contact members coupled to the second surface of the IC die. The IC package includes a bottom substrate having a first surface and a second surface opposite of the first surface, where the first surface of the bottom substrate is coupled to the second surface of the IC die via the first contact members. The IC package includes an interposer substrate coupled to the first surface of the IC die via an adhesive material, where the adhesive material is disposed on at least a surface of the interposer substrate. The IC package includes second contact members coupled along a periphery of the interposer substrate, where the interposer substrate is coupled to the first surface of the bottom substrate via the second contact members.

Abstract: A method for packaging a microelectromechanical system (MEMS) device with an integrated circuit die using through mold vias (TMVs) is provided. According to the method, a MEMS substrate having a MEMS device is provided. A cap substrate is secured to a top surface of the MEMS substrate. The cap substrate includes a recess corresponding to the MEMS device in a bottom surface of the cap substrate. An integrated circuit die is secured to a top surface of the cap substrate over the recess. A housing covering the MEMS substrate, the cap substrate, and the integrated circuit die is formed. A through mold via (TMV) electrically coupled with the integrated circuit die and extending between a top surface of the housing and the integrated circuit die is formed. The structure resulting from application of the method is also provided.

Abstract: A semiconductor device has a substrate. An insulating layer is formed over a surface of the substrate. A semiconductor die is mounted over the surface of the substrate. A channel is formed in the insulating layer around the semiconductor die. An underfill material is deposited between the semiconductor die and the substrate and in the channel. A heat spreader is mounted over the semiconductor die with the heat spreader thermally connected to the substrate. A thermal interface material is formed over the semiconductor die. The underfill material is deposited between the semiconductor die and the substrate along a first edge of the semiconductor die and along a second edge of the semiconductor die opposite the first edge. The channel extends partially through the insulating layer formed over the substrate with the insulating layer maintaining coverage over the substrate within a footprint of the channel.

Abstract: Integrated circuit packages with enhanced thermal conduction are disclosed. A disclosed integrated circuit package includes a package substrate. An integrated circuit die with a layer of metal on its backside is mounted on the package substrate at a first temperature (e.g., reflow temperature). The package further includes a heat spreading lid that is bonded to the integrated circuit die at a second temperature, which is less than the first temperature. The heat spreading lid is formed over the integrated circuit die in which the heat spreading lid makes physical contact with the integrated circuit die via the layer of metal.

Abstract: A sensor arrangement (10) has a vibration sensor (11), which includes a cable (13) and is free of a metal housing, and a holding device (12), which is joined detachably to the vibration sensor (11) and is configured and arranged to protect mechanically and fix in place the vibration sensor (11).

Abstract: A substrate structure and a device employing the same are disclosed. An embodiment of the disclosure provides the substrate structure including a flexible substrate and a first barrier layer. The flexible substrate has a top surface, a side surface, and a bottom surface. The first barrier layer is disposed on and contacting the top surface of the flexible substrate, wherein the first barrier layer consists of Si, N, and Z atoms, wherein the Z atom is selected from a group of H, C, and O atoms, and wherein Si of the first barrier layer is present in an amount from 35 to 42 atom %, N of the first barrier layer is present in an amount from 10 to 52 atom %, and Z of the first barrier layer is present in an amount from 6 to 48 atom %.

Abstract: A semiconductor device provided herewith includes a semiconductor substrate; a brazing material bonded to the semiconductor substrate; a heat sink connected to the semiconductor substrate via the brazing material and a resin. The heat sink includes a protruding portion formed outside of a range in which the heatsink is connected to the semiconductor substrate via the brazing material. The protruding portion is making contact with the brazing material. The resin seals the semiconductor substrate, the brazing material and the protruding portion.

Abstract: A method for manufacturing an interposer includes the following steps. Conductive beads is filled in a blind via of a substrate and a solder layer of each conductive bead is melted so as to form a solder post in the blind via. A metal ball of each conductive bead is inlaid in the corresponding solder post such that the solder post and the metal balls inlaid therein construct a conductive though via. Two surfaces of the substrate are planarized such that two ends of the conductive through via are exposed to the two surfaces of the substrate respectively and are flush with the two surfaces of the substrate respectively. A redistribution layer is manufactured at each surface of the substrate such that the two ends of each conductive through via connect the redistribution layers respectively. Besides, an interposer and a chip package structure applied the interposer are also provided.

Abstract: A display panel including: a first substrate; a second substrate opposing the first substrate; a sealing substructure on the first substrate, the sealing substructure surrounding a display unit having a plurality of pixels, the sealing substructure including a metal mesh layer having a mesh shape; and a sealing member between the sealing substructure and the second substrate to seal between the first substrate and the second substrate.

Abstract: A surface mount package for a micro-electro-mechanical system (MEMS) microphone die is disclosed. The surface mount package features a substrate with metal pads for surface mounting the package to a device's printed circuit board and for making electrical connections between the microphone package and the device's circuit board. The surface mount microphone package has a cover, and the MEMS microphone die is substrate-mounted and acoustically coupled to an acoustic port provided in the surface mount package. The substrate and the cover are joined together to form the MEMS microphone, and the substrate and cover cooperate to form an acoustic chamber for the substrate-mounted MEMS microphone die.

Abstract: A wiring substrate includes a first metal layer formed on a wiring layer; a solder resist layer that covers the wiring layer and the first metal layer, and is provided with an open portion that exposes a part of an upper surface of the first metal layer; a second metal layer formed on the upper surface of the first metal layer that is exposed within the open portion; and a third metal layer formed on the second metal layer, wherein the solder resist layer covers an outer peripheral portion of the upper surface of the first metal layer to expose the part of the upper surface of the first metal layer within the open portion, and wherein an upper surface of the second metal layer is flush with an upper surface of the solder resist layer or projects from the upper surface of the solder resist layer.

Abstract: An encapsulation structure comprising at least: a hermetically sealed cavity in which a micro-device is encapsulated, a substrate of which one face delimits one side of the cavity, at least two trenches formed through said face of the substrate, the interior volumes of each of the trenches communicating together, first portions of getter material covering at least in part side walls of the trenches without entirely filling the trenches, and completely covering the trenches at said face of the substrate, an opening formed through one of the first portions of getter material or through the substrate and making the interior volumes of the trenches communicate with an interior volume of the cavity.

Abstract: A method of manufacturing an electronic device in which an inner space for housing a gyro element is formed between a base and a lid and the base and the lid are bonded includes bonding the base and the lid in which a groove is provided on a surface to be bonded with the base so that the inner space communicates with the outside by not bonding the inner surface of the groove to the base and to position the groove around a concave portion provided on a side surface of the base, and closing a communication portion by irradiating a laser beam to the lid in the communication portion.

Abstract: Disclosed is a chip and method of forming the chip with improved conductive pads that allow for flexible C4 connections with a chip carrier or with another integrated circuit chip. The pads have a three-dimensional geometric shape (e.g., a pyramid or cone shape) with a base adjacent to the surface of the chip, a vertex opposite the base and, optionally, mushroom-shaped cap atop the vertex. Each pad can include a single layer of conductive material or multiple layers of conductive material (e.g., a wetting layer stacked above a non-wetting layer). The pads can be left exposed to allow for subsequent connection to corresponding solder bumps on a chip carrier or a second chip. Alternatively, solder balls can be positioned on the conductive pads to allow for subsequent connection to corresponding solder-paste filled openings on a chip carrier or a second chip.

Abstract: A sensor includes a circuit board, a wiring connection layer, a sensor element, and a conductive post. The circuit board has a first electrode. The wiring connection layer has second and third electrodes. The second electrode is connected to the first electrode. The sensor element has a fourth electrode. The conductive post connects the third electrode electrically with the fourth electrode. This sensor can be driven efficiently.

Abstract: The semiconductor device has insulating films 40, 42 formed over a substrate 10; an interconnection 58 buried in at least a surface side of the insulating films 40, 42; insulating films 60, 62 formed on the insulating film 42 and including a hole-shaped via-hole 60 and a groove-shaped via-hole 66a having a pattern bent at a right angle; and buried conductors 70, 72a buried in the hole-shaped via-hole 60 and the groove-shaped via-hole 66a. A groove-shaped via-hole 66a is formed to have a width which is smaller than a width of the hole-shaped via-hole 66. Defective filling of the buried conductor and the cracking of the inter-layer insulating film can be prevented. Steps on the conductor plug can be reduced. Accordingly, defective contact with the upper interconnection layer and the problems taking place in forming films can be prevented.