Cap Or Lid Patents (Class 257/704)
  • Patent number: 8779570
    Abstract: A stackable integrated circuit package system including mounting an integrated circuit device over a package carrier, mounting a stiffener over the package carrier and mounting a mountable package carrier over the stiffener with a vertical gap between the integrated circuit device and the mountable package carrier.
    Type: Grant
    Filed: March 19, 2008
    Date of Patent: July 15, 2014
    Assignee: STATS ChipPAC Ltd.
    Inventors: Seong Bo Shim, TaeWoo Kang, Yong Hee Kang
  • Patent number: 8780569
    Abstract: An electrical assembly having controlled impedance signal traces and a portable electronic device comprising an electrical assembly having controlled impedance signal traces are provided. In accordance with one embodiment, there is provided a portable electronic device, comprising an electrical assembly, comprising: a chassis made from a conductive material and forming a first ground plane; a first dielectric substrate layer overlaying the chassis; a first signal trace overlaying the first dielectric substrate layer; and a second dielectric layer overlaying the first signal trace.
    Type: Grant
    Filed: August 8, 2012
    Date of Patent: July 15, 2014
    Assignee: BlackBerry Limited
    Inventors: Eric Gary Malo, Cameron Russell Steeves, Hassan Daniel Hosseinpor
  • Patent number: 8780561
    Abstract: A method of forming a heat-dissipating structure for semiconductor circuits is provided. First and second semiconductor integrated circuit (IC) chips are provided, where the first and second semiconductor chips each have first and second opposing sides, wherein the first and second semiconductor IC chips are configured to be fixedly attached to a top surface of a substantially planar circuit board along their respective first sides. The respective second opposing sides of each of the first and second semiconductor IC chips are coupled to first and second respective portions of a sacrificial thermal spreader material, the sacrificial thermal spreader material comprising a material that is thermally conductive. The first and second portions of the sacrificial thermal spreader material are planarized to substantially equalize a respective first height of the first semiconductor chip and a respective second height of the second semiconductor chip.
    Type: Grant
    Filed: March 30, 2012
    Date of Patent: July 15, 2014
    Assignee: Raytheon Company
    Inventors: Paul A. Danello, Richard A. Stander, Michael D. Goulet
  • Patent number: 8772931
    Abstract: An electronic circuit in a package, including two functions, the package orientation activating a single one of the two functions.
    Type: Grant
    Filed: July 17, 2012
    Date of Patent: July 8, 2014
    Assignee: STMicroelectronics (Rousset) SAS
    Inventor: François Tailliet
  • Patent number: 8765530
    Abstract: The present invention relates to a surface mount package for a silicon condenser microphone and methods for manufacturing the surface mount package. The surface mount package uses a limited number of components which simplifies manufacturing and lowers costs, and features a substrate that performs functions for which multiple components were traditionally required, including providing an interior surface on which the silicon condenser die is mechanically attached, providing an interior surface for making electrical connections between the silicon condenser die and the package, and providing an exterior surface for surface mounting the package to a device's printed circuit board and for making electrical connections between package and the device's printed circuit board.
    Type: Grant
    Filed: March 15, 2013
    Date of Patent: July 1, 2014
    Assignee: Knowles Electronics, LLC
    Inventor: Anthony D. Minervini
  • Patent number: 8754519
    Abstract: According to one embodiment, a package for housing semiconductor element includes: a base plate including a top surface and a recessed portion formed as a downwardly-recessed portion of the top surface; a peripheral wall provided on the top surface of the base plate; a lid provided on an upper side of the peripheral wall and forming a semiconductor element housing space in cooperation with the base plate and the peripheral wall; and a feed-through terminal including a bottom end and fixed to the recessed portion so that the bottom end is located at a lower position than the top surface of the base plate except the recessed portion.
    Type: Grant
    Filed: December 27, 2010
    Date of Patent: June 17, 2014
    Assignee: Kabushiki Kaisha Toshiba
    Inventor: Tsuyoshi Hasegawa
  • Patent number: 8754520
    Abstract: A microelectronic substrate which includes a dielectric layer overlying a semiconductor region of a substrate, the dielectric layer having an exposed top surface; a plurality of metal lines of a first metal disposed within the dielectric layer, each metal line having edges and a surface exposed at the top surface of the dielectric layer; a dielectric cap layer having a first portion overlying the surfaces of the metal lines and a second portion overlying the dielectric layer between the metal lines, the first portion has a first height above the surface of the dielectric layer, and the second portion has a second height above the surface of the dielectric layer, the second height being greater than the first height; and an air gap disposed between the metal lines, the air gap underlying the second portion of the cap layer.
    Type: Grant
    Filed: January 25, 2013
    Date of Patent: June 17, 2014
    Assignee: International Business Machines Corporation
    Inventors: Takeshi Nogami, Shyng-Tsong Chen, David V. Horak, Son V. Nguyen, Shom Ponoth, Chih-Chao Yang
  • Publication number: 20140151869
    Abstract: A system and method for controlling temperature of a MEMS sensor are disclosed. In a first aspect, the system comprises a MEMS cap encapsulating the MEMS sensor and a CMOS die vertically arranged to the MEMS cap. The system includes a heater integrated into the MEMS cap. The integrated heater is activated to control the temperature of the MEMS sensor. In a second aspect, the method comprises encapsulating the MEMS sensor with a MEMS cap and coupling a CMOS die to the MEMS cap. The method includes integrating a heater into the MEMS cap. The integrated heater is activated to control the temperature of the MEMS sensor.
    Type: Application
    Filed: February 10, 2014
    Publication date: June 5, 2014
    Applicant: INVENSENSE, INC.
    Inventors: Goksen G. YARALIOGLU, Martin LIM
  • Patent number: 8742564
    Abstract: An embodiment of the invention provides a chip package which includes a substrate having a first surface and a second surface; a conducting pad structure located on the first surface; a dielectric layer located on the first surface of the substrate and the conducting pad structure, wherein the dielectric layer has an opening exposing a portion of the conducting pad structure; and a cap layer located on the dielectric layer and filled into the opening.
    Type: Grant
    Filed: January 13, 2012
    Date of Patent: June 3, 2014
    Inventors: Bai-Yao Lou, Tsang-Yu Liu, Chia-Sheng Lin, Tzu-Hsiang Hung
  • Patent number: 8736045
    Abstract: A method of forming a wafer level packaged circuit device includes forming a device wafer, the device wafer including a first group of one or more material layers left remaining in a first region of a substrate of the device wafer; and forming a cap wafer configured to be attached to the device wafer, the cap wafer including a second group of one or more material layers left remaining in a second region of a substrate of the cap wafer; wherein a combined thickness of the first and second groups of one or more material layers defines an integrated bond gap control structure upon bonding of the device wafer and the cap wafer.
    Type: Grant
    Filed: November 2, 2012
    Date of Patent: May 27, 2014
    Assignee: Raytheon Company
    Inventors: Roland Gooch, Buu Diep, Thomas Allan Kocian, Stephen H. Black, Allan M. Kennedy
  • Patent number: 8736040
    Abstract: According to an exemplary embodiment, a bondwireless power module includes a common output pad coupling an emitter/anode node of a high side device to a collector/cathode node of a low side device. The bondwireless power module also includes a high side conductive clip connecting a collector of the high side device to a cathode of the high side device, and causing current to traverse through the high side conductive clip to another high side conductive clip in another power module. The bondwireless power module further includes a low side conductive clip connecting an emitter of the low side device to an anode of the low side device, and causing current to traverse through the low side conductive clip to another low side conductive clip in the another power module. The bondwireless power module can be a motor drive inverter module.
    Type: Grant
    Filed: January 4, 2013
    Date of Patent: May 27, 2014
    Assignee: International Rectifier Corporation
    Inventors: Henning M. Hauenstein, Andrea Gorgerino
  • Patent number: 8736044
    Abstract: To minimize the warpage of an organic substrate that supports at least one electrical hardware component (e.g., a system-in-package module), a bottom surface of a lid is attached to a top surface of the electrical hardware component. The lid includes a leg that extends from the bottom surface of the lid towards a top surface of the substrate. A portion of the leg closest to the substrate may move relative to the substrate. As the lid warps, the lid does not also cause distortion of the substrate. The leg may be a flange that extends at least a portion of the width or at least a portion of the length of the lid, may be a post located at the perimeter of the lid, or may be any other portion extending from above the electrical component towards the substrate.
    Type: Grant
    Filed: July 26, 2010
    Date of Patent: May 27, 2014
    Assignee: Cisco Technology, Inc.
    Inventors: Mudasir Ahmad, Kuo-Chuan Liu, Mohan Nagar, Bangalore Shanker
  • Patent number: 8729695
    Abstract: In an embodiment, a wafer level package may be provided. The wafer level package may include a device wafer including a MEMS device, a cap wafer disposed over the device wafer, at least one first interconnect disposed between the device wafer and the cap wafer and configured to provide an electrical connection between the device wafer and the cap wafer, and a conformal sealing ring disposed between the device wafer and the cap wafer and configured to surround the at least one first interconnect and the MEMS device so as to provide a conformally sealed environment for the at least one first interconnect and the MEMS device, wherein the conformal sealing ring may be configured to conform to a respective suitable surface of the device wafer and the cap wafer when the device wafer may be bonded to the cap wafer. A method of forming a wafer level package may also be provided.
    Type: Grant
    Filed: September 25, 2009
    Date of Patent: May 20, 2014
    Assignees: Agency for Science, Technology and Research, Seiko Instruments, Inc.
    Inventors: Chirayarikathu Veedu Sankarapillai Premachandran, Rakesh Kumar, Nagarajan Ranganathan, Won Kyoung Choi, Ebin Liao, Yasuyuki Mitsuoka, Hiroshi Takahashi, Ryuta Mitsusue
  • Patent number: 8728866
    Abstract: A method for manufacturing a semiconductor device comprises: forming a circuit pattern and a first metal film on a first major surface of a body wafer; forming a through-hole penetrating the body wafer from a second major surface of the body wafer and reaching the first metal film; forming a second metal film on a part of the second major surface of the body wafer, on an inner wall of the through-hole, and on the first metal film exposed in the through-hole; forming a recess on a first major surface of a lid wafer; forming a third metal film on the first major surface of the lid wafer including inside the recess of the lid wafer; with the recess facing the circuit pattern, and the first metal film contacting the third metal film, joining the lid wafer to the body wafer; and dicing the joined body wafer and lid wafer along the through-hole.
    Type: Grant
    Filed: April 4, 2011
    Date of Patent: May 20, 2014
    Assignee: Mitsubishi Electric Corporation
    Inventors: Ko Kanaya, Yoshihiro Tsukahara, Shinsuke Watanabe
  • Publication number: 20140117527
    Abstract: One embodiment of the present invention sets forth an integrated circuit package that includes a substrate, one or more devices mounted on the substrate, and a lid having a top portion and an end portion and configured to encapsulate the one or more devices. The top portion is thinner than the end portion. One advantage of the disclosed design is that the overall height of an IC package may be reduced without significantly impacting the structural integrity or co-planarity of the IC package.
    Type: Application
    Filed: November 1, 2012
    Publication date: May 1, 2014
    Applicant: NVIDIA CORPORATION
    Inventors: Leilei Zhang, Zuhair Bokharey
  • Patent number: 8704360
    Abstract: The present invention relates to a surface mount package for a silicon condenser microphone and methods for manufacturing the surface mount package. The surface mount package uses a limited number of components which simplifies manufacturing and lowers costs, and features a substrate that performs functions for which multiple components were traditionally required, including providing an interior surface on which the silicon condenser die is mechanically attached, providing an interior surface for making electrical connections between the silicon condenser die and the package, and providing an exterior surface for surface mounting the package to a device's printed circuit board and for making electrical connections between package and the device's printed circuit board.
    Type: Grant
    Filed: December 31, 2012
    Date of Patent: April 22, 2014
    Assignee: Knowles Electronics, LLC
    Inventor: Anthony D. Minervini
  • Patent number: 8703286
    Abstract: Embodiments of the present invention provide various polymeric matrices that may be used as a binder matrix for polymer solder hybrid thermal interface materials. In alternative embodiments the binder matrix material may be phophozene, perfluoro ether, polyether, or urethane. For one embodiment, the binder matrix is selected to provide improved adhesion to a variety of interfaces. For an alternative embodiment the binder matrix is selected to provide low contact resistance. In alternative embodiments, polymeric materials containing fusible and non-fusible particles may be used in application where heat removal is desired and is not restricted to thermal interface materials for microelectronic devices.
    Type: Grant
    Filed: April 20, 2011
    Date of Patent: April 22, 2014
    Assignee: Intel Corporation
    Inventors: Saikumar Jayaraman, Paul A. Koning, Ashay Dani
  • Patent number: 8703540
    Abstract: A method of packaging one or more semiconductor dies includes: providing a first die having a circuit surface and a connecting surface; providing a chip-scale frame having an inside surface and an outside surface, the chip-scale frame having a well region having an opening in the inside surface; coupling the first die to a wall of the well region using a first coupling mechanism for electrical and mechanical coupling; providing a substrate having a top surface and a bottom surface; coupling the inside surface of the chip-scale frame with the top surface of the substrate by a second coupling mechanism, wherein a gap is provided between the circuit surface of the first die and the top surface of the substrate; coupling a heat sink to the outside surface of the chip-scale frame; attaching a lid to the chip-scale frame to form a substantially airtight chamber around the first die.
    Type: Grant
    Filed: January 15, 2013
    Date of Patent: April 22, 2014
    Assignee: Semtech Corporation
    Inventors: Andrew J. Bonthron, Darren Jay Walworth
  • Publication number: 20140103518
    Abstract: A structure and method for air cavity packaging, the structure comprises a carrier having plural die pads and leads, plural dies, plural wires, plural walls, and a lid. The dies are mounted on the die pads. The wires electrically connect the dies to the leads. The plural walls are disposed on the carrier and form plural cavities in a way that each cavity contains at least one die pad and plural leads, and each wall is provided with at least one air vent for exhausting air to the outside. The lid is attached on the plural walls via an adhesive agent to seal the plural air cavities, so that the plural connected air cavity packages are formed.
    Type: Application
    Filed: February 6, 2013
    Publication date: April 17, 2014
    Applicant: WIN Semiconductors Corp.
    Inventors: Zi-Hong FU, Sung-Mao YANG, Chun-Ting CHU, Wen-Ching HSU
  • Patent number: 8697490
    Abstract: A flip chip interconnection structure is formed by mechanically interlocking joining surfaces of a first and second element. The first element, which may be a bump on an integrated circuit chip, includes a soft, deformable material with a low yield strength and high elongation to failure. The surface of the second element, which may for example be a substrate pad, is provided with asperities into which the first element deforms plastically under pressure to form the mechanical interlock.
    Type: Grant
    Filed: July 1, 2011
    Date of Patent: April 15, 2014
    Assignee: STATS ChipPAC, Ltd.
    Inventor: Rajendra D. Pendse
  • Patent number: 8698258
    Abstract: A microelectronic device structure including increased thermal dissipation capabilities. The structure including a three-dimensional (3D) integrated chip assembly that is flip chip bonded to a substrate. The chip assembly including a device substrate including an active device disposed thereon. A cap layer is physically bonded to the device substrate to at least partially define a hermetic seal about the active device. The microelectronic device structure provides a plurality of heat dissipation paths therethrough to dissipate heat generated therein.
    Type: Grant
    Filed: September 30, 2011
    Date of Patent: April 15, 2014
    Assignee: General Electric Company
    Inventors: Kaustubh Ravindra Nagarkar, Christopher Fred Keimel
  • Patent number: 8698287
    Abstract: A semiconductor device, in which a control circuit board is mountable outside a sheath case and a power semiconductor element is placeable inside the sheath case, includes a metal step support, a shield plate and a metal ring. The support includes a base portion implanted in the sheath case, a connection portion which extends from an end of the base portion, and a step portion formed at a boundary between the base portion and the connection portion. The shield plate is disposed over the step portion such that the connection portion of the support pierces the shield plate. An end of the metal ring protrudes from an end of the connection portion over the shield plate. The semiconductor device is adapted such that the control circuit board is mounted over the protruded end of the metal ring and is fixed onto the connection portion by an engagement member.
    Type: Grant
    Filed: June 9, 2010
    Date of Patent: April 15, 2014
    Assignee: Fuji Electric Co., Ltd.
    Inventor: Shin Soyano
  • Patent number: 8700108
    Abstract: A mobile wireless communications device may include a housing, an antenna carried by the housing, and a circuit board carried by the housing. The mobile wireless communications device may also include a power amplifier carried by the circuit board, an antenna switch carried by the circuit board and configured to selectively couple the power amplifier to the antenna, a first radio frequency (RF) shield covering the power amplifier and the antenna switch, and a second RF shield within the first RF shield and covering the antenna switch.
    Type: Grant
    Filed: October 13, 2010
    Date of Patent: April 15, 2014
    Assignee: BlackBerry Limited
    Inventors: Prabhu V. Patil, Roberto Gautier, Paul Brian Koch, Adrian Piseu Davis, Nirajkumar Patel
  • Patent number: 8686555
    Abstract: A system and method for controlling temperature of a MEMS sensor are disclosed. In a first aspect, the system comprises a MEMS cap encapsulating the MEMS sensor and a CMOS die vertically arranged to the MEMS cap. The system includes a heater integrated into the MEMS cap. The integrated heater is activated to control the temperature of the MEMS sensor. In a second aspect, the method comprises encapsulating the MEMS sensor with a MEMS cap and coupling a CMOS die to the MEMS cap. The method includes integrating a heater into the MEMS cap. The integrated heater is activated to control the temperature of the MEMS sensor.
    Type: Grant
    Filed: June 19, 2012
    Date of Patent: April 1, 2014
    Assignee: Invensense, Inc.
    Inventors: Goksen G. Yaralioglu, Martin Lim
  • Patent number: 8680669
    Abstract: An electronic component includes a unit including an electronic device; and an opposite member opposing the electronic device, wherein the unit and the opposite member are bonded together with an adhering member disposed between the unit and the opposite member and having light-cured resin and inorganic particles dispersed in the light-cured resin; and wherein in a particle-diameter distribution of the inorganic particles by volume, a particle diameter having a cumulative value of distribution of 50 is 0.5 ?m or more, and a particle diameter having a cumulative value of distribution of 90% is 5.0 ?m or less.
    Type: Grant
    Filed: September 27, 2012
    Date of Patent: March 25, 2014
    Assignee: Canon Kabushiki Kaisha
    Inventors: Yasushi Kurihara, Koji Tsuduki, Hiroaki Kobayashi
  • Patent number: 8680672
    Abstract: A semiconductor package is provided for carrying a sleeve member and a fan wheel axially coupled to the sleeve member so as to provide a heat dissipating function. The semiconductor package includes: a substrate; a coil module and at least an electronic component disposed on the substrate; and an encapsulant formed on the substrate for encapsulating the coil module and the electronic component so as to prevent the coil module and the electronic component from disturbing air flow generated by the fan wheel during operation, thereby avoiding generation of noises or vibrations.
    Type: Grant
    Filed: March 23, 2012
    Date of Patent: March 25, 2014
    Assignee: Amtek Semiconductors Co., Ltd.
    Inventor: Hsiang-Wei Tseng
  • Publication number: 20140077352
    Abstract: A method and apparatus are provided for manufacturing a lead frame based thermally enhanced flip chip package with an exposed heat spreader lid array (310) designed for direct attachment to an array of integrated circuit die (306) by including a thermal interface adhesion layer (308) to each die (306) and encapsulating the attached heat spreader lid array (310) and array of integrated circuit die (306) with mold compound (321) except for planar upper lid surfaces of the heat spreader lids (312).
    Type: Application
    Filed: September 14, 2012
    Publication date: March 20, 2014
    Inventors: George R. Leal, Tim V. Pham
  • Patent number: 8674498
    Abstract: An MEMS package is proposed, wherein a chip having MEMS structures on its top side is connected to a rigid covering plate and a frame structure, which comprises a polymer, to form a sandwich structure in such a way that a closed cavity which receives the MEMS structures is formed. Solderable or bondable electrical contact are arranged on the rear side of the chip or on the outer side of the covering plate which faces away from the chip, and are electrically conductively connected to at least one connection pad by means of an electrical connection structure.
    Type: Grant
    Filed: December 4, 2008
    Date of Patent: March 18, 2014
    Assignee: Epcos AG
    Inventors: Gregor Feiertag, Hans Krüger, Alexander Schmajew
  • Publication number: 20140061891
    Abstract: Disclosed herein are a semiconductor chip package and a manufacturing method thereof. The manufacturing method of the semiconductor chip package includes: a) mounting a semiconductor chip on a printed circuit board (PCB); b) inserting a warpage suppressing reinforcement member into an inner ceiling of a mold manufactured in order to package the PCB having the semiconductor chip mounted thereon; c) combining the mold having the warpage suppressing reinforcement member inserted into the ceiling thereof with the upper surface of the PCB so as to surround the PCB having the semiconductor chip mounted thereon; d) injection-molding and filling a molding material in the mold, and hardening the molding material by applying heat, and e) hardening the molding material and then removing the mold to complete the semiconductor chip package.
    Type: Application
    Filed: March 13, 2013
    Publication date: March 6, 2014
    Applicant: Samsung Electro-Mechanics Co., Ltd.
    Inventors: Po Chul KIM, Kyung Ho Lee, Seung Wan Woo, Young Nam Hwang, Suk Jin Ham
  • Publication number: 20140061892
    Abstract: A packaged device, wherein at least one sensitive portion of a chip is enclosed in a chamber formed by a package. The package has an air-permeable area having a plurality of holes and a liquid-repellent structure so as to enable passage of air between an external environment and the chamber and block the passage of liquids.
    Type: Application
    Filed: August 29, 2013
    Publication date: March 6, 2014
    Applicant: STMicroelectronics S.r.l.
    Inventors: Federico Giovanni Ziglioli, Fulvio Vittorio Fontana, Luca Maggi
  • Patent number: 8664683
    Abstract: A method for providing, on a carrier (40), an insulative spacer layer (26) which is patterned such that a cavity (27) is formed which enables connection of an optical semiconductor element (41) to the intended conductor structure (22) when placed inside the cavity (27). The cavity (27) is formed such that it, through its shape, extension and/or depth, accurately defines a location of an optical element (45; 61) in relation to the optical semiconductor element (41). Through the provision of such a patterned insulative spacer layer, compact and cost-efficient optical semiconductor devices can be mass-produced based on such a carrier without the need for prolonged development or acquisition of new and expensive manufacturing equipment.
    Type: Grant
    Filed: December 14, 2007
    Date of Patent: March 4, 2014
    Assignee: Koninklijke Philips N.V.
    Inventor: Gerardus Henricus Franciscus Willebrordus Steenbruggen
  • Patent number: 8664752
    Abstract: Semiconductor die packages are disclosed. An exemplary semiconductor die package includes a premolded substrate. The premolded substrate can have a semiconductor die attached to it, and an encapsulating material may be disposed over the semiconductor die.
    Type: Grant
    Filed: March 26, 2012
    Date of Patent: March 4, 2014
    Assignee: Fairchild Semiconductor Corporation
    Inventors: Oseob Jeon, Yoonhwa Choi, Boon Huan Gooi, Maria Cristina B. Estacio, David Chong, Tan Teik Keng, Shibaek Nam, Rajeev Joshi, Chung-Lin Wu, Venkat Iyer, Lay Yeap Lim, Byoung-Ok Lee
  • Patent number: 8656740
    Abstract: The invention provides a manufacturing method of a glass-sealed package, and a glass substrate used for the glass-sealed package, whereby an amount of warp in a glass substrate is reduced to improve processing accuracy in a subsequent step in which the glass substrate is combined (such as by anodic bonding) with another glass substrate provided with a thin film. The front side of the glass substrate includes a region where the cavities used to house electronic devices such as semiconductor IC chips and crystal blanks are not formed. The region devoid of the cavities is provided in the formed of a frame to reduce an amount of warp in the glass substrate.
    Type: Grant
    Filed: February 19, 2010
    Date of Patent: February 25, 2014
    Assignee: Seiko Instruments Inc.
    Inventor: Yoshihisa Tange
  • Patent number: 8652883
    Abstract: The present invention relates to a surface mount package for a silicon condenser microphone and methods for manufacturing the surface mount package. The surface mount package uses a limited number of components which simplifies manufacturing and lowers costs, and features a substrate that performs functions for which multiple components were traditionally required, including providing an interior surface on which the silicon condenser die is mechanically attached, providing an interior surface for making electrical connections between the silicon condenser die and the package, and providing an exterior surface for surface mounting the package to a device's printed circuit board and for making electrical connections between package and the device's printed circuit board.
    Type: Grant
    Filed: March 15, 2013
    Date of Patent: February 18, 2014
    Assignee: Knowles Electronics, LLC
    Inventor: Anthony D. Minervini
  • Patent number: 8643169
    Abstract: A packaged semiconductor device with a cavity formed by a cover or lid mounted to a substrate. The lid covers one or more semiconductor sensor dies mounted on the substrate. The dies are coated with a gel or spray on coating, and the lid is encapsulated with a mold compound. A hole or passage may be formed through the cover and mold compound to expose the sensor dies to selected environmental conditions.
    Type: Grant
    Filed: November 9, 2011
    Date of Patent: February 4, 2014
    Assignee: Freescale Semiconductor, Inc.
    Inventors: Kai Yun Yow, Poh Leng Eu
  • Publication number: 20140027898
    Abstract: A multi-chip electronic package and methods of manufacture are provided. The method includes adjusting a piston position of one or more pistons with respect to one or more chips on a chip carrier. The adjusting includes placing a chip shim on the chips and placing a seal shim between a lid and the chip carrier. The seal shim is thicker than the chip shim. The adjusting further includes lowering the lid until the pistons contact the chip shim. The method further includes separating the lid and the chip carrier and removing the chip shim and the seal shim. The method further includes dispensing thermal interface material on the chips and lowering the lid until a gap filled with the thermal interface material is about a particle size of the thermal interface material. The method further includes sealing the lid to the chip carrier with sealant.
    Type: Application
    Filed: September 30, 2013
    Publication date: January 30, 2014
    Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Kamal K. SIKKA, Hilton T. TOY, Krishna R. TUNGA, Jeffrey A. ZITZ
  • Patent number: 8637978
    Abstract: A system-in-a-package based flash memory card including an integrated circuit package occupying a small overall area within the card and cut to conform to the shape of a lid for the card. An integrated circuit may be cut from a panel into a shape that fits within and conforms to the shape of lids for a finished memory card, such as for example an SD Card. The integrated circuit package may be a system-in-a-package, a multi-chip module, or other arrangement where a complete electronic system is formed in a single package.
    Type: Grant
    Filed: September 19, 2011
    Date of Patent: January 28, 2014
    Assignee: SanDisk Technologies Inc.
    Inventors: Hem Takiar, Robert C. Miller, Warren Middlekauff, Michael W. Patterson, Shrikar Bhagath
  • Patent number: 8633064
    Abstract: The present invention relates to a surface mount package for a silicon condenser microphone and methods for manufacturing the surface mount package. The surface mount package uses a limited number of components which simplifies manufacturing and lowers costs, and features a substrate that performs functions for which multiple components were traditionally required, including providing an interior surface on which the silicon condenser die is mechanically attached, providing an interior surface for making electrical connections between the silicon condenser die and the package, and providing an exterior surface for surface mounting the package to a device's printed circuit board and for making electrical connections between package and the device's sprinted circuit board.
    Type: Grant
    Filed: March 15, 2013
    Date of Patent: January 21, 2014
    Assignee: Knowles Electronics, LLC
    Inventor: Anthony D. Minervini
  • Patent number: 8629551
    Abstract: The present invention relates to a surface mount package for a silicon condenser microphone and methods for manufacturing the surface mount package. The surface mount package uses a limited number of components which simplifies manufacturing and lowers costs, and features a substrate that performs functions for which multiple components were traditionally required, including providing an interior surface on which the silicon condenser die is mechanically attached, providing an interior surface for making electrical connections between the silicon condenser die and the package, and providing an exterior surface for surface mounting the package to a device's printed circuit board and for making electrical connections between package and the device's printed circuit board.
    Type: Grant
    Filed: November 2, 2012
    Date of Patent: January 14, 2014
    Assignee: Knowles Electronics, LLC
    Inventor: Anthony D. Minervini
  • Patent number: 8627566
    Abstract: A ceramic header configured to form a portion of an electronic device package includes a mounting portion configured to provide a mounting surface for an electronic device. In addition, the ceramic header includes one or more conductive input-output connectors operable to provide electrical connections from a first surface of the ceramic header to a second surface of the ceramic header. The ceramic header also includes one or more thermally polished surfaces.
    Type: Grant
    Filed: April 1, 2010
    Date of Patent: January 14, 2014
    Assignee: Texas Instruments Incorporated
    Inventors: Moody K. Forgey, Mark A. Kressley
  • Patent number: 8629552
    Abstract: The present invention relates to a surface mount package for a silicon condenser microphone and methods for manufacturing the surface mount package. The surface mount package uses a limited number of components which simplifies manufacturing and lowers costs, and features a substrate that performs functions for which multiple components were traditionally required, including providing an interior surface on which the silicon condenser die is mechanically attached, providing an interior surface for making electrical connections between the silicon condenser die and the package, and providing an exterior surface for surface mounting the package to a device's printed circuit board and for making electrical connections between package and the device's printed circuit board.
    Type: Grant
    Filed: December 31, 2012
    Date of Patent: January 14, 2014
    Assignee: Knowles Electronics, LLC
    Inventor: Anthony D. Minervini
  • Patent number: 8629005
    Abstract: The present invention relates to a surface mount package for a silicon condenser microphone and methods for manufacturing the surface mount package. The surface mount package uses a limited number of components which simplifies manufacturing and lowers costs, and features a substrate that performs functions for which multiple components were traditionally required, including providing an interior surface on which the silicon condenser die is mechanically attached, providing an interior surface for making electrical connections between the silicon condenser die and the package, and providing an exterior surface for surface mounting the package to a device's printed circuit board and for making electrical connections between package and the device's printed circuit board.
    Type: Grant
    Filed: March 15, 2013
    Date of Patent: January 14, 2014
    Assignee: Knowles Electronics, LLC
    Inventor: Anthony D. Minervini
  • Patent number: 8624387
    Abstract: The present invention relates to a surface mount package for a silicon condenser microphone and methods for manufacturing the surface mount package. The surface mount package uses a limited number of components which simplifies manufacturing and lowers costs, and features a substrate that performs functions for which multiple components were traditionally required, including providing an interior surface on which the silicon condenser die is mechanically attached, providing an interior surface for making electrical connections between the silicon condenser die and the package, and providing an exterior surface for surface mounting the package to a device's printed circuit board and for making electrical connections between package and the device's printed circuit board.
    Type: Grant
    Filed: December 31, 2012
    Date of Patent: January 7, 2014
    Assignee: Knowles Electronics, LLC
    Inventor: Anthony D. Minervini
  • Patent number: 8624385
    Abstract: The present invention relates to a surface mount package for a silicon condenser microphone and methods for manufacturing the surface mount package. The surface mount package uses a limited number of components which simplifies manufacturing and lowers costs, and features a substrate that performs functions for which multiple components were traditionally required, including providing an interior surface on which the silicon condenser die is mechanically attached, providing an interior surface for making electrical connections between the silicon condenser die and the package, and providing an exterior surface for surface mounting the package to a device's printed circuit board and for making electrical connections between package and the device's printed circuit board.
    Type: Grant
    Filed: December 31, 2012
    Date of Patent: January 7, 2014
    Assignee: Knowles Electronics, LLC
    Inventor: Anthony D. Minervini
  • Patent number: 8624386
    Abstract: The present invention relates to a surface mount package for a silicon condenser microphone and methods for manufacturing the surface mount package. The surface mount package uses a limited number of components which simplifies manufacturing and lowers costs, and features a substrate that performs functions for which multiple components were traditionally required, including providing an interior surface on which the silicon condenser die is mechanically attached, providing an interior surface for making electrical connections between the silicon condenser die and the package, and providing an exterior surface for surface mounting the package to a device's printed circuit board and for making electrical connections between package and the device's printed circuit board.
    Type: Grant
    Filed: December 31, 2012
    Date of Patent: January 7, 2014
    Assignee: Knowles Electronics, LLC
    Inventor: Anthony D. Minervini
  • Patent number: 8624384
    Abstract: The present invention relates to a surface mount package for a silicon condenser microphone and methods for manufacturing the surface mount package. The surface mount package uses a limited number of components which simplifies manufacturing and lowers costs, and features a substrate that performs functions for which multiple components were traditionally required, including providing an interior surface on which the silicon condenser die is mechanically attached, providing an interior surface for making electrical connections between the silicon condenser die and the package, and providing an exterior surface for surface mounting the package to a device's printed circuit board and for making electrical connections between package and the device's printed circuit board.
    Type: Grant
    Filed: November 2, 2012
    Date of Patent: January 7, 2014
    Assignee: Knowles Electronics, LLC
    Inventor: Anthony D. Minervini
  • Patent number: 8623709
    Abstract: The present invention relates to a surface mount package for a silicon condenser microphone and methods for manufacturing the surface mount package. The surface mount package uses a limited number of components which simplifies manufacturing and lowers costs, and features a substrate that performs functions for which multiple components were traditionally required, including providing an interior surface on which the silicon condenser die is mechanically attached, providing an interior surface for making electrical connections between the silicon condenser die and the package, and providing an exterior surface for surface mounting the package to a device's printed circuit board and for making electrical connections between package and the device's printed circuit board.
    Type: Grant
    Filed: March 15, 2013
    Date of Patent: January 7, 2014
    Assignee: Knowles Electronics, LLC
    Inventor: Anthony D. Minervini
  • Patent number: 8623710
    Abstract: The present invention relates to a surface mount package for a silicon condenser microphone and methods for manufacturing the surface mount package. The surface mount package uses a limited number of components which simplifies manufacturing and lowers costs, and features a substrate that performs functions for which multiple components were traditionally required, including providing an interior surface on which the silicon condenser die is mechanically attached, providing an interior surface for making electrical connections between the silicon condenser die and the package, and providing an exterior surface for surface mounting the package to a device's printed circuit board and for making electrical connections between package and the device's printed circuit board.
    Type: Grant
    Filed: March 15, 2013
    Date of Patent: January 7, 2014
    Assignee: Knowles Electronics, LLC
    Inventor: Anthony D. Minervini
  • Patent number: 8624383
    Abstract: The invention provides an integrated circuit package and method of fabrication thereof. The integrated circuit package comprises an integrated circuit chip having a photosensitive device thereon; a bonding pad formed on an upper surface of the integrated circuit chip and electrically connected to the photosensitive device; a barrier formed between the bonding pad and the photosensitive device; and a conductive layer formed on a sidewall of the integrated circuit chip and electrically connected to the bonding pad. The barrier layer blocks overflow of the adhesive layer into a region, on which the photosensitive device is formed, to improve yield for fabricating the integrated circuit package.
    Type: Grant
    Filed: July 14, 2010
    Date of Patent: January 7, 2014
    Inventors: Yu-Lin Yen, Chen-Mei Fan
  • Patent number: 8617934
    Abstract: The present invention relates to a surface mount package for a silicon condenser microphone and methods for manufacturing the surface mount package. The surface mount package uses a limited number of components which simplifies manufacturing and lowers costs, and features a substrate that performs functions for which multiple components were traditionally required, including providing an interior surface on which the silicon condenser die is mechanically attached, providing an interior surface for making electrical connections between the silicon condenser die and the package, and providing an exterior surface for surface mounting the package to a device's printed circuit board and for making electrical connections between package and the device's printed circuit board.
    Type: Grant
    Filed: March 15, 2013
    Date of Patent: December 31, 2013
    Assignee: Knowles Electronics, LLC
    Inventor: Anthony D. Minervini