Contact For Iii-v Material Patents (Class 257/745)
  • Patent number: 8395263
    Abstract: According to one embodiment, a semiconductor light emitting device includes a stacked structural body, a first, a second and a third conductive layer. The stacked structural body includes first and second semiconductors and a light emitting layer provided therebetween. The second semiconductor layer is disposed between the first conductive layer and the light emitting layer. The first conductive layer is transparent. The first conductive layer has a first major surface on a side opposite to the second semiconductor layer. The second conductive layer is in contact with the first major surface. The third conductive layer is in contact with the first major surface and has a reflectance higher than a reflectance of the second conductive layer. The third conductive layer includes an extending part extending in parallel to the first major surface. At least a portion of the extending part is not covered by the second conductive layer.
    Type: Grant
    Filed: February 17, 2011
    Date of Patent: March 12, 2013
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Taisuke Sato, Toshiyuki Oka, Koichi Tachibana, Shinya Nunoue
  • Patent number: 8390121
    Abstract: A semiconductor device includes a substrate, an element formed on the substrate, a nitride film formed on the substrate, a anti-peel film formed on the nitride film, and a molded resin covering the anti-peel film and the element. The anti-peel film has residual compressive stress.
    Type: Grant
    Filed: February 11, 2011
    Date of Patent: March 5, 2013
    Assignee: Mitsubishi Electric Corporation
    Inventors: Mika Okumura, Yasuo Yamaguchi, Takeshi Murakami
  • Patent number: 8350276
    Abstract: The present invention relates to a light emitting device. In the light emitting device of the present invention, light emitting cells of a first light emitting cell block and light emitting cells of a second light emitting cell block corresponding thereto are connected in parallel so that a current can cross the light emitting cells of the first and second light emitting cell blocks. Thus, even though a leakage current occurs in some of light emitting cells, the current is allowed to cross light emitting cells connected in another direction, thereby preventing overload on some of the light emitting cells due to the leakage current and ensuring uniform light emission and prolonged life span in the AC light emitting device.
    Type: Grant
    Filed: August 8, 2006
    Date of Patent: January 8, 2013
    Assignee: Seoul Opto Device Co., Ltd.
    Inventors: Jae Ho Lee, Lacroix Yves
  • Patent number: 8294167
    Abstract: The present invention relates to a light emitting diode with high electrostatic discharge and a fabrication method thereof, and more specifically to a light emitting diode comprising a first electrode layer provided over a upper surface of a first semiconductor layer and a upper surface of a second semiconductor layer; a transparent electrode layer formed on the upper surface of the second semiconductor layer, spaced from the first electrode layer; and a second electrode layer provided on a upper surface of the transparent electrode layer. With the present invention, there is provided a light emitting diode element with resistance against electrostatic discharge and with high reliability being strong against electrical impact, by selecting a structure arranging a form of an electrode differently from a conventional electrode.
    Type: Grant
    Filed: January 15, 2008
    Date of Patent: October 23, 2012
    Assignee: Korea Photonics Technology Institute
    Inventors: Jong-Hyeob Baek, Sang-Mook Kim, Sang-Hern Lee, Seung-Jae Lee, Jung-Geun Jhin, Yoon-Seok Kim, Hong-Seo Yom, Young-Moon Yu
  • Publication number: 20120217639
    Abstract: A manufacturing method of a semiconductor device including an electrode having low contact resistivity to a nitride semiconductor is provided. The manufacturing method includes a carbon containing layer forming step of forming a carbon containing layer containing carbon on a nitride semiconductor layer, and a titanium containing layer forming step of forming a titanium containing layer containing titanium on the carbon containing layer. A complete solid solution Ti (C, N) layer of TiN and TiC is formed between the titanium containing layer and the nitride semiconductor layer. As a result, the titanium containing layer comes to be in ohmic contact with the nitride semiconductor layer throughout the border therebetween.
    Type: Application
    Filed: September 2, 2010
    Publication date: August 30, 2012
    Applicant: TOYOTA JIDOSHA KABUSHIKI KAIHSA
    Inventors: Masahiro Sugimoto, Akinori Seki, Akira Kawahashi, Yasuo Takahashi, Masakatsu Maeda
  • Publication number: 20120211888
    Abstract: Apparatus and methods for uniform metal plating onto a semiconductor wafer, such as GaAs wafer, are disclosed. One such apparatus can include an anode and a showerhead body. The anode can include an anode post and a showerhead anode plate. The showerhead anode plate can include holes sized to dispense a particular plating solution, such as plating solution that includes gold, onto a wafer. The showerhead body can be coupled to the anode post and the showerhead anode plate. The showerhead body can be configured to create a seal sufficient to substantially prevent a reduction of pressure in the plating solution flowing from the anode post to holes of the showerhead anode plate.
    Type: Application
    Filed: May 2, 2012
    Publication date: August 23, 2012
    Applicant: Skyworks Solutions, Inc.
    Inventors: Jens A. Riege, Heather L. Knoedler, Shiban K. Tiku
  • Patent number: 8247836
    Abstract: A light emitting diode structure is disclosed that includes a light emitting active portion formed of epitaxial layers and carrier substrate supporting the active portion. A bonding metal system that predominates in nickel and tin joins the active portion to the carrier substrate. At least one titanium adhesion layer is between the active portion and the carrier substrate and a platinum barrier layer is between the nickel-tin bonding system and the titanium adhesion layer. The platinum layer has a thickness sufficient to substantially prevent tin in the nickel tin bonding system from migrating into or through the titanium adhesion layer.
    Type: Grant
    Filed: February 25, 2011
    Date of Patent: August 21, 2012
    Assignee: Cree, Inc.
    Inventors: Matthew Donofrio, David B. Slater, Jr., John A. Edmond, Hua-Shuang Kong
  • Patent number: 8207548
    Abstract: An LED array chip (2), which is one type of a semiconductor light emitting device, includes an array of LEDs (6), a base substrate (4) supporting the array of the LEDs (6), and a phosphor film (48). The array of LEDs (6) is formed by dividing a multilayer epitaxial structure including a light emitting layer into a plurality of portions. The phosphor film (48) covers an upper surface of the array of the LEDs (6) and a part of every side surface of the array of LEDs (6). Here, the part extends from the upper surface to the light emitting layer.
    Type: Grant
    Filed: November 10, 2009
    Date of Patent: June 26, 2012
    Assignee: Panasonic Corporation
    Inventor: Hideo Nagai
  • Patent number: 8174048
    Abstract: A III-nitride device includes a recessed electrode to produce a nominally off, or an enhancement mode, device. By providing a recessed electrode, a conduction channel formed at the interface of two III-nitride materials is interrupted when the electrode contact is inactive to prevent current flow in the device. The electrode can be a schottky contact or an insulated metal contact. Two ohmic contacts can be provided to form a rectifier device with nominally off characteristics. The recesses formed with the electrode can have sloped sides. The electrode can be formed in a number of geometries in conjunction with current carrying electrodes of the device. A nominally on device, or pinch resistor, is formed when the electrode is not recessed. A diode is also formed by providing non-recessed ohmic and schottky contacts through an insulator to an AlGaN layer.
    Type: Grant
    Filed: January 21, 2005
    Date of Patent: May 8, 2012
    Assignee: International Rectifier Corporation
    Inventor: Robert Beach
  • Publication number: 20120098132
    Abstract: A semiconductor device with a stable structure having high capacitance by changing the pillar type storage node structure and a method of manufacturing the same are provided. The method includes forming a sacrificial layer on a semiconductor substrate including a storage node contact plug, etching the sacrificial layer to form a region exposing the storage node contact plug, forming a first conductive material within an inner side of the region, burying a second conductive material within the region in which the first conductive material is formed, and removing the sacrificial layer to form a pillar type storage node.
    Type: Application
    Filed: October 24, 2011
    Publication date: April 26, 2012
    Applicant: Hynix Semiconductor Inc.
    Inventors: Cheol Hwan PARK, Ho Jin Cho, Dong Kyun Lee
  • Patent number: 8159068
    Abstract: A semiconductor device includes: a semiconductor layer composed of one of GaAs based semiconductor, InP-based semiconductor, and GaN-based semiconductor; a first silicon nitride film that is provided on the semiconductor layer, and of which an end portion is in contact with a surface of the semiconductor layer; a protective film that is composed of one of polyimide and benzocyclobutene, and is provided on the semiconductor layer and the first silicon nitride film, the protective film covering the end portion of the first silicon nitride film; and a first metallic layer that is composed of one of titanium, tantalum and platinum, and is continuously provided from a first portion located between the semiconductor layer and the protective film to a second portion located between the end portion of the first silicon nitride film and the protective film, the first metallic layer being in contact with the surface of the semiconductor layer and a surface of the end portion of the first silicon nitride film.
    Type: Grant
    Filed: December 24, 2009
    Date of Patent: April 17, 2012
    Assignee: Sumitomo Electric Device Innovations, Inc.
    Inventors: Takeshi Hishida, Tsutomu Igarashi
  • Patent number: 8124999
    Abstract: A light emitting element includes a first electrode, a second electrode formed on a same side as the first electrode and including an area less than the first electrode, a first bump formed on the first electrode, and a second bump formed on the second electrode and including a level at a top thereof higher than that of the first bump. A flip-chip type light emitting element includes a spreading electrode, the spreading electrode including an extended part, and plural intermediate electrodes formed on the spreading electrode and arranged in a longitudinal direction of the extended part and centrally in a width direction of the extended part. The intermediate electrodes are disposed such that a distance of half a pitch thereof in the longitudinal direction is equal to or shorter than a distance from one of the intermediate electrodes to an edge of the extended part.
    Type: Grant
    Filed: July 9, 2009
    Date of Patent: February 28, 2012
    Assignee: Toyoda Gosei Co., Ltd.
    Inventors: Kosuke Yahata, Naoki Nakajo
  • Patent number: 8093618
    Abstract: There are provided an ohmic electrode, which includes a contact layer made of an Al alloy and formed on a nitride-based semiconductor layer functioning as a light emitting layer, a reflective layer made of Ag metal, formed on the contact layer and having some particles in-diffused to the semiconductor layer, and a protective layer formed on the reflective layer to restrain out-diffusion of the reflective layer; a method of forming the ohmic electrode; and a semiconductor light emitting element having the ohmic electrode. The present invention has strong adhesive strength and low contact resistance since the reflective layer and the light emitting layer directly form an ohmic contact due to the interface reaction during heat treatment, and the present invention has high light reflectance and excellent thermal stability since the contact layer and the protective layer restrain out-diffusion of the reflective layer during heat treatment.
    Type: Grant
    Filed: October 11, 2007
    Date of Patent: January 10, 2012
    Assignees: Seoul Opto Device Co., Ltd., Postech Academy-Industry Foundation
    Inventors: Jong Lam Lee, Sang Han Lee
  • Patent number: 8089090
    Abstract: A semiconductor based Light Emitting Device (LED) can include a p-type nitride layer and a metal ohmic contact, on the p-type nitride layer. The metal ohmic contact can have an average thickness of less than about 25 ? and a specific contact resistivity less than about 10?3 ohm-cm2.
    Type: Grant
    Filed: July 27, 2005
    Date of Patent: January 3, 2012
    Assignee: Cree, Inc.
    Inventors: Mark Raffetto, Jayesh Bharathan, Kevin Haberern, Michael Bergmann, David Emerson, James Ibbetson, Ting Li
  • Publication number: 20110266674
    Abstract: The present disclosure provides methods for forming semiconductor devices with laser-etched vias and apparatus including the same. In one embodiment, a method of fabricating a semiconductor device includes providing a substrate having a frontside and a backside, and providing a layer above the frontside of the substrate, the layer having a different composition from the substrate. The method further includes controlling a laser power and a laser pulse number to laser etch an opening through the layer and at least a portion of the frontside of the substrate, filling the opening with a conductive material to form a via, removing a portion of the backside of the substrate to expose the via, and electrically coupling a first element to a second element with the via. A semiconductor device fabricated by such a method is also disclosed.
    Type: Application
    Filed: April 28, 2010
    Publication date: November 3, 2011
    Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Hsing-Kuo Hsia, Chih-Kuang Yu, Ching-Hua Chiu, Troy Wu
  • Patent number: 8044425
    Abstract: A semiconductor based Light Emitting Device (LED) can include a p-type nitride layer and a metal ohmic contact, on the p-type nitride layer. The metal ohmic contact can have an average thickness of less than about 25 ? and a specific contact resistivity less than about 10?3 ohm-cm2.
    Type: Grant
    Filed: July 27, 2005
    Date of Patent: October 25, 2011
    Assignee: Cree, Inc.
    Inventors: Mark Raffetto, Jayesh Bharathan, Kevin Haberern, Michael Bergmann, David Emerson, James Ibbetson, Ting Li
  • Patent number: 8012783
    Abstract: The object of the present invention is to provide a semiconductor element containing an n-type gallium nitride based compound semiconductor and a novel electrode that makes an ohmic contact with the semiconductor. The semiconductor element of the present invention has an n-type Gallium nitride based compound semiconductor and an electrode that forms an ohmic contact with the semiconductor, wherein the electrode has a TiW alloy layer to be in contact with the semiconductor. According to a preferable embodiment, the above-mentioned electrode can also serve as a contact electrode. According to a preferable embodiment, the above-mentioned electrode is superior in the heat resistance. Moreover, a production method of the semiconductor element is also provided.
    Type: Grant
    Filed: April 4, 2006
    Date of Patent: September 6, 2011
    Assignee: Mitsubishi Chemical Corporation
    Inventors: Tsuyoshi Takano, Takahide Joichi, Hiroaki Okagawa
  • Patent number: 7999346
    Abstract: A semiconductor device provided with a silicon carbide semiconductor substrate, and an ohmic metal layer joined to one surface of the silicon carbide semiconductor substrate in an ohmic contact and composed of a metal material whose silicide formation free energy and carbide formation free energy respectively take negative values. The ohmic metal layer is composed of, for example, a metal material such as molybdenum, titanium, chromium, manganese, zirconium, tantalum, or tungsten.
    Type: Grant
    Filed: June 17, 2010
    Date of Patent: August 16, 2011
    Assignee: Rohm Co., Ltd.
    Inventors: Yuji Okamura, Masashi Matsushita
  • Patent number: 7993948
    Abstract: A method for fabricating an electrode by (i) depositing a palladium film on a p-type semiconductor layer; (ii) introducing an oxygen gas onto the palladium film to provide an oxygen ambient; (iii) oxidizing the palladium film adjacent to the semiconductor layer by annealing the palladium film in the oxygen ambient; and (iv) forming a palladium oxide film directly in contact with the semiconductor layer.
    Type: Grant
    Filed: August 11, 2009
    Date of Patent: August 9, 2011
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Shinji Saito, Shinya Nunoue, Toshiyuki Oka
  • Publication number: 20110180839
    Abstract: A light emitting diode structure is disclosed that includes a light emitting active portion formed of epitaxial layers and carrier substrate supporting the active portion. A bonding metal system that predominates in nickel and tin joins the active portion to the carrier substrate. At least one titanium adhesion layer is between the active portion and the carrier substrate and a platinum barrier layer is between the nickel-tin bonding system and the titanium adhesion layer. The platinum layer has a thickness sufficient to substantially prevent tin in the nickel tin bonding system from migrating into or through the titanium adhesion layer.
    Type: Application
    Filed: February 25, 2011
    Publication date: July 28, 2011
    Inventors: Matthew Donofrio, David B. Slater, JR., John A. Edmond, Hua-Shuang Kong
  • Patent number: 7973325
    Abstract: Provided are a reflective electrode and a compound semiconductor light emitting device having the reflective electrode, such as LED or LD is provided. The reflective electrode formed on a p-type compound semiconductor layer of a compound semiconductor light emitting device, comprising a first electrode layer formed one of a Ag and Ag-alloy and forms an ohmic contact with the p-type compound semiconductor layer, a third electrode layer formed of a material selected from the group consisting of Ni, Ni-alloy, Zn, Zn-alloy, Cu, Cu-alloy, Ru, Ir, and Rh on the first electrode layer, and a fourth electrode layer formed of a light reflective material on the third electrode layer.
    Type: Grant
    Filed: June 22, 2005
    Date of Patent: July 5, 2011
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Mi-yang Kim, Joon-seop Kwak
  • Patent number: 7960746
    Abstract: A low resistance electrode and a compound semiconductor light emitting device including the same are provided. The low resistance electrode deposited on a p-type semiconductor layer of a compound semiconductor light emitting device including an n-type semiconductor layer, an active layer, and the p-type semiconductor layer, including: a reflective electrode which is disposed on the p-type semiconductor layer and reflects light being emitted from the active layer; and an agglomeration preventing electrode which is disposed on the reflective electrode layer in order to prevent an agglomeration of the reflective electrode layer during an annealing process.
    Type: Grant
    Filed: November 3, 2004
    Date of Patent: June 14, 2011
    Assignee: Samsung LED Co., Ltd.
    Inventors: Joon-seop Kwak, Tae-yeon Seong, Jae-hee Cho, June-o Song, Dong-seok Leem, Hyun-soo Kim
  • Patent number: 7939354
    Abstract: A method of fabricating a nitride semiconductor laser comprises preparing a substrate having a plurality of marker structures and a crystalline mass made of a hexagonal gallium nitride semiconductor. The primary and back surfaces of the substrate intersect with a predetermined axis extending in the direction of a c-axis of the hexagonal gallium nitride semiconductor. Each marker structure extends along a reference plane defined by the c-axis and an m-axis of the hexagonal gallium nitride semiconductor. The method comprises cutting the substrate along a cutting plane to form a wafer of hexagonal gallium nitride semiconductor, and the cutting plane intersects with the plurality of the marker structures. The wafer has a plurality of first markers, each of which extends from the primary surface to the back surface of the wafer, and each of the first markers comprises part of each of the marker structures. The primary surface of the wafer is semipolar or nonpolar.
    Type: Grant
    Filed: March 3, 2009
    Date of Patent: May 10, 2011
    Assignee: Sumitomo Electric Industries, Ltd.
    Inventors: Takashi Kyono, Katsushi Akita, Yusuke Yoshizumi
  • Patent number: 7910945
    Abstract: A light emitting diode structure is disclosed that includes a light emitting active portion formed of epitaxial layers and carrier substrate supporting the active portion. A bonding metal system that predominates in nickel and tin joins the active portion to the carrier substrate. At least one titanium adhesion layer is between the active portion and the carrier substrate and a platinum barrier layer is between the nickel-tin bonding system and the titanium adhesion layer. The platinum layer has a thickness sufficient to substantially prevent tin in the nickel tin bonding system from migrating into or through the titanium adhesion layer.
    Type: Grant
    Filed: August 23, 2007
    Date of Patent: March 22, 2011
    Assignee: Cree, Inc.
    Inventors: Matthew Donofrio, David B. Slater, Jr., John A. Edmond, Hua-Shuang Kong
  • Patent number: 7910935
    Abstract: Disclosed is a group-III nitride-based light emitting diode. The group-III nitride-based light emitting diode includes a substrate, an n-type nitride-based cladding layer formed on the substrate, a nitride-based active layer formed on the n-type nitride-based cladding layer, a p-type nitride-based cladding layer formed on the nitride-based active layer, and a p-type multi-layered ohmic contact layer formed on the p-type nitride-based cladding layer and including thermally decomposed nitride. The thermally decomposed nitride is obtained by combining nitrogen (N) with at least one metal component selected from the group consisting of nickel (Ni), copper (Cu), zinc (Zn), indium (In) and tin (Sn). An ohmic contact characteristic is enhanced at the interfacial surface of the p-type nitride-based cladding layer of the group-III nitride-based light emitting device, thereby improving the current-voltage characteristics.
    Type: Grant
    Filed: October 27, 2006
    Date of Patent: March 22, 2011
    Assignee: Samsung Electronics Co., Ltd.
    Inventor: Tae-Yeon Seong
  • Patent number: 7893455
    Abstract: An inclined surface having an inclination angle ? is formed in an edge portion which forms an opening portion of an inter-layer insulating film, thereby reducing a stress by the inclined surface.
    Type: Grant
    Filed: April 23, 2007
    Date of Patent: February 22, 2011
    Assignee: Oki Data Corporation
    Inventors: Mitsuhiko Ogihara, Hiroyuki Fujiwara, Masataka Muto, Tomoki Igari, Hiroshi Kurokawa
  • Patent number: 7875479
    Abstract: The present invention discloses an integration structure of a semiconductor circuit and microprobe sensing elements and a method for fabricating the same. In the method of the present invention, a semiconductor circuit is fabricated on one surface of a semiconductor substrate, and the other surface of the semiconductor substrate is etched to form a microprobe structure for detect physiological signals. Next, a deposition method is used to sequentially form an electrical isolated layer and an electrical conductive layer on the microprobes. Then, an electrical conductive material is used to electrically connect the electrical conductive layer with the electrical pads of the semiconductor circuit. Thus is achieved the integration of a semiconductor circuit and microprobe sensing elements in an identical semiconductor substrate with the problem of electric electrical isolated being solved simultaneously.
    Type: Grant
    Filed: March 19, 2009
    Date of Patent: January 25, 2011
    Assignee: National Chiao Tung University
    Inventors: Jin-Chern Chiou, Chih-Wei Chang
  • Patent number: 7847410
    Abstract: An interconnect of the group III-V semiconductor device and the fabrication method for making the same are described. The interconnect includes a first adhesion layer, a diffusion barrier layer for preventing the copper from diffusing, a second adhesion layer and a copper wire line. Because a stacked-layer structure of the first adhesion layer/diffusion barrier layer/second adhesion layer is located between the copper wire line and the group III-V semiconductor device, the adhesion between the diffusion barrier layer and other materials is improved. Therefore, the yield of the device is increased.
    Type: Grant
    Filed: November 22, 2005
    Date of Patent: December 7, 2010
    Assignee: National Chiao Tung University
    Inventors: Cheng-Shih Lee, Edward Yi Chang, Huang-Choung Chang
  • Patent number: 7834456
    Abstract: A semiconductor structure having a substrate, a seed layer over the substrate; a silicon layer disposed on the seed layer; a transistor device in the silicon layer; a III-V device disposed on the seed layer; and a plurality of electrical contacts, each one of the electrical contacts having a layer of TiN or TaN and a layer of copper or aluminum on the layer of TaN or TiN, one of the electrical contacts being electrically connected to the transistor and another one of the electrical contacts being electrically connected to the III-V device.
    Type: Grant
    Filed: January 20, 2009
    Date of Patent: November 16, 2010
    Assignee: Raytheon Company
    Inventors: Kamal Tabatabaie, Michael S. Davis, Jeffrey R. LaRoche, Valery S. Kaper, John P. Bettencourt
  • Publication number: 20100283153
    Abstract: An ohmic contact is fabricated. The ohmic contact has low electric resistivity and high thermal conductivity. The materials for fabricating the ohmic contact include silver. Thus, equipments for fabricating the ohmic contact are compatible to modern generally used equipments.
    Type: Application
    Filed: January 4, 2010
    Publication date: November 11, 2010
    Applicant: ATOMIC ENERGY COUNCIL-INSTITUTE OF NUCLEAR ENERGY RESEARCH
    Inventor: Chih-Hung Wu
  • Publication number: 20100244105
    Abstract: A semiconductor structure having: a semiconductor comprising a indium gallium phosphide and molybdenum metal in Schottky contact with the semiconductor.
    Type: Application
    Filed: March 31, 2009
    Publication date: September 30, 2010
    Inventor: Kiuchul Hwang
  • Patent number: 7804880
    Abstract: In one embodiment of the present invention, a long-life nitride semiconductor laser element is disclosed wherein voltage characteristics do not deteriorate even when the element is driven at high current density. Specifically disclosed is a nitride semiconductor laser element which includes a p-type nitride semiconductor and a p-side electrode formed on the p-type nitride semiconductor. In at least one embodiment, the p-side electrode has a first layer which is in direct contact with the p-type nitride semiconductor and a conductive second layer formed on the first layer, and the second layer contains a metal element selected from the group consisting of Ti, Zr, Hf, W, Mo and Nb, and an oxygen element.
    Type: Grant
    Filed: June 2, 2006
    Date of Patent: September 28, 2010
    Assignee: Sharp Kabushiki Kaisha
    Inventors: Shigetoshi Ito, Kunihiro Takatani, Susumu Omi
  • Patent number: 7795738
    Abstract: A nitride semiconductor device with a p electrode having no resistance between itself and other electrodes, and a method of manufacturing the same are provided. A p electrode is formed of a first Pd film, a Ta film, and a second Pd film, and on a p-type contact layer of a nitride semiconductor. On the second Pd film, a pad electrode is formed. The second Pd film is formed on the entire upper surface of the Ta film which forms part of the p electrode, and serves as an antioxidant film that prevents oxidation of the Ta film. Preventing oxidation of the Ta film, the second Pd film can reduce the resistance that may exist between the p electrode and the pad electrode, thereby preventing a failure in contact between the p electrode and the pad electrode and providing the p electrode with low resistance.
    Type: Grant
    Filed: December 4, 2008
    Date of Patent: September 14, 2010
    Assignee: Mitsubishi Electric Corporation
    Inventors: Katsuomi Shiozawa, Kyozo Kanamoto, Hiroshi Kurokawa, Yasunori Tokuda, Kyosuke Kuramoto, Hitoshi Sakuma
  • Patent number: 7763907
    Abstract: A semiconductor light emitting element includes: an {0001} n-type semiconductor substrate formed of a III-V semiconductor, which is in a range of 0° to 45° in inclination angle into a <1-100> direction, and which is in a range of 0° to 10° in inclination angle into a <11-20> direction; an n-type layer formed of a III-V semiconductor on the n-type semiconductor substrate; an n-type guide layer formed of a III-V semiconductor above the n-type layer; an active layer formed of a III-V semiconductor above the n-type guide layer; a p-type first guide layer formed of a III-V semiconductor above the active layer; a p-type contact layer formed of a III-V semiconductor above the p-type first guide layer; and an concavo-convex layer formed of a III-V semiconductor between the p-type first guide layer and the p-type contact layer.
    Type: Grant
    Filed: September 5, 2007
    Date of Patent: July 27, 2010
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Koichi Tachibana, Hajime Nago, Shinji Saito, Shinya Nunoue, Genichi Hatakoshi
  • Publication number: 20100164103
    Abstract: A semiconductor device includes: a semiconductor layer composed of one of GaAs based semiconductor, InP-based semiconductor, and GaN-based semiconductor; a first silicon nitride film that is provided on the semiconductor layer, and of which an end portion is in contact with a surface of the semiconductor layer; a protective film that is composed of one of polyimide and benzocyclobutene, and is provided on the semiconductor layer and the first silicon nitride film, the protective film covering the end portion of the first silicon nitride film; and a first metallic layer that is composed of one of titanium, tantalum and platinum, and is continuously provided from a first portion located between the semiconductor layer and the protective film to a second portion located between the end portion of the first silicon nitride film and the protective film, the first metallic layer being in contact with the surface of the semiconductor layer and a surface of the end portion of the first silicon nitride film.
    Type: Application
    Filed: December 24, 2009
    Publication date: July 1, 2010
    Applicant: SUMITOMO ELECTRIC DEVICE INNOVATIONS, INC.
    Inventors: Takeshi Hishida, Tsutomu Igarashi
  • Patent number: 7737455
    Abstract: An electrode structure is disclosed for enhancing the brightness and/or efficiency of an LED. The electrode structure can have a metal electrode and an optically transmissive thick dielectric material formed intermediate the electrode and a light emitting semiconductor material. The electrode and the thick dielectric cooperate to reflect light from the semiconductor material back into the semiconductor so as to enhance the likelihood of the light ultimately being transmitted from the semiconductor material. Such LED can have enhanced utility and can be suitable for uses such as general illumination. The semiconductor material can have a cutout formed therein and a portion of the electrode can be formed outside of the cutout and a portion of the electrode can be formed inside of the cutout. The portion of the electrode outside the cutout can be electrically isolated from the semiconductor material by the dielectric material.
    Type: Grant
    Filed: May 19, 2006
    Date of Patent: June 15, 2010
    Assignee: Bridgelux, Inc.
    Inventor: Frank T. Shum
  • Patent number: 7692298
    Abstract: A two-dimensional carrier is generated in the vicinity of an interface that is a hetero interface between a semiconductor layer and a semiconductor layer. Two concave portions are formed so as to extend from a primary surface as far as the interface. An electrode that is made of metal and provides a Schottky junction with the semiconductor layers is formed on a bottom surface and a side surface of the concave portion. An electrode that is made from metal and provides a low resistance contact with the semiconductor layers and is also in low resistance contact therewith is formed on the bottom surface and side surface of the concave portion. As a result, a semiconductor device is provided in which contact resistance between the electrodes and the semiconductor layers is reduced and high frequency characteristics are improved.
    Type: Grant
    Filed: August 25, 2005
    Date of Patent: April 6, 2010
    Assignee: Sanken Electric Co., Ltd.
    Inventors: Koji Otsuka, Shinichi Iwakami
  • Patent number: 7687908
    Abstract: A thin film electrode for ohmic contact of a p-type GaN semiconductor includes first and second electrode layers sequentially stacked on a p-type GaN layer. The first electrode layer may include an Ni-based alloy, a Cu-based alloy, a Co-based alloy, or a solid solution capable of forming a p-type thermo-electronic oxide or may include a Ni-oxide doped with at least one selected from Al, Ga, and In. The second electrode layer may include at least one selected from the group consisting of Au, Pd, Pt, Ru, Re, Sc, Mg, Zn, V, Hf, Ta, Rh, Ir, W, Ti, Ag, Cr, Mo, Nb, Ca, Na, Sb, Li, In, Sn, Al, Ni, Cu, and Co. Furthermore, a method of fabricating the thin film electrode is provided.
    Type: Grant
    Filed: July 9, 2004
    Date of Patent: March 30, 2010
    Assignees: Samsung Electronics Co., Ltd., Gwangju Institute of Science and Technology
    Inventors: Dong-seok Leem, June-o Song, Sang-ho Kim, Tae-yeon Seong
  • Patent number: 7675075
    Abstract: An LED array chip (2), which is one type of a semiconductor light emitting device, includes an array of LEDs (6), a base substrate (4) supporting the array of the LEDs (6), and a phosphor film (48). The array of LEDs (6) is formed by dividing a multilayer epitaxial structure including a light emitting layer into a plurality of portions. The phosphor film (48) covers an upper surface of the array of the LEDs (6) and a part of every side surface of the array of LEDs (6). Here, the part extends from the upper surface to the light emitting layer.
    Type: Grant
    Filed: August 9, 2004
    Date of Patent: March 9, 2010
    Assignee: Panasonic Corporation
    Inventor: Hideo Nagai
  • Patent number: 7667240
    Abstract: A radiation-emitting semiconductor chip having an absorbent brightness setting layer between a connection region and a current injection region and/or, as seen from the connection region, outside the current injection region on a front-side radiation coupling-out area of the semiconductor layer sequence. The brightness setting layer absorbs in a targeted manner part of the radiation generated in the semiconductor layer sequence. In another embodiment, a partly insulating brightness setting layer is arranged between the connection region and the active layer.
    Type: Grant
    Filed: June 30, 2004
    Date of Patent: February 23, 2010
    Assignee: Osram Opto Semiconductors GmbH
    Inventors: Michael Zoelfl, Wilhelm Stein, Ralph Wirth
  • Publication number: 20100025850
    Abstract: The present invention includes an AuGeNi alloy layer (13) provided on an n-type GaAs layer; and a laminate provided on the AuGeNi alloy layer (13), the laminate being composed of a bonding metal layer (15, 17) and a barrier metal layer (16, 18) provided on the bonding metal layer (15, 17). The present invention includes two or more of the laminates. With this configuration, in a GaAs-based contact layer, particularly in an n-type electrode, the surface diffusion of Ga of the semiconductor and Ni of the AuGeNi alloy, which is needed to form an ohmic contact in the n-type electrode, can be suppressed, and a low-resistance ohmic electrode structure and a semiconductor element having the ohmic electrode structure can be provided.
    Type: Application
    Filed: February 21, 2008
    Publication date: February 4, 2010
    Applicant: PANASONIC CORPORATION
    Inventors: Toshitaka Shimamoto, Kenji Yoshikawa, Kouji Makita
  • Patent number: 7638820
    Abstract: Provided is a process for forming a contact for a compound semiconductor device without electrically shorting the device. In one embodiment, a highly doped compound semiconductor material is electrically connected to a compound semiconductor material of the, same conductivity type through an opening in a compound semiconductor material of the opposite conductivity type. Another embodiment discloses a transistor including multiple compound semiconductor layers where a highly doped compound semiconductor material is electrically connected to a compound semiconductor layer of the same conductivity type through an opening in a compound semiconductor layer of the opposite conductivity type. Embodiments further include metal contacts electrically connected to the highly doped compound semiconductor material. A substantially planar semiconductor device is disclosed. In embodiments, the compound semiconductor material may be silicon carbide.
    Type: Grant
    Filed: November 6, 2006
    Date of Patent: December 29, 2009
    Assignee: Fairchild Semiconductor Corporation
    Inventors: Martin E. Kordesch, Howard D. Bartlow, Richard L. Woodin
  • Publication number: 20090302470
    Abstract: In an n-type semiconductor layer that contains gallium (Ga), contact resistance is to be suppressed at a low level. An n-side electrode is provided on a surface of the n-type semiconductor layer containing Ga. The electrode includes a metal layer having a Ga content of equal to or more than 1 at % and equal to or less than 25 at %. The metal layer is disposed in contact with the n-type semiconductor layer.
    Type: Application
    Filed: May 4, 2009
    Publication date: December 10, 2009
    Applicant: NEC Electronics Corporation
    Inventor: Kentaro Tada
  • Patent number: 7592641
    Abstract: A semiconductor device includes a p-type nitride semiconductor layer (14); and a p-side electrode (18) including a palladium oxide film (30) connected to a surface of the nitride semiconductor layer (14).
    Type: Grant
    Filed: February 21, 2006
    Date of Patent: September 22, 2009
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Shinji Saito, Shinya Nunoue, Toshiyuki Oka
  • Patent number: 7569911
    Abstract: An ohmic electrode is formed by stacking a lower Ti layer, a diffusion preventing layer, an upper Ti layers and a metallic (Au) layer on a p-type GaAs layer. The diffusion preventing layer includes tantalum (Ta) or niobium (Nb). Thus, interdiffusion of Ga and As in the p-type GaAs layer and Au in the metallic layer can be prevented, and variation in resistivity of the ohmic electrode in a high-temperature, high-humidity environment can be suppressed.
    Type: Grant
    Filed: April 25, 2006
    Date of Patent: August 4, 2009
    Assignee: Mitsubishi Denki Kabushiki Kaisha
    Inventors: Toshihiko Shiga, Hitoshi Nakamura, Junji Tanimura
  • Patent number: 7566908
    Abstract: Light emitting diodes (LEDs) with various electrode structures which preferably provide increased performance. In some embodiments the LEDs are GaN-based and in some embodiments the LEDs are ZnO-based, with a sapphire substrate or a ZnO substrate. In some embodiments the LEDs are hybrid GaN-based ZnO based LEDs.
    Type: Grant
    Filed: November 29, 2005
    Date of Patent: July 28, 2009
    Inventors: Yongsheng Zhao, Jin-Joo Song, Chan Kyung Choi
  • Publication number: 20090160054
    Abstract: A nitride semiconductor device is provided which reduces the contact resistance at the interface between a P-type electrode and a nitride semiconductor layer. A nitride semiconductor device includes a P-type nitride semiconductor layer and a P-type electrode formed on the P-type nitride semiconductor layer. The P-type electrode is formed by successive laminations of a metal layer of a metal having a work function of 5.1 eV or more, a Pd layer of palladium, and a Ta layer of tantalum on the P-type nitride semiconductor layer.
    Type: Application
    Filed: November 13, 2008
    Publication date: June 25, 2009
    Applicant: MITSUBISHI ELECTRIC CORPORATION
    Inventors: Katsuomi Shiozawa, Kyozo Kanamoto, Toshiyuki Oishi, Yoichiro Tarui, Yasunori Tokuda
  • Patent number: 7491988
    Abstract: A semiconductor transistor structure with increased mobility in the channel zone and a method of its fabrication are described. A semiconductor substrate having a first dopant is formed. A diffusion barrier layer having a second dopant is formed on the semiconductor substrate to suppress outdiffusion of the first dopant. Next, a semiconductor layer having substantially low dopant concentration relative to the first layer is epitaxially grown on the diffusion barrier layer. The semiconductor layer defines a channel in the semiconductor transistor structure. The low dopant concentration in the semiconductor layer increases the mobility of the carriers in the channel of the semiconductor transistor structure. A gate electrode and a gate dielectric are formed on the semiconductor layer with the low dopant concentration.
    Type: Grant
    Filed: June 28, 2004
    Date of Patent: February 17, 2009
    Assignee: Intel Corporation
    Inventors: Peter G. Tolchinsky, Mark Bohr, Irwin Yablok
  • Patent number: 7485902
    Abstract: A nitride-based semiconductor light-emitting device capable of improving luminous efficiency by reducing light absorption loss in a contact layer is provided. This nitride-based semiconductor light-emitting device comprises a first conductivity type first nitride-based semiconductor layer formed on a substrate, an active layer, formed on the first nitride-based semiconductor layer, consisting of a nitride-based semiconductor layer, a second conductivity type second nitride-based semiconductor layer formed on the active layer, an undoped contact layer formed on the second nitride-based semiconductor layer and an electrode formed on the undoped contact layer.
    Type: Grant
    Filed: September 17, 2003
    Date of Patent: February 3, 2009
    Assignee: Sanyo Electric Co., Ltd.
    Inventors: Daijiro Inoue, Yasuhiko Nomura, Masayuki Hata, Takashi Kano, Tsutomu Yamaguchi
  • Publication number: 20090020876
    Abstract: A method of forming multiple bonds on an electronic device includes heating first bonding metals at a predetermined temperature to form a first bond comprising a first melting temperature above the predetermined temperature. The first bond and second bonding metals are then heated at the predetermined temperature to form a second bond comprising a second melting temperature above the predetermined temperature.
    Type: Application
    Filed: July 20, 2007
    Publication date: January 22, 2009
    Inventors: Thomas A. Hertel, Daniel Tan