With Specified Filler Material Patents (Class 257/789)
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Patent number: 6562482Abstract: A liquid potting composition, a semiconductor device manufactured using such composition and a process for manufacturing a semiconductor device using such composition. The liquid potting composition comprises: (a) a liquid epoxy resin; (b) a hardener comprising a multi-hydroxy aromatic compound containing at least two hydroxy groups and at least one carboxyl group; and (c) an accelerator. Suitable hardening agents include 2,3-dihydroxybenzoic acid; 2,4-dihydroxybenzoic acid; 2,5-dihydroxybenzoic acid; 3,4-dihydroxybenzoic acid; gallic acid; 1,4-dihydroxy-2-naphthoic acid; 3,5-dihydroxy-2-naphthoic acid; phenolphthaline; diphenolic acid and mixtures thereof.Type: GrantFiled: August 1, 2000Date of Patent: May 13, 2003Assignee: Sumitomo Bakelite Company, Ltd.Inventor: Yushi Sakamoto
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Patent number: 6560122Abstract: An integrated circuit chip package according to the present invention includes an integrated circuit chip that is mounted on a substrate by a reflow process and by a plurality of solder bumps. At least one standoff is located between the circuit chip and the substrate to maintain a distance between the circuit chip and the substrate during the reflow process. A mold compound is used for underfilling air gaps between the chip and the substrate. The integrated circuit chip package is formed by placing the chip and substrate within a mold cavity and pressing a transfer mold compound into the mold cavity. Air spaces between the integrated circuit chip and the substrate are underfilled by the mold compound as it is pressed in between the integrated circuit chip, the standoffs and the substrate. Air is allowed to escape from between the chip and the substrate during the underfilling through a vent which extends through the substrate.Type: GrantFiled: September 28, 2001Date of Patent: May 6, 2003Assignee: Hestia Technologies, Inc.Inventor: Patrick O. Weber
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Patent number: 6559541Abstract: A connection structure is configured such that electrodes formed on an overcoat layer on a substrate are connected to other electrode terminals using an anisotropically electroconductive adhesive 30 comprising electroconductive particles dispersed in an insulating adhesive, wherein the angle of encroachment A of the electroconductive particles 32 into the overcoat layer 4 is made to be at least 135°.Type: GrantFiled: May 23, 2001Date of Patent: May 6, 2003Assignee: Sony Chemicals CorporationInventors: Masamitsu Itagaki, Hiroyuki Fujihira
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Publication number: 20030080437Abstract: High yield, high reliability, flip-chip integrated circuit (IC) packages are achieved utilizing a combination of heat and pressure to bond flip-chip die and to cure no-flow underfill material. The underfill comprises a filler or low coefficient of thermal expansion (CTE) material to decrease CTE of the cured underfill. The filler material can be selected from the group comprising silica, silicon oxide, silicon dioxide, silicon nitride, aluminum oxide, aluminum nitride, or a mixture thereof. The filler material may also increase the viscosity of the uncured underfill and/or increase the modulus of elasticity of the cured underfill. In some method embodiments, a thermocompression bonder is used to simultaneously provide solder bump reflow and underfill curing. Application of various methods to a component package, an electronic assembly, and an electronic system are also described.Type: ApplicationFiled: October 26, 2001Publication date: May 1, 2003Applicant: Intel CorporationInventors: Carlos A. Gonzalez, Song-Hua Shi, Milan Djukic
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Patent number: 6555602Abstract: The present invention provides a resin composition for semiconductor encapsulation excellent in reliability in humidity resistance and storage stability as well as in dischargeability and coatability, a semiconductor device encapsulated with the resin composition for semiconductor encapsulation and a process for the production of the semiconductor device. The resin composition for semiconductor encapsulation comprises the following components (A) to (D) and has a viscosity of 700 Pa•s or higher at 25° C. and 500 Pa•s or lower at 80° C.: (A) an epoxy resin; (B) an acid anhydride-based curing agent; (C) a latent curing accelerator; and (D) an inorganic filler.Type: GrantFiled: October 6, 2000Date of Patent: April 29, 2003Assignee: Nitto Denko CorporationInventors: Tadaaki Harada, Toshitsugu Hosokawa
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Patent number: 6541853Abstract: A structure and method thereof for providing an electrically conductive path between a first conductive point and a second conductive point. The structure includes an insulating material disposed between the first conductive point and the second conductive point. A dipole material is distributed within the insulating material. The dipole material is comprised of randomly oriented magnetic particles. The magnetic particles in a selected localized region of the insulating material are aligned to form an electrically conductive path between the first conductive point and the second conductive point through the insulating material.Type: GrantFiled: September 7, 1999Date of Patent: April 1, 2003Assignee: Silicon Graphics, Inc.Inventor: William Patrick Hussey
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Publication number: 20030057574Abstract: A highly moisture-sensitive element and method of making such element includes an encapsulation enclosure encapsulating all of the highly moisture-sensitive electronic devices on a substrate and a sealing material positioned between the substrate and the encapsulation enclosure to form a complete seal between the substrate and the encapsulation enclosure around each highly moisture-sensitive electronic device or around groups of highly moisture-sensitive electronic devices.Type: ApplicationFiled: September 21, 2001Publication date: March 27, 2003Applicant: Eastman Kodak CompanyInventors: Michael L. Boroson, John Schmittendorf, Jeffrey P. Serbicki
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Publication number: 20030052414Abstract: A plasma conditioning method of improving the adhesion between an integrated circuit chip, having active and passive surfaces, the active surface polymer-coated and having a plurality of electrical coupling members, and an insulating underfill material. The method comprises the steps of positioning a wafer having a plurality of integrated circuits, including the coupling members, in a vacuum chamber of a plasma apparatus so that the polymer-coated surface faces the plasma source. Next, a plasma is initiated; the ion mean free path is controlled so that the ions reach the wafer surface with predetermined energy. The wafer surface is then exposed to the plasma for a length of time sufficient to roughen the polymer surface, clean the polymer surface from organic contamination and improve the surface affinity to adhesion. The adhesion ability of this surface to organic underfill material is thus enhanced.Type: ApplicationFiled: September 14, 2001Publication date: March 20, 2003Inventors: Marvin W. Cowens, Masood Murtuza, Vinu Yamunan, Charles Odegard
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Patent number: 6534707Abstract: A method to absorb magnetic fields begins by placing an electronic unit into a fixture. The electronic unit contains at least one electrical component, such as a microchip, that requires a reduction of a magnetic field. The microchip can be surrounded by a containment apparatus, such as a mold, into which encapsulant is poured. Exclusion devices, such as masks, protect components that should not be coated. Once the electronic unit is prepared, it is exposed to magnetic field interference. At this point, encapsulant is poured into all molds on the electronic unit. Ferrite particles comprise a portion of the encapsulant and initially are randomly distributed throughout. When the ferrite particles are exposed to a magnetic field, they migrate along the generated field lines and absorb the magnetic field. After the new distribution of ferrite particles occurs, the encapsulant can be cured.Type: GrantFiled: October 11, 2000Date of Patent: March 18, 2003Assignee: Visteon Global Technologies, Inc.Inventors: Philip M. Bator, Andrew R. Macko, Jack H. King, Jr.
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Patent number: 6528857Abstract: An image sensor package includes an image sensor having an upper surface. The image sensor further includes an active area and bond pads on the upper surface. A window is supported above the active area by a window support. Interior traces are formed on a lower surface of a step up ring. Electrically conductive bumps are formed between the interior traces on the lower surface of the step up ring and the bond pads on the upper surface of the image sensor thus flip chip mounting the step up ring to the image sensor. Electrically conductive vias extend through the step up ring to electrically connect the interior traces to exterior traces formed on an upper surface of the step up ring.Type: GrantFiled: November 13, 2000Date of Patent: March 4, 2003Assignee: Amkor Technology, Inc.Inventors: Thomas P. Glenn, Steven Webster, Markus K. Liebhard
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Patent number: 6525429Abstract: A method of making a microelectronic assembly including a compliant interface includes providing a first support structure, such as a flexible dielectric sheet, having a first surface and a porous resilient layer on the first surface of the first support structure, stretching the first support structure and bonding the stretched first support structure to a ring structure. The first surface of a second support structure, such as a semiconductor wafer, is then abutted against the porous layer and, desirably after the abutting step, a first curable liquid is disposed between the first and second support structures and within the porous layer. The first curable liquid may then be at least partially cured.Type: GrantFiled: March 2, 2000Date of Patent: February 25, 2003Assignee: Tessera, Inc.Inventors: Zlata Kovac, Craig Mitchell, Thomas Distefano, John Smith
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Patent number: 6521354Abstract: An epoxy resin comprising (A) an epoxy resin, (B) a curing agent and (C) a filler, in which the epoxy resin (A) contains a bisphenol F-type epoxy compound (a), the filler (C) contains spherical silica and the filler (C) accounts for from 88 to 96% by weight of the resin composition, has good soldering heat resistance enough for high-temperature solder reflow and has good moldability. A semiconductor device encapsulated with the resin composition is useful for use in electronic appliances.Type: GrantFiled: April 4, 2001Date of Patent: February 18, 2003Assignee: Toray Industries, Inc.Inventors: Hiroo Shimizu, Katsuhiro Niwa, Masayuki Tanaka
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Patent number: 6521989Abstract: An electronic package and/or package lid includes at least one connection slot for receiving a line, such as an optical fiber. The package and/or package lid also includes at least one sealant slot proximate the connection slot. Optical fibers are connected to a component, such as an opto-electronic component, through the connection slot. A sealant provided via the sealant slot hermetically seals the optical fibers within the connection slot.Type: GrantFiled: October 8, 1998Date of Patent: February 18, 2003Assignee: Honeywell Inc.Inventor: Ping Zhou
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Patent number: 6519844Abstract: An integrated circuit package manufacturing process is described which reduces or eliminates the formation of voids in a molding compound between a die and an underlying substrate. The process includes providing the substrate, which has an upper surface and an air space above the upper surface. Electrically conductive vias are formed through the upper surface of the substrate which extend at least partially through the substrate, and fluid communication is provided between the vias and the overlying air space. The process includes attaching the integrated circuit die to the upper surface of the substrate over at least a portion of the vias, while leaving a gap between the die and the upper surface of the substrate. The process further includes flowing the molding compound into the gap between the die and the upper surface of the substrate while maintaining fluid communication between the vias and the air space.Type: GrantFiled: August 27, 2001Date of Patent: February 18, 2003Assignee: LSI Logic CorporationInventors: Kumar Nagarajan, Seng Sooi Lim, Chok J. Chia
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Patent number: 6522023Abstract: Radio frequency-transmissive compositions having reduced dissipation factors, microelectronic devices, and in particular, wireless radio frequency communication devices which utilize such compositions, and methods of forming the same are described. In one implementation, a liquid resin is provided and a solid organic polymer filler material is provided within the resin to impart a degree of radio frequency. transmissivity which is greater than that of the resin alone, i.e. the composition has a reduced dissipation factor. An exemplary resin comprises epoxy and an exemplary filler material is a polytetrafluoroethylene powder. In another implementation, such composition is formed or applied over a substrate which includes an antenna formed thereon and cured to provide a solid coating. The substrate can also have integrated circuitry and a battery mounted thereon to provide a wireless communication device. In such a case, the composition can be formed over and cured atop the integrated circuitry and the battery.Type: GrantFiled: April 20, 2001Date of Patent: February 18, 2003Assignee: Micron Technology, Inc.Inventor: Rickie C. Lake
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Patent number: 6518332Abstract: Semiconductor encapsulating epoxy resin compositions comprising an epoxy resin, a phenolic resin curing agent, a fire retardant comprising zinc molybdate carried on spherical silica having a mean particle diameter of 0.2-20 &mgr;m and a specific surface of 1-20 m2/g, and an inorganic filler are able to provide cured products having excellent fire retardance. The compositions have good flow and curing properties and excellent reliability and do not pose a hazard to human health or the environment.Type: GrantFiled: April 25, 2001Date of Patent: February 11, 2003Assignee: Shin-Etsu Chemical Co., Ltd.Inventors: Eiichi Asano, Kazutoshi Tomiyoshi, Masachika Yoshino, Toshio Shiobara, Shoichi Osada
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Patent number: 6518675Abstract: A thermal-stress-absorbing interface structure between a semiconductor integrated circuit chip and a surface-mount structure, and a method for manufacturing the same. The thermal-stress-absorbing interface structure comprises an elongated conductive-bump pad having a first length-wise end and a second length-wise end, and a side. The thermal-stress-absorbing interface structure includes means for allowing the first end of the pad to move up when the second end of the pad moves down and alternately allowing the first end to move down when the second end moves up, upon thermal cycling. The means has a center axis and the up-and-down movements of the pad are balanced on the center axis. In accordance with this novel structure of the present invention, interconnection reliability such as solder joint reliability can be significantly improved.Type: GrantFiled: December 29, 2000Date of Patent: February 11, 2003Assignee: Samsung Electronics Co., Ltd.Inventors: Gu-Sung Kim, Dong-Hyeon Jang, Min-Young Son, Sa-Yoon Kang
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Patent number: 6518678Abstract: A method for inhibiting damage caused to semiconductor die packages during a molding process, and the semiconductor die packages formed therefrom, is described. One or more openings are provided in a die carrier which are filled with a material which is more resistant to compressive forces than the carrier.Type: GrantFiled: December 29, 2000Date of Patent: February 11, 2003Assignee: Micron Technology, Inc.Inventors: Stephen L. James, Brad D. Rumsey
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Publication number: 20030025214Abstract: Sealing resin comprising a resin component and filler mixed in the resin component, the filler having grain size distribution with a plurality of grain size peaks. The complex internal structure can be filled with the sealing resin including the filler particles with the plurality of the filler distribution peaks.Type: ApplicationFiled: August 1, 2002Publication date: February 6, 2003Inventor: Tsumoru Takado
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Publication number: 20030020182Abstract: The invention concerns an electronic device such as a smart card which includes at least a microcircuit embedded in a carrier medium and which includes exit hubs linked to interface elements composed of a terminal block and/or an antenna. The connections between the exit hubs and the interface elements are made by depositing a low-viscosity conducting substance which remains flexible after its application, using a syringe or similar device. Preferably, a polymer resin charged with conducting or intrinsically conducting particles is used for the connections.Type: ApplicationFiled: September 16, 2002Publication date: January 30, 2003Inventors: Rene-Paul Blanc, Jean-Christophe Fidalgo, Philippe Patrice
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Patent number: 6507122Abstract: An integrated circuit chip package wherein the chip is encapsulated prior to mechanical bonding to a packaging substrate. The package provides a continuous adhesive interface between the encapsulated chip and surrounding encapsulant, and the substrate. This structure eliminates discontinuities in flatness and their associated stress states resulting in more reliable package contacts.Type: GrantFiled: July 16, 2001Date of Patent: January 14, 2003Assignee: International Business Machines CorporationInventor: Edmund D. Blackshear
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Patent number: 6507049Abstract: A packaged solid state device having a package, a chip, and an encapsulate having an epoxy resin, a boron containing catalyst that is essentially free of halogen. A LED device having a package, a LED chip, a encapsulate having a cycloaliphatic epoxy resin and a boroxine catalyst essentially free of halogen. A method of encapsulating a solid state device whereby a solid state device is placed into a package, and an encapsulant comprising an epoxy resin, and a boron containing catalyst that is essentially free of halogen, are provided.Type: GrantFiled: September 1, 2000Date of Patent: January 14, 2003Assignee: General Electric CompanyInventors: Gary William Yeager, Malgorzata Rubinsztajn
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Patent number: 6500564Abstract: An epoxy resin composition comprising (A) a polyfunctional epoxy resin, (B) a phenolic resin, (C) an inorganic filler, and (D) curing catalyst-containing microcapsules having a mean particle size of 0.5-50 &mgr;m is suited for semiconductor package encapsulation since it minimizes the warpage of packages and has satisfactory catalyst latency, storage stability and cure.Type: GrantFiled: August 18, 2000Date of Patent: December 31, 2002Assignee: Shin-Etsu Chemical Co., Ltd.Inventors: Toshio Shiobara, Kazuhiro Arai, Hidenori Mizushima, Shigeki Ino, Yasuo Kimura, Takayuki Aoki
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Publication number: 20020171156Abstract: A semiconductor device comprises: a support member (20) on which a land (24) is formed; a semiconductor chip (10) having a bump for an electrode (12) that is disposed on the land (24), and to be bonded face-down to a support member (20); and resin (30) which is provided as an adhesive between the semiconductor chip (10) and the support member (20), which is allowed to contract on hardening, and which causes pressure-bonding between the land (24) and the bump (12) by the stress due to this hardening contraction. The stress therein is partially absorbed by elastic deformation of at least the support member (20).Type: ApplicationFiled: May 10, 2002Publication date: November 21, 2002Applicant: Seiko Epson CorporationInventor: Nobuaki Hashimoto
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Patent number: 6479167Abstract: A sealing material for flip chip-type semiconductor devices comprises a liquid epoxy resin composition which includes (A) a liquid epoxy resin, (B) an optional curing agent, (C) an inorganic filler, and (D) 1 to 15 parts by weight of a microencapsulated catalyst per 100 parts by weight of components A and B combined. The excellent thin-film penetration and shelf stability of the sealing material confer a very high reliability to flip chip-type semiconductor devices made using the sealing material.Type: GrantFiled: February 1, 2001Date of Patent: November 12, 2002Assignee: Shin-Etsu Chemical Co., Ltd.Inventors: Kazuaki Sumita, Toshio Shiobara
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Patent number: 6472748Abstract: A system and method for maintaining desired circuit component attributes is shown. According to a preferred embodiment, a high frequency circuit component, such as a MMIC, is retained in a circuit using a degradeable material, such as silver filled epoxy, wherein a portion of the degradeable material remains exposed. A protective coating of resin is applied to the exposed portion of the degradeable material by preferably depositing a predetermined amount of protective material, such as an epoxy resin, a void near the exposed portion of the degradeable material. The protective material preferably migrates to fully cover the exposed portion of the degradeable material without covering the circuit component. Accordingly, the circuit component is protected from substantial changes in operation characteristics due to the protective material and likewise is protected from changes in operation characteristics due to degradation of the degradeable material resulting from exposure.Type: GrantFiled: March 6, 2000Date of Patent: October 29, 2002Assignee: Harris Broadband Wireless Access, Inc.Inventor: Carl Edward Calvert
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Patent number: 6469394Abstract: Interconnect structures and methods for making interconnect structures are disclosed. A typical interconnect structure has a tapered first end portion having a first substantially planar surface and a concave surface adjacent to the first planar surface. A second end portion of the interconnect structure includes a second substantially planar surface. The second planar surface has a larger area than the first planar surface. An intermediate portion is disposed between the first end portion and the second end portion.Type: GrantFiled: January 31, 2000Date of Patent: October 22, 2002Assignee: Fujitsu LimitedInventors: Connie M. Wong, Michael G. Lee
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Patent number: 6469074Abstract: Disclosed is a liquid epoxy resin composition for sealing a semiconductor device which comprises (A) a cyanic acid ester, (B) an epoxy resin, (C) an inorganic filler, (D) a metal chelate and/or a metal salt, and at least one of (E1) an acid anhydride, (E2) a dihydrazide compound and (F) a silicone resin gel, wherein at least one of components A and B is liquid at room temperature, component E1 is liquid at room temperature, and the weight ratio of component C to the total weight of the composition, the weight ratio of component A to component B, and the weight ratio of component E1, E2 or F to the total weight of the composition except component C each ranges a specific ratio.Type: GrantFiled: May 25, 2000Date of Patent: October 22, 2002Assignee: Matsushita Electric Works, Ltd.Inventors: Hirohisa Hino, Taro Fukui, Kenji Kitamura, Shinji Hashimoto, Naoki Kanagawa
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Patent number: 6468448Abstract: A pH adjusting agent is added to a conductive adhesive to prevent the dissolution of a conductive particle to improve the reliability of a mounting structure, wherein when a pH environment is produced in which the conductive particle is easy to dissolve in the surrounding of the conductive adhesive, the pH adjusting agent can change the pH environment to a pH environment in which the conductive particle is resistant to dissolving.Type: GrantFiled: October 19, 2000Date of Patent: October 22, 2002Assignee: Matsushita Electric Industrial Co., Ltd.Inventors: Kazuyoshi Amami, Emiko Igaki, Minehiro Itagaki
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Patent number: 6469369Abstract: A leadframe having a mold inflow groove provides for an increase in the number of inner leads for connecting with outer electrical sources and accurate singulation. A molding compound is introduced through mold inflow grooves positioned at both sides of a tie bar into the cavity so that no culls remain on the tie bar after molding. The end of a runner of the mold die is positioned at a sufficient distance away from the molding area of the leadframe to allow the top and bottom surfaces of the tie bar to remain free of culls.Type: GrantFiled: June 30, 2000Date of Patent: October 22, 2002Assignee: Amkor Technology, Inc.Inventor: Hyung Ju Lee
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Patent number: 6469379Abstract: A curable material useful as thermal material comprises at least one vinyl-terminated silicone oil; at least one conductive filler; and at least one hydrogen terminated silicone oil. The hydrogen terminated silicone oil is used to reduce a shear modulus G′ of the cured thermal interface material.Type: GrantFiled: March 30, 2001Date of Patent: October 22, 2002Assignee: Intel CorporationInventor: James C. Matayabas, Jr.
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Patent number: 6448665Abstract: In order to suppress the warp of a semiconductor package of an over-coat structure, when thermal expansion coefficient, Young's modulus and thickness of the wiring substrate are &agr;s, Es and Hs, respectively, and thermal expansion coefficient, Young's modulus and thickness of the resin layer are &agr;r, Er and Hr, respectively, the value R of (&agr;r·Er·Hr)/(&agr;s·Es·Hs) is set to be approximately 0.6 or more. With adoption of such a configuration, stress exerting on a semiconductor package can be effectively alleviated, and coplanarity of the semiconductor package can be improved.Type: GrantFiled: October 14, 1998Date of Patent: September 10, 2002Assignee: Kabushiki Kaisha ToshibaInventors: Takahito Nakazawa, Yoshiaki Sugizaki
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Patent number: 6448663Abstract: A semiconductor device, a mounting structure thereof, a liquid crystal device, and an electronic apparatus having an improved bump electrode structure, such that the bump electrodes and corresponding electrode terminals can be electrically connected through an anisotropic conductive film without compromising, or causing deterioration of, the electrical characteristics or reliability of the device, even when the bump electrodes are formed with a narrow pitch. Since the bump electrodes of the semiconductor device are tapered inward from top to bottom, the base portions of adjacent bump electrodes are spaced apart from each other by wider gaps than the corresponding upper portions. Thus, a large number of conductive particles in the conductive film do not gather between adjacent bump electrodes to cause short-circuiting therebetween.Type: GrantFiled: March 3, 2000Date of Patent: September 10, 2002Assignee: Seiko Epson CorporationInventor: Kenji Uchiyama
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Publication number: 20020109241Abstract: A method for producing a molded flip chip package is described. The incomplete flip chip package comprising a thin substrate and a silicon chip is placed in a mold. A resin, preferably epoxy, is injected into the mold filling the gap between the surface of the flip chip and the adjacent substrate. Additionally, a stiffening structure is formed to increase the overall rigidity of the thin substrate specifically and the package as a whole.Type: ApplicationFiled: December 19, 2000Publication date: August 15, 2002Inventors: Takashi Kumamoto, Kinya Ichikawa
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Publication number: 20020105093Abstract: A composition for use in making an encapsulant usable in the encapsulation of a semiconductor chip assembled to a substrate with C4 solder interconnections therebetween, which in turn may form part of an electronic package. The composition comprises a resin, a flexibilizing agent and a filler material.Type: ApplicationFiled: February 7, 2001Publication date: August 8, 2002Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATIONInventor: Konstantinos I. Papathomas
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Patent number: 6426021Abstract: An anisotropically electroconductive adhesive material is configured of a thermosetting resin and electroconductive particles dispersed in the thermosetting resin, wherein a 10% modulus of compressive elasticity (E) in the electroconductive particles and the modulus of longitudinal elasticity (E′) of the projecting electrodes of the electronic element to be connected by the anisotropically electroconductive adhesive material satisfy the below relational Formula (1) 0.Type: GrantFiled: March 16, 2001Date of Patent: July 30, 2002Assignee: Sony Chemicals Corp.Inventors: Yasuhiro Suga, Motohide Takeichi
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Patent number: 6426566Abstract: An anisotropic conductive film 3 bonds the semiconductor chip 1 to the substrate 2 while serving as an electrically conductive medium therebetween. The anisotropic conductive film 3 is produced by laminating, in a unitary body, an electrically conductive particle containing layer 31 constructed of a mixture of electrically conductive particles and a resin, and an electrically non-conductive layer 32 having a fluidity lower than the fluidity of the electrically conductive particle containing layer.Type: GrantFiled: July 26, 2000Date of Patent: July 30, 2002Assignee: Seiko Epson CorporationInventor: Toshihiro Sawamoto
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Publication number: 20020096789Abstract: An encapsulation mold for forming an encapsulation layer over a semiconductor assembly is disclosed. A semiconductor assembly with multiple semiconductor dies secured to a single semiconductor support structure is inserted into an encapsulation mold. The mold contains a first section and a second section, which form a cavity around the assembly. The mold contains an aperture for transferring encapsulating material into the mold cavity. One of the mold sections has a design feature, such as a raised rib or groove interconnecting at approximately the separation or saw-cut regions of the individual dies of the assembly. Encapsulation material is inserted into the mold cavity until the cavity is filled. The mold section design feature shapes the top surface of the encapsulation layer. The mold is removed leaving the exterior surface of the encapsulation layer patterned with the design feature.Type: ApplicationFiled: January 23, 2001Publication date: July 25, 2002Inventor: Todd O. Bolken
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Publication number: 20020098625Abstract: Conductive hardening resin for a semiconductor device of the present invention contains metal powder for providing electric conduction between electrodes positioned on the front of a semiconductor chip and a wiring material including lead terminals via a conductive plate. The resin has a modulus of elasticity of 2.0×109 Pa or below when hardened. The resin prevents the contact resistance of the metal plate, lead terminals and semiconductor chip from increasing in the event of temperature cycling tests and a pressure cooker tests. Further, the resin frees the metal plate and chip from peel-off and corrosion, respectively.Type: ApplicationFiled: January 23, 2002Publication date: July 25, 2002Applicant: NEC CORPORATIONInventors: Akira Fukuizumi, Kazuto Oonami
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Patent number: 6414398Abstract: The present invention is directed to a resin ceramic composition that includes a ceramic filler in an amount effective for providing a single composition with a magnetic field of at least one gauss.Type: GrantFiled: September 20, 2000Date of Patent: July 2, 2002Assignee: Dana CorporationInventor: Ronald J. Wolf
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Patent number: 6414397Abstract: An anisotropic conductive film includes hard portions at the two edges and a soft portion constituting the remainder. Due to such a construction, when a semiconductor chip is bonded to a substrate by thermocompression, the hard portions inhibit the soft portion from flowing toward the periphery of the semiconductor chip. Thereby, it is possible to prevent the anisotropic conductive film from adhering to a hot pressing tool.Type: GrantFiled: July 26, 2000Date of Patent: July 2, 2002Assignee: Seiko Epson CorporationInventor: Toshihiro Sawamoto
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Patent number: 6407461Abstract: The electrical interconnections between an integrated circuit chip assembly are encapsulated and reinforced with a high viscosity encapsulant material in a single step molding process wherein a mold is placed over an integrated circuit chip assembly and encapsulant material is dispensed through an opening in the mold and forced around and under the integrated circuit chip by external pressure encapsulating the integrated circuit chip assembly. An integrated circuit chip assembly having a reinforced electrical connection which is more resistant to weakening as a result is stress created by differences in coefficient of thermal expansion between the integrated circuit chip and the substrate to which the integrated circuit chip is attached is produced.Type: GrantFiled: June 27, 1997Date of Patent: June 18, 2002Assignee: International Business Machines CorporationInventors: Donald Seton Farquhar, Konstantinos Papathomas
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Publication number: 20020070439Abstract: A silicone resin for sealing a semiconductor chip is disclosed. A cured silicone resin, which is obtained by curing the silicone resin at a given temperature, has a number of percent elongation after fracture measured at a room temperature not less than 4% of a penetration number at a room temperature. A semiconductor device sealed with the silicone resin, when applied to a heat cycle or a vibration test, provides resistances to cracking, voiding, or interfacial peeling-off. The cured silicone resin may have a penetration number not less than 10 and not more than 80 and a loss elasticity not less than 17% of the storage elasticity. A resin member made of the cured silicone resin and sealing a semiconductor chip may include a filler, such as silica or alumina, of which coefficient of linear thermal expansion is lower than that of the cured silicone resin.Type: ApplicationFiled: October 4, 2001Publication date: June 13, 2002Applicant: Mitsubishi Denki Kabushiki KaishaInventors: Seiki Hiramatsu, Satoshi Yanaura, Masuo Koga, Hirofumi Fujioka
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Patent number: 6392294Abstract: A semiconductor device is provided which includes an insulating substrate, a conductive terminal supported by the substrate, a semiconductor chip mounted on the substrate, and a protection coating for enclosing the chip. The protection coating is integrally formed with an anchoring portion. The substrate is formed with an engaging portion for engagement with the anchoring portion of the coating.Type: GrantFiled: December 15, 1999Date of Patent: May 21, 2002Assignee: Rohm Co., Ltd.Inventor: Tomoji Yamaguchi
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Patent number: 6392305Abstract: A chip scale package, which can be fabricated on a print circuit board, comprises a chip having multiple electrodes, a plurality of conductive blocks, and an insulating material. The electrodes of the chip are electrically connected to the conductive blocks respectively through one of the surfaces thereof by a conductive bond, and are electrically connected to the circuit on the print circuit board through the side surfaces thereof. The insulated material is filled on the chip surface between the conductive blocks, and in the gap between the conductive blocks and the chip.Type: GrantFiled: June 12, 2000Date of Patent: May 21, 2002Inventors: Chih-Kung Huang, Shu-Hua Tseng
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Patent number: 6384472Abstract: A leadless image sensor package constructed on a lead frame includes a die pad and a plurality of leads disposed at the periphery of the die pad. A molding compound, disposed on the top surface of the lead frame and being surrounding the die pad on the periphery of the lead frame, fills the clearance between the die pad and the leads and exposes, on the top surface, the die pad and the wire-bonding portion of the leads. Moreover, the lead frame and the molding compound constitute a “chip containing space” with chip set therein. Further, the chip with its back surface attached to the top surface of the die pad makes use of the wires to electrically connect to the bonding pad and the top surface of the wire-bonding portion, thereafter, a transparent lid is used to cap and seal the “chip containing space”.Type: GrantFiled: March 24, 2000Date of Patent: May 7, 2002Assignee: Siliconware Precision Industries Co., LTDInventor: Chien-Ping Huang
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Patent number: 6383660Abstract: An epoxy resin composition for encapsulating a semiconductor device comprising as essential components (A) an epoxy resin; (B) a phenolic resin; (C) a curing accelerator; and (D) a hollow inorganic filler having an average particle size of 4 to 100 &mgr;m and an average shell thickness of 1.5 &mgr;m or more, wherein the amounts of the component (A) and the component (B) are adjusted such that a total amount of X and Y (X+Y) is 350 or more, wherein X is an epoxy equivalent of the epoxy resin (A), and Y is a hydroxyl group equivalent of the phenolic resin (B); and a semiconductor device comprising a semiconductor element encapsulated by the epoxy resin composition.Type: GrantFiled: April 6, 2001Date of Patent: May 7, 2002Assignee: Nitto Denko CorporationInventor: Kazumasa Igarashi
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Patent number: 6376923Abstract: A sealing material comprising (A) a liquid epoxy resin, (B) a curing agent, (C) a copolymer obtained through addition reaction between an alkenyl group-containing epoxy resin and an SiH group-containing organopolysiloxane, (D) an inorganic filler having a specific surface area of less than 4 m2/g, and (E) a fine inorganic filler having a specific surface area of at least 4 m2/g and surface treated with an aminosilane or organosilazane compound is suitable for sealing flip-chip type semiconductor devices. Despite high loading of inorganic fillers, the material has a low viscosity in the low shear region and improved thin-film infiltration and forms a reliable seal.Type: GrantFiled: June 8, 2000Date of Patent: April 23, 2002Assignee: Shin-Etsu Chemical Co., Ltd.Inventors: Kazuaki Sumita, Kimitaka Kumagae, Miyuki Wakao, Toshio Shiobara
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Patent number: 6376922Abstract: Radio frequency-transmissive compositions having reduced dissipation factors, microelectronic devices, and in particular, wireless radio frequency communication devices which utilize such compositions, and methods of forming the same are described. In one implementation, a liquid resin is provided and a solid organic polymer filler material is provided within the resin to impart a degree of radio frequency transmissivity which is greater than that of the resin alone, i.e. the composition has a reduced dissipation factor. An exemplary resin comprises epoxy and an exemplary filler material is a polytetrafluoroethylene powder. In another implementation, such composition is formed or applied over a substrate which includes an antenna formed thereon and cured to provide a solid coating. The substrate can also have integrated circuitry and a battery mounted thereon to provide a wireless communication device. In such a case, the composition can be formed over and cured atop the integrated circuitry and the battery.Type: GrantFiled: March 15, 2000Date of Patent: April 23, 2002Assignee: Micron Technology, Inc.Inventor: Rickie C. Lake
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Patent number: 6359343Abstract: Phase Change Material (“PCM”) are used to reduce the range of temperature excursions in a semiconductor die attached to an interconnect substrate in the flip chip technology. In one embodiment a PCM underfill, which comprises PCM microspheres interspersed within a polymer, is dispensed in the interface area between the semiconductor die and the interconnect substrate. Reduction of the range of temperature excursions in the semiconductor die is achieved since the PCM underfill acts as a cushion to dampen the range of temperature excursions of the semiconductor die. During dissipation of power pulses in the semiconductor die, the PCM underfill absorbs energy from the semiconductor die by changing phase from solid to liquid without a concomitant rise in the temperature of the PCM underfill. Thus, the energy released when power pulses are being dissipated in the semiconductor die does not result in a rise in the temperature of the PCM underfill.Type: GrantFiled: March 5, 2001Date of Patent: March 19, 2002Assignee: Conexant Systems, Inc.Inventors: Abdolreza Langari, Seyed Hassan Hashemi