Abstract: This application discloses a method of manufacturing a photoelectronic device comprising steps of providing a semiconductor stack layer, forming at least one metal adhesive on the semiconductor stack layer by a printing technology, forming an electrode by heating the metal adhesive to remove the solvent in the metal adhesive, wherein an ohmic contact is formed between the electrode and the semiconductor stack layer.

Abstract: A method of fabricating solar cell chips. The method includes creating an integrated circuit chip process route for fabricating integrated circuit chips using integrated circuit wafers in an integrated circuit fabrication facility; creating a solar cell process route for fabricating solar cells using solar cell wafers in the integrated circuit fabrication facility; releasing integrated circuit chip wafers and solar cell wafers into tool queues of tools of the an integrated circuit fabrication facility; and processing the solar cell wafers on at least some tools of the integrated circuit fabrication facility used to process the integrated circuit wafers. Also the process used to fabricate the solar cell chips.

Abstract: Disclosed herein are a method of depositing a thin film and a method of manufacturing a semiconductor using the same, having high selectivity by increasing etching resistance while an extinction coefficient associated with anti-reflectivity is maintained low. The method of depositing a thin film according to the invention includes (a) depositing an carbon anti-reflective film on the bottom film of a substrate; and (b) adding a compound containing nitrogen (N), fluorine (F) or silicon (Si) to the surface or the inner portion of the carbon anti-reflective film, to deposit a thin film of a-C:N, a-C:F or a-C:Si, having high selectivity, to a thickness from 1 to 100 nm using an atomic layer deposition process. Therefore, an ultrathin film having etching resistance is formed on or in the carbon anti-reflective film and the density and compressive stress of the carbon anti-reflective film are increased, thus increasing etching selectivity.

Abstract: A method of fabricating metal film stacks is described that reduces or eliminates adverse effects of photolithographic misalignments. A bottom critical dimension is increased by removal of a bottom titanium nitride barrier.

Abstract: When an interconnect structure is built on porous ultra low k (ULK) material, the bottom of the trench and/or via is usually damaged by a following metallization process which may be suitable for dense higher dielectric materials. Embodiment of the present invention may provide a method of forming an interconnect structure on an inter-layer dielectric (ILD) material. The method includes steps of treating an exposed area of said ILD material to create a densified area, and metallizing said densified area.

Abstract: Example embodiments may provide phase-change material layers and a method of forming a phase-change material layer and devices using the same by generating a plasma including helium and/or argon in a reaction chamber, forming a first material layer on the object by introducing a first source gas including a first material, forming a first composite material layer on the object by introducing a second source gas including a second material into the reaction chamber, forming a third material layer on the first composite material layer by introducing a third source gas including a third material, and forming a second composite material layer on the first composite material layer by introducing a fourth source gas including a fourth material. Example embodiment phase-change material layers including carbon may be more easily and/or quickly formed at lower temperatures under the helium/argon plasma environment by providing the source gases for various feeding times.

Abstract: Briefly, in accordance with an embodiment of the invention, a method to manufacture a phase change memory is provided. The method may include forming a first electrode contacting the sidewall surface and the bottom surface of the phase change material. The method may further include forming a second electrode contacting the top surface of the phase change material.

Abstract: A method of manufacturing a semiconductor device according to the invention is an effective technique for ensuring a sufficient process margin and enabling the formation of a fine pattern in a peripheral circuit region. The method includes forming an anti-reflective layer with a varying thickness in a peripheral circuit region and a cell region, and then over-etching the anti-reflective layer in the peripheral circuit region. The method is capable of improving the data processing speed of a semiconductor device and therefore increases the device efficiency.

Abstract: In a method of manufacturing an imprint substrate, a concave pattern, which is recessed, is formed on a top surface of the mold substrate. A light blocking layer is formed on the concave pattern and the top surface of the mold substrate. After bonding an adhesive substrate to the mold substrate such that the adhesive substrate faces the mold substrate, the adhesive substrate is separated from the mold substrate, so that the light blocking layer on the top surface is removed from the mold substrate. An imprint substrate having the light blocking layer only on the concave pattern is formed.

Abstract: A method of etching a substrate is provided. The method of etching a substrate includes transferring a pattern into the substrate using a double patterned amorphous carbon layer on the substrate as a hardmask. Optionally, a non-carbon based layer is deposited on the amorphous carbon layer as a capping layer before the pattern is transferred into the substrate.

Abstract: A structure applied to a photolithographic process is provided. The structure includes at least a film layer, an optical isolation layer, an anti-reflection coating and a photoresist layer sequentially formed over a substrate. In the photolithographic process, the optical isolation layer stops light from penetrating down to the film layer. Since the optical isolation layer is set up underneath the photoresist layer, light emitted from a light source during photo-exposure is prevented from reflecting from the substrate surface after passing through the film layer. Thus, the critical dimensions of the photolithographic process are unaffected by any change in the thickness of the film layer.

Abstract: A method of forming a dual damascene pattern for a metal interconnection by a relatively simple process. Only a portion of an interlayer insulating film is initially etched when forming a via hole. When the interlayer insulating is etched to form a trench, the remaining portion of the via hole may be etched simultaneously.

Abstract: A method of manufacturing a semiconductor device is disclosed. In the method of manufacturing the semiconductor device, a first insulating layer is formed on a semiconductor substrate. A metal line layer and an etch-stop layer are formed over the first insulating layer. The etch-stop layer and the metal line layer are patterned to form a metal line. A second insulating layer is formed on the first insulating layer and the etch-stop layer. A first etch process for etching part of the second insulating layer is performed by using a first etch gas so that the etch-stop layer is exposed. A second etch process for removing the etch-stop layer is performed by using a second etch gas so that the metal line is exposed.

Abstract: In one aspect, the invention includes a semiconductor processing method. An antireflective material layer is formed over a substrate. At least a portion of the antireflective material layer is annealed at a temperature of greater than about 400° C. A layer of photoresist is formed over the annealed antireflective material layer. The layer of photoresist is patterned. A portion of the antireflective material layer unmasked by the patterned layer of photoresist is removed. In another aspect, the invention includes the following semiconductor processing. An antireflective material layer is formed over a substrate. The antireflective material layer is annealed at a temperature of greater than about 400° C. A layer of photoresist is formed over the annealed antireflective material layer. Portions of the layer of photoresist are exposed to radiation waves. Some of the radiation waves are absorbed by the antireflective material during the exposing.

Abstract: The invention includes new organic-containing compositions that can function as an antireflective layer for an overcoated photoresist. Compositions of the invention also can serve effectively as a hard mask layer by exhibiting a sufficient plasma etch selectivity from an undercoated layer. Preferred compositions of the invention have a high Si content and comprise a blend of distinct resins.

Abstract: A semiconductor device structure is described, including a MOS transistor, a silicon-rich silicon nitride layer having a refractive index of about 2.00-2.30, and a dielectric layer. The silicon-rich silicon nitride layer is disposed between the MOS transistor and the dielectric layer, and covers the source/drain region, the spacer and the gate conductor of the MOS transistor.

Abstract: Techniques are disclosed for fabricating a device using a photolithographic process. The method includes providing a first anti-reflective coating over a surface of a substrate. A layer which is transparent to a wavelength of light used during the photolithographic process is provided over the first anti-reflective coating, and a photosensitive material is provided above the transparent layer. The photosensitive material is exposed to a source of radiation including the wavelength of light. Preferably, the first anti-reflective coating extends beneath substantially the entire transparent layer. The complex refractive index of the first anti-reflective coating can be selected to maximize the absorption at the first anti-reflective coating to reduce notching of the photosensitive material.

Abstract: A semiconductor device structure is described, including a MOS transistor, a silicon-rich silicon nitride layer having a refractive index of about 2.00-2.30, and a dielectric layer. The silicon-rich silicon nitride layer is disposed between the MOS transistor and the dielectric layer, and covers the source/drain region, the spacer and the gate conductor of the MOS transistor.

Abstract: A method of etching a dielectric layer by a conductive mask includes providing the dielectric layer on a substrate, forming a pattern conductive mask on the dielectric layer, the pattern conductive mask contacting with the substrate, processing a dry etching on the dielectric layer by the pattern conductive mask. Because the conductive mask disperses a lot of electric charges, the electric charges are not able to be stored on the dry etched dielectric layer, and the multilevel interconnects and the elements under the dielectric layer will not burst.

Abstract: A semiconductor device manufacturing method using a KrF light source is disclosed. Embodiments relate to a method for manufacturing a semiconductor device including forming an oxide film over a semiconductor substrate. A gate conductor may be formed over the oxide film. An antireflective film may be formed over the gate conductor. A photoresist film may be formed over the antireflective film. The photoresist film may be photo-etched, thereby forming a first photoresist film pattern having a first line width. The antireflective film may be etched, using the first photoresist film pattern as a mask, thereby forming an antireflective film pattern. The first photoresist film pattern may be simultaneously laterally etched, thereby forming a second photoresist film pattern having a second line width corresponding to a final design value for the gate conductor.

Abstract: A method for patterning CNTs on a wafer wherein a CNT layer is provided on a substrate, a hard mask film is deposited on the CNT layer, a BARC layer (optional) is coated on the hard mask film, and a resist is patterned on the BARC layer (or directly on the hard mask film if the BARC layer is not included). Then, the resist pattern is effectively transferred to the hard mask film by etching the BARC layer (if provided) and etching partly into, but not entirely through, the hard mask film (i.e., etching is stopped before reaching the CNT layer) Then, the resist and the BARC layer (if provided) is stripped, and the hard mask pattern is effectively transferred to the CNTs by etching away (preferably by using Cl, F plasma) the portions of the hard mask which have been already partially etched away.

Abstract: An optical semiconductor device includes a first light receiving region and a second light receiving region provided on a substrate and the first and second light receiving regions include light receiving elements, respectively. A first anti-reflection film is formed in the first light receiving region of the substrate and a second anti-reflection film is formed in the second light receiving region of the substrate. The reflectance of the first anti-reflection film for a first wavelength range of light is lower than the reflectance of the second anti-reflection film for the first wavelength range of light and the reflectance of the second anti-reflection film for a second wavelength range of light which is different from the first wavelength range of light is lower than the reflectance of the first anti-reflection film for the second wavelength range of light.

Abstract: In accordance with the present invention, a method for manufacturing a single-crystal substrate comprising the steps of: preparing a square-shaped frame; pouring polycrystalline molten silicon into the prepared frame; cooling and crystallizing the molten silicon; and forming the single-crystal silicon substrate by transferring a heating element from one corner of the frame to another corner opposite the corner, thus simplifying the entire manufacturing process of the single-crystal substrate and reducing the material cost.

Abstract: The present invention is to provide an anti-reflective substrate, and the manufacturing method of the substrate. The method comprises the steps of: (a) providing a substrate; (b) depositing an amorphous silicon layer on the substrate; and (c) etching the amorphous silicon layer and the substrate by chemical etching in solutions, and the amorphous silicon layer is removed by the solutions. The effective reflectance of the anti-reflective substrate produced from the method of the present invention can be lower than 1%, and the absorption rate of the anti-reflective substrate is preferably from 70% to 90% in a wavelength range of 300 nm-900 nm.

Abstract: In a semiconductor memory device and a method of fabricating the same, a semiconductor memory device having a transistor and a data storing portion includes a heating portion interposed between the transistor and the data storing portion and a metal interconnection layer connected to the data storing portion, wherein the data storing portion includes a chalcogenide material layer, which undergoes a phase change due to a heating of the heating portion, for storing data therein.

Abstract: A lithographic structure consisting essentially of: an organic antireflective material disposed on a substrate; a vapor-deposited RCHX material, wherein R is one or more elements selected from the group consisting of Si, Ge, B, Sn, Fe and Ti, and wherein X is not present or is one or more elements selected from the group consisting of O, N, S and F; and a photoresist material disposed on the RCHX material. The invention is also directed to methods of making the lithographic structure, and using the structure to pattern a substrate.

Abstract: When a via-hole 26 and an interconnection trench 32 are formed in an interconnection films 16, 18 by using as a mask a hard mask 20 covering the region except via-hole forming region, and a hard mask 22 covering the region except an interconnection trench forming region, the hard mask 20 is isotropically etched to expose the upper surface of the inter-layer insulating film 18 at a periphery of the via-hole forming region and leave the hard mask 20 in the interconnection trench forming region except the periphery, and then the hard mask 20 and the insulating films 18, 16 are anisotropically etched, whereby the via-hole 26 having increased-width portion 34 at the upper part, and the interconnection trench 32 connected to the via-hole 26 at the increased-width portions 26 are formed.

Abstract: A method of manufacturing a semiconductor device includes providing a semiconductor substrate in which a floating gate pattern is formed. A dielectric layer, a conductive layer for a control gate, a tungsten silicide layer, a first silicon oxynitride layer, a hard mask layer, a second silicon oxynitride layer and an Organic Bottom Anti-Reflective Coating (BARC) layer are formed over the semiconductor substrate including the floating gate pattern. The BARC layer, the second silicon oxynitride layer, the hard mask layer and the first silicon oxynitride layer are removed. The tungsten silicide layer and the conductive layer for the control gate are removed. The dielectric layer is removed to form spacers on sides of the floating gate. The floating gate is then removed.

Abstract: By using a non-metallic hard mask for patterning low-k dielectric materials of advanced semiconductor devices, an enhanced degree of etch fidelity is obtained. The present invention may readily be applied to via first-trench last, trench first-via last schemes.

Abstract: Techniques are disclosed for fabricating a device using a photolithographic process. The method includes providing a first anti-reflective coating over a surface of a substrate. A layer which is transparent to a wavelength of light used during the photolithographic process is provided over the first anti-reflective coating, and a photosensitive material is provided above the transparent layer. The photosensitive material is exposed to a source of radiation including the wavelength of light. Preferably, the first anti-reflective coating extends beneath substantially the entire transparent layer. The complex refractive index of the first anti-reflective coating can be selected to maximize the absorption at the first anti-reflective coating to reduce nothing of the photosensitive material.

Abstract: A bi-layer anti-reflective coating for use in photolithographic applications, and specifically, for use in ultraviolet photolithographic processes. The bi-layered anti-reflective coating is used to minimize pattern distortion due to reflections from neighboring features in the construction of microcircuits. The bi-layer anti-reflection coating features a first layer, an absorption layer, disposed on a second layer, a dielectric layer, which is then disposed between a substrate and a photoresist layer. The dielectric/absorption layer comprises one combination selected from Ta/Al2O3, Ta/SiO2, Ta/TiO2, Ta/Ta2O5, Ta/Cr2O3, Ta/Si3N4, Ti/Al2O3, Ti/SiO2, Ti/TiO2, Ti/Ta2O5, Ti/Cr2O3, Ti/Si3N4, Cr/Al2O3, Cr/SiO2, Cr/TiO2, Cr/Ta2O5, Cr/Cr2O3, Cr/Si3N4, Al/Al2O3, Al/TiO2, Al/Ta2O5, Al/Cr2O3, Al/Si3N4, Ni/Al2O3, Ni/SiO2, Ni/TiO2, Ni/Ta2O5, Ni/Cr2O3, Ni/Si3N4, Ir/Al2O3, Ir/SiO2, Ir/TiO2, Ir/Ta2O5, Ir/Cr2O3, and Ir/Si3N4. At least the absorption and dielectric layers can be formed using vacuum deposition.

Abstract: A thin-film transistor, a thin-film transistor sheet, an electric circuit, and a manufacturing method thereof are disclosed, the method comprising the steps of forming a semiconductor layer by providing a semiconductive material on a substrate, b) forming an isolating area, which is electrode material-repellent, by providing an electrode material-repellent material on the substrate, and c) forming a source electrode on one end of the insulating area and a drain electrode on the other end of the insulating area, by providing an electrode material.

Abstract: A bi-layer anti-reflective coating for use in photolithographic applications, and specifically, for use in ultraviolet photolithographic processes. The bi-layered anti-reflective coating is used to minimize pattern distortion due to reflections from neighboring features in the construction of microcircuits. The bi-layer anti-reflection coating features a first layer, an absorption layer, disposed on a second layer, a dielectric layer, which is then disposed between a substrate and a photoresist layer. The dielectric/absorption layer comprises one combination selected from Ta/Al2O3, Ta/SiO2, Ta/TiO2, Ta/Ta2O5, Ta/Cr2O3, Ta/Si3N4, Ti/Al2O3, Ti/SiO2, Ti/TiO2, Ti/Ta2O5, Ti/Cr2O3, Ti/Si3N4, Cr/Al2O3, Cr/SiO2, Cr/TiO2, Cr/Ta2O5, Cr/Cr2O3, Cr/Si3N4, Al/Al2O3, Al/TiO2, Al/Ta2O5, Al/Cr2O3, Al/Si3N4, Ni/Al2O3, Ni/SiO2, Ni/TiO2, Ni/Ta2O5, Ni/Cr2O3, Ni/Si3N4, Ir/Al2O3, Ir/SiO2, Ir/TiO2, Ir/Ta2O5, Ir/Cr2O3, and Ir/Si3N4. At least the absorption and dielectric layers can be formed using vacuum deposition.

Abstract: A method of manufacturing micro-structure elements by utilizing molding glass includes the steps of forming a mold having a micro-structure pattern thereon by using an electroforming process, making a copy of the micro-structuring pattern on a glass structure by using glass molding technology, and filling clothing material on the glass substrate to form a micro-structure element with less complex and cost, thereby being suitable for mass production.

Abstract: A method for the duplication of microscopic patterns from a master to a substrate is disclosed, in which a replica of a topographic structure on a master is formed and transferred when needed onto a receiving substrate using one of a variety of printing or imprint techniques, and then dissolved. Additional processing steps can also be carried out using the replica before transfer, including the formation of nanostructures, microdevices, or portions thereof. These structures are then also transferred onto the substrate when the replica is transferred, and remain on the substrate when the replica is dissolved. This is a technique that can be applied as a complementary process or a replacement for various lithographic processing steps in the fabrication of integrated circuits and other microdevices.

Abstract: A method for manufacturing a semiconductor device which, on performing a via first Dual Damascene process, inhibits or prevents the formation of a void in a bottom anti-reflective coating filling a via hole. The method typically includes the steps of forming a bottom anti-reflective coating (BARC) in a via hole in an interlayer dielectric on a semiconductor substrate sufficiently to fill the via hole; disposing an acid diffusion material on the BARC; forming a cross-link layer between the BARC and the acid diffusion material; removing the remaining acid diffusion material; and etching the cross-link layer, the BARC and the interlayer dielectric to form a trench extending from an upper portion of the via hole.

Abstract: The present invention provides a nitrogen-free ARC layer, which is formed on the basis of silane and carbon dioxide by PECVD in a nitrogen-free deposition atmosphere. The optical characteristics may be tuned in a wide range, wherein, in particular, a back reflection into the resist is maintained at 3% or less. The ARC layer is well suited for 193 nm lithography.

Abstract: The present invention provides a nitrogen-free ARC/capping layer in a low-k layer stack, which, in particular embodiments, is comprised of carbon-containing silicon dioxide, wherein the optical characteristics are tuned to conform to the 193 nm lithography. Moreover, the ARC/capping layer is directly formed on the low-k material, thereby also preserving the integrity thereof during an etch and chemical mechanical polishing process.

Abstract: A method is provided for forming a semiconductor device that reduces metal-stress-induced photo misalignment by incorporating a multi-layered anti-reflective coating over a metal layer. The method includes providing a substrate with a conductive layer formed over the substrate, depositing a multi-layered anti-reflective coating (including alternating layers of titanium and titanium nitride), defining a plurality of conductive lines in connection with a first etching step, depositing a dielectric layer, and defining at least one via in connection with a second etching step.

Abstract: A nitrogenated carbon electrode suitable for use in a chalcogenide device and method of making the same are described. The electrode comprises nitrogenated carbon and is in electrical communication with a chalcogenide material. The nitrogenated carbon material may be produced by combining nitrogen and vaporized carbon in a physical vapor deposition process.

Abstract: In accordance with the invention, there is a semiconductor device comprising optical enhancement medium and there are methods of end point detection in an etching process and also in a planarization process using an optical enhancement medium such as an anti-reflective coating. The method can include forming a semiconductor structure having at least one trench in a first layer, forming a layer of anti-reflective coating over the first layer, depositing a second layer of material over the anti-reflective layer, and etching the second layer and the anti-reflective layer. The method can also include monitoring an optical signal from the etching process and stopping the etching process at a predetermined time after observing the optical signal from a plasma enhanced optical excitation of the anti-reflective coating and thereby detecting an endpoint of the etching process.

Abstract: A method including introducing a dielectric layer over a substrate between an interconnection line and the substrate, the dielectric layer comprising a plurality of alternating material layers; and patterning an interconnection to the substrate. An apparatus comprising a substrate comprising a plurality of devices formed thereon; and an interlayer dielectric layer comprising a base layer and a cap layer, the cap layer comprising a plurality of alternating material layers overlying the substrate.

Abstract: Aspects of the invention can provide an alignment method that is preferably applicable when manufacturing equipments by liquid-phase processing. The alignment method in a device manufacturing process can include forming of a functional film on a substrate by liquid-phase processing, forming an alignment mark on the substrate on which the functional film is formed so as to make a pattern of the alignment mark appear on a film that is formed after forming the functional film, and aligning the film that is formed after forming the functional film by using the alignment mark.

Abstract: A method of fabricating a semiconductor device. The method comprises creating a via in a dielectric layer that is formed on a substrate, filling the via, and optionally, the surface of the dielectric layer with a sacrificial material, patterning a first photoresist layer on the sacrificial material to define a trench for the semiconductor device, removing the first photoresist layer without affecting the sacrificial material, repatterning a second photoresist layer on the sacrificial material to define the trench for the semiconductor device, forming the trench, and removing the second photoresist layer and the sacrificial material completely after the trench is formed.

Abstract: A method comprises forming a low-dielectric constant (low-k) layer over a semiconductor substrate, forming an anti-reflective layer over the low-k layer, forming at least one opening in the anti-reflective layer and in the low-k layer, forming a nitrogen-free liner in the at least one opening, and forming at least one recess through the nitrogen-free liner, the anti-reflective layer, and at least partially into the low-k layer, the at least one recess is disposed over the at least one opening.

Abstract: A transistor gate structure that is free from notches is formed by using a hard mask. The hard mask has a bilayer structure of a BARC (bottom antireflective coating) over a silicon dioxide layer. A photoresist layer is formed over a portion corresponding to the gates. A first etch forms the gate structure. Following removal of the photoresist, a second etch completely removes the BARC. The silicon dioxide layer can be removed by a subsequent wet etch with HF.

Abstract: A device made through a fabrication method is disclosed. In one embodiment, the method includes a dry etch plasma process that utilizes CO2 to etch a layer. Furthermore, the dry etch plasma process may utilize CO2 in combination with NH3, H2, Ar, N2, He, or other inert gases during the etching process. In another embodiment, the CO2 dry etch plasma process etches an anti-reflectant coating layer while enabling greater selectivity and control with regard to underlying layers.

Abstract: With objectives of providing with a transparent board with conductive multi-layer antireflection thin films, under condition of high transmissivity not only on a glass substrate but also on a non-glass transparent substrate with property of demanded electrical resistance at the most exterior surface, this invention laminates at least three layers of thin films on a transparent substrate, in which the transparent dielectric 1st-layer thin film on the substrate that has a higher refractive index than the substrate has, the transparent dielectric 2nd-layer thin film next to the 1st layer that has a lower refractive index than the substrate has, and the most exterior transparent conductive transparent thin film that includes weight percentage no less than 20% of SnO2.