Abstract: The invention is a method for growing a critical adherent diamond layer on a substrate by Chemical Vapor Deposition (CVD) and the article produced by the method. The substrate can be a compound semiconductor coated with an adhesion layer. The adhesion layer is preferably a dielectric, such as silicon nitride, silicon carbide, aluminum nitride or amorphous silicon, to name some primary examples. The typical thickness of the adhesion layer is one micrometer or less. The resulting stack of layers, (e.g. substrate layer, adhesion layer and diamond layer) is structurally free of plastic deformation and the diamond layer is well adherent to the dielectric adhesion layer such that it can be processed further, such as by increasing the thickness of the diamond layer to a desired level, or by subjecting it to additional thin film fabrication process steps. In addition to preventing plastic deformation of the layer stack, the process also reduces the formation of soot during the CVD process.

Abstract: A method for preparation of carbon nanotubes (CNTs) bundles for use in field emission devices (FEDs) includes forming a plurality of carbon nanotubes on a substrate, contacting the carbon nanotubes with a polymer composition comprising a polymer and a solvent, and removing at least a portion of the solvent so as to form a solid composition from the carbon nanotubes and the polymer to form a carbon nanotube bundle having a base with a periphery, and an elevated central region where, along the periphery of the base, the carbon nanotubes slope toward the central region.

Abstract: An organic/inorganic composite is provided. The organic/inorganic composite comprises a silicon (Si) substrate formed with nanorods or nanoholes and three-dimensional networks of carbon nanotubes (CNTs) grown horizontally in parallel and suspended between the adjacent nanorods or inside the nanoholes. In the organic/inorganic composite, metal catalysts can be uniformly formed on the nanorods or inside the nanoholes, irrespective of the height of the nanorods or the depth of the nanoholes and the shape and aspect ratio of the nanorods or nanoholes. In addition, the carbon nanotubes grow in a three-dimensional network structure directly over the entire surface of the nanorods or the whole inner surface of the nanoholes and are directly connected to the base electrodes. With this configuration, the three-dimensional carbon nanotube networks are highly dense per unit volume, and the organic/inorganic composite is highly electrically conductive and has a large surface area.

Abstract: The present invention is a base material for growing a single crystal diamond comprising: at least a single crystal SiC substrate; and an iridium film or a rhodium film heteroepitaxially grown on a side of the single crystal SiC substrate where the single crystal diamond is to be grown. As a result, there is provided a base material for growing a single crystal diamond and a method for producing a single crystal diamond substrate which can grow the single crystal diamond having a large area and good crystallinity and produce a high quality single crystal diamond substrate at low cost.

Abstract: An amorphous carbon film forming apparatus includes a supporting electrode that is connected to ground and supports a substrate, a counter electrode that is disposed so as to face the supporting electrode and has a mixed-gas injection orifice, a chamber containing the supporting electrode and the counter electrode, and a DC pulse generator having a pulse source that applies a DC pulse voltage between the supporting electrode and the counter electrode. An amorphous carbon film is formed by supplying a mixed gas between the supporting electrode and the counter electrode such that the percentage of the acetylene gas relative to the carrier gas is 0.05% by volume or more and 10% by volume or less, and by generating plasma while a DC pulse voltage having a pulse width of 0.1 ?sec or more and 5.0 ?sec or less is applied to the counter electrode.

Abstract: A semiconductor device comprises: a first semiconductor layer of silicon carbide of a first conductivity type; a second semiconductor layer of silicon carbide of a second conductivity type selectively provided on the first semiconductor layer; a main electrode layer of silicon carbide of the first conductivity type selectively provided on the second semiconductor layer; a gate insulating film provided on the second semiconductor layer; a gate electrode formed on the gate insulating film; and a third semiconductor layer of the first conductivity type intervening a current path which is formed between the main electrode layer and the first semiconductor layer when an ON voltage is applied to the gate electrode. The third semiconductor layer is selectively provided on the first semiconductor layer and is adjacent to the second semiconductor layer. A doping density of the third semiconductor layer is higher than a doping density of the first semiconductor layer.

Abstract: The invention aims at a hybrid nanocomposite material comprising electrically conducting inorganic elongated nanocrystals grafted on at least part of the surface thereof with an electrically conducting organic compound, and a preparation process thereof. The invention further discloses thin films, solar cells and switchable devices comprising said hybrid nanocomposite.

Abstract: The invention relates to a semiconductor device, in particular to a chemical field effect transistor (ChemFET), a high-electron mobility transistor (HEMT) and an ion-sensitive field effect transistor (ISFET), as well as a method for manufacturing the same. The semiconductor device comprises a structure, the structure comprises a substrate, a first layer comprising GaN and a second layer comprising InAlN, wherein the first and the second layer are arranged parallely to each other on the substrate, and wherein the structure comprises a third layer comprising diamond.

Abstract: Materials, devices, and methods for enhancing performance of electronic devices such as solar cells, fuels cells, LEDs, thermoelectric conversion devices, and other electronic devices are disclosed and described. A diamond-like carbon electronic device can include a conductive diamond-like carbon cathode having specified carbon, hydrogen and sp2 bonded carbon contents. In some cases, the sp2 bonded carbon content may be sufficient to provide the conductive diamond-like carbon material with a visible light transmissivity of greater than about 0.70. A charge carrier separation layer can be coupled adjacent and between the diamond-like carbon cathode and an anode. The conductive diamond-like carbon material of the present invention can be useful for any other application which can benefit from the use of conductive and transparent electrodes which are also chemically inert, radiation damage resistance, and are simple to manufacture.

Abstract: A stress liner for use within a semiconductor structure that includes a field effect device has a dielectric constant less than about 7 and a compressive stress greater than about 5 GPa. The stress liner may be formed of a carbon based material, preferably a tetrahedral amorphous carbon (ta-C) material including at least about 60 atomic percent carbon and no greater than C about 40 atomic percent hydrogen. The carbon based material may be either a dielectric material, or given appropriate additional dielectric isolation structures, a semiconductor material. In particular, a ta-C stress liner may be formed using a filtered cathodic vacuum arc (FCVA) physical vapor deposition (PVD) method.

Abstract: Semiconductor-on-diamond (SOD) substrates and methods for making such substrates are provided. In one aspect, a method of making an SOD device is provided that includes etching depressions into an etch surface of a semiconductor substrate to a uniform depth, depositing a diamond layer onto the etch surface to form diamond-filled depressions, and thinning the semiconductor substrate at a thinning surface opposite the etch surface until the diamond filled depressions are exposed, thus forming a semiconductor device having a thickness substantially equal to the uniform depth.

Abstract: Provided is a method for manufacturing a semiconductor device. The method for manufacturing the semiconductor device, without limitation, includes forming a first semiconductor layer over a substrate, and forming a second semiconductor layer over the first semiconductor layer, wherein an amorphous nitrided silicon adhesion layer is located between and adheres the first and second semiconductor layers.

Abstract: In a conventional ultraviolet sensing device using a diamond semiconductor in a light-receiving unit, an Au-based electrode material is used for both a rectifier electrode and an ohmic electrode. However, the Au-based electrode material has fatal defects, such as poor adhesion to diamond, low mechanical strength, and furthermore poor thermal stability. While avoiding complication of the device structure and exploiting the characteristics of a photoconductive sensing device, by using a carbide compound (TiC, ZrC, HfC, VC, NbC, TaC, CrC, MoC, and WC) of a high melting metal having a high mechanical strength for a rectifier electrode and/or a ohmic electrode, there is provided an extremely heat-stable diamond ultraviolet sensor having a light-receiving sensitivity to ultraviolet light having a wavelength of 260 nm or less.

Abstract: The present invention is a direct-current plasma CVD apparatus comprising at least a fixed electrode and a substrate stage having a top flat face and combined with an electrode for placing a substrate, in which the substrate stage top face is not located on a line extended from a center of the fixed electrode in vertical direction, and an angle formed between a line of a length R connecting a center of the substrate stage top face with the center of the fixed electrode and the line extended in vertical direction from the center of the fixed electrode is 90° or less. As a result, there is provided a direct-current plasma CVD apparatus in which a high quality vapor phase growth film, such as diamond of a large area having few defects caused by the fall of the substances produced at the fixed electrode, can be obtained.

Abstract: A method of forming an integrated circuit includes forming a gate structure over a semiconductor body, and forming a shadowing structure over the semiconductor body laterally spaced from the gate structure, thereby defining an active area in the semiconductor body therebetween. The method further includes performing an angled implant into the gate structure, wherein the shadowing structure substantially blocks dopant from the angled implant from implanting into the active area, and performing a source/drain implant into the gate structure and the active area.

Abstract: Method for production of diamond-like carbon film having semiconducting properties comprises preparing a boron-doped diamond-like carbon (B-DLC) thin film on a silicon substrate through a radio frequency magnetron sputtering process, wherein a composite target material formed by inserting boron tablet as a dopant source in a graphite target is used. After forming a boron-containing diamond-like carbon film, the thin film is annealed at a temperature of 500° C. and kept at this temperature for 10 minutes, and determine its carrier concentration and resistivity. Thus demonstrated that the polarity of said boron-doped diamond-like carbon film is p-type semiconductor characteristic. Carrier concentration can be up to 1.3×1018 cm-3, and its resistivity is about 0.6 ?-cm; consequently.

Abstract: A method of making a non-volatile memory device includes forming a first electrode, forming a steering element, forming at least one feature, forming a carbon resistivity switching material on at least one sidewall of the at least one feature such that the carbon resistivity switching material electrically contacts the steering element, and forming a second electrode.

Abstract: Methods for integrating wide-gap semiconductors with synthetic diamond substrates are disclosed. Diamond substrates are created by depositing synthetic diamond onto a nucleating layer deposited or formed on a layered structure including at least one layer of gallium nitride, aluminum nitride, silicon carbide, or zinc oxide. The resulting structure is a low stress process compatible with wide-gap semiconductor films, and may be processed into optical or high-power electronic devices. The diamond substrates serve as heat sinks or mechanical substrates.

Abstract: The present invention is directed to a method for fabricating a thermal management substrate having a Silicon (Si) layer on a polycrystalline diamond film, or on a diamond-like-carbon (DLC) film. The method comprises acts of fabricating a separation by implantation of oxygen (SIMOX) wafer; depositing a polycrystalline diamond film onto the SIMOX wafer; and removing various layers of the SIMOX wafer to leave a Si overlay layer that is epitaxially fused with the polycrystalline diamond film. In the case of the DLC film, the method comprises acts of ion-implanting a Si wafer; depositing an amorphous DLC film onto the Si wafer; and removing various layers of the Si wafer to leave a Si overlay structure epitaxially fused with the DLC film.

Abstract: Electronic field effect devices, and methods of manufacture of these electronic field effect devices are disclosed. In particular, there is disclosed an electronic field effect device which has improved electrical properties due to the formation of a highly mobile two-dimensional charge-carrier gas in a simple structure formed from diamond in combination with polar materials.

Abstract: A method for preparing a semiconductor ultrananocrystalline diamond (UNCD) film includes doping an UNCD film with an ion source at a dose not less than 1014 ions/cm2 through ion implantation, and annealing the doped UNCD film. A semiconductor UNCD film prepared from the method by using a nitrogen-containing gas as an ion source is also disclosed.

Abstract: In a semiconductor substrate on which are formed an N-type MOS transistor and a P-type MOS transistor, the gate electrode of the N-type MOS transistor comprises a tungsten film, which makes contact with a gate insulation film, and the gate electrode of the P-type MOS transistor comprises a tungsten film, which makes contact with a gate insulation film, and the concentration of carbon contained in the former tungsten film is less than the concentration of carbon contained in the latter tungsten film.

Abstract: A technique for high-resolution surface energy assisted patterning of semiconductor active layer islands on top of an array of predefined source-drain electrodes without requiring an additional process step for surface energy patterning.

Abstract: A passivated semiconductor structure and associated method are disclosed. The structure includes a silicon carbide substrate or layer; an oxidation layer on the silicon carbide substrate for lowering the interface density between the silicon carbide substrate and the thermal oxidation layer; a first sputtered non-stoichiometric silicon nitride layer on the thermal oxidation layer for reducing parasitic capacitance and minimizing device trapping; a second sputtered non-stoichiometric silicon nitride layer on the first layer for positioning subsequent passivation layers further from the substrate without encapsulating the structure; a sputtered stoichiometric silicon nitride layer on the second sputtered layer for encapsulating the structure and for enhancing the hydrogen barrier properties of the passivation layers; and a chemical vapor deposited environmental barrier layer of stoichiometric silicon nitride for step coverage and crack prevention on the encapsulant layer.

Abstract: A heterostructure having a heterojunction comprising: a diamond layer; and a boron aluminum nitride (B(x)Al(1?x)N) layer disposed in contact with a surface of the diamond layer, where x is between 0 and 1.

Abstract: The field effect transistor comprises a source and a drain connected by a channel controlled by a gate electrode separated from the channel by a gate insulator. The channel is formed by a diamond-like carbon layer. The method for making the transistor successively comprises deposition of a diamond-like carbon layer on a substrate, deposition of a gate insulating layer and deposition of at least one conducting layer. The conducting layer is etched to form the gate electrode. Then an insulating material is deposited on the flanks of the gate electrode to form a lateral insulator. Then the gate insulating layer is etched and the diamond-like carbon layer is etched so as to delineate the channel. Then a semi-conducting material designed to form the source and a semi-conducting material designed to form the drain are deposited on each side of the channel.

Abstract: Embodiments relate to a semiconductor device and a method for manufacturing a semiconductor device. According to embodiments, a method may include forming a metal layer on and/or over a lower structure formed on and/or over a semiconductor substrate, forming neighboring metal lines by patterning the metal layer by a photolithography process, forming an insulating layer on and/or over a surface of the lower structure and forming a void between the metal lines, and performing heat treatment to the metal lines and the insulating layer having the void. According to embodiments, a void may be used as a buffer against expansion of the metal lines in sintering due to a difference in a thermal expansion coefficient. This may prevent a blister phenomenon that may separate an insulating film from metal lines.

Abstract: A gate after diamond transistor and method of making comprising the steps of depositing a first dielectric layer on a semiconductor substrate, depositing a diamond particle nucleation layer on the first dielectric layer, growing a diamond thin film layer on the first dielectric layer, defining an opening for the gate in the diamond thin film layer, patterning of the diamond thin film layer for a gate metal to first dielectric layer surface, etching the first dielectric layer, depositing and defining a gate metal, and forming a contact window opening in the diamond thin film layer and the first dielectric layer to the ohmic contact.

Abstract: A locally gated graphene nanostructure is described, along with methods of making and using the same. A graphene layer can include first and second terminal regions separated by a substantially single layer gated graphene nanoconstriction. A local first gate region can be separated from the graphene nanoconstriction by a first gate dielectric. The local first gate region can be capacitively coupled to gate electrical conduction in the graphene nanoconstriction. A second gate region can be separated from the graphene nanoconstriction by a second gate dielectric. The second gate region can be capacitively coupled to provide a bias to a first location in the graphene nanoconstriction and to a second location outside of the graphene nanoconstriction. Methods of making and using locally gated graphene nanostructures are also described.

Abstract: Integrated circuit transistors may be fabricated by simultaneously removing a photoresist layer on a first active area of an integrated circuit substrate and a carbon-containing layer on a second active area of the integrated circuit substrate, to expose a nitride stress-generating layer on the second active area. A single mask may be used to define the second active area for removal of the photoresist layer on the first active area and for implanting source/drain regions into the second active area.

Abstract: A graphene layer is formed on a surface of a silicon carbide substrate. A dummy gate structure is formed over the fin, in the trench, or on a portion of the planar graphene layer to implant dopants into source and drain regions. The dummy gate structure is thereafter removed to provide an opening over the channel of the transistor. Threshold voltage adjustment implantation may be performed to form a threshold voltage implant region directly beneath the channel, which comprises the graphene layer. A gate dielectric is deposited over a channel portion of the graphene layer. After an optional spacer formation, a gate conductor is formed by deposition and planarization. The resulting graphene-based field effect transistor has a high carrier mobility due to the graphene layer in the channel, low contact resistance to the source and drain region, and optimized threshold voltage and leakage due to the threshold voltage implant region.

Abstract: A substantially all diamond transistor with an electrically insulating substrate, an electrically conductive diamond layer on the substrate, and a source and a drain contact on the electrically conductive diamond layer. An electrically insulating diamond layer is in contact with the electrically conductive diamond layer, and a gate contact is on the electrically insulating diamond layer. The diamond layers may be homoepitaxial, polycrystalline, nanocrystalline or ultrananocrystalline in various combinations. A method of making a substantially all diamond self-aligned gate transistor is disclosed in which seeding and patterning can be avoided or minimized, if desired.

Abstract: An object of the present invention is to provide an EL display device having high operation performance and reliability. A third passivation film 45 is disposed under the EL element 203 comprising a pixel electrode (anode) 46, an EL layer 47 and a cathode 48, and diffusion of alkali metals from the EL element 203 formed by ink jet method into TFTs is prevented. Further, the third passivation film 45 prevents penetration of moisture and oxygen from the TFTs, and suppress degradation of the EL element 203 by dispersing the heat generated by the EL element 203.

Abstract: A manufacturing method for a large-scale diamond substrate and the produced substrate that is suitable for semiconductor lithography processing and large-scale optical parts, semiconductor materials, thermal-release substrate, semiconductor wafer processing, back-feed devices, and others. The manufacturing method of the present invention includes: preparing a substrate having a main face including a first region which is a concave and a second region which surrounds the first region, and mounting, on the first region, a single crystalline diamond seed substrate having a plate thickness thicker than the concave depth of the first region; forming a CVD diamond layer from the single crystalline diamond seed substrate using a chemical vapor deposition, and mutually connecting by forming a CVD diamond layer on the second region at the same time; and polishing to substantially flatten both the CVD diamond layers and on the second region by mechanically polishing.

Abstract: A method for forming a semiconductor structure includes providing a semiconductor substrate, forming a gate stack on the semiconductor substrate, and epitaxially growing a lightly-doped source/drain (LDD) region adjacent the gate stack, wherein carbon is simultaneously doped into the LDD region.

Abstract: Phase change memories may exhibit improved properties and lower cost in some cases by forming the phase change material layers in a planar configuration. A heater may be provided below the phase change material layers to appropriately heat the material to induce the phase changes. The heater may be coupled to an appropriate conductor.

Abstract: In a method of making graphite devices, a preselected crystal face of a crystal is annealed to create a thin-film graphitic layer disposed against selected face. A preselected pattern is generated on the thin-film graphitic layer. A functional structure includes a crystalline substrate having a preselected crystal face. A thin-film graphitic layer is disposed on the preselected crystal face. The thin-film graphitic layer is patterned so as to define at least one functional structure.

Abstract: An improved method of interconnecting electronic devices is described. In the method a blended material for forming a conducting layer and an insulating layer are deposited between a contact of a first electronic device and a second electronic device. The blended material leads to formation of a conductor overlayed by an insulator such that after formation, the conductor is capable of carrying current from the first electronic device to the second electronic device and the insulator forms a protective layer over the conductor.

Abstract: An object of the present invention is to provide an EL display device having high operation performance and reliability. A third passivation film 45 is disposed under the EL element 203 comprising a pixel electrode (anode) 46, an EL layer 47 and a cathode 48, and diffusion of alkali metals from the EL element 203 formed by ink jet method into TFTs is prevented. Further, the third passivation film 45 prevents penetration of moisture and oxygen the TFTs, and suppress degradation of the EL element 203 by dispersing the heat generated by the EL element 203.