Abstract: Techniques for obtaining a wiring layer with a high TDDB resistance and little leakage current, and accordingly, for manufacturing a highly reliable semiconductor device with a small electric power consumption are provided, in which an interfacial roughness reducing film is formed which is in contact with an insulator film and also in contact with a wiring line on the other side surface thereof, and has an interfacial roughness between the wiring line and the interfacial roughness reducing film smaller than that between the insulator film and the interfacial roughness reducing film.

Abstract: Improved methods for preparing a low-k dielectric material on a substrate using microwave radiation are provided. The use of microwave radiation allows the preparation of low-k films to be accomplished at low temperatures. According to various embodiments, microwave radiation is used to remove porogen from a precursor film and/or to increase the strength of the resulting porous dielectric layer. In a preferred embodiment, methods involve (a) forming a precursor film that contains a porogen and a structure former on a substrate, (b) exposing the precursor film to microwave radiation to remove the porogen from the precursor film to thereby create voids within the dielectric material and form the porous low-k dielectric layer and (c) exposing the dielectric material to microwave radiation in a manner that increases the mechanical strength of the porous low-k dielectric layer.

Abstract: Methods of forming ruthenium or ruthenium dioxide are provided. The methods may include using ruthenium tetraoxide (RuO4) as a ruthenium precursor. In some embodiments for forming ruthenium, methods include forming a seed layer, and forming a ruthenium layer on the seed layer, using RuO4. In other embodiments, methods include performing atomic layer deposition cycles, which include using RuO4 and another ruthenium-containing co-precursor. In yet other embodiments, methods include adsorbing a reducing agent over a substrate, and supplying RuO4 to be reduced to ruthenium by the adsorbed reducing agent. In other embodiments for forming ruthenium dioxide, methods may include providing an initial seed layer formed of, for example, an organic compound, and supplying RuO4 over the seed layer.

Abstract: There is provided a method for modifying a high-k dielectric thin film provided on the surface of an object using a metal organic compound material. The method includes a preparation process for providing the object with the high-k dielectric thin film formed on the surface thereof, and a modification process for applying UV rays to the highly dielectric thin film in an inert gas atmosphere while maintaining the object at a predetermined temperature to modify the high-k dielectric thin film. According to the above constitution, the carbon component can be eliminated from the high-k dielectric thin film, and the whole material can be thermally shrunk to improve the density, whereby the occurrence of defects can be prevented and the film density can be improved to enhance the specific permittivity and thus to provide a high level of electric properties.

Abstract: A multi-layer thick metallization structure for a microelectronic device includes a first barrier layer (111), a first metal layer (112) over the first barrier layer, a first passivation layer (113) over the first metal layer, a via structure (114) extending through the first passivation layer, a second barrier layer (115) over the first passivation layer and in the via structure, a second metal layer (116) over the second barrier layer, and a second passivation layer (117) over the second metal layer and the first passivation layer.

Abstract: The present invention provides a method for depositing nano-porous low dielectric constant films by reacting an oxidizable silicon containing compound or mixture comprising an oxidizable silicon component and an oxidizable non-silicon component having thermally liable groups with nitrous oxide, oxygen, ozone, or other source of reactive oxygen in gas-phase plasma-enhanced reaction. The deposited silicon oxide based film is annealed to form dispersed microscopic voids that remain in a nano-porous silicon oxide based film having a low-density structure. The nano-porous silicon oxide based films are useful for forming layers between metal lines with or without liner or cap layers. The nano-porous silicon oxide based films may also be used as an intermetal dielectric layer for fabricating dual damascene structures.

Abstract: A solder bump forming method of carrying out a reflow treatment over a conductive ball mounted on a plurality of pads, thereby forming a solder bump, includes a metal film forming step of forming a metal film capable of chemically reacting to a tackifying compound on the pads, an organic sticking layer forming step of causing a solution containing the tackifying compound to chemically react to the metal film, thereby forming an organic sticking layer on the metal film, and a conductive ball mounting step of supplying the conductive ball on the pads having the organic sticking layer formed thereon, thereby mounting the conductive ball on the pads through the metal film.

Abstract: A neutral beam-assisted atomic layer chemical vapor deposition (ALCVD) apparatus is provided for uniformly depositing an oxide layer filling a planarization layer or a trench to increase uniformity and density of the oxide layer using neutral beams generated by a neutral beam generator without a seam or void occurring in an atomic layer deposition (ALD) or ALD-like chemical vapor deposition (CVD) process, thereby solving problems on the void or seam and low density occurring when a high-density planarization layer or a shallow trench having a width of 65 nm or less is formed, and improving a next generation oxide layer isolation process.

Abstract: A coating composition for forming an oxide film, which can suppress the phenomenon of an increased wet etching rate caused by a part of the SOG film embedded inside a groove becoming low-density, and which can suppress the volume expansion coefficient to a low level, and a method for producing a semiconductor device using the same are provided. An oxide film is formed inside a groove by: coating a coating composition for forming an oxide film, which contains a polysilazane or a hydrogenated silsesquioxane, and a polysilane, on a substrate having a groove; and thereafter heat treatment in an oxidizing atmosphere. This method is suitable for forming a device isolation region and a wiring interlayer dielectric film.

Abstract: A method and apparatus for fabricating large scale PV cell and solar module/panel is disclosed. The method includes designing a PV cell wiring scheme for a number of PV cells and patterning a plurality of features on a large size silicon sheet. A number of large scale silicon sheets, having a number of PV cells on each silicon sheet, can be bonded to a wiring plane to directly manufacture into a solar module/panel. Each PV cell on the solar module is then isolated. Methods of the invention greatly cut down the cost of solar module/panel manufacturing and PV cell assembly.

Abstract: In a method of forming a silicon oxide layer, a spin-on-glass (SOG) layer may be formed on an object including a recess using an SOG composition. The SOG layer may be pre-baked and then cured by contacting with at least one material selected from the group consisting of water, a basic material and an oxidant, under a pressure of from about 1.5 atm to about 100 atm. The cured SOG layer may be baked.

Abstract: A method for restoring hydrophobicity to the surfaces of organosilicate glass dielectric films which have been subjected to an etchant or ashing treatment. These films are used as insulating materials in the manufacture of integrated circuits to ensure low and stable dielectric properties in these films. The method deters the formation of stress-induced voids in these films. An organosilicate glass dielectric film is patterned to form vias and trenches by subjecting it to an etchant or ashing reagent in such a way as to remove at least a portion of previously existing carbon containing moieties and reduce hydrophobicity of said organosilicate glass dielectric film. The vias and trenches are thereafter filled with a metal and subjected to an annealing treatment.

Abstract: A dielectric film, a method of manufacturing a dielectric film and a method of forming an air-gap. A method of manufacturing a low-k dielectric film may include introducing TMS and 3,3-dimethyl-1-butene into a plasma deposition reactor, polymerizing TMS and 3,3-dimethyl-1-butene using plasma generated in a reactor to deposit an insulation film over a substrate disposed in a reactor and/or subjecting a deposited insulation film to heat treatment concurrently with an inductively coupled plasma (ICP) process. A dielectric film may have a dielectric constant up to approximately 3. A method of forming an air-gap may include depositing a first insulation film over a surface of a patterned substrate, depositing a decahydronaphthalene layer over a portion of a first insulation film, subjecting a patterned substrate to a polishing process, forming a second insulation film, and/or subjecting a second insulation film to heat treatment concurrently with an ICP process.

Abstract: The present invention provides a method for depositing nano-porous low dielectric constant films by reacting an oxidizable silicon containing compound or mixture comprising an oxidizable silicon component and an oxidizable non-silicon component having thermally liable groups with nitrous oxide, oxygen, ozone, or other source of reactive oxygen in gas-phase plasma-enhanced reaction. The deposited silicon oxide based film is annealed to form dispersed microscopic voids that remain in a nano-porous silicon oxide based film having a low-density structure. The nano-porous silicon oxide based films are useful for forming layers between metal lines with or without liner or cap layers. The nano-porous silicon oxide based films may also be used as an intermetal dielectric layer for fabricating dual damascene structures.

Abstract: Often used to reduce the RC delay in integrated circuits are dielectric films of porous organosilicates which have a silica like backbone with alkyl or aryl groups (to add hydrophobicity to the materials and create free volume) attached directly to the Si atoms in the network. Si—R bonds rarely survive an exposure to plasmas or chemical treatments commonly used in processing; this is especially the case in materials with an open cell pore structure. When Si—R bonds are broken, the materials lose hydrophobicity, due to formation of hydrophilic silanols and low dielectric constant is compromised. A method by which the hydrophobicity of the materials is recovered using a novel class of silylation agents which may have the general formula (R2N)XSiR?Y where X and Y are integers from 1 to 3 and 3 to 1 respectively, and where R and R? are selected from the group of hydrogen, alkyl, aryl, allyl and a vinyl moiety. Mechanical strength of porous organosilicates is also improved as a result of the silylation treatment.

Abstract: A method of manufacturing an electronic device (10) provides a substrate (20) that has a plastic material. A particulate material (16) is embedded in at least one surface of the substrate. A layer of thin-film semiconductor material is deposited onto the substrate (20).

Abstract: A polishing composition for electrochemical mechanical polishing a surface of an object in which the polishing composition contains a phosphate electrolyte such as a potassium phosphate, a chelating agent such as a potassium citrate, a corrosion inhibitor such as benzotriazole, an oxidizing agent such as hydrogen peroxide, and a solvent such as water. The polishing composition preferably further contains abrasive particles such as colloidal silica particles.

Abstract: A first high-k gate dielectric layer and a first metal gate layer are formed on first and second semiconductor fins. A first metal gate ring is formed on the first semiconductor fin. In one embodiment, the first high-k gate dielectric layer remains on the second semiconductor fin. A second metal gate layer and a silicon containing layer are deposited and patterned to form gate electrodes. In another embodiment, a second high-k dielectric layer replaces the first high-k dielectric layer over the second semiconductor fin, followed by formation of a second metal gate layer. A first electrode comprising a first gate dielectric and a first metal gate is formed on the first semiconductor fin, while a second electrode comprising a second gate dielectric and a second metal gate is formed on the second semiconductor fin. Absence of high-k gate dielectric materials on a gate wiring prevents increase in parasitic resistance.

Abstract: A silicone resin which is represented by the following rational formula (1) and solid at 120° C.: (H2SiO)n(HSiO1.5)m(SiO2)k??(1) wherein n, m and k are each a number, with the proviso that, when n+m+k=1, n is not less than 0.5, m is more than 0 and not more than 0.95 and k is 0 to 0.2. The silicone resin of the present invention can be advantageously used in a composition for forming a trench isolation having a high aspect ratio.

Abstract: A metal line in a semiconductor device includes an insulation layer having trenches formed therein, a barrier metal layer formed over the insulation layer and the trenches, a metal layer formed over the barrier metal layer, wherein the metal layer fills the trenches, and an anti-galvanic corrosion layer formed on an interface between the metal layer and the barrier metal layer.

Abstract: The present invention is a process for spin-on deposition of a silicon dioxide-containing film under oxidative conditions for gap-filling in high aspect ratio features for shallow trench isolation used in memory and logic circuit-containing semiconductor substrates, such as silicon wafers having one or more integrated circuit structures contained thereon, comprising the steps of: providing a semiconductor substrate having high aspect ratio features; contacting the semiconductor substrate with a liquid formulation comprising a low molecular weight aminosilane; forming a film by spreading the liquid formulation over the semiconductor substrate; heating the film at elevated temperatures under oxidative conditions. Compositions for this process are also set forth.

Abstract: A method for restoring the dielectric constant of a low dielectric constant film is described. A porous dielectric layer having a plurality of pores is formed on a substrate. The plurality of pores is then filled with an additive to provide a plugged porous dielectric layer. Finally, the additive is removed from the plurality of pores.

Abstract: A method of curing a low dielectric constant (low-k) dielectric film on a substrate is described, wherein the dielectric constant of the low-k dielectric film is less than a value of approximately 4. The method comprises exposing the low-k dielectric film to infrared (IR) radiation and ultraviolet (UV) radiation.

Abstract: Disclosed is a heat treatment unit 4 serving as a heat treatment apparatus, which includes a chamber 42 for containing a wafer W on which a low dielectric constant interlayer insulating film is formed, a formic acid supply device 44 for supplying gaseous formic acid into the chamber 42, and a heater 43 for heating the wafer W in the chamber 42 which is supplied with formic acid by the formic acid supply device 44.

Abstract: A method for forming a planarized inter-metal insulation film is provided. The method includes applying a CMP process to an insulation film as controlled by a polish-stop layer pattern formed on an underlying metal wiring pattern. A PAE based material may be used to form the polish-stop layer.

Abstract: The invention provides a preparation process of organic-group-modified zeolite fine particles excellent in stability of particle size and to be used for electronic materials or the like. The preparation process comprises a first step of obtaining a liquid containing zeolite seed crystals having a particle size of 80 nm or less which are formed in the presence of a structure directing agent, a second step of adding an organic-group-containing hydrolyzable silane compound to the liquid obtained by the first step, and a third step of maturing the liquid of the second step at temperature higher than that of the first step. A dispersion liquid of zeolite fine particles obtained by the process.

Abstract: A method and computer readable medium for treating a dielectric film on one or more substrates includes disposing the one or more substrates in a process chamber configured to perform plural treatment processes on a dielectric film. The dielectric film is formed on at least one of said one or more substrates, wherein the dielectric film includes an initial dielectric constant having a value less than the dielectric constant of SiO2. A thermal treatment process that includes annealing the one or more substrates is performed in order to remove volatile constituents from the dielectric film on the one or more substrates and a chemical treatment process is performed on the one or more substrates, including: introducing a treating compound to the dielectric film on the one or more substrates, and heating the one or more substrates.

Abstract: A dielectric layer on a semiconductor substrate is made porous by radiation with UV light. The dielectric material contains a photosensitive moiety that absorbs UV radiation and dissociates from the dielectric material. The UV-activated material then may be diffused to create pores in the dielectric layer, and to provide a dielectric layer having a low dielectric constant.

Abstract: A method is disclosed for making a metal electrode which minimizes the contact resistance between it and an organic semiconductor. Acid-stabilized metal nanoparticles are deposited upon a substrate and annealed. This creates a metal electrode and releases acid. Upon deposition of semiconductor and subsequent annealing, the acid diffuses from the electrode into the semiconductor layer and acts as a dopant, minimizing the contact resistance. The use of oleic acid-stabilized silver nanoparticles is demonstrated.

Abstract: One embodiment of the present invention is a method for fabricating a dielectric film, comprising chemical vapor depositing a dielectric film, and curing the dielectric film, wherein the dielectric film comprises silicon and carbon, and the chemical vapor depositing utilizes a precursor comprising one or more organo-silicon compounds and one or more carbon-carbon bond containing hydrocarbon compounds.

Abstract: Embodiments of methods, apparatuses, devices, and/or systems for forming a solution processed device are described.

Abstract: The present invention provides a method of fabricating a microelectronics device. In one aspect, the method comprises depositing a protective layer (510) over a spacer material (415) located over gate electrodes (250) and a doped region (255) located between the gate electrodes (250), removing a portion of the spacer material (415) and the protective layer (510) located over the gate electrodes (250). A remaining portion of the spacer material (415) remains over the top surface of the gate electrodes (250) and over the doped region (255), and a portion of the protective layer (510) remains over the doped region (255). The method further comprises removing the remaining portion of the spacer material (415) to form spacer sidewalls on the gate electrodes (250), expose the top surface of the gate electrodes (250), and leave a remnant of the spacer material (415) over the doped region (255).

Abstract: Diode devices with superior and pre-settable characteristics and of nanometric dimensions, comprise etched insulative lines (8, 16, 18) in a conductive substrate to define between the lines charge carrier flow paths, formed as elongate channels (20) at least 100 nm long and less than 100 nm wide. The current-voltage characteristic of the diode devices are similar to a conventional diode, but both the threshold voltage (from 0V to a few volts) and the current level (from nA to ?A) can be tuned by orders of magnitude by changing the device geometry. Standard silicon wafers can be used as substrates. A full family of logic gates, such as OR, AND, and NOT, can be constructed based on this device solely by simply etching insulative lines in the substrate.

Abstract: In a thin film processing method and system, a film thickness is regulated by using electron beams irradiated from a plurality of electron beam tubes onto a film of varying thickness formed on an object to be processed, wherein the output powers or beam irradiation times of the electron beam tubes are individually controlled according to a distribution of the thickness. In the method and system, electric charges charged in a film of an object to be processed can be removed also.

Abstract: A method of forming an electrically conductive element in an integrated circuit is disclosed. The method includes depositing a composite polymer dielectric film onto a silicon-containing substrate, wherein the composite polymer dielectric film includes a silane-containing adhesion promoter layer formed on the silicon-containing substrate, and a low dielectric constant polymer layer formed on the adhesion promoter layer, depositing a silane-containing hard mask layer onto the composite polymer dielectric film, exposing the adhesion promoter layer and the hard mask layer to a free radical-generating energy source to chemically bond the adhesion promoter layer to the underlying silicon-containing substrate and to the low dielectric constant polymer layer, and to chemically bond the composite polymer dielectric film to the hard mask layer, etching an etched feature in the hard mask layer and the composite polymer dielectric film, and depositing an electrically conductive material in the etched feature.

Abstract: A coating liquid for forming a silica-containing film with a low-dielectric constant which enables formation of low-density film having a dielectric constant as low as 3 or less and having excellent resistance to oxygen plasma and process adaptation but also in the adhesion to a substrate and film strength. A substrate coated with the silica-containing film having the above characteristics, obtained by the use of the above coating liquid.