Pixel-elements With Integrated Switching, Control, Storage, Or Amplification Elements (epo) Patents (Class 257/E27.132)
  • Patent number: 8076746
    Abstract: A back-illuminated image sensor includes a sensor layer of a first conductivity type having a frontside and a backside opposite the frontside. One or more frontside regions of a second conductivity type are formed in at least a portion of the frontside of the sensor layer. A backside region of the second conductivity type is formed in the backside of the sensor layer. A plurality of frontside photodetectors of the first conductivity type is disposed in the sensor layer. A distinct plurality of backside photodetectors of the first conductivity type separate from the plurality of frontside photodetectors are formed in the sensor layer contiguous to portions of the region of the second conductivity type. A voltage terminal is disposed on the frontside of the sensor layer. One or more connecting regions of the second conductivity type are disposed in respective portions of the sensor layer between the voltage terminal and the backside region for electrically connecting the voltage terminal to the backside region.
    Type: Grant
    Filed: June 26, 2009
    Date of Patent: December 13, 2011
    Assignee: OmniVision Technologies, Inc.
    Inventors: John P. McCarten, Cristian A. Tivarus, Joseph R. Summa, Eric G. Stevens, Hung Q. Doan, Robert M. Guidash
  • Patent number: 8071980
    Abstract: A radiation detector that includes a charge conversion layer, a substrate, an electrode layer, an intermediary layer and wiring is provided. The substrate includes a lower electrode portion that collects charge generated by the charge conversion layer. The electrode layer includes an upper electrode portion and an extended electrode portion. The upper electrode portion is laminated on the charge conversion layer. The extended electrode portion extends from the upper electrode portion down a side face of the charge conversion layer to a region on the substrate at which the charge conversion layer is not present. The intermediary layer is formed from between the charge conversion layer and the upper electrode portion to between the extended electrode portion and the substrate. The wiring is electrically connected with the extended electrode portion at the region on the substrate at which the charge conversion layer is not present.
    Type: Grant
    Filed: January 30, 2008
    Date of Patent: December 6, 2011
    Assignee: FUJIFILM Corporation
    Inventor: Nobuyuki Iwazaki
  • Patent number: 8044478
    Abstract: Provided is an image sensor. The image sensor can include a readout circuitry on a first substrate. An interlayer dielectric is formed on the first substrate, and comprises a lower line therein. A crystalline semiconductor layer is bonded to the interlayer dielectric. A photodiode can be formed in the crystalline semiconductor layer, and comprises a first impurity region and a second impurity region. A via hole can be formed passing through the crystalline semiconductor layer and the interlayer dielectric to expose the lower line. A plug is formed inside the first via hole to connect with only the lower line and the first impurity region. A device isolation region can be formed in the crystalline semiconductor layer to separate the photodiode according to unit pixel.
    Type: Grant
    Filed: September 5, 2008
    Date of Patent: October 25, 2011
    Assignee: Dongbu Hitek Co., Ltd.
    Inventor: Joon Hwang
  • Patent number: 8013412
    Abstract: A photodetector is described along with corresponding materials, systems, and methods. The photodetector comprises an integrated circuit and at least two optically sensitive layers. A first optically sensitive layer is over at least a portion of the integrated circuit, and a second optically sensitive layer is over the first optically sensitive layer. Each optically sensitive layer is interposed between two electrodes. The two electrodes include a respective first electrode and a respective second electrode. The integrated circuit selectively applies a bias to the electrodes and reads signals from the optically sensitive layers. The signal is related to the number of photons received by the respective optically sensitive layer.
    Type: Grant
    Filed: March 19, 2010
    Date of Patent: September 6, 2011
    Assignee: InVisage Technologies, Inc.
    Inventor: Hui Tian
  • Patent number: 8013369
    Abstract: A photoelectric conversion apparatus includes a photoelectric conversion unit with a semiconductor region of a first conduction type, an amplifying transistor, and a contact. The contact supplies, via a semiconductor region of a second conduction type arranged along a side surface and a bottom surface of an element isolation region, a reference voltage to the semiconductor region of the second conduction-type arranged below source and drain regions of the amplifying transistor in a region below a gate electrode of the amplifying transistor.
    Type: Grant
    Filed: February 12, 2009
    Date of Patent: September 6, 2011
    Assignee: Canon Kabushiki Kaisha
    Inventors: Koichiro Iwata, Hidekazu Takahashi
  • Patent number: 8008697
    Abstract: A solid-state imaging device in which the potential of a signal line, which is obtained before a pixel has an operating period, is fixed to an intermediate potential between a first power-supply potential and a second power-supply potential.
    Type: Grant
    Filed: January 27, 2010
    Date of Patent: August 30, 2011
    Assignee: Sony Corporation
    Inventors: Keiji Mabuchi, Toshifumi Wakano, Ken Koseki
  • Patent number: 8003424
    Abstract: A CMOS image sensor includes a photosensitive device, a floating diffusion region, a transfer transistor, and a pocket photodiode formed in a semiconductor substrate of a first conductivity type. The floating diffusion region is of a second conductivity type. The transfer transistor has a channel region disposed between the photosensitive device and the floating diffusion region. The pocket photodiode is of the second conductivity type and is formed under a first portion of a bottom surface of the channel region such that a second portion of the bottom surface of the channel region abuts the semiconductor substrate.
    Type: Grant
    Filed: November 13, 2007
    Date of Patent: August 23, 2011
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Kyung-Ho Lee, Yi-Tae Kim, Jung-Chak Ahn, Sae-Young Kim
  • Patent number: 8004057
    Abstract: A photodetector is described along with corresponding materials, systems, and methods. The photodetector comprises an integrated circuit and at least two optically sensitive layers. A first optically sensitive layer is over at least a portion of the integrated circuit, and a second optically sensitive layer is over the first optically sensitive layer. Each optically sensitive layer is interposed between two electrodes. The two electrodes include a respective first electrode and a respective second electrode. The integrated circuit selectively applies a bias to the electrodes and reads signals from the optically sensitive layers. The signal is related to the number of photons received by the respective optically sensitive layer.
    Type: Grant
    Filed: March 19, 2010
    Date of Patent: August 23, 2011
    Assignee: InVisage Technologies, Inc.
    Inventors: Hui Tian, Edward Sargent
  • Patent number: 7999265
    Abstract: The photoelectric conversion device includes: a photoelectric conversion element in which a first electrode, a photoelectric conversion layer, and a second electrode are stacked in this order; and a thin film transistor (TFT) connected to the first electrode of the photoelectric conversion element via a contact hole, wherein the photoelectric conversion layer including a first photoelectric conversion layer disposed at a location which does not overlap with the contact hole and a second photoelectric conversion layer disposed at a location which overlaps with the contact hole, the first photoelectric conversion layer and the second photoelectric conversion layer are separated from each other by a separation groove, and the second electrode is selectively formed on the first photoelectric conversion layer, and the photoelectric conversion element is formed by the first electrode, the first photoelectric conversion layer, and the second electrode.
    Type: Grant
    Filed: December 10, 2009
    Date of Patent: August 16, 2011
    Assignee: Seiko Epson Corporation
    Inventor: Tsukasa Eguchi
  • Patent number: 7994554
    Abstract: Disclosed are a CMOS image sensor and a manufacturing method thereof.
    Type: Grant
    Filed: May 7, 2009
    Date of Patent: August 9, 2011
    Assignee: Dongbu Electronics Co., Ltd.
    Inventor: Chang Hun Han
  • Patent number: 7994553
    Abstract: A complementary metal-oxide semiconductor (CMOS)-based planar type avalanche photo diode (APD) using a silicon epitaxial layer and a method of manufacturing the APD, the photo diode including: a substrate; a well layer of a first conductivity type formed in the substrate; an avalanche embedded junction formed in the well layer of the first conductivity type by low energy ion implantation; the silicon epitaxial layer formed in the avalanche embedded junction; a doping area of a second conductivity type opposite to the first conductive type, formed from a portion of a surface of the well layer of the first conductivity type in the avalanche embedded junction and forming a p-n junction; positive and negative electrodes formed on the doping area of the second conductivity type and the well layer of the first conductivity type separated from the doping area of the second conductivity type, respectively; and an oxide layer formed on an overall surface excluding a window where the positive and negative electrodes ar
    Type: Grant
    Filed: August 20, 2008
    Date of Patent: August 9, 2011
    Assignee: Electronics and Telecommunications Research Institute
    Inventors: Yong Sun Yoon, Kun Sik Park, Jong Moon Park, Bo Woo Kim, Jin Yeong Kang
  • Patent number: 7981717
    Abstract: An image sensor includes a pixel array including a photodiode, a peripheral region including a logic circuit, and an isolation region formed between the pixel array and the peripheral region and formed under the peripheral region to electrically isolate the pixel array from the peripheral region.
    Type: Grant
    Filed: September 4, 2008
    Date of Patent: July 19, 2011
    Assignee: Dongbu Hitek Co., Ltd
    Inventor: Su Lim
  • Publication number: 20110169017
    Abstract: An electronic device includes a substrate. The substrate includes a first pixel driving circuit, a first conductive member, and a second conductive member. The first and second conductive members are spaced apart from each other. The first conductive member is connected to the first pixel driving circuit. The second conductive member is part of a power transmission line. The electronic device further includes a well structure overlying the substrate and defining a pixel opening, a via, and a channel. The pixel opening is connected to the via through the channel. In addition, the electronic device includes a first electronic component. The electronic component includes a first electrode that contacts the first conductive member in the pixel opening, a second electrode that contacts the second conductive member in the via, and an organic layer lying between the first and second electrodes.
    Type: Application
    Filed: September 22, 2006
    Publication date: July 14, 2011
    Inventors: Matthew Stainer, Matthew Stevenson, Stephen Sorich
  • Patent number: 7977717
    Abstract: Systems and methods of pixel sensing circuits. In accordance with a first embodiment of the present invention, a pixel sensing circuit includes a floating diffusion functionally coupled to and surrounded by a ring transfer gate. The ring transfer gate is functionally coupled to and surrounded by a photo diode. The photo diode may be surrounded by a region of poly silicon. The disclosed structure provides radiation hardening and low light performance.
    Type: Grant
    Filed: March 28, 2009
    Date of Patent: July 12, 2011
    Assignee: ON Semiconductor Trading, Ltd
    Inventor: Manuel Innocent
  • Patent number: 7973342
    Abstract: Disclosed are a CMOS image sensor and a method for manufacturing the same, capable of improving the characteristics of the image sensor by increasing junction capacitance of a floating diffusion area. The CMOS image sensor generally includes a photodiode and a plurality of transistors (e.g., transfer, reset, drive, and select transistors), a first conductive type semiconductor substrate, having an active area including a photodiode area, a floating diffusion area, and a voltage input/output area, a gate electrode of each transistor on the active area, a first conductive type first well area in the semiconductor substrate corresponding to the voltage input/output area, a first conductive type second well area in the semiconductor substrate corresponding to the floating diffusion area, and a second conductive type diffusion area in the semiconductor substrate at opposed sides of each gate electrode.
    Type: Grant
    Filed: February 23, 2009
    Date of Patent: July 5, 2011
    Assignee: Dongbu Electronics Co., Ltd.
    Inventor: In Gyun Jeon
  • Patent number: 7973312
    Abstract: A display device includes a main body, a support stand, and a display portion. The display portion includes a pixel having a TFT and a capacitor. The capacitor includes a capacitor electrode on an insulating surface, an insulating film on the capacitor electrode, and a pixel electrode of the TFT on the insulating film.
    Type: Grant
    Filed: March 22, 2010
    Date of Patent: July 5, 2011
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Shunpei Yamazaki, Jun Koyama, Setsuo Nakajima
  • Patent number: 7955908
    Abstract: A thin film transistor array panel is provided, which includes: a gate line, a gate insulating layer, and a semiconductor layer sequentially formed on a substrate; a data line and a drain electrode formed at least on the semiconductor layer; a first passivation layer formed on the data line and the drain electrode and having a first contact hole exposing the drain electrode at least in part; a second passivation layer formed on the first passivation layer and having a second contact hole that is disposed on the first contact hole and has a first bottom edge placed outside the first contact hole and a second bottom edge placed inside the first contact hole; and a pixel electrode formed on the second passivation layer and connected to the drain electrode through the first and the second contact holes.
    Type: Grant
    Filed: February 13, 2007
    Date of Patent: June 7, 2011
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Hye-Young Ryu, Young-Hoon Yoo, Jang-Soo Kim, Sung-Man Kim, Kyung-Wook Kim, Hyang-Shik Kong, Young-Goo Song
  • Patent number: 7956363
    Abstract: The present invention relates to a substrate for a liquid crystal display device and a liquid crystal display device having the substrate, an object of the invention is to provide such a substrate for a display device that can be obtained by a simple production method with high reliability, and a liquid crystal display device having the same. A substrate for a display device contains: an accumulated electrode having an accumulated structure containing a lower layer formed on a substrate, and a upper layer containing ZnO and formed on the lower layer; an insulating film covering the accumulated electrode; a contact hole opening in the insulating film on the accumulated electrode; and a pixel electrode formed on the insulating film and being connected directly to the upper layer of the accumulated electrode through the contact hole.
    Type: Grant
    Filed: May 25, 2006
    Date of Patent: June 7, 2011
    Assignee: Sharp Kabushiki Kaisha
    Inventors: Atsuyuki Hoshino, Katsunori Misaki, Akihiro Matsui, Hideya Hashii
  • Publication number: 20110128425
    Abstract: A CMOS image sensor allows for selectively outputting one of two vertical resolutions, e.g. 1080 to 720 lines. The scan conversion is implemented completely on the image sensor chip by using smaller sub-pixel cores, which can be electrically combined via switch transistors. A basic circuit of the CMOS image sensor has a number of pixel cells arranged in lines and columns. Each pixel cell has a photosensitive element that converts impinging light into electric charge and a first transfer element. The first transfer elements of m pixel cells arranged consecutively in the same column are arranged for transferring the charge generated in the respective m photosensitive elements during exposure to a single first charge storage element provided for the respective group of m pixel cells. In an exemplary embodiment the switching scheme allows for combining the signal information of either two or three vertically adjacent sub-pixel cores.
    Type: Application
    Filed: August 11, 2009
    Publication date: June 2, 2011
    Inventors: Heinrich Schemmann, Petrus Gijsbertus Maria Centen, Sabine Roth, Boon Keng Teng
  • Patent number: 7952152
    Abstract: For forming a gate electrode, a conductive film with low resistance including Al or a material containing Al as its main component and a conductive film with low contact resistance for preventing diffusion of Al into a semiconductor layer are laminated, and the gate electrode is fabricated by using an apparatus which is capable of performing etching treatment at high speed.
    Type: Grant
    Filed: August 4, 2010
    Date of Patent: May 31, 2011
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Shunpei Yamazaki, Hideomi Suzawa, Koji Ono, Yoshihiro Kusuyama
  • Patent number: 7943934
    Abstract: A thin film transistor array panel according to an exemplary embodiment of the present invention comprises a substrate; a first signal line and a second signal line disposed on the substrate; a switching thin film transistor connected to the first signal line and the second signal line, and comprising a first insulating layer; a driving thin film transistor connected to the switching thin film transistor and comprising a second insulating layer; and a discharge thin film transistor connected to one of the first signal line and the second signal line, and comprising the first insulating layer and the second insulating layer.
    Type: Grant
    Filed: November 6, 2008
    Date of Patent: May 17, 2011
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Young-Soo Yoon, Chong-Chul Chai, Joon-Chul Goh
  • Publication number: 20110108940
    Abstract: Provided is a method of fabricating a backside illuminated image sensor that includes providing a device substrate having a frontside and a backside, where pixels are formed at the frontside and an interconnect structure is formed over pixels, forming a re-distribution layer (RDL) over the interconnect structure, bonding a first glass substrate to the RDL, thinning and processing the device substrate from the backside, bonding a second glass substrate to the backside, removing the first glass substrate, and reusing the first glass substrate for fabricating another backside-illuminated image sensor.
    Type: Application
    Filed: November 6, 2009
    Publication date: May 12, 2011
    Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Kuan-Chieh Huang, Dun-Nian Yuang, Chih-Jen Wu, Chen-Ming Huang
  • Patent number: 7939868
    Abstract: An object is to provide a solid state image pickup device and a camera which do not worsen a sensor performance in terms of an optical property, a saturated charge amount and the like. A solid state image sensor including a pixel region having a plurality of pixels includes at least a photodiode and an amplifying portion amplifying photocharges outputted from the photodiode in the pixel region, and further includes a well electrode for taking well potential of a well region in which the amplifying portion is arranged. Between the well electrode and the photodiode, no element isolation regions by an insulation film are arranged. Moreover, on the surface of a first semiconductor region in which the photodiode stores the charges, a second semiconductor layer of a conductivity type reverse to that of the first semiconductor region is arranged.
    Type: Grant
    Filed: September 21, 2009
    Date of Patent: May 10, 2011
    Assignee: Canon Kabushiki Kaisha
    Inventor: Toru Koizumi
  • Publication number: 20110102620
    Abstract: A solid-state imaging device is provided, which includes a photodiode having a first conductivity type semiconductor area that is dividedly formed for each pixel; a first conductivity type transfer gate electrode formed on the semiconductor substrate via a gate insulating layer in an area neighboring the photodiode, and transmitting signal charges generated and accumulated in the photodiode; a signal reading unit reading a voltage which corresponds to the signal charge or the signal charge; and an inversion layer induction electrode formed on the semiconductor substrate via the gate insulating layer in an area covering a portion or the whole of the photodiode, and composed of a conductor or a semiconductor having a work function. An inversion layer is induced, which is formed by accumulating a second conductivity type carrier on a surface of the inversion layer induction electrode side of the semiconductor area through the inversion layer induction electrode.
    Type: Application
    Filed: October 22, 2010
    Publication date: May 5, 2011
    Applicant: SONY CORPORATION
    Inventors: Yorito Sakano, Takashi Abe, Keiji Mabuchi, Ryoji Suzuki, Hiroyuki Mori, Yoshiharu Kudoh, Fumihiko Koga, Takeshi Yanagita, Kazunobu Ota
  • Patent number: 7936036
    Abstract: A solid-state image sensor includes: a trench isolation region; a photodiode region for converting incident light to signal charges and accumulating the signal charges therein; a floating diffusion region for accumulating the signal charges of the photodiode region; a gate electrode formed over the element formation region located between the photodiode region and the floating diffusion region, and formed so that both ends of the gate electrode respectively overlap a part of the photodiode region and a part of the floating diffusion region; and an inactive layer formed in a region located in a bottom portion and sidewall portions of the trench isolation region. An impurity concentration in a region located under the gate electrode in the inactive layer is lower than that in a region other than the region located under the gate electrode in the inactive layer.
    Type: Grant
    Filed: May 1, 2009
    Date of Patent: May 3, 2011
    Assignee: Panasonic Corporation
    Inventors: Shouzi Tanaka, Ryohei Miyagawa
  • Patent number: 7932126
    Abstract: The area occupied by a photo-sensor element may be reduced and multiple elements may be integrated in a limited area so that the sensor element can have higher output and smaller size. Higher output and miniaturization are achieved by uniting a sensor element using an amorphous semiconductor film (typically an amorphous silicon film) and an output amplifier circuit including a TFT with a semiconductor film having a crystal structure (typically a poly-crystalline silicon film) used as an active layer over a plastic film substrate that can resist the temperature in the process for mounting such as a solder reflow process. A sensor element that can resist bending stress can be obtained.
    Type: Grant
    Filed: January 6, 2009
    Date of Patent: April 26, 2011
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Junya Maruyama, Toru Takayama, Masafumi Morisue, Ryosuke Watanabe, Eiji Sugiyama, Susumu Okazaki, Kazuo Nishi, Jun Koyama, Takeshi Osada, Takanori Matsuzaki
  • Patent number: 7932519
    Abstract: A pixel structure includes a scan line, a data line, a gate electrode, a semiconductor layer, a source electrode, a drain electrode including a comb-shaped part surrounding the source electrode and a connecting part, and a pixel electrode electrically connected to the drain electrode. The scan line and the data line are arranged intersectedly and electrically insulated from each other. At least a portion of the source electrode and the drain electrode are disposed on the semiconductor layer. At least one branch of the comb-shaped part extends outside one side of the gate electrode to form a protrusion part. The connecting part extends from the comb-shaped part beyond the other side of the gate electrode. The protrusion part and the connecting part aligned with the margin of the gate electrode have a first width and a third width respectively, wherein the first width substantially equals to the third width.
    Type: Grant
    Filed: August 25, 2010
    Date of Patent: April 26, 2011
    Assignee: Century Display(ShenZhen)Co.,Ltd.
    Inventor: Chih-Chung Liu
  • Patent number: 7923732
    Abstract: Embodiments of the present invention relate to a thin film transistor and a manufacturing method of a display panel, and include forming a gate line including a gate electrode on a substrate, forming a gate insulating layer on the gate electrode, forming an intrinsic semiconductor on the gate insulating layer, forming an extrinsic semiconductor on the intrinsic semiconductor, forming a data line including a source electrode and a drain electrode on the extrinsic semiconductor, and plasma-treating a portion of the extrinsic semiconductor between the source electrode and the drain electrode to form a protection member and ohmic contacts on respective sides of the protection member. Accordingly, the process for etching the extrinsic semiconductor and forming an inorganic insulating layer for protecting the intrinsic semiconductor may be omitted such that the manufacturing process of the display panel may be simplified, manufacturing cost may be reduced, and productivity may be improved.
    Type: Grant
    Filed: December 9, 2008
    Date of Patent: April 12, 2011
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Yu-Gwang Jeong, Young-Wook Lee, Sang-Gab Kim, Woo-Geun Lee, Min-Seok Oh, Jang-Soo Kim, Kap-Soo Yoon, Shin-Il Choi, Hong-Kee Chin, Seung-Ha Choi, Seung-Hwan Shim, Sung-Hoon Yang, Ki-Hun Jeong
  • Patent number: 7923763
    Abstract: A two dimensional time delay integration CMOS image sensor having a plurality of pinned photodiodes, each pinned photodiode collects a charge when light strikes the pinned photodiode, a plurality of electrodes separating the plurality of pinned photodiodes, the plurality of electrodes are configured for two dimensional charge transport between two adjacent pinned photodiodes, and a plurality of readout nodes connected to the plurality of pinned photodiodes via address lines.
    Type: Grant
    Filed: March 8, 2007
    Date of Patent: April 12, 2011
    Assignee: Teledyne Licensing, LLC
    Inventor: Stefan C. Lauxtermann
  • Patent number: 7923801
    Abstract: A photodetector is described along with corresponding materials, systems, and methods. The photodetector comprises an integrated circuit and at least two optically sensitive layers. A first optically sensitive layer is over at least a portion of the integrated circuit, and a second optically sensitive layer is over the first optically sensitive layer. Each optically sensitive layer is interposed between two electrodes. The two electrodes include a respective first electrode and a respective second electrode. The integrated circuit selectively applies a bias to the electrodes and reads signals from the optically sensitive layers. The signal is related to the number of photons received by the respective optically sensitive layer.
    Type: Grant
    Filed: April 18, 2008
    Date of Patent: April 12, 2011
    Assignee: InVisage Technologies, Inc.
    Inventors: Hui Tian, Edward Hartley Sargent
  • Patent number: 7915103
    Abstract: The method for fabricating a flat panel display includes performing a first crystallization process to re-crystallize an amorphous silicon layer on a glass substrate to make the amorphous silicon layer become a polysilicon layer, forming a patterned absorbing layer to cover an active area pattern of a driving TFT and to expose portions of the polysilicon layer, performing a second crystallization process to re-crystallization the exposed portions of the polysilicon layer so that the exposed portions of the polysilicon layer has a different grain structure from the grain structure of the driving TFT, removing the patterned absorbing layer, and removing portions of the polysilicon layer to form an active area of the driving TFT and an active area of a switching TFT area in the exposed portions of the polysilicon layer of each sub-pixel.
    Type: Grant
    Filed: May 1, 2009
    Date of Patent: March 29, 2011
    Assignee: Chimei Innolux Corporation
    Inventors: Chun-Yen Liu, Chang-Ho Tseng
  • Patent number: 7902574
    Abstract: This invention provides a type of solid-state image pickup device characterized by the fact that for a solid-state image pickup device with a broad dynamic range, it is possible to suppress the dark current than photoelectrons overflowing from the photodiode, as well as its driving method. Plural pixels are integrated in an array configuration on a semiconductor substrate. Each pixel has the following parts: photodiode (CPD), transfer transistor (?T), floating diffusion (CFD), accumulating capacitive element (CS), accumulating transistor (?S), and a reset transistor. During the accumulating period of photoelectric charge, voltage (?) over that applied on the semiconductor substrate, or ?0.6 V or lower than the voltage applied on the semiconductor substrate, is applied as an OFF potential on the gate electrode of at least one transfer transistor, the accumulating transistor and the reset transistor.
    Type: Grant
    Filed: May 16, 2007
    Date of Patent: March 8, 2011
    Assignee: Texas Instruments Incorporated
    Inventor: Satoru Adachi
  • Patent number: 7897970
    Abstract: In a lower substrate, a display apparatus having the lower substrate and a method of manufacturing the lower substrate, the lower substrate includes a pixel area and a circuit area. An image is displayed in the pixel area. A first signal electrode is disposed in a circuit area. A first insulating layer includes an opening, through which the first signal electrode is exposed. A second signal electrode is disposed on the first insulating layer in the circuit area, and spaced apart from the first signal electrode. A second insulating layer is disposed on the first insulating layer, and includes a contact hole, through which the first and second signal electrodes are exposed. A conductive layer electrically connects the first signal electrode to the second signal electrode. Therefore, a manufacturing process is simplified so that a yield of the lower substrate is increased.
    Type: Grant
    Filed: December 17, 2007
    Date of Patent: March 1, 2011
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Hyun-Young Kim, Joo-Sun Yoon, Bong-Ju Kim, Seung-Gyu Tae
  • Patent number: 7888150
    Abstract: The present invention provides a display comprising a panel having a display region for displaying an image and a peripheral region defined therein, a plurality of thin film transistors (TFTs) formed in the display region, p-type and n-type TFTs formed in the peripheral region, and at least one photo diode formed in a horizontal structure in the display or peripheral region; and a method of manufacturing the display. According to the present invention, n-type and p-type TFTs and a photo diode can be together formed without an additional process when forming the TFTs using a polycrystalline silicon thin film, and various peripheral circuits can be configured using such elements.
    Type: Grant
    Filed: November 14, 2007
    Date of Patent: February 15, 2011
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Cheol Min Kim, Gi Chang Lee, Yang Hwa Choi
  • Patent number: 7888717
    Abstract: A thin film transistor substrate includes a color filter layer and a gate line. The color filter layer has a reverse taper shape, which is used to pattern the gate line without a separate mask. Thus, the total number of masks used to manufacture the thin film transistor substrate can be reduced, thereby reducing the manufacturing cost and improving the productivity.
    Type: Grant
    Filed: October 22, 2008
    Date of Patent: February 15, 2011
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Ju-Han Bae, Jang-Kyum Kim
  • Patent number: 7884401
    Abstract: The embodiment relates to a complementary metal oxide semiconductor (CMOS) image sensor and more particularly, to a CMOS image sensor and a manufacturing method thereof capable of improving electron storing capacity in a floating diffusion area. The CMOS image sensor includes a first gate electrode on a semiconductor substrate; a photodiode in the semiconductor substrate on one side of the first gate electrode; a floating diffusion area in the semiconductor substrate on an opposite side of the first gate electrode; a capacitor including a lower capacitor electrode connected to the floating diffusion area, a dielectric layer on the lower capacitor electrode, and an upper capacitor electrode; a drive capacitor coupled to the lower capacitor electrode and having a second gate electrode connected to the floating diffusion area. The electron storing capacity of the floating diffusion node is increased, making it possible to improve the dynamic range of the image sensor.
    Type: Grant
    Filed: December 21, 2007
    Date of Patent: February 8, 2011
    Assignee: Dongbu HiTek Co., Ltd.
    Inventor: Hee Sung Shim
  • Patent number: 7884402
    Abstract: Provided is an image sensor. According to embodiments, the subject image sensor can include a photodiode for converting incident light into electrical signals, a reset transistor for resetting a voltage value of a unit pixel, a drive transistor for providing an output voltage, a select transistor for selecting the unit pixel, a storage capacitor for storing electrons leaking from the photodiode, and a switching transistor for controlling the flow of charge to and from the storage capacitor. The switching transistor can be disposed connected to a node between the photodiode and the reset transistor, and the storage capacitor can be disposed at a side of the switching transistor.
    Type: Grant
    Filed: September 29, 2008
    Date of Patent: February 8, 2011
    Assignee: Dongbu Hitek Co., Ltd.
    Inventor: An Do Ki
  • Patent number: 7880204
    Abstract: A Silicon photodetector contains an insulating substrate having a top surface and a bottom surface. A Silicon layer is located on the top surface of the insulating substrate, where the Silicon layer contains a center region, the center region being larger in thickness than the rest of the Silicon layer. A top Silicon dioxide layer is located on a top surface of the center region. A left wing of the center region and a right wing of the center region are doped. The Silicon photodetector also has an active region located within the center region, where the active region contains a tailored crystal defect-impurity combination and Oxygen atoms.
    Type: Grant
    Filed: October 2, 2006
    Date of Patent: February 1, 2011
    Assignee: Massachusetts Institute of Technology
    Inventors: Michael W. Geis, Steven J. Spector, Donna M. Lennon, Matthew E. Grein, Robert T. Schulein, Jung U. Yoon, Franz Xaver Kaertner, Fuwan Gan, Theodore M. Lyszczarz
  • Publication number: 20110019049
    Abstract: A unit pixel of a photo detecting apparatus includes a photogate, a transfer gate and a floating diffusion region. The photogate includes a junction gate extending in a first direction and a plurality of finger gates extending from the junction gate in a second direction substantially perpendicular to the first direction. The transfer gate is formed adjacent to the junction gate. The floating diffusion region is formed adjacent to the first transfer gate.
    Type: Application
    Filed: July 27, 2010
    Publication date: January 27, 2011
    Applicant: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Young Gu Jin, Kwan-Young Oh, Samuel Sungmok Lee, Kwang-Chol Choe, Se-Won Seo, Yoon-Dong Park, Eric Fossum, Kyoung-Lae Cho
  • Patent number: 7858983
    Abstract: An electrochromic display is disclosed which comprises an array-side substrate (10) wherein a TFT (14) and a pixel electrode (15) connected with the TFT (14) are formed, a color filter-side substrate (50) wherein a counter electrode (53) is formed, and an electrolyte layer (80) injected between the array-side substrate (10) and the color filter-side substrate (50). In this electrochromic display, the TFT (14) is formed to have an area not less than 30% of the area of the pixel, thereby supplying a larger current. Consequently, oxidation-reduction reaction in the electrochromic phenomenon proceeds at a higher rate, thereby enabling a high-speed response.
    Type: Grant
    Filed: January 31, 2006
    Date of Patent: December 28, 2010
    Inventors: Satoshi Morita, Takao Yamauchi, Yutaka Sano
  • Patent number: 7859032
    Abstract: During an exposure time period (long accumulation time period) of a low shutter speed shooting mode, a second reference voltage Vss2, which is different from a first reference voltage Vss1 (a ground voltage) corresponding to a reference voltage of a peripheral circuit, is applied to a well (5) where a photoelectric converter section (2) and a drain region (4) are formed, whereby generation of dark electrons at a portion of a surface of the well (5) below a gate electrode (6) is suppressed. A polarity of the second reference voltage Vss2 is positive in the case where a conductivity type of the well (5) is a P-type, and is negative in the case of an N-type.
    Type: Grant
    Filed: July 21, 2005
    Date of Patent: December 28, 2010
    Assignee: Panasonic Corporation
    Inventors: Makoto Inagaki, Yoshiyuki Matsunaga
  • Patent number: 7859077
    Abstract: A semiconductor device includes: an n-type MOS transistor and a p-type MOS transistor connected in series; and a first gate extending via an insulating film above a channel of the n-type MOS transistor and a channel of the p-type MOS transistor. By providing light to the first gate, electrons and holes are generated, at least one of either of the electrons and holes passes through above the channel of the n-type MOS transistor and at least one of the either of the electrons and holes passes through above the channel of the p-type MOS transistor, whereby the n-type MOS transistor and the p-type MOS transistor are switched.
    Type: Grant
    Filed: November 9, 2007
    Date of Patent: December 28, 2010
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Kazushige Yamamoto, Tatsuo Shimizu
  • Patent number: 7859072
    Abstract: An image sensor and a fabricating method thereof are provided. The image sensor includes a plurality of pixels disposed in an active region and dummy pixels disposed in a peripheral region. An interlayer dielectric layer has a first thickness in the active region and a second thickness thinner than the first thickness in the peripheral region. Color filters are disposed in the active region, and a light blocking member is disposed in the peripheral region. There is substantially no step difference between the color filters and the light blocking member.
    Type: Grant
    Filed: August 15, 2007
    Date of Patent: December 28, 2010
    Assignee: Dongbu Hitek Co., Ltd.
    Inventor: Chang Hun Han
  • Publication number: 20100320516
    Abstract: The invention relates to image sensors produced with CMOS technology, whose individual pixels, arranged in an array of rows and columns, each consist of a photodiode associated with a charge storage region which receives the photogenerated charge before a charge readout phase. To eliminate the risk of introducing kTC-type noise into the signal, during the reset of the storage zone at the end of a readout cycle, the invention proposes that the storage zone be divided into two parts one of which, adjacent to the reset gage, is covered by a diffused region of the same type of conductivity as the substrate in which the photodiode is formed, this region being brought to the fixed potential of the substrate, and the other of which is not covered by such a region and is not adjacent to the reset gate.
    Type: Application
    Filed: November 25, 2008
    Publication date: December 23, 2010
    Applicant: E2V SEMICONDUCTORS
    Inventors: Pierre Fereyre, Simon Caruel
  • Patent number: 7855094
    Abstract: A photo-detector, in which metal wiring for connecting electrodes is arranged on a planarized surface and thus the metal wiring arrangement is simplified, and a method of manufacturing the same are provided. The photo-detector includes a multi-layer compound semiconductor layer formed on a compound semiconductor substrate. A number of p-n junction diodes are arranged in a regular order in a selected region of the compound semiconductor layer, and an isolation region for individually isolating the p-n junction diodes is formed by implanting impurity ions in the multi-layer compound semiconductor layer. The isolation region and the surface of the compound semiconductor layer are positioned on the same level. The isolation region may be a Fe-impurity region.
    Type: Grant
    Filed: April 23, 2009
    Date of Patent: December 21, 2010
    Assignee: Electronics and Telecommunications Research Institute
    Inventors: Eun Soo Nam, Seon Eui Hong, Myoung Sook Oh, Yong Won Kim, Ho Young Kim, Bo Woo Kim
  • Patent number: 7847289
    Abstract: An array substrate for a liquid crystal display device includes a substrate, a gate line over the substrate, a data line crossing the gate line to define a pixel region and including a transparent conductive layer and an opaque conductive layer, a data pad at one end of the data line and including a transparent conductive layer, a thin film transistor connected to the gate line and the data line and including a gate electrode, an active layer, an ohmic contact layer, a buffer metallic layer, a source electrode and a drain electrode, and a pixel electrode in the pixel region and connected to the thin film transistor, the pixel electrode including a transparent conductive layer.
    Type: Grant
    Filed: December 28, 2006
    Date of Patent: December 7, 2010
    Assignee: LG Display Co., Ltd
    Inventors: Hyo-Uk Kim, Byung-Chul Ahn, Byoung-Ho Lim
  • Patent number: 7842950
    Abstract: A display device including a first substrate, a first subpixel electrode, a second subpixel electrode corresponding to the first substrate, a second substrate and a common electrode formed on the second substrate is provided. The first subpixel electrode and the second subpixel electrode are formed on the first substrate. The second subpixel electrode is spaced apart from the first subpixel electrode. The common electrode has a first cutout and a second cutout. The first cutout is disposed over the first subpixel electrode and the second cutout is disposed over the second subpixel electrode. At least a portion of the first cutout has a first width and at least a portion of the second cutout has a second width different from the first width. The first width is larger than the second width in one embodiment. This structure enhances the aperture ratio and the brightness of the display device. Failures such as a residual image, stain or fingerprint may be reduced and the picture quality is improved.
    Type: Grant
    Filed: May 2, 2005
    Date of Patent: November 30, 2010
    Assignee: Samsung Electronics Co., Ltd.
    Inventor: Jang-Kun Song
  • Publication number: 20100295107
    Abstract: A solid-state imaging device is provided. The solid-state imaging device includes a pixel section, a peripheral circuit section, a silicide blocking layer formed in the pixel section except for part or whole of an area above an isolation portion in the pixel section, and a metal-silicided transistor formed in the peripheral circuit section.
    Type: Application
    Filed: August 9, 2010
    Publication date: November 25, 2010
    Applicant: SONY CORPORATION
    Inventor: Keiji Tatani
  • Patent number: 7829367
    Abstract: An image sensor and a method for manufacturing the same are provided. In the method, a photoresist is formed on a substrate including a photodiode region and a gate electrode opposite to the photodiode region on the basis of the gate electrode. An oxide layer is formed to a specific thickness on both the photodiode region and a part of the gate electrode. The photoresist is removed from the substrate and cleaned. A first oxide film is formed on the substrate, the gate electrode, and the oxide layer remaining on the photodiode region. A nitride film is formed on the first oxide film. And a second oxide film is formed on the nitride film. Blank etching is performed on the first oxide film, the nitride film, and the second oxide film to form a spacer at the side of the gate electrode.
    Type: Grant
    Filed: December 22, 2009
    Date of Patent: November 9, 2010
    Assignee: Dongbu Hitek Co., Ltd.
    Inventors: Sang Il Hwang, Jeong Yel Jang
  • Patent number: RE42292
    Abstract: A lock in pinned photodiode photodetector includes a plurality of output ports which are sequentially enabled. Each time when the output port is enabled is considered to be a different bin of time. A specified pattern is sent, and the output bins are investigated to look for that pattern. The time when the pattern is received indicates the time of flight. A CMOS active pixel image sensor includes a plurality of pinned photodiode photodetectors that use a common output transistor. In one configuration, the charge from two or more pinned photodiodes may be binned together and applied to the gate of an output transistor.
    Type: Grant
    Filed: March 30, 2009
    Date of Patent: April 12, 2011
    Assignee: Round Rock Research, LLC
    Inventors: Vladimir Berezin, Alexander I. Krymski, Eric R. Fossum