Including Nitride (e.g., Gan) (epo) Patents (Class 257/E33.025)
-
Patent number: 8536026Abstract: A method for selectively growing a nitride semiconductor, in which a mask is formed, with an opening formed therein, on a nitride semiconductor layer. A nitride semiconductor crystal is selectively grown on a portion of the nitride semiconductor layer exposed through the opening in the mask, the nitride semiconductor crystal shaped as a hexagonal pyramid and having crystal planes inclined with respect to a top surface of the nitride semiconductor. Here, the nitride semiconductor crystal has at least one intermediate stress-relieving area having crystal planes inclined at a greater angle than those of upper and lower areas of the nitride semiconductor crystal, the intermediate stress-relieving area relieving stress which occurs from continuity in the inclined crystal planes.Type: GrantFiled: July 3, 2007Date of Patent: September 17, 2013Assignee: Samsung Electronics Co., Ltd.Inventors: Hee Seok Park, Gil Han Park, Sang Duk Yoo, Young Min Park, Hak Hwan Kim, Seon Young Myoung, Sang Bum Lee, Ki Tae Park, Myoung Sik Jung, Kyeong Ik Min
-
Patent number: 8530256Abstract: (a) Forming on a growth substrate a void-containing layer that is made of a group III nitride compound semiconductor and contains voids. (b) Forming on the void-containing layer an n-type layer that is made of an n-type group III nitride compound semiconductor and serves to close the voids. (c) Forming on the n-type layer an active layer made of a group III nitride compound semiconductor. (d) Forming on the active layer a p-type layer made of a p-type group III nitride compound semiconductor. (e) Bonding a support substrate above the p-type layer. (f) Peeling off the growth substrate at the boundary where the void are produced. (g) Planarizing the n-type layer. Step (b) comprises (b1) forming part of the n-type layer under conditions where horizontal growth is relatively weak and (b2) forming the remaining part of the n-type layer under conditions where horizontal growth is relatively strong.Type: GrantFiled: March 9, 2012Date of Patent: September 10, 2013Assignee: Stanley Electric Co., Ltd.Inventors: Yasuyuki Shibata, Ji-Hao Liang, Takako Chinone
-
Patent number: 8525196Abstract: A nitride-based semiconductor LED includes a substrate; an n-type nitride semiconductor layer formed on the substrate; an active layer and a p-type nitride semiconductor layer that are sequentially formed on a predetermined region of the n-type nitride semiconductor layer; a transparent electrode formed on the p-type nitride semiconductor layer; a p-electrode pad formed on the transparent electrode, the p-electrode pad being spaced from the outer edge line of the p-type nitride semiconductor layer by 50 to 200 ?m; and an n-electrode pad formed on the n-type nitride semiconductor layer.Type: GrantFiled: April 20, 2011Date of Patent: September 3, 2013Assignee: Samsung Electronics Co., Ltd.Inventors: Hyuk Min Lee, Hyun Kyung Kim, Dong Joon Kim, Hyoun Soo Shin
-
Patent number: 8519416Abstract: A nitride-based semiconductor light-emitting device capable of suppressing reduction of characteristics and a yield and method of fabricating the same is described. The method of fabricating includes the steps of forming a groove portion on a nitride-based semiconductor substrate by selectively removing a prescribed region of a second region of the nitride-based semiconductor substrate other than a first region corresponding to a light-emitting portion of a nitride-based semiconductor layer up to a prescribed depth and forming the nitride-based semiconductor layer having a different composition from the nitride-based semiconductor substrate on the first region and the groove portion of the nitride-based semiconductor substrate.Type: GrantFiled: October 9, 2009Date of Patent: August 27, 2013Assignee: Future Light, LLCInventors: Takashi Kano, Masayuki Hata, Yasuhiko Nomura
-
Patent number: 8513036Abstract: A photonic quantum ring (PQR) laser includes an active layer having a multi-quantum-well (MQW) structure and etched lateral face. The active layer is formed to be sandwiched between p-GaN and n-GaN layers epitaxially grown on a reflector disposed over a support substrate. A coating layer is formed over an outside of the lateral faces of the active layer, and upper electrode is electrically connected to an upper portion of the n-GaN layer, and a distributed Bragg reflector (DBR) is formed over the n-GaN layer and the upper electrode. Accordingly, the PQR laser is capable of oscillating a power-saving vertically dominant 3D multi-mode laser suitable for a low power display device, prevent the light speckle phenomenon, and generate focus-adjusted 3D soft light.Type: GrantFiled: June 15, 2012Date of Patent: August 20, 2013Assignee: Postech Academy-Industry FoundationInventors: O Dae Kwon, Mi-Hyang Shin, Seung Eun Lee, Young-Heub Jang, Young Chun Kim, Junho Yoon
-
Patent number: 8513040Abstract: According to one embodiment, a method is disclosed for manufacturing a display device. A film material layer is formed on a support substrate. A first heating process for the film material layer at a first temperature to form a film layer and a second heating process for a second region surrounding a first region at a second temperature higher than the first temperature are performed. The first region is provided in a central part of the film layer. A display layer is formed in the first region and a peripheral circuit section is formed at least in a part of the second region. A third heating process is performed for at least a part of the film layer at a third temperature higher than the second temperature. In addition, the film layer is peeled off from the support substrate.Type: GrantFiled: May 30, 2012Date of Patent: August 20, 2013Assignee: Kabushiki Kaisha ToshibaInventors: Tatsunori Sakano, Kentaro Miura, Nobuyoshi Saito, Shintaro Nakano, Tomomasa Ueda, Hajime Yamaguchi
-
Patent number: 8507947Abstract: Substrates of GaN over silicon suitable for forming electronics devices such as heterostructure field effect transistors (HFETs), and methods of making the substrates, are disclosed. Voids in a crystalline Al2O3 film on a top surface of a silicon wafer are formed. The top surface of the silicon wafer is along the <111> silicon crystal orientation. A plurality of laminate layers is deposited over the voids and the Al2O3 film. Each laminate layer includes an AlN film and a GaN film. A transistor or other device may be formed in the top GaN film.Type: GrantFiled: December 9, 2011Date of Patent: August 13, 2013Assignee: Power Integrations, Inc.Inventors: Jamal Ramdani, John P. Edwards, Linlin Liu
-
Patent number: 8507357Abstract: The present invention discloses a method for lift-off of an LED substrate. By eroding the sidewall of a GaN epitaxial layer, cavity structures are formed, which may act in cooperation with a non-fully filled patterned sapphire substrate from epitaxial growth to cause the GaN epitaxial layer to separate from the sapphire substrate. The method according to an embodiment of the present invention can effectively reduce the dislocation density in the growth of a GaN-based epitaxial layer; improve lattice quality, and realize rapid lift-off of an LED substrate, and has the advantages including low cost, no internal damage to the GaN film, elevated performance of the photoelectric device and improved luminous efficiency.Type: GrantFiled: January 18, 2012Date of Patent: August 13, 2013Assignee: Xiamen Sanan Optoelectronics Technology Co., Ltd.Inventors: Su-Hui Lin, Sheng-Hsien Hsu, Kang-Wei Peng, Jiansen Zheng, Jyh-Chiarng Wu, Keehuang Lin
-
Patent number: 8507944Abstract: Disclosed herein is a light emitting device including a first nitride semiconductor and a second nitride semiconductor, each of which includes a first conductivity-type semiconductor layer, an active layer and a second conductivity-type semiconductor layer, and a connection layer formed between the second conductivity-type semiconductor layer of the second nitride semiconductor and the first conductivity-type semiconductor layer of the first nitride semiconductor, wherein the first nitride semiconductor and the second nitride semiconductor are connected by the connection layer, and the light emitting device further comprises electrodes formed on at least a part of the second conductivity-type semiconductor layer of the first nitride semiconductor, at least a part of the first conductivity-type semiconductor layer of the second nitride semiconductor, and at least a part of the second conductivity-type semiconductor layer of the second nitride semiconductor.Type: GrantFiled: May 24, 2011Date of Patent: August 13, 2013Assignee: LG Innotek Co., Ltd.Inventors: Sung Kyoon Kim, Hee Young Beom, Sung Ho Choo
-
Patent number: 8502246Abstract: A method for the fabrication of nonpolar indium gallium nitride (InGaN) films as well as nonpolar InGaN-containing device structures using metalorganic chemical vapor deposition (MOVCD). The method is used to fabricate nonpolar InGaN/GaN violet and near-ultraviolet light emitting diodes and laser diodes.Type: GrantFiled: February 12, 2009Date of Patent: August 6, 2013Assignees: The Regents of the University of California, The Japan Science and Technology AgencyInventors: Arpan Chakraborty, Benjamin A. Haskell, Stacia Keller, James S. Speck, Steven P. DenBaars, Shuji Nakamura, Umesh K. Mishra
-
Publication number: 20130187124Abstract: A light emitting device has a nanostructured layer with nanovoids. The nanostructured layer can be provided below and adjacent to active region or on a substrate or a template below an n-type layer for the active region, so as to reduce strain between epitaxial layers in the light emitting device. A method of manufacturing the same is provided.Type: ApplicationFiled: January 25, 2012Publication date: July 25, 2013Applicant: INVENLUX LIMITEDInventors: JIANPING ZHANG, HONGMEI WANG, CHUNHUI YAN, WEN WANG, YING LIU
-
Patent number: 8487327Abstract: A III-nitride semiconductor device has a support base comprised of a III-nitride semiconductor and having a primary surface extending along a first reference plane perpendicular to a reference axis inclined at a predetermined angle with respect to a c-axis of the III-nitride semiconductor, and an epitaxial semiconductor region provided on the primary surface of the support base. The epitaxial semiconductor region includes GaN-based semiconductor layers. The reference axis is inclined at a first angle from the c-axis of the III-nitride semiconductor toward a first crystal axis, either the m-axis or a-axis. The reference axis is inclined at a second angle from the c-axis of the III-nitride semiconductor toward a second crystal axis, the other of the m-axis and a-axis. Morphology of an outermost surface of the epitaxial semiconductor region includes a plurality of pits. A pit density of the pits is not more than 5×104 cm?2.Type: GrantFiled: May 31, 2012Date of Patent: July 16, 2013Assignee: Sumitomo Electric Industries, Ltd.Inventors: Yohei Enya, Yusuke Yoshizumi, Takashi Kyono, Takamichi Sumitomo, Katsushi Akita, Masaki Ueno, Takao Nakamura
-
Patent number: 8481353Abstract: Various embodiments of the present disclosure pertain to separating nitride films from growth substrates by selective photo-enhanced wet oxidation. In one aspect, a method may transform a portion of a III-nitride structure that bonds with a first substrate structure into a III-oxide layer by selective photo-enhanced wet oxidation. The method may further separate the first substrate structure from the III-nitride structure.Type: GrantFiled: April 14, 2011Date of Patent: July 9, 2013Assignee: Opto Tech CorporationInventors: Lung-Han Peng, Jeng-Wei Yu, Po-Chun Yeh
-
Patent number: 8471266Abstract: According to the present invention, an AlN crystal film seed layer having high crystallinity is combined with selective/lateral growth, whereby a Group III nitride semiconductor multilayer structure more enhanced in crystallinity can be obtained. The Group III nitride semiconductor multilayer structure of the present invention is a Group III nitride semiconductor multilayer structure where an AlN crystal film having a crystal grain boundary interval of 200 nm or more is formed as a seed layer on a C-plane sapphire substrate surface by a sputtering method and an underlying layer, an n-type semiconductor layer, a light-emitting layer and a p-type semiconductor layer, each composed of a Group III nitride semiconductor, are further stacked, wherein regions in which the seed layer is present and is absent are formed on the C-plane sapphire substrate surface and/or regions capable of epitaxial growth and incapable of epitaxial growth are formed in the underlying layer.Type: GrantFiled: June 11, 2012Date of Patent: June 25, 2013Assignee: Toyoda Gosei Co., Ltd.Inventors: Kenzo Hanawa, Yasumasa Sasaki
-
Patent number: 8470626Abstract: Exemplary embodiments of the present invention relate to a method of fabricating a light emitting diode (LED). According to an exemplary embodiment of the present invention, the method includes growing a first GaN-based semiconductor layer on a substrate at a first temperature by supplying a chamber with a nitride source gas and a first metal source gas, stopping the supply of the first metal source gas and maintaining the first temperature for a first time period after stopping the supply of the first metal source gas, decreasing the temperature of the substrate to the a second temperature after the first time period elapses, growing an active layer of the first GaN-based semiconductor layer at the second temperature by supplying the chamber with a second metal source gas.Type: GrantFiled: June 1, 2011Date of Patent: June 25, 2013Assignee: Seoul Opto Device Co., Ltd.Inventors: Kwang Joong Kim, Chang Suk Han, Seung Kyu Choi, Ki Bum Nam, Nam Yoon Kim, Kyung Hae Kim, Ju Hyung Yoon
-
Publication number: 20130153918Abstract: A III-N on silicon LED constructed to emit light in the visible range includes a layer of single crystal III-N with a light emitting diode formed therein and designed to emit light at a first wavelength through a lower surface, a REO-Si template mated to the layer of single crystal III-N and designed to approximately crystal lattice match a silicon substrate, and a light emission layer of rare earth oxide selected to receive and absorb light at the first wavelength, up-convert the absorbed light, and re-emit light at a second wavelength in the visible range. The lower surface of the REO-Si template is either mated to the upper surface of a crystalline silicon substrate with the light emission layer integrated into the REO-Si template or mated to an upper surface of the light emission layer with a lower surface of the light emission layer mated to the crystalline silicon substrate.Type: ApplicationFiled: December 16, 2011Publication date: June 20, 2013Inventors: Andrew Clark, Michael Lebby
-
Patent number: 8461666Abstract: A gallium nitride-based semiconductor device includes a composite substrate and a gallium nitride layer. The composite substrate includes a silicon substrate and a filler. The silicon substrate includes a first surface and a second surface opposite to the first surface, and the first surface defines a number of grooves therein. The filler is filled into the number of grooves on the first surface of the silicon substrate. A thermal expansion coefficient of the filler is bigger than that of the silicon substrate. The gallium nitride layer is formed on the second surface of the silicon substrate.Type: GrantFiled: December 4, 2012Date of Patent: June 11, 2013Assignee: Advanced Optoelectronic Technology, Inc.Inventors: Po-Min Tu, Shih-Cheng Huang, Shun-Kuei Yang, Chia-Hung Huang
-
Publication number: 20130140994Abstract: Solid state transducer devices with independently controlled regions, and associated systems and methods are disclosed. A solid state transducer device in accordance with a particular embodiment includes a transducer structure having a first semiconductor material, a second semiconductor material and an active region between the first and second semiconductor materials, the active region including a continuous portion having a first region and a second region. A first contact is electrically connected to the first semiconductor material to direct a first electrical input to the first region along a first path, and a second contact electrically spaced apart from the first contact and connected to the first semiconductor material to direct a second electrical input to the second region along a second path different than the first path. A third electrical contact is electrically connected to the second semiconductor material.Type: ApplicationFiled: December 1, 2011Publication date: June 6, 2013Applicant: MICRON TECHNOLOGY, INC.Inventor: Robert R. Rhodehouse
-
Patent number: 8455905Abstract: Provided is a light-emitting device including: a nitride semiconductor light-emitting element (402) which radiates optically polarized light; and a light emission control layer (404) which covers the light emission surface of the nitride semiconductor light-emitting element (402) and which contains a resin and non-fluorescent particles dispersed in the resin, in which the light emission control layer (404) contains the non-fluorescent particles at a proportion of 0.01 vol % or more and 10 vol % or less, and the non-fluorescent particles have a diameter of 30 nm or more and 150 nm or less.Type: GrantFiled: October 17, 2011Date of Patent: June 4, 2013Assignee: Panasonic CorporationInventors: Masaki Fujikane, Akira Inoue, Toshiya Yokogawa
-
Patent number: 8455880Abstract: Provided is a light emitting device. A light emitting device includes: a conductive support member; a light emitting structure for generating a light on the conductive support member, the light emitting structure comprising a first conductive type semiconductor layer, a second conductive type semiconductor layer, and an active layer; an electrode on the light emitting structure; and an oxide layer between the electrode and the light emitting structure. The light emitting structure includes an oxygen-injected region where oxygen is injected on an upper portion of the light emitting structure.Type: GrantFiled: February 8, 2011Date of Patent: June 4, 2013Assignee: LG Innotek Co., Ltd.Inventors: Hyung Jo Park, Hyun Kyong Cho
-
Patent number: 8450749Abstract: A light emitting element includes a substrate, a GaN layer formed on the substrate, a first low refractive index semiconductor layer formed on the GaN layer, and a lighting structure having a high refractive index formed on the first low refractive index semiconductor layer. A second low refractive index semiconductor layer is embedded in the first low refractive index semiconductor layer. The first low refractive index semiconductor layer and the GaN layer exhibit a lattice mismatch therebetween.Type: GrantFiled: January 7, 2011Date of Patent: May 28, 2013Assignee: Advanced Optoelectronics Technology, Inc.Inventors: Po-Min Tu, Shih-Cheng Huang, Shun-Kuei Yang, Chia-Hung Huang
-
Patent number: 8449672Abstract: This disclosure pertains to a process for making single crystal Group III nitride, particularly gallium nitride, at low pressure and temperature, in the region of the phase diagram of Group III nitride where Group III nitride is thermodynamically stable comprises a charge in the reaction vessel of (a) Group III nitride material as a source, (b) a barrier of solvent interposed between said source of Group III nitride and the deposition site, the solvent being prepared from the lithium nitride (Li3N) combined with barium fluoride (BaF2), or lithium nitride combined with barium fluoride and lithium fluoride (LiF) composition, heating the solvent to render it molten, dissolution of the source of GaN material in the molten solvent and following precipitation of GaN single crystals either self seeded or on the seed, maintaining conditions and then precipitating out.Type: GrantFiled: April 25, 2008Date of Patent: May 28, 2013Assignee: The United States of America as represented by the Secretary of the NavyInventors: Boris N. Feigelson, Richard L. Henry
-
Publication number: 20130126890Abstract: A method of forming an active matrix, light emitting diode (LED) array includes removing, from a base substrate, a layer of inorganic LED material originally grown thereupon; and bonding the removed layer of inorganic LED material to an active matrix, thin film transistor (TFT) backplane array.Type: ApplicationFiled: November 23, 2011Publication date: May 23, 2013Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATIONInventors: Stephen W. Bedell, Bahman Hekmatshoartabari, Devendra K. Sadana, Ghavam G. Shahidi, Davood Shahrjerdi
-
Publication number: 20130126891Abstract: A micro light emitting diode (LED) and a method of forming an array of micro LEDs for transfer to a receiving substrate are described. The micro LED structure may include a micro p-n diode and a metallization layer, with the metallization layer between the micro p-n diode and a bonding layer. A conformal dielectric barrier layer may span sidewalls of the micro p-n diode. The micro LED structure and micro LED array may be picked up and transferred to a receiving substrate.Type: ApplicationFiled: February 13, 2012Publication date: May 23, 2013Inventors: Andreas Bibl, John A. Higginson, Hung-Fai Stephen Law, Hsin-Hua Hu
-
Patent number: 8445302Abstract: One object of the present invention is to provide a method for producing a group III nitride semiconductor light-emitting device which has excellent productivity and produce a group III nitride semiconductor light-emitting device and a lamp, a method for producing a group III nitride semiconductor light-emitting device, in which a buffer layer (12) made of a group III nitride is laminated on a substrate (11), an n-type semiconductor layer (14) comprising a base layer (14a), a light-emitting layer (15), and a p-type semiconductor layer (16) are laminated on the buffer layer (12) in this order, comprising: a pretreatment step in which the substrate (11) is treated with plasma; a buffer layer formation step in which the buffer layer (12) having a composition represented by AlxGa1-xN (0?x<1) is formed on the pretreated substrate (11) by activating with plasma and reacting at least a metal gallium raw material and a gas containing a group V element; and a base layer formation step in which the base layer (14a)Type: GrantFiled: June 3, 2009Date of Patent: May 21, 2013Assignee: Toyoda Gosei Co., Ltd.Inventors: Hisayuki Miki, Yasunori Yokoyama, Takehiko Okabe, Kenzo Hanawa
-
Patent number: 8445916Abstract: According to one embodiment, a semiconductor light emitting device includes a semiconductor layer, a first electrode, a second electrode, an insulating film, a first interconnection, a second interconnection, a barrier metal layer, a first metal pillar, a second metal pillar, and a resin. The semiconductor layer has a first major surface, a second major surface formed on an opposite side to the first major surface, and a light emitting layer. The first electrode is provided on the second major surface of the semiconductor layer. The second electrode is provided on the second major surface of the semiconductor layer and includes a silver layer. The insulating film is provided on the second major surface side of the semiconductor layer. The barrier metal layer is provided between the second electrode and the insulating film and between the second electrode and the second interconnection to cover the second electrode.Type: GrantFiled: June 4, 2010Date of Patent: May 21, 2013Assignee: Kabushiki Kaisha ToshibaInventors: Akihiro Kojima, Yoshiaki Sugizaki
-
Patent number: 8445925Abstract: A semiconductor optical device includes: a group III nitride semiconductor substrate having a primary surface of a first orientation; a first group III nitride semiconductor laminate including a first active layer disposed on a first region of the primary surface; a group III nitride semiconductor thin film having a surface, which has a second orientation different from the first orientation, disposed on a second region, the second region being different from the first region; a junction layer provided between the second region and the group III nitride semiconductor thin film; and a second group III nitride semiconductor laminate including a second active layer and disposed on the surface of the group III nitride semiconductor thin film. The first and second active layers include first and second well layers containing In, respectively, and the emission wavelengths of the first and second well layers are different from each other.Type: GrantFiled: March 29, 2012Date of Patent: May 21, 2013Assignee: Sumitomo Electric Industries, Ltd.Inventors: Takahisa Yoshida, Yohei Enya, Takashi Kyono, Masaki Ueno
-
Patent number: 8440549Abstract: A semiconductor epitaxial substrate includes: a single crystal substrate; an AlN layer epitaxially grown on the single crystal substrate; and a nitride semiconductor layer epitaxially grown on the AlN layer, wherein an interface between the AlN layer and nitride semiconductor layer has a larger roughness than an interface between the single crystal substrate and AlN layer, and a skewness of the upper surface of the AlN layer is positive.Type: GrantFiled: September 20, 2011Date of Patent: May 14, 2013Assignees: Fujitsu Limited, Hitachi Cable Co., Ltd.Inventors: Kenji Imanishi, Toshihide Kikkawa, Takeshi Tanaka, Yoshihiko Moriya, Yohei Otoki
-
Publication number: 20130112987Abstract: A light emitting diode including a GaN substrate, a first type semiconductor layer, a light emitting layer, a second type semiconductor layer, a first electrode, and a second electrode is provided. The GaN substrate has a first surface and a second surface opposite thereto, and the second surface has a plurality of protuberances, the height of the protuberance is h ?m and the distribution density of the protuberance on the second surface is d cm?2, wherein 9.87×107?h2d, and h?1.8. The first type semiconductor is disposed on the first surface of the GaN substrate. The light emitting layer is disposed on a partial region of the first semiconductor layer, and the wavelength of the light emitted by the light emitting layer is from 375 nm to 415 nm. The second semiconductor layer is disposed on the light emitting layer.Type: ApplicationFiled: February 2, 2012Publication date: May 9, 2013Applicant: INDUSTRIAL TECHNOLOGY RESEARCH INSTITUTEInventors: Yi-Keng Fu, Ren-Hao Jiang, Yen-Hsiang Fang, Bo-Chun Chen, Chia-Feng Lin
-
Patent number: 8436363Abstract: Embodiments relate to semiconductor structures and methods of forming them. In some embodiments, the methods may be used to fabricate a semiconductor substrate by forming a weakened zone in a donor structure at a predetermined depth to define a transfer layer between an attachment surface and the weakened zone and a residual donor structure between the weakened zone and a surface opposite the attachment surface. A metallic layer is formed on the attachment surface and provides an ohmic contact between the metallic layer and the transfer layer, a matched Coefficient of Thermal Expansion (CTE) for the metallic layer that closely matches a CTE of the transfer layer, and sufficient stiffness to provide structural support to the transfer layer. The transfer layer is separated from the donor structure at the weakened zone to form a composite substrate comprising the transfer layer the metallic layer.Type: GrantFiled: February 3, 2011Date of Patent: May 7, 2013Assignee: SoitecInventors: Christiaan J. Werkhoven, Chantal Arena
-
Patent number: 8436362Abstract: Solid state lighting devices with selected thermal expansion and/or surface characteristics, and associated methods are disclosed. A method in accordance with a particular embodiment includes forming an SSL (solid state lighting) formation structure having a formation structure coefficient of thermal expansion (CTE), selecting a first material of an interlayer structure to have a first material CTE greater than the substrate CTE, and selecting a second material of the interlayer structure based at least in part on the second material having a second material CTE less than the first material CTE. The method can further include forming the interlayer structure over the SSL formation structure by disposing (at least) a first layer of the first material over the SSL formation structure, a portion of the second material over the first material, and a second layer of the first material over the second material.Type: GrantFiled: August 23, 2010Date of Patent: May 7, 2013Assignee: Micron Technology, Inc.Inventor: Ji-Soo Park
-
Publication number: 20130105762Abstract: A nitride semiconductor light-emitting device includes a support base and a diode structure. The support base has a primary surface of a hexagonal nitride semiconductor. The diode structure is provided on the primary surface of the support base. The diode structure includes a first conductivity type group-III nitride semiconductor layer provided on the primary surface of the support base, a light-emitting layer provided on the first conductivity type group-III nitride semiconductor layer, and a second conductivity type group-III nitride semiconductor layer provided on the light-emitting layer. The light-emitting layer has a multiple quantum well structure including first and second well layers and a barrier layer. The thickness of the barrier layer is 4.5 nm or less. The primary surface of the support base tilts at a tilt angle in the range of 50 to 80 degrees or 130 to 170 degrees from a c-plane of the hexagonal nitride semiconductor.Type: ApplicationFiled: August 17, 2012Publication date: May 2, 2013Applicant: SUMITOMO ELECTRIC INDUSTRIES, LTD.Inventors: Takashi KYONO, Yohei ENYA, Masaki UENO
-
Publication number: 20130105809Abstract: A light emitting diode chip includes a substrate and an epitaxial layer formed on the substrate. The substrate is made of indium tin oxide (ITO) and has nano hydrogenation of SiC (SiC:H) particles doped therein. The substrate functions as a first electrode for the light emitting diode chip. The epitaxial layer consists of a first conductive type semiconductor material layer, a light-emitting layer and a second conductive type semiconductor material layer. A second electrode is formed on the second conductive type semiconductor material layer.Type: ApplicationFiled: December 23, 2011Publication date: May 2, 2013Applicant: FOXSEMICON INTEGRATED TECHNOLOGY, INC.Inventor: HSIU-PING CHANG
-
Patent number: 8431939Abstract: The present disclosure relates to a semiconductor light-emitting device which includes: a substrate having a first surface and a second surface; at least one semiconductor stacked body disposed on the first surface of the substrate and each including an active layer and first and second semiconductor layers disposed on both sides of the active layer, the first semiconductor layer having first conductivity, the second semiconductor layer having second conductivity different than the first conductivity, the first semiconductor layer having an exposed surface; a substrate piercing portion leading from the second surface to the first surface with a spacing from the exposed surface and opened without being covered with the at least one semiconductor stacked body; and an electrical path leading to the at least one semiconductor stacked body via the substrate piercing portion.Type: GrantFiled: August 11, 2010Date of Patent: April 30, 2013Assignee: Semicon Light Co., Ltd.Inventors: Soo Kun Jeon, Eun Hyun Park, Jong Won Kim, Jun Chun Park
-
Patent number: 8431936Abstract: One embodiment of the present invention provides a method for fabricating a group III-V p-type nitride structure. The method comprises growing a first layer of p-type group III-V material with a first acceptor density in a first growing environment. The method further comprises growing a second layer of p-type group III-V material, which is thicker than the first layer and which has a second acceptor density, on top of the first layer in a second growing environment. In addition, the method comprises growing a third layer of p-type group III-V material, which is thinner than the second layer and which has a third acceptor density, on top of the second layer in a third growing environment.Type: GrantFiled: August 20, 2007Date of Patent: April 30, 2013Assignee: Lattice Power (Jiangxi) CorporationInventors: Fengyi Jiang, Li Wang, Wenqing Fang, Chunlan Mo
-
Publication number: 20130099248Abstract: There is provided a nitride semiconductor light emitting device including an n-type nitride semiconductor layer, an active layer disposed on the n-type nitride semiconductor layer, and a p-type nitride semiconductor layer disposed on the active layer. One or more current diffusion layers are disposed on a surface of the n-type nitride semiconductor layer. The current diffusion layer(s) includes a material having greater band gap energy than that of a material forming the n-type nitride semiconductor layer so as to form a two-dimensional electron gas layer at an interface with the material forming the n-type nitride semiconductor layer.Type: ApplicationFiled: October 18, 2012Publication date: April 25, 2013Applicant: SAMSUNG ELECTRONICS CO., LTD.Inventor: SAMSUNG ELECTRONICS CO., LTD.
-
Patent number: 8426887Abstract: Provided is a light emitting device. In one embodiment, the light emitting device includes: a first conductive type semiconductor layer including a plurality of grooves; an active layer formed on a upper surface of the first conductive type semiconductor layer and along the grooves; an anti-current leakage layer having a flat upper surface on the active layer; and a second conductive type semiconductor layer on the anti-current leakage layer.Type: GrantFiled: February 16, 2011Date of Patent: April 23, 2013Assignee: LG Innotek Co., Ltd.Inventor: Hyo Kun Son
-
Publication number: 20130092955Abstract: A light-emitting diode (LED) and fabricating method thereof. The method includes: providing a first substrate and forming an epitaxial portion on the first substrate; forming at least one reflection layer on the epitaxial portion; forming a metal barrier portion on the reflection layer; etching the epitaxial portion and the barrier portion by a first etching process, so as to form a plurality of epitaxial layers and a plurality of metal barrier layers, an etch channel is formed between adjacent epitaxial layers, and each metal barrier layer enwraps a corresponding reflection layer and covers all of a surface of a corresponding epitaxial layer; forming a first bonding layer on the metal barrier layer; and forming a second substrate on the first bonding layer and removing the first substrate.Type: ApplicationFiled: February 23, 2012Publication date: April 18, 2013Applicant: CHI MEI LIGHTING TECHNOLOGY CORP.Inventors: Shin-Jia Chiou, Chung Hsin Lin, Chi-Lung Wu, Jui-Chun Chang
-
Patent number: 8421100Abstract: A nitride semiconductor light emitting device is provided. The nitride semiconductor light emitting device includes a first nitride layer comprising at least N-type nitride layer. An insulating member is formed on the first nitride layer having a predetermined pattern. An active layer is formed in both sides of the insulating member on the first nitride layer to emit light. A second nitride layer is formed in both sides of the insulating member on the active layer and the second nitride layer comprises at least a P-type nitride layer.Type: GrantFiled: March 23, 2010Date of Patent: April 16, 2013Assignee: LG Innotek Co., Ltd.Inventor: Sang Youl Lee
-
Patent number: 8421122Abstract: A monolithic high power radio frequency switch includes a substrate, and first and second gallium nitride high electron mobility transistors on the substrate. Each of the first and second gallium nitride high electron mobility transistors includes a respective source, drain and gate terminal. The source terminal of the first gallium nitride high electron mobility transistor is coupled to the drain terminal of the second gallium nitride high electron mobility transistor, and the source terminal of the second gallium nitride high electron mobility transistor is coupled to ground. An RF input pad is coupled to the drain terminal of the first second gallium nitride high electron mobility transistor, an RF output pad is coupled to the source terminal of the first gallium nitride high electron mobility transistor and the drain terminal of the second gallium nitride high electron mobility transistor, and a control pad is coupled to the gate of the first gallium nitride high electron mobility transistor.Type: GrantFiled: May 18, 2011Date of Patent: April 16, 2013Assignee: Cree, Inc.Inventors: Thomas J. Smith, Jr., Matthew Wills, Saptharishi Sriram
-
SEMICONDUCTOR LIGHT EMITTING DEVICE AND METHOD FOR MANUFACTURING SEMICONDUCTOR LIGHT EMITTING DEVICE
Publication number: 20130087806Abstract: According to one embodiment, a semiconductor light emitting device includes a first semiconductor layer, a light emitting unit, a second semiconductor layer, a reflecting electrode, an oxide layer and a nitrogen-containing layer. The first semiconductor layer is of a first conductivity type. The light emitting unit is provided on the first semiconductor layer. The second semiconductor layer is provided on the light emitting unit and is of a second conductivity type. The reflecting electrode is provided on the second semiconductor layer and includes Ag. The oxide layer is provided on the reflecting electrode. The oxide layer is insulative and has a first opening. The nitrogen-containing layer is provided on the oxide layer. The nitrogen-containing layer is insulative and has a second opening communicating with the first opening.Type: ApplicationFiled: February 24, 2012Publication date: April 11, 2013Applicant: Kabushiki Kaisha ToshibaInventors: Toshihide ITO, Hiroshi Katsuno, Shinya Nunoue -
Publication number: 20130082236Abstract: A light emitting device comprises a first layer having an n-type Group III-V semiconductor, a second layer adjacent to the first layer, the second layer comprising an active material that generates light upon the recombination of electrons and holes. The active material in some cases has one or more V-pits at a density between about 1 V-pit/?m2 and 30 V-pits/?m2. The light emitting device includes a third layer adjacent to the second layer, the third layer comprising a p-type Group III-V semiconductor.Type: ApplicationFiled: September 29, 2011Publication date: April 4, 2013Inventors: Jeff Ramer, Steve Ting
-
Publication number: 20130082273Abstract: A light emitting diode (LED) comprises an n-type Group III-V semiconductor layer, an active layer adjacent to the n-type Group III-V semiconductor layer, and a p-type Group III-V semiconductor layer adjacent to the active layer. The active layer includes one or more V-pits. A portion of the p-type Group III-V semiconductor layer is in the V-pits. A p-type dopant injection layer provided during the formation of the p-type Group III-V layer aids in providing a predetermined concentration, distribution and/or uniformity of the p-type dopant in the V-pits.Type: ApplicationFiled: September 29, 2011Publication date: April 4, 2013Inventor: Steve Ting
-
Patent number: 8405102Abstract: Disclosed herein is a light emitting device. The light emitting device includes a support member and a light emitting structure on the support member and including a first conductive semiconductor layer, a second conductive semiconductor layer and an active layer interposed between the first and second conductive semiconductor layers, and the active layer includes at least one quantum well layer and at least one barrier layer, at least one potential barrier layer located between the first conductive semiconductor layer and a first quantum well layer, closest to the first conductive semiconductor layer, out of the at least one quantum well layer, and an undoped barrier layer formed between the at least one potential barrier layer and the first quantum well layer and having a thickness different from that of the at least one barrier layer. Thereby, brightness of the light emitting device is improved through effective diffusion of current.Type: GrantFiled: April 8, 2011Date of Patent: March 26, 2013Assignee: LG Innotek Co., Ltd.Inventors: Hosang Yoon, Sanghyun Lee, Jongpil Jeong, Seonho Lee
-
Patent number: 8405109Abstract: A low resistance electrode and a compound semiconductor light emitting device including the same are provided. The low resistance electrode deposited on a p-type semiconductor layer of a compound semiconductor light emitting device including an n-type semiconductor layer, an active layer, and the p-type semiconductor layer, including: a reflective electrode which is disposed on the p-type semiconductor layer and reflects light being emitted from the active layer; and an agglomeration preventing electrode which is disposed on the reflective electrode layer in order to prevent an agglomeration of the reflective electrode layer during an annealing process.Type: GrantFiled: April 27, 2011Date of Patent: March 26, 2013Assignee: Samsung Electronics Co., Ltd.Inventors: Joon Seop Kwak, Tae Yeon Seong, Jae Hee Cho, June-o Song, Dong Seok Leem, Hyun Soo Kim
-
Patent number: 8405128Abstract: A method for enhancing growth of device-quality planar semipolar nitride semiconductor thin films via metalorganic chemical vapor deposition (MOCVD) by using an (Al, In, Ga)N nucleation layer containing at least some indium. Specifically, the method comprises loading a substrate into a reactor, heating the substrate under a flow of nitrogen and/or hydrogen and/or ammonia, depositing an InxGa1-xN nucleation layer on the heated substrate, depositing a semipolar nitride semiconductor thin film on the InxGa1-xN nucleation layer, and cooling the substrate under a nitrogen overpressure.Type: GrantFiled: March 3, 2010Date of Patent: March 26, 2013Assignee: The Regents of the University of CaliforniaInventors: Hitoshi Sato, John F. Kaeding, Michael Iza, Benjamin A. Haskell, Troy J. Baker, Steven P. DenBaars, Shuji Nakamura
-
Publication number: 20130069104Abstract: Provided is a light emitting device capable of reducing light attenuation within the element and having high light extraction efficiency, and a method of manufacturing the light emitting device. The light emitting device has a light emitting element having a light transmissive member and semiconductor stacked layer portion, electrodes disposed on the semiconductor stacked layer portion in this order. The light emitting element has a first region and a second region from the light transmissive member side. The light transmissive member has a third region and a fourth region from the light emitting element side. The first region has an irregular atomic arrangement compared with the second region. The third region has an irregular atomic arrangement compared with the fourth region. The first region and the third region are directly bonded.Type: ApplicationFiled: May 25, 2011Publication date: March 21, 2013Inventor: Masatsugu Ichikawa
-
Patent number: 8399896Abstract: According to one embodiment, a semiconductor light emitting device includes n-type and p-type semiconductor layers, barrier layers, and a well layer. The n-type and p-type semiconductor layers and the barrier layers include nitride semiconductor. The barrier layers are provided between the n-type and p-type semiconductor layers. The well layer is provided between the barrier layers, has a smaller band gap energy than the barrier layers, and includes InGaN. At least one of the barrier layers includes first, second, and third layers. The second layer is provided closer to the p-type semiconductor layer than the first layer. The third layer is provided closer to the p-type semiconductor layer than the second layer. The second layer includes AlxGa1?xN (0<x?0.05). A band gap energy of the second layer is larger than the first and third layers. A total thickness of the first and second layers is not larger than the third layer.Type: GrantFiled: September 3, 2010Date of Patent: March 19, 2013Assignee: Kabushiki Kaisha ToshibaInventors: Toshiki Hikosaka, Tomonari Shioda, Yoshiyuki Harada, Shinya Nunoue
-
Publication number: 20130062615Abstract: Solid state lighting (SSL) devices and methods are disclosed. A particular method includes forming an SSL formation structure having a CTE, selecting a first material of an interlayer structure to have a first material CTE greater than the substrate CTE, and selecting a second material based at least in part on the second material having a CTE less than the first material CTE. The intelayer structure is formed over the SSL formation structure e.g., with a first layer of the first material over the SSL formation structure, a portion of the second material over the first material, and a second layer of the first material over the second material. The CTE difference between the first and second materials can counteract a force placed on the formation structure by the first material. Particular formation structures can have an off-cut angle with a non-zero value of up to about 4.5 degrees.Type: ApplicationFiled: September 14, 2012Publication date: March 14, 2013Applicant: MICRON TECHNOLOGY, INC.Inventor: Ji-Soo Park
-
Publication number: 20130062627Abstract: Stress regulated semiconductor devices and associated methods are provided. In one aspect, for example, a stress regulated semiconductor device can include a semiconductor layer, a stress regulating interface layer including a carbon layer formed on the semiconductor layer, and a heat spreader coupled to the carbon layer opposite the semiconductor layer. The stress regulating interface layer is operable to reduce the coefficient of thermal expansion difference between the semiconductor layer and the heat spreader to less than or equal to about 10 ppm/° C.Type: ApplicationFiled: March 5, 2012Publication date: March 14, 2013Inventors: Chien-Min Sung, Ming-Chi Kan, Shao Chung Hu