Including Nitride (e.g., Gan) (epo) Patents (Class 257/E33.025)
  • Patent number: 8698163
    Abstract: A light emitting diode (LED) comprises an n-type Group III-V semiconductor layer, an active layer adjacent to the n-type Group III-V semiconductor layer, and a p-type Group III-V semiconductor layer adjacent to the active layer. The active layer includes one or more V-pits. A portion of the p-type Group III-V semiconductor layer is in the V-pits. A p-type dopant injection layer provided during the formation of the p-type Group III-V layer aids in providing a predetermined concentration, distribution and/or uniformity of the p-type dopant in the V-pits.
    Type: Grant
    Filed: September 29, 2011
    Date of Patent: April 15, 2014
    Assignee: Toshiba Techno Center Inc.
    Inventor: Steve Ting
  • Patent number: 8685772
    Abstract: There is provided a method of manufacturing a light emitting diode and a light emitting diode manufactured by the same. The method includes growing a first conductivity type nitride semiconductor layer and an undoped nitride semiconductor layer on a substrate sequentially in a first reaction chamber; transferring the substrate having the first conductivity type nitride semiconductor layer and the undoped nitride semiconductor layer grown thereon to a second reaction chamber; growing an additional first conductivity type nitride semiconductor layer on the undoped nitride semiconductor layer in the second reaction chamber; growing an active layer on the additional first conductivity type nitride semiconductor layer; and growing a second conductivity type nitride semiconductor layer on the active layer.
    Type: Grant
    Filed: January 5, 2012
    Date of Patent: April 1, 2014
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Dong Ju Lee, Heon Ho Lee, Hyun Wook Shim, Young Sun Kim
  • Patent number: 8686455
    Abstract: A composite substrate for the formation of a light-emitting device, ensuring that a high-quality nitride-based light-emitting diode can be easily formed on its top surface and the obtained substrate-attached light-emitting diode functions as a light-emitting device capable of emitting light for an arbitrary color such as white, is provided.
    Type: Grant
    Filed: March 2, 2010
    Date of Patent: April 1, 2014
    Assignees: Ube Industries, Ltd., Riken
    Inventors: Yasuyuki Ichizono, Hideki Hirayama
  • Patent number: 8686397
    Abstract: A light emitting diode structure of (Al,Ga,In)N thin films grown on a gallium nitride (GaN) semipolar substrate by metal organic chemical vapor deposition (MOCVD) that exhibits reduced droop. The device structure includes a quantum well (QW) active region of two or more periods, n-type superlattice layers (n-SLs) located below the QW active region, and p-type superlattice layers (p-SLs) above the QW active region. The present invention also encompasses a method of fabricating such a device.
    Type: Grant
    Filed: June 11, 2012
    Date of Patent: April 1, 2014
    Assignee: The Regents of the University of California
    Inventors: Shuji Nakamura, Steven P. DenBaars, Shinichi Tanaka, Daniel F. Feezell, Yuji Zhao, Chih-Chien Pan
  • Patent number: 8685767
    Abstract: A double-metallic deposition process is used whereby adjacent layers of different metals are deposited on a substrate. The surface plasmon frequency of a base layer of a first metal is tuned by the surface plasmon frequency of a second layer of a second metal formed thereon. The amount of tuning is dependent upon the thickness of the metallic layers, and thus tuning can be achieved by varying the thicknesses of one or both of the metallic layers. In a preferred embodiment directed to enhanced LED technology in the green spectrum regime, a double-metallic Au/Ag layer comprising a base layer of gold (Au) followed by a second layer of silver (Ag) formed thereon is deposited on top of InGaN/GaN quantum wells (QWs) on a sapphire/GaN substrate.
    Type: Grant
    Filed: December 8, 2010
    Date of Patent: April 1, 2014
    Assignee: Lehigh University
    Inventors: Nelson Tansu, Hongping Zhao, Jing Zhang, Guangyu Liu
  • Patent number: 8686430
    Abstract: A buffer layer of zinc telluride (ZnTe) or titanium dioxide (TiO2) is formed directly on a silicon substrate. Optionally, a layer of AlN is then formed as a second layer of the buffer layer. A template layer of GaN is then formed over the buffer layer. An epitaxial LED structure for a GaN-based blue LED is formed over the template layer, thereby forming a first multilayer structure. A conductive carrier is then bonded to the first multilayer structure. The silicon substrate and the buffer layer are then removed, thereby forming a second multilayer structure. Electrodes are formed on the second multilayer structure, and the structure is singulated to form blue LED devices.
    Type: Grant
    Filed: September 7, 2011
    Date of Patent: April 1, 2014
    Assignee: Toshiba Techno Center Inc.
    Inventor: Zhen Chen
  • Patent number: 8679248
    Abstract: Millimeter-scale GaN single crystals in filamentary form, also known as GaN whiskers, grown from solution and a process for preparing the same at moderate temperatures and near atmospheric pressures are provided. GaN whiskers can be grown from a GaN source in a reaction vessel subjected to a temperature gradient at nitrogen pressure. The GaN source can be formed in situ as part of an exchange reaction or can be preexisting GaN material. The GaN source is dissolved in a solvent and precipitates out of the solution as millimeter-scale single crystal filaments as a result of the applied temperature gradient.
    Type: Grant
    Filed: November 23, 2010
    Date of Patent: March 25, 2014
    Assignee: The United States of America, as represented by the Secretary of the Navy
    Inventors: Boris N. Feigelson, Jennifer K. Hite, Francis J. Kub, Charles R. Eddy, Jr.
  • Patent number: 8680571
    Abstract: A light emitting diode (LED) capable of improving brightness by forming a InGaN layer having a low concentration of indium, and whose lattice constant is similar to that of an active layer of the LED, is provided. The LED includes: a buffer layer disposed on a sapphire substrate; a GaN layer disposed on the buffer layer; a doped GaN layer disposed on the GaN layer; a GaN layer having indium disposed on the GaN layer; an active layer disposed on the GaN layer having indium; and a P-type GaN disposed on the active layer. Here, an empirical formula of the GaN layer having indium is given by In(x)Ga(1?x)N and a range of x is given by 0<x<2, and a thickness of the GaN layer having indium is 50-200 ?.
    Type: Grant
    Filed: July 11, 2013
    Date of Patent: March 25, 2014
    Assignee: LG Innotek Co., Ltd.
    Inventor: Seong Jae Kim
  • Patent number: 8679883
    Abstract: Various embodiments of the present disclosure pertain to selective photo-enhanced wet oxidation for nitride layer regrowth on substrates. In one aspect, a semiconductor structure may comprise: a first substrate structure; a III-nitride structure bonded with the first substrate structure; a plurality of air gaps formed between the first substrate structure and the III-nitride structure; and a III-oxide layer formed on surfaces around the air gaps, wherein a portion of the III-nitride structure including surfaces around the air gaps is transformed into the III-oxide layer by a selective photo-enhanced wet oxidation, and the III-oxide layer is formed between an untransformed portion of the III-nitride structure and the first substrate structure.
    Type: Grant
    Filed: April 9, 2013
    Date of Patent: March 25, 2014
    Assignee: Opto Tech Corporation
    Inventors: Lung-Han Peng, Jeng-Wei Yu, Po-Chun Yeh
  • Publication number: 20140077153
    Abstract: The present disclosure involves a light-emitting device. The light-emitting device includes an n-doped gallium nitride (n-GaN) layer located over a substrate. A multiple quantum well (MQW) layer is located over the n-GaN layer. An electron-blocking layer is located over the MQW layer. A p-doped gallium nitride (p-GaN) layer is located over the electron-blocking layer. The light-emitting device includes a hole injection layer. In some embodiments, the hole injection layer includes a p-doped indium gallium nitride (p-InGaN) layer that is located in one of the three following locations: between the MQW layer and the electron-blocking layer; between the electron-blocking layer and the p-GaN layer; and inside the p-GaN layer.
    Type: Application
    Filed: September 14, 2012
    Publication date: March 20, 2014
    Applicant: TSMC Solid State Lighting Ltd.
    Inventors: Zhen-Yu Li, Tzu-Te Yang, Hon-Way Lin, Chung-Pao Lin, Kuan-Chun Chen, Ching-Yu Chen, You-Da Lin, Hao-Chung Kuo
  • Patent number: 8674337
    Abstract: A light emitting diode (LED) and a method for fabricating the same, capable of improving brightness by forming a InGaN layer having a low concentration of indium, and whose lattice constant is similar to that of an active layer of the LED, is provided. The LED includes: a buffer layer disposed on a sapphire substrate; a GaN layer disposed on the buffer layer; a doped GaN layer disposed on the GaN layer; a GaN layer having indium disposed on the GaN layer; an active layer disposed on the GaN layer having indium; and a P-type GaN disposed on the active layer. Here, an empirical formula of the GaN layer having indium is given by In(x)Ga(1?x)N and a range of x is given by 0<x<2, and a thickness of the GaN layer having indium is 50-200 ?.
    Type: Grant
    Filed: June 27, 2011
    Date of Patent: March 18, 2014
    Assignee: LG Innotek Co., Ltd.
    Inventor: Seong Jae Kim
  • Patent number: 8674381
    Abstract: A nitride semiconductor light emitting device is provided with a substrate, an n-type nitride semiconductor layer, a p-type nitride semiconductor layer, an n-side pad electrode, a translucent electrode and a p-side pad electrode, wherein the translucent electrode is formed from an electrically conductive oxide, the n-side pad electrode adjoins the periphery of the translucent electrode and the p-side pad electrode is disposed so as to satisfy the following relationships: 0.3L?X?0.5L and 0.2L?Y?0.5L where X is the distance between ends of the p-side pad electrode and the n-side pad electrode, Y is the distance between the end of the p-side pad electrode and the periphery of the translucent electrode, L is the length of the translucent electrode on the line connecting the centroids of the p-side pad electrode and the n-side pad electrode minus the outer diameter d of the p-side pad electrode.
    Type: Grant
    Filed: January 3, 2011
    Date of Patent: March 18, 2014
    Assignee: Nichia Corporation
    Inventors: Takahiko Sakamoto, Yasutaka Hamaguchi
  • Patent number: 8674375
    Abstract: A light emitting diode (LED) includes a p-type layer of material, an n-type layer of material and an active layer between the p-type layer and the n-type layer. A roughened layer of transparent material is adjacent one of the p-type layer of material and the n-type layer of material. The roughened layer of transparent material has a refractive index close to or substantially the same as the refractive index of the material adjacent the layer of transparent material, and may be a transparent oxide material or a transparent conducting material. An additional layer of conductive material may be between the roughened layer and the n-type or p-type layer.
    Type: Grant
    Filed: July 21, 2005
    Date of Patent: March 18, 2014
    Assignee: Cree, Inc.
    Inventors: Steven P. Denbaars, James Ibbetson, Shuji Nakamura
  • Patent number: 8673677
    Abstract: A reflective film including Ag of an Ag alloy is patterned in a uniform thickness without decreasing reflectivity. The reflective film is formed on the entire surface of a first insulating film by sputtering, vacuum deposition or the like, and a barrier metal film having a given pattern is formed on the reflective film by a lift-off method. The reflective film is wet etched using a silver etching liquid. The barrier metal film is not wet etched by the silver etching liquid, and therefore functions as a mask, and the reflective film in a region on which the barrier metal film has been formed remains not etched. As a result, the reflective film having a desired patter can uniformly be formed on the first insulating film.
    Type: Grant
    Filed: March 15, 2012
    Date of Patent: March 18, 2014
    Assignee: Toyoda Gosei Co., Ltd.
    Inventors: Shingo Totani, Masashi Deguchi
  • Patent number: 8674398
    Abstract: There are provided a group III nitride semiconductor light emitting device which is constituted of a substrate, an intermediate layer formed thereon having a favorable level of orientation properties, and a group III nitride semiconductor formed thereon having a favorable level of crystallinity, and having excellent levels of light emitting properties and productivity; a production method thereof; and a lamp, the group III nitride semiconductor light emitting device configured so that at least an intermediate layer 12 composed of a group III nitride compound is laminated on a substrate 11, and an n-type semiconductor layer 14 having a base layer 14a, a light emitting layer 15 and a p-type semiconductor layer 16 are sequentially laminated on the intermediate layer 12, wherein when components are separated, based on a peak separation technique using an X-ray rocking curve of the intermediate layer 12, into a broad component having the full width at half maximum of 720 arcsec or more and a narrow component,
    Type: Grant
    Filed: July 3, 2008
    Date of Patent: March 18, 2014
    Assignee: Toyoda Gosei Co., Ltd.
    Inventors: Hiroaki Kaji, Hisayuki Miki
  • Patent number: 8669129
    Abstract: One object of the present invention is to provide a method for producing a group III nitride semiconductor light-emitting device which has excellent productivity and produce a group III nitride semiconductor light-emitting device and a lamp, a method for producing a group III nitride semiconductor light-emitting device, in which a buffer layer (12) made of a group III nitride is laminated on a substrate (11), an n-type semiconductor layer (14) comprising a base layer (14a), a light-emitting layer (15), and a p-type semiconductor layer (16) are laminated on the buffer layer (12) in this order, comprising: a pretreatment step in which the substrate (11) is treated with plasma; a buffer layer formation step in which the buffer layer (12) having a composition represented by AlxGa1-xN (0?x<1) is formed on the pretreated substrate (11) by activating with plasma and reacting at least a metal gallium raw material and a gas containing a group V element; and a base layer formation step in which the base layer (14a)
    Type: Grant
    Filed: June 3, 2009
    Date of Patent: March 11, 2014
    Assignee: Toyoda Gosei Co., Ltd.
    Inventors: Hisayuki Miki, Yasunori Yokoyama, Takehiko Okabe, Kenzo Hanawa
  • Patent number: 8669560
    Abstract: Disclosed is a light-emitting device including: a support member; and a light-emitting structure on the support member, the light-emitting structure including a first semiconductor layer, at least one intermediate layer, an active layer and a second semiconductor layer, wherein the intermediate layer is on at least one of upper and lower regions of the active layer and comprises at least four layers, wherein the layers have different band gaps, and wherein, among the layers, a layer having the largest band gap contacts a layer having the smallest band gap. Based on this configuration, it is possible to reduce crystal defects and improve brightness of the light-emitting device through effective diffusion of current.
    Type: Grant
    Filed: March 24, 2011
    Date of Patent: March 11, 2014
    Assignee: LG Innotek Co., Ltd.
    Inventor: Sanghyun Lee
  • Patent number: 8664028
    Abstract: (a) On a growth substrate, a void-containing layer that is made of a group III nitride compound semiconductor and contains voids is formed. (b) On the void-containing layer, an n-type layer that is made of an n-type group III nitride compound semiconductor and serves to close the voids is formed. (c) On the n-type layer, an active layer made of a group III nitride compound semiconductor is formed. (d) On the active layer, a p-type layer made of a p-type group III nitride compound semiconductor is formed. (e) A support substrate is bonded above the p-type layer. (f) The growth substrate is peeled off at the boundary where the voids are produced. In the above step (a) or (b), the supply of at least part of the materials that form the layer is decreased, while heating, before the voids are closed.
    Type: Grant
    Filed: March 9, 2012
    Date of Patent: March 4, 2014
    Assignee: Stanley Electric Co., Ltd.
    Inventors: Yasuyuki Shibata, Ji-Hao Liang
  • Patent number: 8663389
    Abstract: A method and apparatus for depositing III-V material is provided. The apparatus includes a reactor partially enclosed by a selectively permeable membrane 12. A means is provided for generating source vapors, such as a vapor-phase halide of a group III element (IUPAC group 13) within the reactor volume 10, and an additional means is also provided for introducing a vapor-phase hydride of a group V element (IUPAC group 15) into the volume 10. The reaction of the group III halide and the group V hydride on a temperature-controlled substrate 18 within the reactor volume 10 produces crystalline III-V material and hydrogen gas. The hydrogen is preferentially removed from the reactor through the selectively permeable membrane 12, thus avoiding pressure buildup and reaction imbalance. Other gases within the reactor are unable to pass through the selectively permeable membrane.
    Type: Grant
    Filed: May 21, 2011
    Date of Patent: March 4, 2014
    Inventor: Andrew Peter Clarke
  • Patent number: 8659029
    Abstract: A low contact resistance semiconductor structure includes a substrate, a semiconductor stacked layer, a low contact resistance layer and a transparent conductive layer. The low contact resistance layer is formed on one side of a P-type GaN layer of the semiconductor stacked layer. The low contact resistance layer is formed at a thickness smaller than 100 Angstroms and made of a material selected from the group consisting of aluminum, gallium, indium, and combinations thereof. Through the low contact resistance layer, the resistance between the P-type GaN layer and transparent conductive layer can be reduced and light emission efficiency can be improved when being used on LEDs. The method of fabricating the low contact resistance semiconductor structure of the invention forms a thin and consistent low contact resistance layer through a Metal Organic Chemical Vapor Deposition (MOCVD) method to enhance matching degree among various layers.
    Type: Grant
    Filed: November 21, 2011
    Date of Patent: February 25, 2014
    Assignee: Lextar Electronics Corporation
    Inventors: Te-Chung Wang, Fu-Bang Chen, Hsiu-Mu Tang
  • Patent number: 8653538
    Abstract: Disclosed herein is a rod type light emitting device and method for fabricating the same, wherein a plurality of rod structures is sequentially formed with a semiconductor layer doped with a first polarity dopant, an active layer, and a semiconductor layer doped with a second polarity dopant.
    Type: Grant
    Filed: April 15, 2011
    Date of Patent: February 18, 2014
    Assignees: LG Electronics Inc., LG Innotek Co., Ltd.
    Inventors: Jun Seok Ha, Jong Wook Kim
  • Patent number: 8648348
    Abstract: Provided is a light emitting device according to one embodiment including: a substrate which has protrusions on the C-face, and of which unit cells are constructed in a hexagonal structure; a semiconductor layer which is formed on the substrate, in which empty spaces are formed in sides of the protrusions, and of which unit cells are constructed in a hexagonal structure; and a light emitting structure layer comprising a first conductive semiconductor layer, a second conductive semiconductor layer, and an active layer formed between the first conductive semiconductor layer and second conductive semiconductor layer which are formed on the semiconductor layer, wherein the A-face of the substrate and the A-face of the semiconductor layer form an angle of greater than zero degree, and the protrusions include the R-faces.
    Type: Grant
    Filed: February 3, 2011
    Date of Patent: February 11, 2014
    Assignee: LG Innotek Co., Ltd.
    Inventor: Dae Sung Kang
  • Patent number: 8648350
    Abstract: Provided is a gallium nitride-based compound semiconductor light-emitting element, in which the concentration of Mg which is a p-type dopant in a p-GaN layer in which the (10-10) m-plane of a hexagonal wurtzite structure grows is adjusted in a range from 1.0×1018 cm?3 to 9.0×1018 cm?3.
    Type: Grant
    Filed: February 17, 2012
    Date of Patent: February 11, 2014
    Assignee: Panasonic Corporation
    Inventors: Ryou Kato, Masaki Fujikane, Akira Inoue, Toshiya Yokogawa
  • Publication number: 20140034957
    Abstract: Devices are described including a first component and a second component, wherein the first component comprises a Group III-N semiconductor and the second component comprises a bimetallic oxide containing tin, having an index of refraction within 15% of the index of refraction of the Group III-N semiconductor, and having negligible extinction coefficient at wavelengths of light emitted or absorbed by the Group III-N semiconductor. The first component is in optical contact with the second component. Exemplary bimetallic oxides include Sn1-xBixO2 where x?0.10, Zn2SnO2, Sn1-xAlxO2 where x?0.18, and Sn1-xMgxO2 where x?0.16. Methods of making and using the devices are also described.
    Type: Application
    Filed: October 10, 2012
    Publication date: February 6, 2014
    Applicant: Intermolecular, Inc.
    Inventors: Philip Kraus, Minh-Huu Le, Sandeep Nijhawan
  • Patent number: 8643059
    Abstract: A substrate structure and method of manufacturing the same are disclosed. The substrate structure may includes a substrate on which a plurality of protrusions are formed on one surface thereof and a plurality of buffer layers formed according to a predetermined pattern and formed spaced apart from each other on the plurality of protrusions.
    Type: Grant
    Filed: January 3, 2011
    Date of Patent: February 4, 2014
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Jun-youn Kim, Su-hee Chae, Hyun-gi Hong, Young-jo Tak
  • Patent number: 8637334
    Abstract: A high brightness III-Nitride based Light Emitting Diode (LED), comprising multiple surfaces covered by Zinc Oxide (ZnO) layers, wherein the ZnO layers are grown in a low temperature aqueous solution and each have a (0001) c-orientation and a top surface that is a (0001) plane.
    Type: Grant
    Filed: November 3, 2010
    Date of Patent: January 28, 2014
    Assignee: The Regents of the University of California
    Inventors: Daniel B. Thompson, Jacob J. Richardson, Ingrid Koslow, Jun Seok Ha, Steven P. DenBaars, Shuji Nakamura, Maryann E. Lange
  • Patent number: 8637960
    Abstract: A nitride semiconductor substrate is provided in which leak current reduction and improvement in current collapse are effectively attained when using Si single crystal as a base substrate. The nitride semiconductor substrate is such that an active layer of a nitride semiconductor is formed on one principal plane of a Si single crystal substrate through a plurality of buffer layers made of a nitride, in the buffer layers, a carbon concentration of a layer which is in contact with at least the active layer is from 1×1018 to 1×1020 atoms/cm3, a ratio of a screw dislocation density to the total dislocation density is from 0.15 to 0.3 in an interface region between the buffer layer and the active layer, and the total dislocation density in the interface region is 15×109 cm?2 or less.
    Type: Grant
    Filed: October 2, 2012
    Date of Patent: January 28, 2014
    Assignee: Covalent Material Corporation
    Inventors: Yoshihisa Abe, Jun Komiyama, Hiroshi Oishi, Akira Yoshida, Kenichi Eriguchi, Shunichi Suzuki
  • Patent number: 8633569
    Abstract: III-N material grown on a silicon substrate includes a single crystal rare earth oxide layer positioned on a silicon substrate. The rare earth oxide is substantially crystal lattice matched to the surface of the silicon substrate. A first layer of III-N material is positioned on the surface of the rare earth oxide layer. An inter-layer of aluminum nitride (AlN) is positioned on the surface of the first layer of III-N material and an additional layer of III-N material is positioned on the surface of the inter-layer of aluminum nitride. The inter-layer of aluminum nitride and the additional layer of III-N material are repeated n-times to reduce or engineer strain in a final III-N layer.
    Type: Grant
    Filed: January 16, 2013
    Date of Patent: January 21, 2014
    Assignee: Translucent, Inc.
    Inventors: Erdem Arkun, Michael Lebby, Andrew Clark, Rytis Dargis
  • Patent number: 8624278
    Abstract: A light emitting device comprises a second electrode layer; a second conductivity-type semiconductor layer on the second electrode layer; a current blocking layer comprising an oxide of the second conductivity-type semiconductor layer; an active layer on the second conductivity-type semiconductor layer; a first conductivity-type semiconductor layer on the active layer; and a first electrode layer on the first conductivity-type semiconductor layer.
    Type: Grant
    Filed: June 23, 2011
    Date of Patent: January 7, 2014
    Assignee: LG Innotek Co., Ltd.
    Inventor: Hyung Jo Park
  • Patent number: 8618564
    Abstract: The present disclosure relates to high efficiency light emitting diode devices and methods for fabricating the same. In accordance with one or more embodiments, a light emitting diode device includes a substrate having one or more recessed features formed on a surface thereof and one or more omni-directional reflectors formed to overlie the one or more recessed features. A light emitting diode layer is formed on the surface of the substrate to overlie the omni-directional reflector. The one or more omni-directional reflectors are adapted to efficiently reflect light.
    Type: Grant
    Filed: October 5, 2010
    Date of Patent: December 31, 2013
    Assignee: TSMC Solid State Lighting Ltd.
    Inventors: Jung-Tang Chu, Hsing-Kuo Hsia, Ching-Hua Chiu
  • Patent number: 8613802
    Abstract: Affords nitride semiconductor crystal manufacturing apparatuses that are durable and that are for manufacturing nitride semiconductor crystal in which the immixing of impurities from outside the crucible is kept under control, and makes methods for manufacturing such nitride semiconductor crystal, and the nitride semiconductor crystal itself, available. A nitride semiconductor crystal manufacturing apparatus (100) is furnished with a crucible (101), a heating unit (125), and a covering component (110). The crucible (101) is where, interiorly, source material (17) is disposed. The heating unit (125) is disposed about the outer periphery of the crucible (101), where it heats the crucible (101) interior. The covering component (110) is arranged in between the crucible (101) and the heating unit (125).
    Type: Grant
    Filed: January 20, 2010
    Date of Patent: December 24, 2013
    Assignee: Sumitomo Electric Industies, Ltd.
    Inventors: Issei Satoh, Michimasa Miyanaga, Yoshiyuki Yamamoto, Hideaki Nakahata
  • Patent number: 8604496
    Abstract: According to one embodiment, an optical semiconductor device includes an n-type semiconductor layer, a p-type semiconductor layer, and a functional part. The functional part is provided between the n-type semiconductor layer and the p-type semiconductor layers. The functional part includes a plurality of active layers stacked in a direction from the n-type semiconductor layer toward the p-type semiconductor layer. At least two of the active layers include a multilayer stacked body, an n-side barrier layer, a well layer and a p-side barrier layer. The multilayer stacked body includes a plurality of thick film layers and a plurality of thin film layers alternately stacked in the direction. The n-side barrier layer is provided between the multilayer stacked body and the p-type layer. The well layer is provided between the n-side barrier layer and the p-type layer. The p-side barrier layer is provided between the well layer and the p-type layer.
    Type: Grant
    Filed: August 22, 2011
    Date of Patent: December 10, 2013
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Tomonari Shioda, Hisashi Yoshida, Koichi Tachibana, Naoharu Sugiyama, Shinya Nunoue
  • Patent number: 8604488
    Abstract: A light emitting diode including a GaN substrate, a first type semiconductor layer, a light emitting layer, a second type semiconductor layer, a first electrode, and a second electrode is provided. The GaN substrate has a first surface and a second surface opposite thereto, and the second surface has a plurality of protuberances, the height of the protuberance is h ?m and the distribution density of the protuberance on the second surface is d cm?2, wherein 9.87×107?h2d, and h?1.8. The first type semiconductor is disposed on the first surface of the GaN substrate. The light emitting layer is disposed on a partial region of the first semiconductor layer, and the wavelength of the light emitted by the light emitting layer is from 375 nm to 415 nm. The second semiconductor layer is disposed on the light emitting layer.
    Type: Grant
    Filed: February 2, 2012
    Date of Patent: December 10, 2013
    Assignee: Industrial Technology Research Institute
    Inventors: Yi-Keng Fu, Ren-Hao Jiang, Yen-Hsiang Fang, Bo-Chun Chen, Chia-Feng Lin
  • Patent number: 8598599
    Abstract: The present invention provides a Group III nitride semiconductor light-emitting device whose main surface is a plane which provides an internal electric field of zero, and which exhibits improved emission performance. The light-emitting device includes a sapphire substrate which has, in a surface thereof, a plurality of dents which are arranged in a stripe pattern as viewed from above; an n-contact layer formed on the dented surface of the sapphire substrate; a light-emitting layer formed on the n-contact layer; an electron blocking layer formed on the light-emitting layer; a p-contact layer formed on the electron blocking layer; a p-electrode; and an n-electrode. The electron blocking layer has a thickness of 2 to 8 nm and is formed of Mg-doped AlGaN having an Al compositional proportion of 20 to 30%.
    Type: Grant
    Filed: March 25, 2011
    Date of Patent: December 3, 2013
    Assignee: Toyoda Gosei Co., Ltd.
    Inventors: Yoshiki Saito, Koji Okuno, Yasuhisa Ushida
  • Patent number: 8592800
    Abstract: A semiconductor emitter, or a precursor therefor, has a substrate and one or more textured semiconductor layers deposited onto the substrate in a nonpolar orientation. The textured layers enhance light extraction, and the use of nonpolar orientation greatly enhances internal quantum efficiency compared to conventional devices. Both the internal and external quantum efficiencies of emitters of the invention can be 70-80% or higher. The invention provides highly efficient light emitting diodes suitable for solid state lighting.
    Type: Grant
    Filed: March 9, 2009
    Date of Patent: November 26, 2013
    Assignee: Trustees of Boston University
    Inventors: Theodore D. Moustakas, Adam Moldawer, Anirban Bhattacharyya, Joshua Abell
  • Patent number: 8591652
    Abstract: The invention relates to a free-standing semiconductor substrate as well as a process and a mask layer for the manufacture of a free-standing semiconductor substrate, wherein the material for forming the mask layer consists at least partially of tungsten silicide nitride or tungsten silicide and wherein the semiconductor substrate self-separates from the starting substrate without further process steps.
    Type: Grant
    Filed: August 24, 2006
    Date of Patent: November 26, 2013
    Assignee: Freiberger Compound Materials GmbH
    Inventors: Christian Hennig, Markus Weyers, Eberhard Richter, Guenther Traenkle
  • Patent number: 8592309
    Abstract: Methods of performing laser spike annealing (LSA) in forming gallium nitride (GaN) light-emitting diodes (LEDs) as well as GaN LEDs formed using LSA are disclosed. An exemplary method includes forming atop a substrate a GaN multilayer structure having a n-GaN layer and a p-GaN layer that sandwich an active layer. The method also includes performing LSA by scanning a laser beam over the p-GaN layer. The method further includes forming a transparent conducting layer atop the GaN multilayer structure, and adding a p-contact to the transparent conducting layer and a n-contact to the n-GaN layer. The resultant GaN LEDs have enhanced output power, lower turn-on voltage and reduced series resistance.
    Type: Grant
    Filed: November 6, 2009
    Date of Patent: November 26, 2013
    Assignee: Ultratech, Inc.
    Inventors: Yun Wang, Andrew M. Hawryluk
  • Patent number: 8592839
    Abstract: Example embodiments are directed to a light-emitting device including a patterned emitting unit and a method of manufacturing the light-emitting device. The light-emitting device includes a first electrode on a top of a semiconductor layer, and a second electrode on a bottom of the semiconductor layer, wherein the semiconductor layer is a pattern array formed of a plurality of stacks. A space between the plurality of stacks is filled with an insulating layer, and the first electrode is on the insulating layer.
    Type: Grant
    Filed: December 14, 2010
    Date of Patent: November 26, 2013
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Hyung-su Jeong, Young-soo Park, Su-hee Chae, Bok-ki Min, Jun-youn Kim, Hyun-gi Hong, Young-jo Tak, Jae-won Lee
  • Patent number: 8587022
    Abstract: A nitride-based semiconductor light-emitting device 31 includes: an n-type GaN substrate 1 which has an m-plane principal surface; a current diffusing layer 7 provided on the n-type GaN substrate 1; an n-type nitride semiconductor layer 2 provided on the current diffusing layer 7; an active layer 3 provided on the n-type nitride semiconductor layer 2; a p-type nitride semiconductor layer 4 provided on the active layer 3; a p-electrode 5 which is in contact with the p-type nitride semiconductor layer 4; and an n-electrode 6 which is in contact with the n-type GaN substrate 1 or the n-type nitride semiconductor layer 2. The donor impurity concentration of the n-type nitride semiconductor layer 2 is not more than 5×1018 cm?3, and the donor impurity concentration of the current diffusing layer 7 is ten or more times the donor impurity concentration of the n-type nitride semiconductor layer 2.
    Type: Grant
    Filed: December 27, 2010
    Date of Patent: November 19, 2013
    Assignee: Panasonic Corporation
    Inventors: Akira Inoue, Junko Iwanaga, Ryou Kato, Masaki Fujikane, Toshiya Yokogawa
  • Publication number: 20130299841
    Abstract: An optocoupler includes a GaN-based photosensor disposed on a substrate and a GaN-based light source disposed on the same substrate as the GaN-based photosensor. A transparent material is interposed between the GaN-based photosensor and the GaN-based light source. The transparent material provides galvanic isolation and forms an optical channel between the GaN-based photosensor and the GaN-based light source.
    Type: Application
    Filed: May 11, 2012
    Publication date: November 14, 2013
    Applicant: INFINEON TECHNOLOGIES AUSTRIA AG
    Inventors: Jan Ranglack, Gianmauro Pozzovivo
  • Patent number: 8580593
    Abstract: Epitaxial formation structures and associated methods of manufacturing solid state lighting (“SSL”) devices with target thermal expansion characteristics are disclosed herein. In one embodiment, an SSL device includes a composite structure having a composite CTE temperature dependency, a formation structure on the composite structure, and an SSL structure on the formation structure. The SSL structure has an SSL temperature dependency, and a difference between the composite CTE and SSL temperature dependencies is below 3 ppm/° C. over the temperature range.
    Type: Grant
    Filed: September 9, 2010
    Date of Patent: November 12, 2013
    Assignee: Micron Technology, Inc.
    Inventor: Thomas Pinnington
  • Patent number: 8580668
    Abstract: A method of manufacturing an ohmic contact layer and a method of manufacturing a top emission type nitride-based light emitting device having the ohmic contact layer are provided. The method of manufacturing an ohmic contact layer includes: forming a first conductive material layer on a semiconductor layer; forming a mask layer having a plurality of nano-sized islands on the first conductive material layer; forming a second conductive material layer on the first conductive material layer and the mask layer; and removing the portion of the second conductive material on the islands and the islands through a lift-off process using a solvent. The method ensures the maintenance of good electrical characteristics and an increase of the light extraction efficiency.
    Type: Grant
    Filed: May 18, 2006
    Date of Patent: November 12, 2013
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Jae-hee Cho, Dong-seok Leem, Tae-yeon Seong, Cheol-soo Sone
  • Patent number: 8574935
    Abstract: A manufacturing method of a solid state light emitting element is provided. A plurality of protrusion structures separated to each other are formed on a first substrate. A buffer layer is formed on the protrusion structures and fills the gaps between protrusion structures. An epitaxial growth layer is formed on the buffer layer to form a first semiconductor stacking structure. The first semiconductor stacking structure is inverted to a second substrate, so that the first semiconductor epitaxial layer and the second substrate are connected to form a second semiconductor stacking structure. The buffer layer is etched by a first etchant solution to form a third semiconductor stacking structure. A second etchant solution is used to permeate through the gaps between the protrusion structures, so that the protrusion structures are etched completely. The first substrate is removed from the third semiconductor stacking structure to form a fourth semiconductor stacking structure.
    Type: Grant
    Filed: April 10, 2012
    Date of Patent: November 5, 2013
    Assignee: Lextar Electronics Corporation
    Inventors: Chang-Chin Yu, Mong-Ea Lin
  • Publication number: 20130285064
    Abstract: According to one embodiment, a semiconductor light emitting device includes a semiconductor layer, a p-side electrode, an n-side electrode, a phosphor layer, and a transparent film. The semiconductor layer has a first face, a second face opposite to the first face, and a light emitting layer. The p-side electrode is provided on the second face in an area including the light emitting layer. The n-side electrode is provided on the second face in an area not including the light emitting layer. The phosphor layer is provided on the first face. The phosphor layer includes a transparent resin and phosphor dispersed in the transparent resin. The transparent film is provided on the phosphor layer and has an adhesiveness lower than an adhesiveness of the transparent resin.
    Type: Application
    Filed: August 29, 2012
    Publication date: October 31, 2013
    Applicant: Kabushiki Kaisha Toshiba
    Inventors: Akihiro KOJIMA, Hideto FURUYAMA, Miyoko SHIMADA, Yosuke AKIMOTO, Hideyuki TOMIZAWA, Yoshiaki SUGIZAKI
  • Publication number: 20130285011
    Abstract: According to one embodiment, a semiconductor light emitting device includes a first nitride semiconductor layer, a nitride semiconductor light emitting layer, a second nitride semiconductor layer, a p-side electrode, and an n-side electrode. The nitride semiconductor light emitting layer is provided on the p-side region of the second face of the first nitride semiconductor layer. The second nitride semiconductor layer is provided on the nitride semiconductor light emitting layer. The p-side electrode is provided on the second nitride semiconductor layer. The n-side electrode is provided on the n-side region of the second face of the first nitride semiconductor layer. The nitride semiconductor light emitting layer has a first concave-convex face in a side of the first nitride semiconductor layer, and a second concave-convex face in a side of the second nitride semiconductor layer.
    Type: Application
    Filed: August 28, 2012
    Publication date: October 31, 2013
    Applicant: Kabushiki Kaisha Toshiba
    Inventors: Akihiro Kojima, Hideto Furuyama, Miyoko Shimada, Yosuke Akimoto
  • Patent number: 8563999
    Abstract: A light emitting device is provided. The light emitting device includes a first semiconductor layer, an uneven part on the first semiconductor layer, a first nonconductive layer including a plurality of clusters on the uneven part, a first substrate layer on the nonconductive layer, and a light emitting structure layer. The light emitting structure layer includes a first conductive type semiconductor layer, an active layer and a second conductive type semiconductor layer on the first substrate layer.
    Type: Grant
    Filed: November 18, 2010
    Date of Patent: October 22, 2013
    Assignee: LG Innotek Co., Ltd.
    Inventors: Ho Sang Yoon, Sang Kyun Shim
  • Patent number: 8558264
    Abstract: A light-emitting device includes a first layer, a second layer, and a semiconductor body interposed between the first and second layers, wherein the semiconductor body has a first fine-wall-shape member, a second fine-wall-shape member, and a semiconductor member interposed between the first and second fine-wall-shape members, the first and second fine-wall-shape members have a third layer, a fourth layer, and a fifth layer interposed between the third and fourth layers, the fifth layer is a layer that generates light and guides the light, the third and fourth layers are layers that guide the light generated in the fifth layer, the first and second layers are layers that suppress leakage of the light generated in the fifth layer, and the propagating direction of the light generated in the fifth layer intersects with the first and second fine-wall-shape members.
    Type: Grant
    Filed: June 27, 2011
    Date of Patent: October 15, 2013
    Assignee: Seiko Epson Corporation
    Inventor: Masamitsu Mochizuki
  • Patent number: 8552531
    Abstract: A nitride-based compound semiconductor includes an atom of at least one group-III element selected from the group consisting of Al, Ga, In, and B, a nitrogen atom, and a metal atom that forms a compound by bonding with an interstitial atom of the at least one group-III element. The metal atom is preferably iron or nickel. A doping concentration of the metal atom is preferably equal to a concentration of the interstitial atom of the at least one group-III element.
    Type: Grant
    Filed: July 12, 2011
    Date of Patent: October 8, 2013
    Assignee: Advanced Power Device Research Association
    Inventor: Masayuki Iwami
  • Patent number: 8541796
    Abstract: There is provided a nitride semiconductor light emitting device having a light emitting portion coated with a coating film, the light emitting portion being formed of a nitride semiconductor, the coating film in contact with the light emitting portion being formed of an oxynitride film deposited adjacent to the light emitting portion and an oxide film deposited on the oxynitride film. There is also provided a method of fabricating a nitride semiconductor laser device having a cavity with a facet coated with a coating film, including the steps of: providing cleavage to form the facet of the cavity; and coating the facet of the cavity with a coating film formed of an oxynitride film deposited adjacent to the facet of the cavity and an oxide film deposited on the oxynitride film.
    Type: Grant
    Filed: December 14, 2006
    Date of Patent: September 24, 2013
    Assignee: Sharp Kabushiki Kaisha
    Inventors: Yoshinobu Kawaguchi, Takeshi Kamikawa
  • Publication number: 20130240831
    Abstract: The present disclosure involves an apparatus. The apparatus includes a photonic die structure that includes a light-emitting diode (LED) die. The LED die is a vertical LED die in some embodiments. The LED die includes a substrate. A p-doped III-V compound layer and an n-doped III-V compound layer are each disposed over the substrate. A multiple quantum well (MQW) layer is disposed between the p-doped III-V compound layer and the n-doped III-V compound layer. The p-doped III-V compound layer includes a first region having a non-exponential doping concentration characteristic and a second region having an exponential doping concentration characteristic. In some embodiments, the second region is formed using a lower pressure than the first region.
    Type: Application
    Filed: March 13, 2012
    Publication date: September 19, 2013
    Applicant: TSMC Solid State Lighting, Ltd.
    Inventors: Ming-Hua Lo, Zhen-Yu Li, Hsing-Kuo Hsia, Hao-Chung Kuo