By Inserting Component Lead Or Terminal Into Base Aperture Patents (Class 29/837)
  • Publication number: 20100000324
    Abstract: Provided is an acceleration sensor that has high detection sensitivity and that can enhance production efficiency. The acceleration sensor (50) has: a ceramic substrate (1) made of Al2O3; a ferroelectric layer (2) formed in a predetermined area on the ceramic substrate (1) by screen printing, the ferroelectric layer (2) being made of BaTiO3; a proof mass (4) disposed so as to face the ferroelectric layer (2), the proof mass (4) being formed at a predetermined distance d from the ferroelectric layer (2); and a first electrode (7) and a second electrode (8) that are formed on that side of the proof mass (4) which faces the ferroelectric layer (2), so as to be fixed thereto. The first electrode (7) and the second electrode (8) are each formed in the shape of comb teeth, and comb tooth portions (7a) and (8a) thereof are arranged in an alternating manner.
    Type: Application
    Filed: May 16, 2008
    Publication date: January 7, 2010
    Applicant: Rohm Co., Ltd.
    Inventors: Yasuhiro Yoshikawa, Hiroyuki Tajiri
  • Publication number: 20100000772
    Abstract: In one embodiment, a leadless package includes down-set conductive leads having base portions. The base portions include stand-offs that attach to electrodes on an electronic chip using, for example, a solder die attach material. An optional encapsulating layer covers portions of the down-set conductive leads and portions of the electronic chip while leaving pad portions of the down-set conductive leads and a surface of the electronic chip exposed. The pad portions and the surface of the electronic chip are oriented to attach to a next level of assembly.
    Type: Application
    Filed: December 20, 2004
    Publication date: January 7, 2010
    Applicant: SEMICONDUCTOR COMPONENTS INDUSTRIES, L.L.C.
    Inventors: James P. Letterman, JR., Joseph K. Fauty, Jay A. Yoder, William F. Burghout
  • Patent number: 7640655
    Abstract: A second substrate 12 is provided above a first substrate 11, and an electronic component 13 is arranged between the first substrate 11 and the second substrate 12 so that between the first substrate 11 and the second substrate 12, the electronic component 13 is sealed and a photosensitive resin 14 having adhesion is provided to bond the first substrate 11 and the second substrate 12 to each other.
    Type: Grant
    Filed: September 12, 2006
    Date of Patent: January 5, 2010
    Assignee: Shinko Electric Industries Co., Ltd.
    Inventor: Masahiro Sunohara
  • Publication number: 20090321118
    Abstract: An electronic component embedded printed circuit board and a manufacturing method thereof. The electronic component embedded printed circuit board includes an insulating layer forming a core layer; an electronic component inserted to project a part thereof on an upper part of the insulating layer; a metallic seed layer formed on the insulating layer including a projected surface of the electronic component; a plating layer formed on the metallic seed layer; circuit patterns electrically connected to pads of the electronic component through via-holes formed on the insulating layer; and a solder resist layer which is formed on the insulating layer and has solder balls attached onto the via-holes electrically connected to the circuit patterns. In the electronic component embedded printed circuit board, a heat radiation characteristic can be maximized and a thickness of the printed circuit board can be minimized.
    Type: Application
    Filed: September 5, 2008
    Publication date: December 31, 2009
    Applicant: SAMSUNG ELECTRO-MECHANICS CO., LTD.
    Inventors: Woon Chun Kim, Soon Gyu Yim, Joon Seok Kang
  • Patent number: 7624502
    Abstract: A conductive portion is formed in a hole formed in a material sheet. A metal foil is placed on a surface of the material sheet to provide a laminated sheet. The laminated sheet is heated and pressed to provide a circuit-forming board. The metal foil includes a pressure absorption portion and a hard portion adjacent to the pressure absorption portion. The pressure absorption portion has a thickness changing according to a pressure applied thereto. The circuit-forming board provided by this method provides a high-density circuit board of high quality having reliable electrical connection.
    Type: Grant
    Filed: January 21, 2005
    Date of Patent: December 1, 2009
    Assignee: Panasonic Corporation
    Inventor: Toshihiro Nishii
  • Patent number: 7621042
    Abstract: A film substrate in a mounting structure of electronic components has positioning holes capable of positioning the electronic components passing therethrough. One surface of each of the electronic components which are inserted and positioned in the positioning holes protrudes from one surface of the film substrate, and the other surfaces thereof are positioned in the positioning holes, respectively. Conductive patterns are formed on the other surface of the film substrate and are electrically connected to the other surfaces of the electronic components positioned in the positioning holes.
    Type: Grant
    Filed: July 11, 2005
    Date of Patent: November 24, 2009
    Assignee: Alps Electric Co., Ltd.
    Inventors: Yasushi Watanbe, Ikuo Hibino
  • Patent number: 7607223
    Abstract: An electro-fluidic interconnection. The interconnection includes a body (200) formed of a ceramic material. The body (200) is provided with an aperture (206) having a profile suitable for receiving an interconnecting conduit (400). The interconnecting conduit (400) can be formed of the same type of ceramic material as the body (200). The conduit (400) is defined by an outer shell (403) with a hollow bore (402) for transporting a fluid. A mating portion (404) of the conduit has an exterior profile that matches the profile of the aperture. Moreover, the mating portion (404) of the conduit (400) can be compression fitted within the aperture (206). Conductive traces (406, 208) on the conduit and the body can be electrically connected to complete the electro-fluidic interconnection.
    Type: Grant
    Filed: August 7, 2007
    Date of Patent: October 27, 2009
    Assignee: Harris Corporation
    Inventors: Mihael Pleskach, Paul Koeneman, Carol Gamlen, Steven R. Snyder
  • Patent number: 7596862
    Abstract: A method of making the circuitized substrate. The circuitized substrate includes a substrate having a substantially planar upper surface and a conductive layer positioned on the substantially planar upper surface. The conductive layer includes at least one side wall therein, defining an opening in the conductive layer. The conductive layer includes an end portion spaced from the opening, the end portion forming an acute angle with the substantially planar upper surface of the substrate. The at least one side wall is substantially perpendicular to the substantially planar upper surface of the substrate.
    Type: Grant
    Filed: September 28, 2007
    Date of Patent: October 6, 2009
    Assignee: International Business Machines Corporation
    Inventors: Frank D. Egitto, Kevin T. Knadle, Andrew M. Seman
  • Publication number: 20090244865
    Abstract: A method for manufacturing a multilayer printed wiring board having an electronic component housed therein includes forming a first conductor circuit on a first surface of a substrate. A first alignment mark is formed on the first surface of the substrate separate from the conductor circuit and forming a through bore in the substrate, the through bore extending from the first surface of the substrate to a second surface of the substrate. A seal member is disposed on the second surface of the substrate, the seal member sealing an opening on the second surface of the through bore to provide a sealed through bore. An electronic component is inserted in the sealed through bore using the first alignment mark on the first surface of the substrate.
    Type: Application
    Filed: March 24, 2009
    Publication date: October 1, 2009
    Applicant: IBIDEN CO., LTD
    Inventor: Hironori TANAKA
  • Patent number: 7594309
    Abstract: A method of producing a laminate-type piezoelectric element, wherein a ceramic laminated body therein is formed through an intermediate laminated body-forming step of forming an intermediate laminated body 100 by alternately laminating green sheets 110 that serve as the piezoelectric layers and the inner electrode layers 20, and a calcining step of forming the ceramic laminated body by calcining the intermediate laminated body 100. In the intermediate laminated body-forming step, an overlapped portion 108 and a non-overlapped portion 109 are formed in the intermediate laminated body 100, and voids 40 are formed, in advance, in at least part of the portion that becomes the non-overlapped portion 109. In the calcining step, relaxing layers including the voids 40 are formed.
    Type: Grant
    Filed: November 30, 2006
    Date of Patent: September 29, 2009
    Assignee: Denso Corporation
    Inventors: Akio Iwase, Shige Kadotani, Tetsuji Itou
  • Publication number: 20090231788
    Abstract: Electrical communication between an information handling system chassis having a non-conductive surface and processing components within the chassis is established through the non-conductive surface with conductive elements extending from a conductive pad. A protruding element extending from a conductive pad engages the conductive elements through the non-conductive surface when the protruding element is coupled to a cavity formed in the chassis. Alternatively, the protruding element extends from the chassis to couple to a cavity in the conductive pad. Processing components have electrical communication with the chassis through the conductive pad.
    Type: Application
    Filed: February 21, 2008
    Publication date: September 17, 2009
    Inventors: Chase Berry, Gary Thomason, James Utz, Steven L. Williams, Jorge C. Marcet
  • Patent number: 7581297
    Abstract: A piezoelectric vibrator has an airtight terminal comprised of a lead terminal and a piezoelectric member. The lead terminal has an inner lead portion and an outer lead portion. The piezoelectric member has an exciting electrode and a mount electrode disposed on a surface of the piezoelectric member. A plasma arc electrode is connected to a power supply for generating a plasma arc discharge. To bond together the inner lead portion of the lead terminal to the mount electrode of the piezoelectric member, the outer lead portion is connected to an output terminal of the power supply and the plasma arc electrode is positioned at a vicinity of a bonding portion for bonding together the inner lead portion and the mount electrode. A voltage is applied between the inner lead portion and the plasma arc electrode to generate a plasma arc discharge.
    Type: Grant
    Filed: April 24, 2006
    Date of Patent: September 1, 2009
    Assignee: Seiko Instruments Inc.
    Inventors: Masayuki Sato, Seigo Fukuchi, Atsushi Tomisaki
  • Patent number: 7581312
    Abstract: A method for manufacturing a multilayer FPCB includes the steps of: providing a first copper clad laminate, a second copper clad laminate and a binder layer; defining an opening on the binder layer; defining a first slit on the first copper clad laminate; laminating the first copper clad laminate, the binder layer and the second copper clad laminate; defining a via hole for establishing electric connection between the first copper clad laminate and the second copper clad laminate; cutting the first copper clad laminate, the binder layer and the second copper clad laminate thereby forming a multilayer flexible printed circuit board having different numbers of layers in different areas.
    Type: Grant
    Filed: October 23, 2007
    Date of Patent: September 1, 2009
    Assignees: FuKui Precision Component (Shenzhen) Co., Ltd., Foxconn Advanced Technology Inc.
    Inventors: Chih-Yi Tu, Cheng-Hsien Lin, Ming Wang
  • Publication number: 20090211790
    Abstract: The connecting structure of a flexible circuit board and electronic components, includes: the flexible circuit board having: a pattern of wires, holes passing through the flexible circuit board in a thickness direction of the wires at parts of the wires to which the electronic components are connected, and a weakened part arranged on a bending line in a bending part of the flexible circuit board on which the flexible circuit board bends when the wires are connected with the electronic components; and the electronic components respectively having projections on parts to which the wires are connected, wherein the wires are electrically connected with the electronic components in a state where the projections are inserted in the holes and the flexible circuit board bends on the weakened part.
    Type: Application
    Filed: February 24, 2009
    Publication date: August 27, 2009
    Applicant: FUJIFILM Corporation
    Inventor: Tsutomu Yokouchi
  • Patent number: 7571541
    Abstract: A method of fabricating a plurality of inkjet nozzles on a substrate. The method comprises the steps of: (a) providing a substrate having a plurality of trenches corresponding to ink inlets; (b) depositing sacrificial material so as fill the trenches and form a scaffold on the substrate; (c) defining openings in the sacrificial material; (d) depositing roof material over the sacrificial material to form nozzle chambers and filter structures simultaneously; (e) etching nozzle apertures through the roof material; and (f) removing the sacrificial material.
    Type: Grant
    Filed: December 19, 2005
    Date of Patent: August 11, 2009
    Assignee: Silverbrook Research Pty Ltd
    Inventors: Kia Silverbrook, David Charles Psaila, Garry Raymond Jackson, Akira Nakazawa, Jonathan Mark Bulman, Jan Waszczuk
  • Patent number: 7568284
    Abstract: In a component insertion head, by grasping of a device portion of a component by a device chuck, a lead wire is stretched on a fulcrum given by a grasping position of the lead wire by a transfer chuck so that the device portion is placed at a component insertion position, by which correction of an insertion posture of the component is performed, and the lead wire of the component that has been corrected in terms of its insertion posture is inserted into an insertion hole of a board.
    Type: Grant
    Filed: July 17, 2003
    Date of Patent: August 4, 2009
    Assignee: Panasonic Corporation
    Inventors: Shozo Kadota, Kazuaki Kosaka, Minoru Kitani
  • Patent number: 7565725
    Abstract: A method for forming a variable capacitor including a conductive strip covering the inside of a cavity, and a flexible conductive membrane placed above the cavity, the cavity being formed according to the steps of: forming a recess in the substrate; placing a malleable material in the recess; having a stamp bear against the substrate at the level of the recess to give the upper part of the malleable material a desired shape; hardening the malleable material; and removing the stamp.
    Type: Grant
    Filed: August 30, 2006
    Date of Patent: July 28, 2009
    Assignees: STMicroeectronics S.A., Commissariat a l'energie Atomique
    Inventors: Guillaume Bouche, Fabrice Casset, Pascal Ancey
  • Publication number: 20090175012
    Abstract: A press fit passive component, such as a resistor or capacitor, adapted to fit within, or partially within, a via of a printed circuit board. In one example, the press fit passive component has a cylindrically shaped body with solderable terminals at either end of the body, and a dielectric collar disposed at least partially about the cylindrically shaped body.
    Type: Application
    Filed: January 4, 2008
    Publication date: July 9, 2009
    Applicant: DIALOGIC CORPORATION
    Inventor: Gary D. Frasco
  • Publication number: 20090166056
    Abstract: A contact member inserted in a piercing hole of a socket provided between a first contacted member and a second contacted member facing each other, the contact member includes a first contact part configured to come in contact with a first pad formed in the first connected member; a second contact part configured to come in contact with a second pad formed in the second connected member; and a spiral cylindrical part formed in a spiral manner with respect to an axial line connecting the first pad and the second pad, the spiral cylindrical part having one end formed in a large diameter curved part having the first contact part, the spiral cylindrical part having another end formed in a small diameter curved part having the second contact part; the spiral cylindrical part having an external circumferential surface coming in contact with an inside wall of the piercing hole.
    Type: Application
    Filed: April 18, 2008
    Publication date: July 2, 2009
    Inventors: Yuko Ikeda, Toshihiro Kusagaya
  • Publication number: 20090144974
    Abstract: A method of repetitively accomplishing mechanical action of a tool member by drivingly engaging the tool member with one end of a compression spring, manually applying incrementally increasing force to the other end of the compression spring until the mechanical action of the tool member is completed, and utilizing an electronic measurement of the force level within the compression spring for repetitiveley reproducing the mechanical action.
    Type: Application
    Filed: January 7, 2009
    Publication date: June 11, 2009
    Inventor: Robert W. Sullivan
  • Publication number: 20090129038
    Abstract: Provided is a simplified structure of a circuit device in which a power element generating a large amount of heat is incorporated. The circuit device according to the present invention includes: a circuit board whose surface is covered with an insulating layer; a conductive pattern formed on the surface of the insulating layer; a circuit element electrically connected to the conductive pattern; and a lead connected to a pad formed of the conductive pattern. Furthermore, a power element is fixed to the top surface of a land portion formed of a part of the lead. Accordingly, the land portion serves as a heat sink, thereby contributing to heat dissipation.
    Type: Application
    Filed: August 30, 2006
    Publication date: May 21, 2009
    Applicant: SANYO ELECTRIC CO., LTD
    Inventors: Sadamichi Takakusaki, Noriaki Sakamoto
  • Patent number: 7523550
    Abstract: A method for forming a via in an alumina protective layer on a structure such as a magnetic write head for use in perpendicular magnetic recording. A structure such as a magnetic pole, and or magnetic trailing shield, is formed over a substrate and is covered with a thick layer of alumina. The alumina layer can then be planarized by a chemical mechanical polishing process (CMP) and then a mask structure, such as a photoresist mask, is formed over the alumina layer. The mask structure is formed with an opening disposed over the contact pad. A reactive ion mill is then performed to remove portions of the alumina layer that are exposed at the opening in the mask, thereby forming a via in the alumina layer.
    Type: Grant
    Filed: April 25, 2006
    Date of Patent: April 28, 2009
    Assignee: Hitachi Global Storage Technologies Netherlands B.V.
    Inventors: Amanda Baer, Hamid Balamane, Michael Feldbaum, Ming Jiang, Aron Pentek
  • Patent number: 7523539
    Abstract: In a probe manufacturing method, after a metal material for a probe is deposited on a base table, the probe can be detached from the base table relatively easily without damaging the probe. A recess corresponding to a flat surface shape of a probe is formed by a resist mask on a sacrificial layer on a base table, and a probe is formed by depositing a probe material in the recess. Thereafter, the resist mask is removed, and further the sacrificial layer is removed by an etching process with a part of the sacrificial layer remaining. For the purpose of forming an opening for control of the remaining part of the sacrificial layer in the etching process in the probe so as to let the opening pass through the probe in its plate thickness direction, a hole-forming portion for the opening is formed in the resist mask. Etching of the sacrificial layer in the etching process is promoted from an edge of the opening formed in the probe by this hole-forming portion.
    Type: Grant
    Filed: November 5, 2007
    Date of Patent: April 28, 2009
    Assignee: Kabushiki Kaisha Nihon Micronics
    Inventors: Takayuki Hayashizaki, Hideki Hirakawa, Akira Soma, Shinji Kuniyoshi
  • Publication number: 20090101390
    Abstract: An electronic control unit includes a printed wiring board (50), electronic components (51 to 53) mounted on the printed wiring board (50), and a synthetic resin coating (57) formed by injection molding to cover the printed wiring board (50) and the electronic component (51 to 53). The electronic components (51 to 53) are housed in a protective case (75) that can resist pressure and heat during the injection molding of the coating (57). Thus, in the electronic control unit, an electronic component is not damaged by formation of a coating by injection molding so that the electronic control unit can always function normally.
    Type: Application
    Filed: June 23, 2006
    Publication date: April 23, 2009
    Inventors: Ryuichi Kimata, Keiichiro Bungo, Yoshinori Maekawa
  • Publication number: 20090049686
    Abstract: A method of manufacturing a component-embedded printed circuit board is disclosed. The method includes: forming a blind hole in the first metal layer such that the first insulation layer is exposed, for a metal-clad laminate that includes a first insulation layer stacked over a first metal layer, securing a component to the first insulation layer by embedding the component in the blind hole, stacking a second insulation layer and a second metal layer on either side of the metal-clad laminate, and forming circuit patterns by removing portions of the metal layers.
    Type: Application
    Filed: April 22, 2008
    Publication date: February 26, 2009
    Applicant: Samsung Electro-Mechanics Co., Ltd.
    Inventors: Hwa-Sun Park, Sung Yi, Sang-Chul Lee, Jong-Woon Kim, Yul-Kyo Chung
  • Patent number: 7480988
    Abstract: A method and apparatus suitable for forming hermetic electrical feedthroughs in a ceramic sheet having a thickness of ?40 mils. More particularly, the method yields an apparatus including a hermetic electrical feedthrough which is both biocompatible and electrochemically stable and suitable for implantation in a patient's body. The method involves: (a) providing an unfired, ceramic sheet having a thickness of ?40 mils and preferably comprising >99% aluminum oxide; (b) forming multiple blind holes in said sheet; (c) inserting solid wires, preferably of platinum, in said holes; (d) firing the assembly of sheet and wires to a temperature sufficient to sinter the sheet material but insufficient to melt the wires; and (e) removing sufficient material from the sheet lower surface so that the lower ends of said wires are flush with the finished sheet lower surface.
    Type: Grant
    Filed: March 30, 2001
    Date of Patent: January 27, 2009
    Assignee: Second Sight Medical Products, Inc.
    Inventors: Jerry Ok, Robert J. Greenberg
  • Patent number: 7475460
    Abstract: A method for producing an airtight terminal having an annular stem, a lead passing through the stem and formed of a conductive material, and a filler for fixing the lead in the stem includes (1) a lead contour formation step of disposing a base and a lead formation portion on a plate- or strip-shaped conductive material and forming a contour of the lead on the lead formation portion with at least one end of the lead connected to the base, (2) a filler shaping and sintering step of filling the lead having a contour with the filler in a predetermined position and shaping and sintering the filler, (3) a stem mounting step of mounting the stem to a perimeter of the sintered filler, (4) a firing step of heating, melting, and cooling the sintered filler in the stem and bringing the lead into close contact with the stem to fix the lead to the stem through the filler, (5) a metal film formation step of forming a metal film on a surface of the lead, and (6) a cutting step of separating the one end of the lead from the
    Type: Grant
    Filed: January 24, 2006
    Date of Patent: January 13, 2009
    Assignee: Seiko Instruments Inc.
    Inventors: Yoshifumi Nishino, Hiroaki Uetake, Yuki Hoshi
  • Publication number: 20090000812
    Abstract: A multilayer printed wiring board includes a core substrate and a built-up wiring layer formed by alternately layering conductor circuits and insulating resin layers. The built-up wiring layer includes a first surface provided in contact with the core substrate and a second surface opposing the first surface and including a mounting area on which at least one semiconductor device is to be mounted. A first plurality of through-hole conductors is formed in a first portion of the core substrate which corresponds to the mounting area of the second surface, and a second plurality of through-hole conductors formed in a second portion of the core substrate which corresponds to another area of the second surface other than the mounting area. A pitch between the first plurality of through-hole conductors is smaller than a pitch between the second plurality of through-hole conductors.
    Type: Application
    Filed: June 27, 2008
    Publication date: January 1, 2009
    Applicant: IBIDEN CO., LTD
    Inventor: Takashi KARIYA
  • Publication number: 20080301934
    Abstract: Systems and methods for simultaneously partitioning a plurality of via structures into electrically isolated portions by using plating resist within a PCB stackup are disclosed. Such via structures are made by selectively depositing plating resist in one or more locations in a sub-composite structure. A plurality of sub-composite structures with plating resist deposited in varying locations are laminated to form a PCB stackup of a desired PCB design. Through-holes are drilled through the PCB stackup through conductive layers, dielectric layers and through the plating resist. Thus, the PCB panel has multiple through-holes that can then be plated simultaneously by placing the PCB panel into a seed bath, followed by immersion in an electroless copper bath. Such partitioned vias increase wiring density and limit stub formation in via structures. Such partitioned vias allow a plurality of electrical signals to traverse each electrically isolated portion without interference from each other.
    Type: Application
    Filed: August 12, 2008
    Publication date: December 11, 2008
    Applicant: SANMINA SCI CORPORATION
    Inventor: George Dudnikov, JR.
  • Patent number: 7458148
    Abstract: A joint connector includes a plurality of connection terminals, each of the connection terminals including a contact portion, a housing fixing portion and a press-fitting portion, a connector housing that includes a plurality of terminal fixing portions for fixing the corresponding housing fixing portions of the connection terminals, and a board that includes a plurality of through holes in which the corresponding press-fitting portions of the connection terminals are press-fitted respectively so as to electrically connect the connection terminals. The board is disposed in contact with the terminal fixing portion of the connector housing.
    Type: Grant
    Filed: December 29, 2005
    Date of Patent: December 2, 2008
    Assignee: Yazaki Corporation
    Inventor: Kaoru Matsumura
  • Publication number: 20080256792
    Abstract: A terminal insertion apparatus having a wire holding unit holding two wires, each wire having a terminal, a connector holding unit holding a connector housing having at least two holes for receiving terminals, and a terminal insertion head is disclosed. The terminal insertion head has a wire gripping unit having a first holder and a second holder. The first holder and second holder are movable in a vertical direction toward and away from the wire holding unit and are movable in a horizontal direction toward and away from the connector holding unit. The first holder has an outer grip and an inner grip that together hold one of the two wires while the second holder has an outer grip and an inner grip that together hold the remaining of the two wires.
    Type: Application
    Filed: December 6, 2007
    Publication date: October 23, 2008
    Inventors: Koji Imai, Minoru Abe, Jun Funakawa, Koichi Nakajima, Daisuke Toma, Hirohide Miyazaki
  • Publication number: 20080254649
    Abstract: A light emitting diode (LED) lighting assembly includes a printed circuit board that includes a dielectric layer sandwiched between first conductive layers. The printed circuit board includes vias extending there through, with thermally conductive plugs in the vias. A second conductive layer is on each first conductive layer and on the thermally conductive plugs. The thermally conductive plugs are enclosed by the second conductive layers. LEDs are coupled to the printed circuit board, with each LED being mounted over at least one thermally conductive plug to dissipate heat therefrom.
    Type: Application
    Filed: March 25, 2008
    Publication date: October 16, 2008
    Applicant: RALED, INC.
    Inventor: Kurt J. STOREY
  • Publication number: 20080232119
    Abstract: An light emitting diode lamp assembly in accordance with an embodiment of the present application includes a base, a ballast circuit mounted on a circuit board and operable to provide a desired output current and a light emitting diode electrically connected to the ballast and driven by the output current of the ballast circuit to provide light. The base is filled with a thermally conductive substance and the circuit board is mounted in the base and in thermal contact with the thermally conductive substance such that heat is drawn away from the light emitting diode through the circuit board and into the thermally conductive substance to the base.
    Type: Application
    Filed: March 21, 2008
    Publication date: September 25, 2008
    Inventor: Thomas Ribarich
  • Publication number: 20080220208
    Abstract: A taped component includes a career tape having an upper surface having recesses provided therein, and products stored in the recesses, respectively. Each of the recesses has a bottom on which each of the products is placed. The bottom has an aperture provided therein, and the aperture faces a position different from the center of gravity of each of the products. This taped component allows the product to be mounted efficiently.
    Type: Application
    Filed: January 4, 2008
    Publication date: September 11, 2008
    Applicant: Matsushita Electric Industrial Co., Ltd.
    Inventors: Masahiro Masuda, Yasunori Yanai, Yoshikazu Yagi
  • Publication number: 20080201943
    Abstract: An electronic device substrate is provided with a thin-plate core substrate; a metal electrode provided on the core substrate and electrically connected to an electrode of an electronic component to be packaged thereon; and an electrical insulation layer on which is mounted the electronic component, and which is provided to surround the metal electrode.
    Type: Application
    Filed: April 17, 2008
    Publication date: August 28, 2008
    Inventors: Akira Chinda, Nobuaki Miyamoto, Koki Hirasawa, Kenji Uchida, Mamoru Mita
  • Publication number: 20080192450
    Abstract: This publication discloses an electronics module and a method for manufacturing it. The electronics module includes at least one component (6) embedded in an insulating-material layer (1), which has a first contacting surface, in which there are first contact terminals (7), from which the component (6) is connected electrically to the conductor structures contained in the electronics module. In addition, the component (6) has a second contacting surface opposite to the first contacting surface, in which there is at least one second contact terminal (7?), from which the component (6) is connected electrically to the conductor structures contained in the electronics module. With the aid of the invention, it is possible to achieve an electronic-module construction that saves space compared to the prior art.
    Type: Application
    Filed: April 27, 2005
    Publication date: August 14, 2008
    Applicant: Imbera Electronics Oy
    Inventors: Risto Tuominen, Antti Iihola
  • Publication number: 20080148563
    Abstract: An intermediate layer 38 is provided on a die pad 22 of an IC chip 20 and integrated into a multilayer printed circuit board 10. Due to this, it is possible to electrically connect the IC chip 20 to the multilayer printed circuit board 10 without using lead members and a sealing resin. Also, by providing the intermediate layer 38 made of copper on an aluminum pad 24, it is possible to prevent a resin residue on the pad 24 and to improve connection characteristics between the die pad 24 and a via hole 60 and reliability.
    Type: Application
    Filed: February 20, 2008
    Publication date: June 26, 2008
    Applicant: IBIDEN CO., LTD.
    Inventors: Hajime SAKAMOTO, Dongdong Wang
  • Publication number: 20080151514
    Abstract: An apparatus operable to interface an electronic component with a signal input. The apparatus may generally include a low-ohm resistor and a voltage translator coupled with the low-ohm resistor. The low-ohm resistor is operable to couple with the input to receive an input signal therefrom. The voltage translator is operable to couple with the electronic component and translate the input signal from a first voltage to a second voltage for use by the electronic component. The low-ohm resistor and voltage translator may be positioned by a pick and place assembly machine such that embodiments of the present invention do not require a technician to manually couple and solder the apparatus to the input and electronic component.
    Type: Application
    Filed: December 20, 2006
    Publication date: June 26, 2008
    Inventor: JERRY WILLIAM YANCEY
  • Patent number: 7383628
    Abstract: Disclosed is a punch tool which is used to create apertures at any desired location in a raceway duct. The punch tool has two opposed jaws. A first jaw has an angularly-truncated tubular blade. The other jaw has a tube-shaped blade receiving device which receives the blade when it cuts through the wall. The use of this tool with the methods of the present invention enables the user to make cable drops at any position along the duct in order to reach computing equipment below.
    Type: Grant
    Filed: November 18, 2004
    Date of Patent: June 10, 2008
    Assignee: Sprint Communications Company L.P.
    Inventors: Dough Robinett, Todd Daugherty
  • Publication number: 20080127484
    Abstract: A method for forming a mask for filling at least one target hole defined in a multilayer circuit board is described. In general, a removable layer is applied to an exterior surface of the multilayer circuit board. At least one access hole is then formed in the removable layer such that the at least one access hole in the removable layer overlaps with the at least one target hole to form the mask. Once the mask is formed, at least one target hole defined in the multilayer circuit board is filled with a fill material through the access hole formed in the removable layer. The fill material can be a conductive or nonconductive material. For example, the fill material can be conductive ink, or a conductive paste. In general, the fill material is a flowable material which can be positioned into the target hole through the access hole in its flowable state. Then, the fill material cures to form a hardened material within the target hole. The target hole can either be a through hole, or a blind hole.
    Type: Application
    Filed: December 5, 2006
    Publication date: June 5, 2008
    Inventor: Joseph A.A.M. Tourne
  • Patent number: 7377028
    Abstract: A connector insertion and removal tool for an electrical system including a circuit board and at least one electrical connector therefor includes a first portion configured for coupling to a first surface of the circuit board, and a second portion configured for coupling to the first portion. At least one of the first portion and the second portion comprises an actuator adapted for movement toward and away from the circuit board to contact at least a portion of the connector.
    Type: Grant
    Filed: September 19, 2003
    Date of Patent: May 27, 2008
    Assignee: Tyco Electronics Corporation
    Inventors: Alexander William Hasircoglu, James Lee Fedder
  • Publication number: 20080106875
    Abstract: Provided are a hybrid integrated circuit device in which fine patterns can be formed while current-carrying capacitances are ensured, and a method of manufacturing the same. The hybrid integrated circuit device of the present invention includes conductive patterns formed on a front surface of a circuit substrate and circuit elements electrically connected respectively to the conductive patterns. The conductive patterns include a first conductive pattern and a second conductive pattern formed more thickly than the first conductive pattern. The second conductive pattern includes a protruding portion protruding in a thickness direction thereof.
    Type: Application
    Filed: February 18, 2005
    Publication date: May 8, 2008
    Inventors: Yusuke Igarashi, Sadamichi Takakusaki, Motoichi Nezu, Takaya Kusabe
  • Patent number: 7325299
    Abstract: A method of making a circuitized substrate. A conductive layer having a substantially planar upper surface is formed on and in direct mechanical contact with an upper surface of a substrate. A portion of the conductive layer is removed to form an interim side wall in the conductive layer. A layer of patternable material is formed on the substantially planar upper surface and on the interim side wall. A portion of the layer of patternable material on the conductive layer is removed to expose the interim side wall. A portion of the substantially planar upper surface is removed to form a side wall in the layer of patternable material. Portions of the interim side wall in the conductive layer are removed to form a second side wall and a bottom wall defined by the upper surface of the substrate. The second side wall is substantially perpendicular to the bottom wall.
    Type: Grant
    Filed: January 4, 2007
    Date of Patent: February 5, 2008
    Assignee: International Business Machines Corporation
    Inventors: Frank D. Egitto, Kevin T. Knadle, Andrew M. Seman
  • Patent number: 7312404
    Abstract: A method and apparatus to eliminate conductive contamination reliability problems for assembled substrates, such as electrical arcing in power semiconductor leads. One embodiment of the invention involves a method for assembling an electrical component having leads on a substrate having conductive contacts, wherein an elastomer part encapsulates the leads of the electrical component. A second embodiment of the invention involves assembling an electrical component having leads to a substrate having conductive contacts, wherein an elastomer shape cut by a punch die encapsulates the leads of the electrical component. A third embodiment of the invention involves an assembled substrate including an electrical component having leads, and an elastomer surrounding the leads to encapsulate the leads.
    Type: Grant
    Filed: April 25, 2006
    Date of Patent: December 25, 2007
    Assignee: Hewlett-Packard Development Company, L.P.
    Inventors: Andrew Michael Cherniski, James Kristian Koch
  • Patent number: 7290333
    Abstract: A conductive film has a plurality of clearances (openings) and a plurality of auxiliary clearances. The plurality of clearances and the plurality of auxiliary clearances are formed to have such numerical apertures and locations that generate no bias in the distribution of conductive film in consideration of the entire conductive film. The conductive film can disperse stress caused by thermal expansion etc., to ease by having the plurality of clearances and the plurality of auxiliary clearances. Accordingly, the conductive film is less prone to being peeled off the insulating film. Further, since the distribution of conductive film is substantially uniform as a whole, the transfer characteristics that are fixed by the distribution become substantially uniform as a whole.
    Type: Grant
    Filed: December 3, 2004
    Date of Patent: November 6, 2007
    Assignee: NEC Corporation
    Inventor: Isao Matsui
  • Patent number: 7292448
    Abstract: A circuit substrate includes a first rigid substrate having a plurality of land portions located at a predetermined interval on one surface, a second rigid substrate having a plurality of second land portions located at a predetermined interval on one surface and a flexible wiring board sandwiched by the first and second rigid substrates and which has a plurality of third land portions corresponding to the first land portions on one surface and a plurality of fourth land portions corresponding to the second land portions on the other surface. In this circuit substrate, the second and fourth land portions are displaced from each other relative to the first and third land portions and at least part of the first and third land portions and at least part of the second and fourth land portions are electrically connected to each other, respectively.
    Type: Grant
    Filed: August 24, 2006
    Date of Patent: November 6, 2007
    Assignee: Sony Corporation
    Inventors: Toshichika Urushibara, Koji Shiozawa, Masakazu Okabe, Yukiko Hyodo, Yusuke Masuda, Tadayuki Miyamoto
  • Patent number: 7290330
    Abstract: A system including a circuit board and several pluggable modules coupled to the circuit board. The several pluggable modules are insertable through side-by-side slots in an enclosure in which the circuit board resides. A first pluggable module is coupled to the circuit board via a first connector, while a second pluggable module is coupled to the circuit board via a second connector such that the second pluggable module is laterally offset from the first pluggable module. The first and second connectors are right angle connectors, and the second right angle connector is inverted relative to the first right angle connector. The first and second pluggable modules are I/O modules for transporting high speed differential signals, and wherein the first pluggable module includes several XFP connectors, and wherein the second pluggable module includes several SFP connectors. The second pluggable module includes several SFP connectors arranged on both sides of the pluggable module.
    Type: Grant
    Filed: April 26, 2005
    Date of Patent: November 6, 2007
    Assignee: EMC Corporation
    Inventors: Steven D. Sardella, Stephen E. Strickland, Bassem N. Bishay, Thomas J. Connor, Jr.
  • Patent number: 7284321
    Abstract: A method for testing a chip with a package having connecting pins and mounting the package on a board combines the advantages of a package with inline connecting pins with that of a package with offset connecting pins. The package with inline connecting is inserted into a socket for testing. Before mounting on the board, at least one connecting pin, preferably every second connecting pin, of the package is bent inward by a bending tool to achieve an offset arrangement of the connecting pins. The package is preferably mounted on the board using the bending tool. Since every second connecting pin is not bent inward immediately before insertion of the connecting pins, no subsequent corrective alignment of the offset connecting pins is required.
    Type: Grant
    Filed: May 17, 2005
    Date of Patent: October 23, 2007
    Assignee: Micronas GmbH
    Inventors: Wolfgang Hauser, Heiko Dreher, Christian Kimstedt, Markus Rogalla
  • Patent number: 7282824
    Abstract: In a rectifying device for a vehicular AC generator, a rectifying element is press-fitted in a positive-side radiation plate. The radiation plate is prepared in a predetermined shape and an engaging hole is punched in the radiation plate. Four grooves are formed in an inner periphery of the radiation plate created by the hole. The rectifying element is press-fitted in the hole while an excess produced between the rectifying element and the inner periphery of the radiation plate is released into the grooves.
    Type: Grant
    Filed: December 12, 2003
    Date of Patent: October 16, 2007
    Assignee: Denso Corporation
    Inventor: Tatsumi Fujioka
  • Patent number: 7263770
    Abstract: Provided is an electrical connector having first and second surfaces and configured to establish electrical communication between two or more electrical devices. The electrical connector includes an insulative housing and a resilient, conductive contact retained in an aperture disposed from the first surface to the second surface. To contact the electrical devices, the contact includes a center portion from which extends two diverging, cantilevered spring arms that project beyond either surface of the electrical connector. To shorten the path that current must travel through the contact, one spring arm terminates in a bellows leg that extends proximate to the second spring arm. When placed between the electrical devices, the spring arms are deflected together causing the bellows leg to press against the second spring arm. For retaining the contact within the aperture, the contact also includes retention members extending from the center portion that engage the insulative housing.
    Type: Grant
    Filed: January 4, 2005
    Date of Patent: September 4, 2007
    Assignee: Cinch Connectors, Inc.
    Inventors: David W. Mendenhall, Hecham K. Elkhatib, Richard Miklinski, Jr.