Forming Array Of Contacts Or Terminals Patents (Class 29/884)
  • Patent number: 7165324
    Abstract: Disclosed is a method for manufacturing a composite high voltage insulator in which a plurality of skirts are manufactured and joined to a rod, and more particularly to a method for manufacturing a composite high voltage insulator in which an expanding pipe is inserted into a plurality of skirts arranged in a line by a skirt holder to expand the inner diameters of the skirts, so that the skirts are mounted on precise positions of the rod, and an adhesive agent is easily applied, so that an interface between different materials is not formed in order to improve reliability of insulator products.
    Type: Grant
    Filed: November 30, 2005
    Date of Patent: January 23, 2007
    Assignee: LG Cable Ltd.
    Inventors: Bok Hee Youn, Kyung Moo Bai
  • Patent number: 7162796
    Abstract: A method of making an interposer having an array of contact structures for making temporary electrical contact with the leads of a chip package. The contact structures may make contact with the leads substantially as close as desired to the body of the chip package. Moreover, the contact structures can be adapted for making contact with leads having a very fine pitch. In a first embodiment, the contact structures include raised members formed over a body of the interposer. A conductive layer is formed over each of the raised members to provide a contact surface for engaging the leads of the chip package. In another embodiment, the raised members are replaced with depressions formed into the interposer. A conductive layer is formed on an inside surface of each depression to provide a contact surface for engaging the leads of the chip package. Moreover, any combination of raised members and depressions may be used.
    Type: Grant
    Filed: October 1, 2004
    Date of Patent: January 16, 2007
    Assignee: Micron Technology, Inc.
    Inventors: James M. Wark, Salman Akram
  • Patent number: 7159311
    Abstract: A method of making an interposer having an array of contact structures for making temporary electrical contact with the leads of a chip package. The contact structures may make contact with the leads substantially as close as desired to the body of the chip package. Moreover, the contact structures can be adapted for making contact with leads having a very fine pitch. In a first embodiment, the contact structures include raised members formed over a body of the interposer. A conductive layer is formed over each of the raised members to provide a contact surface for engaging the leads of the chip package. In another embodiment, the raised members are replaced with depressions formed into the interposer. A conductive layer is formed on an inside surface of each depression to provide a contact surface for engaging the leads of the chip package. Moreover, any combination of raised members and depressions may be used.
    Type: Grant
    Filed: February 13, 2003
    Date of Patent: January 9, 2007
    Assignee: Micron Technology, Inc.
    Inventors: James M. Wark, Salman Akram
  • Patent number: 7140105
    Abstract: A method of fabricating a notched electrical test probe tip preferably includes the first step of providing an elongate electrically conductive blank having a longitudinal planar axis, a first end, and a second end opposite the first end. Preferably, the next step is drilling a central bore substantially parallel to the longitudinal planar axis, the central bore extending at least partially from the first end to the second end. Then, preferably, at least one portion of the blank is removed from the longitudinal planar axis at the first end to an exterior surface of the blank between the first end and the second end to expose a contact surface. In one preferred embodiment, the method may include a step of coating the exterior surface of the blank with insulation.
    Type: Grant
    Filed: October 22, 2004
    Date of Patent: November 28, 2006
    Assignee: LeCroy Corporation
    Inventor: Julie A. Campbell
  • Patent number: 7137196
    Abstract: An interface to make interconnections between the interior and exterior of a sealed enclosure may include a flat connector (FC). The FC may comprise at least one layer of a substantially planar substrate. Each substrate layer may include metallization for conducting signals between contacts on an interior-facing surface and contacts on an exterior-facing surface. In an enclosure with an aperture for passing electrical conductors, the FC may be configured to seal the aperture to inhibit the escape of a low density gas, such as helium, for a long period of time. In one embodiment, the FC may include metallization configured to minimize helium leakage. As such, the FC may conduct electrical signals into and out of the sealed enclosure. Such signals may include, for example, power, control, and data signals for operating devices housed within the enclosure.
    Type: Grant
    Filed: July 2, 2004
    Date of Patent: November 21, 2006
    Assignee: Seagate Technology LLC
    Inventors: Neal F. Gunderson, Frank W. Bernett, Andrew R. Motzko
  • Patent number: 7131192
    Abstract: This invention is a method of manufacturing printed circuit boards using a contact block packaging to provide and support electrical contact blocks relative to a printed circuit board panel. The contact block packaging is situated adjacent to the printed circuit board panel, so that electrical contact blocks of the contact block packaging are aligned with circuit boards of the printed circuit board panel, but breakaway stems supporting the electrical contact blocks are offset from webbing of the printed circuit board panel. The electrical contact blocks are then soldered to the printed circuit boards. Thereafter, the breakaway stems of the contact block packaging and the webs of the printed circuit board panel are broken, so that the electronic contact blocks are decoupled from the rest of the contact block packaging and the printed circuit boards are decoupled from the rest of the printed circuit board panel.
    Type: Grant
    Filed: June 5, 2004
    Date of Patent: November 7, 2006
    Assignee: Motorola, Inc.
    Inventor: Robert Stanford
  • Patent number: 7127811
    Abstract: A method of fabricating and using an interconnection element that includes a first element material adapted to be coupled to a substrate and a second element material comprising a material having a transformable property such that upon transformation, a shape of the interconnection is deformed. An example is a material that has a transformable property such that a volume of the first and/or second element material may undergo a thermal transformation from one volume to a different volume (such as a smaller volume) resulting in the deformation of the interconnection element.
    Type: Grant
    Filed: August 29, 2003
    Date of Patent: October 31, 2006
    Assignee: FormFactor, Inc.
    Inventors: Gaetan L. Mathieu, Benjamin N. Eldridge, Stuart W. Wenzel
  • Patent number: 7124506
    Abstract: A process for assembling a connector is provided, by which the production efficiency can be improved by preventing the problem of insertion error from occurring in a step of terminal insertion into a connector housing in the manufacturing process of the wiring harness by using an automatic assembly machine or in a step of the operation by the human hands. The process includes the steps of: provisionally locking the spacer in the connector housing; inserting ajig rod into the connector housing before inserting the terminal into the connector housing, the jig rod being for releasing the locking of the spacer which is completely locked in the connector housing; pulling the jig rod out from the connector housing; and inserting the terminal into the connector housing.
    Type: Grant
    Filed: May 8, 2002
    Date of Patent: October 24, 2006
    Assignee: Yazaki Corporation
    Inventors: Makoto Yamanashi, Shogo Suzuki
  • Patent number: 7120999
    Abstract: A substrate assembly is disclosed including a substrate and a plurality of spring-biased electrical contacts formed thereon for establishing electrical contact with the lead elements of an IC device. The substrate assembly also comprises a layer of resilient conductive material formed on a surface of the substrate, the spring-biased electrical contacts being formed in the resilient conductive material layer in situ on the substrate. Each spring-biased electrical contact includes a surface or surfaces configured to bias against and electrically contact an IC device lead element. The present invention also encompasses methods of fabricating substrate assemblies according to the invention, including heat treating the substrate assembly after formation to achieve desired spring characteristics.
    Type: Grant
    Filed: September 23, 2003
    Date of Patent: October 17, 2006
    Assignee: Micron Technology, Inc.
    Inventor: Robert L. Canella
  • Patent number: 7117592
    Abstract: There are provided a connector capable of accomplishing electrical stability between contact members constituting the connector and a base, reduction in manufacturing cost, and simplicity in assembly and a method of manufacturing the connector. A base 11 comprises a plurality of bump portions 22 extending from the bonding surface, which contact members are bonded to, toward the opposite surface, and an insulating layer interposed between the bump portions 22. The contact members 23 are bonded to the bump portions 22. Accordingly, since the contact members 23 can be surface-mounted on the base 11, it is possible to enhance the electrical stability between the contact members 23 and the base 11.
    Type: Grant
    Filed: November 15, 2004
    Date of Patent: October 10, 2006
    Assignee: Alps Electric Co., Ltd.
    Inventor: Shin Yoshida
  • Patent number: 7117593
    Abstract: An electrical connector and a method for producing the same are described. The electrical connector has an insulative housing and a plurality of metallic wires. The insulative housing has a plurality of slots formed therein, and the slots are defined with a width less than that of the metallic wire. The metallic wires are set into the slots and further are folded. Each of the metallic wires has a contact portion protruding out of a surface of the insulative housing for electrically connecting the electrical component.
    Type: Grant
    Filed: February 8, 2005
    Date of Patent: October 10, 2006
    Inventor: Ted Ju
  • Patent number: 7114247
    Abstract: A method of making an electrical connector comprises the steps of: forming an electrically conductive member having a body including an interface, the body having a longitudinal chamber therein; forming an electrically conductive pin; overmolding the interface with a first electrically insulating material; overmolding at least a part of the electrically conductive pin with a second electrically insulating material to form an overmolded electrically conductive pin; and inserting the overmolded electrically conductive pin into the longitudinal chamber.
    Type: Grant
    Filed: October 27, 2004
    Date of Patent: October 3, 2006
    Assignee: OSRAM Sylvania Inc.
    Inventors: Michael J. Swantner, Douglas G. Seymour, Shane Brown
  • Patent number: 7114253
    Abstract: A male terminal fitting and a method of manufacturing the same is disclosed as including a plate-shaped contact protrusion (11, 31, 41, 51) formed at one side for mating with a female terminal fitting, and a conductor clamping portion (12, 32, 42, 52) located at the other side for clamping a conductor of an electric wire. The plate-shaped contact protrusion includes a base plate component (14, 34, 44, 54) extending from the conductor clamping portion in a longitudinally elongated shape, and an overlapping fold plate component (15, 35, 36, 45, 46, 55) laterally extending from a side of the base plate component. The plate-shaped contact protrusion further includes a flatness securing plate component (16, 35, 44, 56) laterally extending from the base plate component and overlaps with the overlapping fold plate component to ensure flatness conditions of the base plate component and the overlapping fold plate component.
    Type: Grant
    Filed: April 20, 2004
    Date of Patent: October 3, 2006
    Assignee: Yazaki Corporation
    Inventors: Takao Murakami, Chieko Torii, Isao Nishimura
  • Patent number: 7096578
    Abstract: A method is provided for manufacturing a multi-layer wiring circuit substrate. A first metal layer is selectively etched in first areas to reduce a thickness of the metal layer in the first areas and to form protrusions in other areas which extend above the etched areas. An interlayer-insulating layer is formed to overlie the etched areas of the first metal layer. The interlayer-insulating layer has an inner surface which confronts the etched first areas and an outer surface remote from the inner surface, such that the protrusions extend through the interlayer-insulating layer and have ends exposed at the outer surface. A second metal layer is then provided in conductive communication with the exposed ends of the protrusions, and the first and second metal layers are selectively patterned from surfaces remote from the interlayer-insulating layer.
    Type: Grant
    Filed: April 14, 2004
    Date of Patent: August 29, 2006
    Assignee: Tessera Interconnect Materials, Inc.
    Inventors: Tomoo Iijima, Masayuki Ohsawa
  • Patent number: 7096582
    Abstract: The object is to provide a method of manufacturing a sliding contact which has a high yield of manufacturing sliding contacts and can positively make smooth the tip portion surface of a finger of a brush of a sliding contact. According to the invention, in a method of manufacturing a sliding contact having a metal brush, the tip portion of a finger 12a? of a sliding contact piece 10? is melted and thereafter the tip portion is solidified in a gas, whereby the surface of the tip portion is made smooth. For example, when a sliding contact is manufactured by blanking a metal sheet material, the tip portion of the finger 12a? of the brush 12? of the sliding contact piece 10? which is obtained by blanking is irradiated with a laser beam, whereby the tip portion is heated and melted. Then, a sharp portion and a burr which exist before melting disappear.
    Type: Grant
    Filed: February 7, 2003
    Date of Patent: August 29, 2006
    Assignee: Tanaka Kikizoku Kogyo K.K.
    Inventors: Mitsuyoshi Sayama, Kenitiro Tani, Hirohito Suzuki
  • Patent number: 7093358
    Abstract: An interposer including a fence that receives and aligns a semiconductor device, such as a flip-chip type semiconductor device, with an interposer substrate. The fence may include edges that are configured to progressively align a semiconductor device with the interposer substrate. The fence may also include one or more laterally recessed regions to facilitate rough alignment of a semiconductor device with the interposer substrate. Methods for fabricating the fence include the use of stereolithographic and molding processes. When stereolithography is used to fabricate the fence, a machine vision system that includes at least one camera operably associated with a computer may be used to control a stereolithography apparatus and facilitates recognition of the position and orientation of interposer substrates on and around which material is to be applied in one or more layers to form the fence. As a result, the interposer substrates need not be precisely mechanically aligned.
    Type: Grant
    Filed: August 26, 2003
    Date of Patent: August 22, 2006
    Assignee: Micron Technology, Inc.
    Inventors: Salman Akram, Alan G. Wood, Warren M. Farnworth
  • Patent number: 7080450
    Abstract: A machine for terminating wire assemblies comprising: a means for holding a wire assembly; a linear movement means for moving said means for holding between a first area and a second area; an insertion head; and, a means for dislodging; wherein, after a wire assembly is loaded into the means for holding a wire assembly, the means for holding a wire assembly is moved by the linear moving means from the first area to the second area for assembly termination by the insertion head; and, following termination, the assembly is at least partially unseated from the means for holding a wire assembly by the means for dislodging.
    Type: Grant
    Filed: March 14, 2003
    Date of Patent: July 25, 2006
    Assignee: Tyco Electronics Corporation
    Inventors: Neil Edward Deming, Larry Eugene Cox, Jr.
  • Patent number: 7065871
    Abstract: A printed circuit board electrical power contact for connecting a daughter printed circuit board to a mating contact on another electrical component. The power contact includes a main section; at least one daughter board electrical contact section extending from the main section; and at least one mating connector contact section extending from the main section. The mating connector contact section includes at least three forward projecting beams. A first one of the beams extends outward in a first direction as the first beam extends forward from the main section and has a contact surface facing the first direction. Two second ones of the beams are located on opposite sides of the first beam and extend outward in a second opposite direction as the second beams extend forward from the main section. The second beams have contact surfaces facing the second direction.
    Type: Grant
    Filed: October 17, 2004
    Date of Patent: June 27, 2006
    Assignee: FCI Americas Technology, Inc.
    Inventors: Steven E. Minich, Christopher J. Kolivoski
  • Patent number: 7065868
    Abstract: A method is provided for installing circuit components, such as memory devices, in a support, such as a socket. The device to be installed is supported in a holder or shell. The holder is positioned over a support region in the receiving socket. A manual actuator is pressed into the holder to eject the device from the holder and to install the device in the support. The holder may be configured to hold a single device, or multiple devices aligned in slots defined by partitions. A multi-device tray may be provided for indexing devices toward an ejection slot, through which the devices are installed by manual actuation of an ejecting actuator. The technique provides protection for the device prior to and during installation, and facilitates manual installation of such devices without requiring direct hand contact with the device either prior to or during installation.
    Type: Grant
    Filed: December 29, 2003
    Date of Patent: June 27, 2006
    Assignee: Micron Technology, Inc.
    Inventors: Larry Kinsman, Mike Brooks, Warren M. Farnworth, Walter Moden, Terry Lee
  • Patent number: 7047638
    Abstract: A method of making a microelectronic spring contact array comprises forming a plurality of spring contacts on a sacrificial substrate and then releasing the spring contacts from the sacrificial substrate. Each of the spring contacts has an elongated beam having a base end. The method of making the array includes attaching the spring contacts at their base ends to a base substrate after they have been released entirely from the sacrificial substrate, so that each contact extends from the base substrate to a distal end of its beams. The distal ends are aligned with a predetermined array of tip positions. In an embodiment of the invention, the spring contacts are formed by patterning contours of the spring contacts in a sacrificial layer on the sacrificial substrate. The walls of patterned recesses in the sacrificial layer define side profiles of the spring contacts, and a conductive material is deposited in the recesses to form the elongated beams of the spring contacts.
    Type: Grant
    Filed: July 24, 2002
    Date of Patent: May 23, 2006
    Assignee: FormFactor, Inc
    Inventors: Benjamin N. Eldridge, Gaetan L. Mathieu, Carl V. Reynolds
  • Patent number: 7045389
    Abstract: A semiconductor device (1) comprising electrodes formed on a semiconductor chip (2) and bumps (3) which consist of a low melting point metal ball spherically formed and having a given size and which are adhesive bonded to the electrodes (5). The electrodes (5) are formed from an electrode material of Cu or a Cu alloy, Al or an Al alloy, or Au or a Au alloy. When the electrode material is composed of Al or an Al alloy, the electrodes contain, on the electrode material layer of Al or an Al alloy, at least one layer (6) composed of a metal or metal alloy (preferably a metal selected form Ti, W, Ni, Cr, Au, Pd, Cu, Pt, Ag, Sn or Pb, or an alloy of these metals) having a melting point higher than the electrode material. The low melting point metal balls (3) are adhesive bonded to the electrodes (5) preferably with a flux. The low melting point metal balls (3) adhesive bonded to the respective electrodes (3) may also be reflowed to form semispherical bumps (10) before use.
    Type: Grant
    Filed: August 4, 2000
    Date of Patent: May 16, 2006
    Assignee: Nippon Steel Corporation
    Inventors: Kohei Tatsumi, Kenji Shimokawa, Eiji Hashino
  • Patent number: 7043833
    Abstract: A method of manufacturing an angled conductor electrical connector including extruding a metal member having a channel therein; and bending the metal member such that the channel forms two angled conductor receiving areas. Each conductor receiving area has a channel axis angled relative to each other.
    Type: Grant
    Filed: July 24, 2003
    Date of Patent: May 16, 2006
    Assignee: FCI Americas Technology, Inc.
    Inventor: Gary W. DiTroia
  • Patent number: 7043834
    Abstract: In a half-fitting prevention connector (31) of the invention, a fitting detection member (60) is moved to a proper-fitting detecting position in a female connector (40) before connection terminals are automatically inserted by an automatic terminal inserting machine. As a result of this movement, a rear end of the fitting detection member (60) substantially coincides with a rear end surface of the housing of the female connector (40), so that the connection terminals can be automatically inserted into terminal accommodating chambers (40a) by the automatic terminal inserting machine.
    Type: Grant
    Filed: May 14, 2002
    Date of Patent: May 16, 2006
    Assignee: Yazaki Corporation
    Inventors: Tomomi Endo, Naoto Taguchi
  • Patent number: 7045388
    Abstract: A semiconductor device (1) comprising electrodes formed on a semiconductor chip (2) and bumps (3) which consist of a low melting point metal ball spherically formed and having a given size and which are adhesive bonded to the electrodes (5). The electrodes (5) are formed from an electrode material of Cu or a Cu alloy, Al or an Al alloy, or Au or a Au alloy. When the electrode material is composed of Al or an Al alloy, the electrodes contain, on the electrode material layer of Al or an Al alloy, at least one layer (6) composed of a metal or metal alloy (preferably a metal selected form Ti, W, Ni, Cr, Au, Pd, Cu, Pt, Ag, Sn or Pb, or an alloy of these metals) having a melting point higher than the electrode material. The low melting point metal balls (3) are adhesive bonded to the electrodes (5) preferably with a flux. The low melting point metal balls (3) adhesive bonded to the respective electrodes (3) may also be reflowed to form semispherical bumps (10) before use.
    Type: Grant
    Filed: August 27, 1997
    Date of Patent: May 16, 2006
    Assignee: Nippon Steel Corporation
    Inventors: Kohei Tatsumi, Kenji Shimokawa, Eiji Hashino
  • Patent number: 7032310
    Abstract: A method of installing a socket with a socket contact on an underwater plug with a plug contact is provided so as to establish conductive contact between the socket contact and the plug contact. The socket is disconnectably attached to a recoverable fluid exchange unit and the socket engages with the plug to establish the conductive contact between the socket contact and plug contact. The recoverable fluid exchange unit is then operated to substantially replace a first fluid within the socket with a second fluid from the recoverable fluid exchange unit.
    Type: Grant
    Filed: July 28, 2000
    Date of Patent: April 25, 2006
    Assignee: Alpha Thames Ltd.
    Inventors: David Eric Appleford, Brian William Lane, Benjamin McGeever
  • Patent number: 7017259
    Abstract: A housing-remover tool for a press-fit connector. The tool including shoulder part pressers for pressing the shoulder parts of pin-shaped terminals, each shoulder part presser having a hollow part for receiving a pin part of the pin-shaped terminal and a cut-away part at a leading end for engaging with the shoulder part; a first sub-assembly for insertion inside a housing of the connector and provided with through-holes for receiving the shoulder part pressers; and a second sub-assembly having a pair of engagement members having engaging protrusions which can engage with stepped parts of the housing and a lifting portion for lifting the engagement members along the side surfaces of the first sub-assembly.
    Type: Grant
    Filed: December 18, 2003
    Date of Patent: March 28, 2006
    Assignee: Fujitsu Limited
    Inventor: Fumio Aoki
  • Patent number: 7010858
    Abstract: A shielded socket includes a conducting plate including a plurality of apertures, and an insulating layer. The insulating layer surrounds the conducting plate and lines at least one aperture. In an implementation, the conducting plate includes at least one grounding site.
    Type: Grant
    Filed: August 2, 2002
    Date of Patent: March 14, 2006
    Assignee: Intel Corporation
    Inventors: Leonard O. Turner, Tony Hamilton
  • Patent number: 7007375
    Abstract: A semiconductor component includes adjustment circuitry configured to adjust selected physical and electrical characteristics of the component or elements thereof, and an input/output configuration of the component. The component includes a semiconductor die, a substrate attached to the die, and terminal contacts on the substrate. The adjustment circuitry includes conductors and programmable links, such as fuses or anti-fuses, in electrical communication with the die and the terminal contacts. The adjustment circuit can also include capacitors and inductance conductors. The programmable links can be placed in a selected state (e.g., short or open) using a laser or programming signals. A method for fabricating the component includes the steps of forming the adjustment circuitry, and then placing the programmable links in the selected state to achieve the selected adjustment.
    Type: Grant
    Filed: March 31, 2003
    Date of Patent: March 7, 2006
    Assignee: Micron Technology, Inc.
    Inventors: Aaron M. Schoenfeld, David J. Corisis, Tyler J. Gomm
  • Patent number: 7000317
    Abstract: The present invention is a method for manufacturing an electrical connector comprising an insulative housing with a base side and an opposed side and lateral sides interposed between said base side and said opposed side and at least one conductive contact extending from the base side of the insulation in a first leg and then laterally adjacent the top side of the housing in a second leg. In this method there is provided a mold comprising a first die and an opposed second die all defining an interior cavity and an exterior area. A molding compound input port extends between the exterior area and the interior cavity and a contact receiving aperture extending through the first die from the exterior area to the interior cavity. The conductive contact is then positioned so that the first leg extends upwardly from the exterior area through the contact receiving aperture into the interior cavity. The first leg extends through said interior cavity, and the second leg extends laterally adjacent the opposed die.
    Type: Grant
    Filed: August 29, 2000
    Date of Patent: February 21, 2006
    Assignee: FCI Americas Technology, Inc.
    Inventor: Conway Francis Spykerman
  • Patent number: 7002225
    Abstract: An apparatus in one example includes a compliant component for supporting an electrical interface component that serves to electrically and mechanically couple a die with a separate layer. In one example, the compliant component, upon relative movement between the die and the separate layer, serves to promote a decrease in stress in one or more of the die and the separate layer. The apparatus in another example includes a compliant component for supporting an electrical interface component that serves to create an electrical connection between a die and a separate layer. The compliant component, upon relative movement between the die and the separate layer, serves to promote maintenance of the electrical connection.
    Type: Grant
    Filed: May 24, 2002
    Date of Patent: February 21, 2006
    Assignee: Northrup Grumman Corporation
    Inventor: Robert E. Stewart
  • Patent number: 6988310
    Abstract: A method of assembling an interconnect device assembly which consists of cylindrical resilient wire bundles captured within a carrier. In a step of the method, the interconnect device assembly is placed in a fixture and the ends of the resilient wire bundles are deformed by shaping dies in the fixture so that the resilient wire bundles now have a dog bone shape. The dog bone shape of the resilient wire bundles prevents the resilient wire bundles from being partially or totally dislodged during handling and transit.
    Type: Grant
    Filed: June 28, 2002
    Date of Patent: January 24, 2006
    Assignee: International Business Machines Corporation
    Inventors: Gerald G. Advocate, Jr., Norman D. Curry, Francis Krug, David C. Long, Daniel O'Connor, Charles Hampton Perry, Robert Weiss
  • Patent number: 6981319
    Abstract: Devices capable of protecting electronic components during the occurrence of a disturbance event using printed circuit board manufacturing techniques. A three (3) layer structure is formed comprising a polymer-based formulation sandwiched between two electrode layers. The devices can be manufactured in panel form providing high quantities of devices which can be removed from the panel and applied directly to the component to be protected. Desired patterns can be formed on either one of the electrode layers by photo-etch techniques thereby providing a process that can be tailored to a large number of applications.
    Type: Grant
    Filed: February 13, 2003
    Date of Patent: January 3, 2006
    Inventor: Karen P. Shrier
  • Patent number: 6973722
    Abstract: Spring structures are subjected to pre-release and post-release annealing to tune their tip height to match a specified target. Post-release annealing increases tip height, and pre-release annealing decreases tip height. The amount of tuning is related to the annealing temperature and/or time. Annealing schedules are determined for a pre-fabricated cache of unreleased spring structures such that finished spring structures having a variety of target heights can be economically produced by releasing/annealing the cache according to associated annealing schedules. Selective annealing is performed using lasers and heat absorbing/reflecting materials. Localized annealing is used to generate various spring structure shapes. Both stress-engineered and strain-engineered spring structures are tuned by annealing.
    Type: Grant
    Filed: November 17, 2003
    Date of Patent: December 13, 2005
    Assignee: Palo Alto Research Center Incorporated
    Inventors: Thomas Hantschel, David K. Fork, Dirk De Bruyker, Chinnwen Shih, Jeng Ping Lu, Christopher L. Chua, Raj B. Apte, Brent S. Krusor
  • Patent number: 6968614
    Abstract: A method for positioning an electronic module having a plurality of interconnecting elements into a template. A first portion of the interconnecting elements are aligned with holes in the template and then the first portion of the interconnecting elements are partially inserted into the holes of the template. A second portion of the interconnecting elements are not inserted into the template at this time. Then, the second portion of the interconnecting elements are aligned with holes in the template and then inserted into the holes in the template. Lastly, the electronic module and template are urged together until the first and second portions of the interconnecting elements are fully inserted into the holes in the template. The interconnecting elements may then be tested.
    Type: Grant
    Filed: March 26, 2002
    Date of Patent: November 29, 2005
    Assignee: International Business Machines Corporation
    Inventors: Yori Lacroix, Robert Langlois
  • Patent number: 6964095
    Abstract: A method of manufacturing an electrical contact with a crimp ear from a flat ribbon of conductive material including applying a force to the ribbon to form an adjacent pair of approximately semicylindrical depressions on opposite sides of the centerline of the ear, shearing the ribbon at the depression bisectors to form a pair of legs on opposites of the centerline, and forming the legs into a predetermined shape about the centerline. Forming the legs includes straightening the legs and bending the legs to the appropriate predetermine relative angle. Optionally, the ear is coined. Optionally, serrations are inscribed across the ear.
    Type: Grant
    Filed: September 3, 2003
    Date of Patent: November 15, 2005
    Assignee: Etco, Inc.
    Inventor: Ralph Jacques
  • Patent number: 6948235
    Abstract: In one embodiment, an apparatus for facilitating installation of a shroud on a pin grid comprises a first alignment structure including a first plurality of longitudinal elements adapted to be inserted within each gap of the pin grid along a first direction and a first handle extending in a perpendicular manner to the plurality of longitudinal elements, and a second alignment structure including a second plurality of longitudinal elements adapted to be inserted within each gap of the pin grid along a second direction and a second handle extending in a perpendicular manner to the second plurality of longitudinal elements, wherein when the first alignment structure and the second alignment structures are inserted within the pin grid, the first and second handles form at least a partial frame structure to receive the shroud in a position to receive pins of the pin grid.
    Type: Grant
    Filed: April 22, 2004
    Date of Patent: September 27, 2005
    Assignee: Hewlett-Packard Development Company, L.P.
    Inventors: Brandon A. Rubenstein, Bradley E. Clements
  • Patent number: 6946325
    Abstract: Methods for packaging microelectronic devices and microelectronic devices formed by such methods are disclosed herein. In one embodiment, a method includes coupling a plurality of microelectronic dies to a support member, covering the dies and at least a portion of the support member with a dielectric layer, forming a plurality of vias through the dielectric layer between the dies, and fabricating a plurality of conductive links in corresponding vias. In another embodiment, a plurality of microelectronic devices includes a support member, a plurality of microelectronic dies coupled to the support member, a dielectric layer over the dies and at least a portion of the support member, and a plurality of conductive links extending from a first surface of the dielectric layer to a second surface. The dies include an integrated circuit and a plurality of bond-pads coupled to the integrated circuit, and the conductive links are disposed between the dies.
    Type: Grant
    Filed: August 28, 2003
    Date of Patent: September 20, 2005
    Assignee: Micron Technology, Inc.
    Inventors: Tay Wuu Yean, Victor Tan Cher Khng
  • Patent number: 6922889
    Abstract: A shifting device for shifting two rows of continuous terminals includes a body and a shaft. The body is formed with a hole and an inlet and an outlet both communicating with the hole. A direction into the inlet and a direction out of the outlet are the same. The inlet is shifted a predetermined distance away from the outlet. The shaft is fitted with the hole of the body and defines a spiral channel with the body after fitting with the hole of the body. The spiral channel corresponds to the inlet and the outlet of the body According to the structure, one row of the continuous terminals enters the body from the inlet and travels along the spiral channel and travels out of the body from the outlet with a predetermined distance shifted away from the other row of the continuous terminals.
    Type: Grant
    Filed: December 20, 2001
    Date of Patent: August 2, 2005
    Inventor: Chou Hsuan Tsai
  • Patent number: 6913952
    Abstract: The invention encompasses methods of preparing interposers for utilization in semiconductor packages. The invention includes a method in which an interposer substrate having a surface and a conductive layer extending over the surface is provided. Pads are formed on the conductive layer by plating a conductive material on the conductive layer while using the conductive layer as an electrical connection to a power source and without utilizing conductive busses, other than the conductive layer. Subsequent to the formation of the pads, the conductive layer is patterned into circuit traces. Methodology of the present invention can be utilized for, for example, forming board-on-chip constructions.
    Type: Grant
    Filed: July 3, 2003
    Date of Patent: July 5, 2005
    Assignee: Micron Technology, Inc.
    Inventors: Stephen F. Moxham, Lee Teck Kheng, Steve Thummel
  • Patent number: 6907659
    Abstract: A method for manufacturing and packaging an integrated circuit includes following steps: pressure a continuous pin material and a base board area at first; then cut off pin material into several pin units, accommodate each pin units into respective position in a mould, and ejecting plastic into the mould gap to shape a pin unit, then remove waste part of the pin material after removing down the mould parts; put four pin units and a base board into a rectangle mould, then eject plastic again into mould gap, after that cut off waste part of the base board to attain an IC socket; stick an IC chip on top of the base board of the IC socket and wire it. Finally, cover and stick a panel on the IC socket to finish the whole IC packaging procedures.
    Type: Grant
    Filed: February 5, 2003
    Date of Patent: June 21, 2005
    Assignee: Advanced Connection Technology Inc.
    Inventor: Ching-Shun Wang
  • Patent number: 6892452
    Abstract: A Dry-Film resist formed of, for example, a photosensitive film is stacked on the electroconductive material and these portions, other than a projection electrode formation area, formed on a wiring board's electrode serving as a portion of a circuit pattern are masked with a mask. After this, the wiring board is exposed to light and, after the removal of the mask, a development process is performed, thus eliminating the Dry-Film resist on the wiring board at the portion other than the projection electrode formation area. Then the electroconductive material of the wiring board is etched under an etching process to provide a projection electrode having a bump with a pointed tapering end in vertical cross-section. Finally, the wiring board is exposed to a Dry-Film resist elimination solution to remove remaining Dry-Film resist from the projection electrode. And a plating process is performed on the electroconductive material to form a plated layer and hence complete the projection electrode.
    Type: Grant
    Filed: April 26, 2001
    Date of Patent: May 17, 2005
    Assignee: DDK Ltd.
    Inventors: Yasuo Fukuda, Masakatsu Nagata, Shoji Iwasaki, Osamu Nakao
  • Patent number: 6883229
    Abstract: An assembly is provided for loading a contact shield and a strain relief onto a dielectric member on an end of a cable having a center conductor surrounded by insulation. The assembly includes a strip guide for conveying a contact shield along a carrier path to a loading station. The contact shield is joined to a carrier strip. A holder is provided at the loading station to hold the dielectric member on the end of the cable. A slider moves the holder to and from the loading station along a cable loading path. A shear assembly is also provided at the seating station to remove the contact shield and strain relief from the carrier strip and seat the contact shield and strain relief along a seating path with the dielectric member. Optionally, the shearing assembly may include first and second shears for separately removing a strain relief and the contact shield, respectively, from the carrier strip.
    Type: Grant
    Filed: March 27, 2003
    Date of Patent: April 26, 2005
    Assignee: Tyco Electronics Corporation
    Inventor: Leo Vincent Schuppert, Jr.
  • Patent number: 6880245
    Abstract: Probes for electronic devices are described. The probe is formed by ball bonding a plurality of wires to contact locations on a fan out substrate surface. The wires are cut off leaving stubs. A patterned polymer sheet having electrical conductor patterns therein is disposed over the stubs which extend through holes in the sheet. The ends of the wires are flattened to remit the polymer sheet in place. The wire is connected to an electrical conductor on the polymer sheet which is converted to a contact pad on the polymer sheet. A second wire is ball bonded to the pad on the polymer sheet and cut to leave a second stub. The polymer sheet is laser cut so that each second stub is free to move independently of the other second studs. The ends of the second stubs are disposed against contact locations of an electronic device, such as an FC chip, to test the electronic device.
    Type: Grant
    Filed: December 19, 2003
    Date of Patent: April 19, 2005
    Assignee: International Business Machines Corporation
    Inventors: Brian Samuel Beaman, Keith Edward Fogel, Paul Alfred Lauro, Maurice Heathcote Norcott, Da-Yuan Shih
  • Patent number: 6877223
    Abstract: A method for fabricating a socket (300, FIG. 3) includes fabricating a conductive structure (310, FIG. 3) and embedding the conductive structure in a housing (302). The housing includes multiple openings (304) formed in the top surface. Each opening (304) provides access to conductive contacts (502, FIG. 5), which provide an electrical interface between a device that is inserted into the socket and the next level of interconnect (e.g., a PC board). In one embodiment, the embedded conductive structure (310) is electrically connected to one or more ground conducting contacts (708, FIG. 7B). The conductive structure includes column walls (312), which run in parallel with columns of contacts, and row walls (314), which run in parallel with rows of contacts and which intersect the column walls. In this manner, the conductive structure forms multiple chambers (402, FIG. 4).
    Type: Grant
    Filed: June 20, 2002
    Date of Patent: April 12, 2005
    Assignee: Intel Corporation
    Inventors: David G. Figueroa, Chee-Yee Chung, Kristopher Frutschy, Farzaneh Yahyaei-Moayyed
  • Patent number: 6866368
    Abstract: A process of forming a flexible circuit board for ink jetting is provided. The process includes the steps of: providing an insulation tape; forming conductive traces on the insulation tape; and forming a photo-polymer layer filling between the conductive traces, wherein parts of the conductive traces are exposed to form a plurality of contacts. The material of the insulation tape can be polyimide, Teflon, polyamide, polymethylmethacrylate, polycarbonate, polyester, polyamide polyethylene-terephthalate copolymer, or any combination of the above materials. The material of the photo-polymer layer can be solder mask or polyimide.
    Type: Grant
    Filed: March 28, 2003
    Date of Patent: March 15, 2005
    Assignee: Benq Corporation
    Inventors: Yi-Jing Leu, Chih-Ching Chen, Ming-Chung Peng
  • Patent number: 6847114
    Abstract: A micro-scale interconnect device with internal heat spreader and method for fabricating same. The device includes first and second arrays of generally coplanar electrical communication lines. The first array is disposed generally along a first plane, and the second array is disposed generally along a second plane spaced from the first plane. The arrays are electrically isolated from each other. Embedded within the interconnect device is a heat spreader element. The heat spreader element comprises a dielectric material disposed in thermal contact with at least one of the arrays, and a layer of thermally conductive material embedded in the dielectric material. The device is fabricated by forming layers of electrically conductive, dielectric, and thermally conductive materials on a substrate. The layers are arranged to enable heat energy given off by current-carrying communication lines to be transferred away from the communication lines.
    Type: Grant
    Filed: November 8, 2002
    Date of Patent: January 25, 2005
    Assignees: Turnstone Systems, Inc., Wispry, Inc.
    Inventors: Subham Sett, Shawn Jay Cunningham
  • Patent number: 6834427
    Abstract: The present invention provides an apparatus and methods for the functionality of an integrated circuit. An exemplary embodiment according to an aspect of the present invention includes a ball grid array having open spaces therein. Within the open spaces, pairs of opposite polarity vias are clustered to minimize current path inductance by exploiting mutual inductance between vias of opposite current flow. In an illustrative embodiment, capacitors are coupled to the vias to further reduce current path inductance.
    Type: Grant
    Filed: May 6, 2002
    Date of Patent: December 28, 2004
    Assignee: Apple Computer, Inc.
    Inventors: Bill Cornelius, Paul Baker
  • Publication number: 20040255456
    Abstract: A method of manufacturing an integrated circuit carrier includes providing a substrate. At least one receiving zone for an integrated circuit is demarcated on the substrate. A plurality of island-defining portions is arranged about each of the receiving zones. Rigidity-reducing arrangements are created between neighboring island-defining portions by removing material from the substrate.
    Type: Application
    Filed: July 19, 2004
    Publication date: December 23, 2004
    Applicant: Silverbrook Research Pty Ltd
    Inventor: Kia Silverbrook
  • Publication number: 20040237294
    Abstract: The inventive method of manufacturing an oxide superconducting wire comprises a step (S1, S2) of preparing a wire formed by covering raw material powder of an oxide superconductor with a metal and a step (S4, S6) of heat-treating the wire in a pressurized atmosphere, and the total pressure of the pressurized atmosphere is at least 1 MPa and less than 50 MPa. Thus, formation of voids between oxide superconducting crystals and blisters of the oxide superconducting wire is suppressed while the partial oxygen pressure can be readily controlled in the heat treatment, whereby the critical current density can be improved.
    Type: Application
    Filed: February 20, 2004
    Publication date: December 2, 2004
    Inventors: Shin-Ichi Kobayashi, Takeshi Kato
  • Patent number: 6817094
    Abstract: An electric connector and IC tin ball shaping and fixing manufacturing method is used in welding portions of terminals of one of an electric connector, IC and other electronic elements. A tin film is covered on a bottom of the ball grid array seat; wherein the tin film is formed by connecting a plurality of round small tin pieces with respect to the terminals, and a periphery of the small tin pieces being enclosed by slender connecting portions the ball grid array seat is melt so that the small tin pieces of the tin film weld as tin liquid, then the slender connecting portions will break and the small tin pieces are connected as a tin ball; thereby, the liquid tin ball will enclose the welding portion of the terminal. Finally the tin balls is cooled and condensed and then combined to the welding portions of the terminals.
    Type: Grant
    Filed: November 13, 2002
    Date of Patent: November 16, 2004
    Inventor: Ted Ju