Abstract: A voltage regulator, according to the present invention, can operate with or without an external power transistor to generate a regulated output voltage. The voltage regulator determines whether an external power transistor is connected thereto. The voltage regulator then automatically sets a frequency compensation scheme that depends on whether an external power transistor has been detected.

Abstract: A voltage regulator includes a regulator input connected to a reference voltage; a regulator output that outputs a regulated voltage to an electrical load; a first loop, the first loop configured to receive the reference voltage, the first loop outputting a bias voltage; a second loop, the second loop configured to receive the bias voltage as an input; and a bias voltage capacitor connected to a node between the first loop and the second loop.

Abstract: A dynamic current limiter circuit is disclosed. The dynamic current limiter includes an input node an output node. The dynamic current limiter also includes a current control valve coupled between the input and output nodes, the current control valve being configured to limit current flow between the input and output nodes based on a control input. The dynamic current limiter also includes a current change detector coupled between the input and output nodes, the current change detector being configured to detect a change in current through the input and output nodes and generate a control signal configured to drive the control input. The current control valve is configured to limit current flow between the input and output nodes in response to the current control signal.

Abstract: A novel integrated switched mode power supply circuit that provides supply voltages to an integrated circuit may be of minimal complexity and have the capacity for a wide range of input supply voltages. The novel power supply may include cascaded, unregulated step-down charge pumps (e.g. unregulated voltage splitters), one or more linear regulators coupled to the output of the cascaded voltage splitters, and a start-up current source to provide the IC supply current until the input supply voltage is sufficiently high for the voltage splitter(s) to be functional to provide the IC supply current. Furthermore, each voltage splitter may be activated or disabled depending on the value of the input supply voltage, and the input of a disabled voltage splitter may be shorted to its output via an integrated power switch. Using (cascaded) voltage splitters to provide the IC supply current reduces overall power dissipation in the IC.

Abstract: A current control system comprising at least one series arm including a linear series regulator for generating a manipulated variable signal, wherein the linear series regulator is connected to a semiconductor control element which is connected to a supply voltage referenced to a ground potential, and the semiconductor control element includes an output voltage at its output side relative to the ground potential. A reference signal fed to the series regulator, a current measurement signal, and the manipulated variable signal are referenced to the ground potential, where the manipulated variable signal is fed to a subtractor which subtracts the difference of the feed voltage minus the output voltage from the manipulated variable signal, and the generated output signal of the subtractor is fed to the semiconductor control element as a corrected manipulated variable signal.

Abstract: A controller for a voltage regulator is disclosed. The controller is switchable between first and second modes of operation in which the controller is adapted to control the regulator to operate in switching and linear modes respectively. The controller is further adapted to respond to an input voltage to the voltage regulator to enter a third mode of operation in which the input voltage is coupled directly to an output terminal.

Abstract: Circuits and methods to compensate leakage current of a LDO are disclosed.

Abstract: The present application provides a tunable compensator providing a control signal to control a switch in a power supply. A measurement is taken of the level of activity of the control signal. This measurement is used to introduce a bias into a tuner tuning the compensator when the amount of activity in the control signal drops.

Abstract: A substantially unconditionally stable LOD regulator includes has first and second current paths. The first current path provides a reference current. The second current path receives an input voltage for developing a differential current with respect to the reference current based on the input voltage. The second current path has a sense resistor for sensing the differential current. A first current source biases the first and second current paths. A third current path senses the differential current and develops the input voltage in response thereto to control the differential current. A second current source biases the second current path. A first voltage follower circuit receives a first voltage on a first side of the sense resistor to provide an analog voltage output, and a second voltage follower circuit receives a second voltage on a second side of the sense resistor to provide a digital voltage output.

Abstract: A low-pass filter that filters an input signal input to a filter input terminal to output a filtered output signal to a filter output terminal includes a capacitor, a first field-effect transistor, a first resistor, and a first current source. The capacitor is connected between the filter output terminal and ground. The first field-effect transistor has a gate terminal, a first conduction terminal connected to the filter input terminal, and a second conduction terminal connected to the filter output terminal. The first resistor is connected between the gate and first conduction terminals of the first transistor. The first current source is connected to the first resistor to supply a first current to the first resistor. The first resistor generates a first voltage thereacross based on the supplied first current for electrically biasing the gate terminal of the first transistor.

Abstract: Power efficient power supply regulator circuits are disclosed. The circuits are configured to modify their overhead current according to current load. This is particularly advantageous for use in display devices with widely varying current loads. Such displays include bi-stable displays, such as interferometric modulation displays, LCD displays, and DMD displays.

Abstract: A modulating determination apparatus, a modulating determination method, and a power supply circuit thereof are provided. The modulating determination apparatus is electrically connected to an examined circuit and includes a driver circuit and a comparison circuit. The driver circuit provides an impulse signal to a first end of the examined circuit. The comparison circuit is coupled to the first end of the examined circuit to obtain a first detected electric value of the first end. The comparison circuit calculates a difference value between the first detected electric value and a second detected electric value. The comparison circuit produces a comparison result by comparing the difference value with a threshold value. The comparison result indicates whether the examined circuit comprises a passive component, which is used to decide either a first modulating scheme or a second modulating scheme for modulating the power supply circuit to supply an output power.

Abstract: A technique includes using a pass device of a linear regulator to provide an output signal for the linear regulator in response to a signal that is received at a control terminal of the pass device. The control terminal is coupled to a node, and the node is associated with a bias current. The technique includes using a feedback path to communicate a feedback current with the node to regulate the output signal. The use of the feedback path includes regulating a magnitude of the feedback current to be within a range of magnitudes, which include a magnitude that exceeds a magnitude of the bias current.

Abstract: The LDO has at least three stages supplied by a supply voltage. A first stage has a differential amplifier and a folded cascode device with a regulated current mirror. The LDO has two nodes that are configured to couple the differential amplifier and the regulated current mirror and to receive a differential signal, respectively. The regulated current mirror is configured to convert and amplify the differential signals to a single ended signal. Said LDO has a first capacitor configured for frequency compensation, said first capacitor coupled between said first stage and a second stage. The LDO has a second capacitor for balancing capacitive loading of a first cascode circuit, said second capacitor coupled between said first stage and said supply voltage. Said first cascode circuit is configured to suppress different voltages between input and output of the capacitors caused of a modulation of said supply voltage.

Abstract: A method, apparatus and system providing power to Low Noise Block Amplifiers (LNBs) in a satellite signal receiving system wherein at least one receiver provides power to the LNBs. A system in accordance with the present invention comprises a first stage of power regulation, coupled to the at least one receiver in a respective fashion, wherein the first stage of power regulation comprises linear regulation, and a second stage of power regulation, coupled between the first stage of power regulation and the LNBs, wherein the second stage of power regulation comprises a switching power regulator. Another embodiment of the present invention comprises a first stage of power regulation, coupled to the at least one receiver in a respective fashion, wherein the first stage of power regulation comprises a switching power regulator, and a second stage of power regulation, coupled between the first stage of power regulation and the LNBs, wherein the second stage of power regulation comprises a linear regulator.

Abstract: A voltage regulator is configurable to operate in a linear regulator mode or a buck regulator mode. To operate in the buck regulator mode, the voltage regulator is coupled to an inductor. To determine whether an inductor is coupled to voltage regulator, and thus whether the voltage regulator can be configured in the buck regulator mode, a detection circuit determines whether a regulator output of the voltage regulator resists a change in current driven to the regulator output.

Abstract: The present invention discloses a soft start circuit for a power supply device comprising an external P-type transistor for charging an output capacitor to provide an output voltage. The soft start circuit includes a current source, for providing a discharge current; and a disabling means, coupled to the current source, for discharging an equivalent total parasitic capacitor of the external P-type transistor during an activation period according to the discharge current.

Abstract: Representative implementations of devices and techniques control regulator output overshoot. An offset signal is provided to a component of the regulator during at least a portion of the regulator start-up.

Abstract: An adaptive phase-lead compensation (zero) circuit is disclosed that can be added to a circuit (e.g., a CMOS-based LDO) to ease the compensation and increase the phase margin of the circuit. By using the disclosed adaptive phase-lead compensation circuit, an adjustable resistance can be connected to any nodes in the compensated circuit rather than just to the voltage source (VDD) or ground (GND), allowing the Miller Effect to be used via a Miller capacitor.

Abstract: An integrated circuit for providing a reference signal to a regulator includes a comparison circuit and a first reference signal adjustor. The comparison circuit is configured to output a control signal based on a difference between levels of a constraint signal of the regulator, such as an input voltage signal or a supply voltage signal, and the reference signal. The regulator has a feedback control loop maintained by the reference signal. The first reference signal adjustor is operatively coupled to the comparison circuit and is configured to adjust the level of the reference signal based on the control signal such that the level of the reference signal increases toward a preset level and does not cause the feedback control loop of the regulator to become saturated when the regulator is in a start-up phase.

Abstract: The present document relates to linear regulators or linear voltage regulators configured to provide a constant output voltage. In particular, the present document relates to driver circuits of low-dropout (LDO) regulators. A driver circuit (300) for driving a pass device (201) of a linear regulator (120) is described. The driver circuit (300) comprises a driver stage (110) adapted to regulate a driver gate (220) for connecting to the gate of the pass device (201); wherein the driver stage (110) comprises a transistor diode (210) having the driver gate (220); and a feedback transistor (305) having a source and a drain coupled to a source and drain of the transistor diode (210); wherein a feedback voltage at the gate of the feedback transistor (305) is regulated based on the output current of the pass device (201).

Abstract: An integrated circuit device has a digital device operating at an internal core voltage; a linear voltage regulator; and an internal switched mode voltage regulator controlled by the digital device and receiving an external supply voltage being higher than the internal core voltage through at least first and second external pins and generating the internal core voltage, wherein the internal switched mode voltage regulator is coupled with at least one external component through at least one further external pin of the plurality of external pins.

Abstract: A circuit for regulating and monitoring a signal current, comprising a regulating circuit; and a monitoring circuit. The regulating circuit comprises: a first controlled voltage source for outputting a target value dependent controlled voltage; a current adjust circuit for adjusting the signal current in dependence on the controlled voltage and a first feedback voltage by means of a potentiometer; and a first feedback path, with at least one first resistance element across which the signal current flows. The voltage drop across the resistance element or one of the voltages of the current adjust circuit dependent thereon is supplied as a first feedback voltage.

Abstract: The present application is directed at methods of controlling power supplies. In particular the present application employs an analog compensator to control the power stage of the power supply with a digital tuner employed to adaptively tune the operation of the analog compensator.

Abstract: A system for reducing oscillations on a high voltage bus. The system includes a high voltage battery electrically coupled to the high voltage bus and a DC/DC boost converter electrically coupled to the high voltage bus and a fuel cell stack. The DC/DC converter includes a current controller that selectively controls the current provided by the fuel cell stack. A system controller provides a stack current set-point to the DC/DC converter. The DC/DC converter includes a voltage device that receives a voltage signal from the bus and provides a time derivative of the voltage signal that defines voltage changes on the bus over time. The time derivative signal is provided to a summer that adjusts the current stack set-point to provide a modified current set-point to the current controller that selectively adjusts the current provided by the fuel cell stack to dampen oscillations on the high voltage bus.

Abstract: A fully integrated DC-DC converter utilizes digitally controlled dual output stages to achieve fast load transient recovery is presented. The DC-DC converter includes a main converter output stage connected in parallel with an auxiliary output stage. The main output stage is responsible for steady-state operation and is designed to achieve high conversion efficiency using large inductor and power transistors with low on-resistance. The auxiliary stage is responsible for transient suppression and is only active when a load transient occurs. The auxiliary output stage performs well with inductor and power transistors much smaller than those of the main switching stage and thus achieves well balanced power conversion efficiency and dynamic performance with a much smaller area penalty than previously described dual-output-stage converters.

Abstract: Various exemplary embodiments relate a system and method for supplying power. The system may include an input/output port, a regulator, and a clamp. The regulator may supply power to the input/output port in a first mode, sink current from the input/output port in a second mode, and be disabled in a third mode. The clamp may be disabled in the first and second modes, and may limit the voltage at the input/output port below a first value in the third mode.

Abstract: A low drop-out DC voltage regulator comprising an output pass element for controlling an output voltage (v) of power supplied from a power supply through the output pass element to a load (R), a source of a reference voltage (v), and a feedback loop for providing to the output pass element a control signal tending to correct error in the output voltage. The feedback loop includes a differential module responsive to relative values of the output voltage (v) and the reference voltage (v) and an intermediate module driven by the differential module for providing the control signal. The differential module presents the widest bandwidth of the modules of the regulator and the differential module presents a frequency pole that is higher than the cut-off frequency of the regulator, at which its regulation gain becomes less than one.

Abstract: Systems and methods for reducing voltage undershoot and overshoot of a voltage regulator are disclosed. In one embodiment of the present disclosure, an undershoot/overshoot regulation circuit comprises a control node having a control voltage. The regulation circuit also comprises a control circuit configured to increase the control voltage in response to a load being applied to an output node of a voltage regulator and decrease the control voltage in response to the load being removed from the output node. The regulation circuit also comprises a control capacitor including a first terminal coupled to the control node and a second terminal coupled to a gate node of the voltage regulator. The control capacitor is configured to increase a gate voltage at the gate node in response to the increase of the control voltage, and decrease the gate voltage in response to the decrease of the control voltage.

Abstract: A system and method to regulate voltage is disclosed. In a particular embodiment, a voltage regulator includes an error amplifier, a voltage buffer responsive to the error amplifier, and a first transistor responsive to the voltage buffer and coupled to a voltage supply source. A second transistor is coupled to the voltage supply source and further coupled to an output node. A third transistor is coupled to the first transistor and has a gate coupled to a capacitor. The capacitor is coupled to a node between the error amplifier and the voltage buffer.

Abstract: A switch mode power supply (SMPS) has optimized efficiency over an entire operating range, from no load to full load, by transitioning between pulse frequency modulation (PFM) and pulse width modulation (PWM) for control of the SMPS depending upon load current. Accurate, smooth, and seamless transitions between PFM and PWM modes of operation occur at a preset load current(s). PFM operation improves efficiency during light load conditions, and PWM has better efficiency at higher load currents. This is advantageous in battery powered applications, and thereby results in a longer time before battery replacement or recharge is necessary.

Abstract: A high current drive bandgap based voltage regulator for providing a reference voltage at a an output voltage at a designed output voltage value. The high current drive bandgap based voltage regulator includes a high current drive output transistor, a feedback network, an output terminal and an operational amplifier. The feedback network is coupled between the output of the transistor and the input of the transistor. The operational amplifier is in the feedback network and has at least two operational amplifier input terminals and an operational amplifier output terminal. The operational amplifier output terminal is coupled to the transistor input terminal, and the operational input terminals are coupled to the transistor output terminal. The output terminal of the high current drive bandgap based voltage regulator is coupled to the output of the high current drive transistor.

Abstract: An apparatus and a method for recognizing an electric over-stress of a hybrid supply modulator including a linear regulator and an Switching Mode Power Supplier (SMPS), and protecting a network from the electric over-stress are provided. The hybrid supply modulator includes at least one sensing unit and at least one actuator unit. The at least one sensing unit senses at least one of a current and a voltage at one or more points defined in advance within a supply modulator network. The at least one actuator unit performs a protection action corresponding to at least one electric over-stress situation represented by the sensing result.

Abstract: Circuits and methods for dynamic adjustment of the current limit of a power management unit to avoid unwanted automatic interruption of the power flow have been disclosed. The power management unit is automatically adjusted to the output resistance of a power source (including interconnect resistance). The invention maximizes the time and hence the power transferred from a power management unit to the system (including the battery, in case of battery operated systems). The input current is reduced thus increasing the input voltage in case of a high voltage drop across the internal resistance including interconnections between power source and power management unit.

Abstract: Provided are: a power supply control circuit having a configuration in which an N-channel FET and a P-channel FET can appropriately and selectively be used so as to control power feeding with high efficiency and at low cost; and a power supply control device including the power supply control circuit. An N-channel FET (NchFET in the drawings) and a P-channel FET (PchFET in the drawings) are connected in parallel with each other between the positive voltage side (+B) of a battery (direct current power supply) and a plurality of ECUs (loads) 4, 4, . . . , so as to appropriately control ON and OFF.

Abstract: Embodiments of the present invention provide a voltage regulator. The voltage regulator includes a driving mechanism coupled to an output node (VREG), wherein the driving mechanism is configured to provide current to the output node to sustain a predetermined voltage on the output node. In addition, the voltage regulator includes a boost circuit coupled to the output node, wherein the boost circuit is configured to drive an additional current onto the output node to reduce fluctuations in the output node voltage when a load coupled to the output node requires a transient switching current that is faster than the loop response time of the driving mechanism. Furthermore, the boost circuit is biased using a self-tracking mechanism to provide accurate duration and level of the current to the output node in a transient switching event.

Abstract: A voltage regulator includes a measurement circuit for obtaining a value representing a magnitude of an output capacitance connected at an output node of the voltage regulator. A correction circuit in the voltage regulator modifies a compensation circuit internal to the voltage regulator based on the value. The modification of the compensation circuit is done to ensure that sufficient stability margins to accommodate the output capacitance are ensured for the main feedback loop in the voltage regulator. In an embodiment, a voltage proportional to the output capacitance is detected at start-up of the voltage regulator, and a corresponding binary signal is generated. The logic value of the binary signal is used to add or remove components and/or circuit portions in the compensation circuit to ensure stability. The voltage regulator is thus designed to support a wide range of output capacitance values.

Abstract: A system for preventing power amplifier supply voltage saturation includes a multiple stage voltage regulator configured to provide a regulated voltage, a power amplifier configured to receive the regulated voltage, and a saturation protection circuit configured to apply a current into a first stage of the multiple stage voltage regulator when the regulated voltage reaches a reference voltage, the applied current causing a subsequent stage of the multiple stage voltage regulator to prevent the regulated voltage from exceeding the reference voltage.

Abstract: A method and apparatus for supplying independently switched, regulated power to a plurality of loads is disclosed.

Abstract: Systems and methods for providing one or more reference currents with respective negative temperature coefficients are provided. A first voltage is divided to provide a divided voltage, which is compared to a reference voltage (e.g., a bandgap reference voltage) to provide a control voltage. The first voltage and the one or more reference currents are based on the control voltage.

Abstract: The invention provides a voltage regulator including a voltage divider and a power supply. The voltage divider circuit includes a first, second, third PMOS transistors, a first NMOS transistor, a pull down circuit, and a switching capacitor circuit. The pull down circuit includes a plurality of switches controlled by a pull down control signal. The switching capacitor circuit controlled by a first control pulse includes a capacitor and provides the capacitor connected to the dividing voltage for a short period while the power supply starts up to provide the input voltage. The power supply includes a comparator and a power voltage switch. The comparator compares the dividing voltage and a reference voltage and outputs a comparison result correspondingly. The power voltage switch is controlled by the comparison result to provide the input voltage from a power voltage.

Abstract: An integrated circuit, including: a low dropout regulator configured to output regulated power to a device that can be in standard mode drawing power from the regulator or in idle mode during which it substantially does not draw power from the regulator; a capacitor in parallel to the regulator's output configured to be charged when the regulator is enabled and to provide power instead of the regulator when the regulator is disabled; a control configured to disable and enable the regulator; wherein the control is configured to disable the regulator when the device is in idle mode and enable the regulator when the device is in standard mode; and wherein during idle mode the control enables the regulator at various times to prevent the charge of the capacitor from decreasing more than a pre-selected amount.

Abstract: A system including a first transistor, a first capacitor and a circuit. The first transistor has a first control input and is configured to regulate an output voltage. The first capacitor is coupled at one end to the first control input and at another end to a circuit reference. The circuit is configured to provide a first voltage to the first control input, where the first voltage includes an offset voltage that is referenced to the output voltage and adjusted to compensate for variations in the first transistor.

Abstract: A circuit for generating a reference voltage includes a first transistor configured to receive a reference system voltage, the first transistor configured as a current source, the first transistor configured to provide a current independent of the system voltage, a plurality of diode devices configured to receive the current provided by the first transistor, and a second transistor associated with the plurality of diode devices, the second transistor configured to compensate for process variations in the first transistor, such that the plurality of diode devices provides a reference voltage that is at least partially compensated for the process variations.

Abstract: A power supply module and a power supply method corresponding to an electronic device. The power supply module includes a low-dropout (LDO) voltage regulator to adjust an input signal received from a battery and output a stabilized output signal, and an external load calculation circuit to calculate an external load value at a power output node of the LDO voltage regulator and stabilize the output signal based on the external load value.

Abstract: An LDO regulator system has first and second current mirror circuits connected to its output terminal. A load attached to the output terminal is supplied with a constant voltage. Variations in the load that cause variations in the magnitude of the output voltage trigger one of the first or second current mirror circuits to generate a current that varies the magnitude of a gate voltage of a pass-transistor. The variation in the gate voltage in turns varies the drain current of the pass-transistor, which varies the output voltage to counter the change in the magnitude of the output voltage. Using the first and second current mirror circuits avoids the need for a large load capacitor and very high bandwidth of a conventional LDO regulator.

Abstract: A fast response current source capable of providing an output current is disclosed. The fast response current source includes a constant current generating block, a first feedback capacitor, a first current buffer and a first output current generating block. The constant current generating block provides a first constant current. The first current buffer generates a first buffering current to flow through the first feedback terminal, and changes a current value of the first buffering current in response to the current variation at the first feedback terminal when the voltage at the output terminal is varied. The first output current generating block generates a first output current to flow through the output terminal, and changes a current value of the first output current in response to the variation of the first buffering current when the voltage at the output terminal is varied.

Abstract: A low dropout (LDO) voltage regulator with unconditional frequency compensation is presented. The low dropout voltage regulator is implemented using a two-stage operational amplifier. The first stage amplifier has two input transistors, each of which is connected to a diode-connected transistor. A transistor is connected in parallel to the diode-connected transistors to increase the gain of the first stage amplifier. The LDO voltage regulator has a compensation capacitance input between the first stage amplifier and the second stage amplifier and a voltage on the compensation capacitance input adjusts the current through the diode-connected transistors, as well as the gain of the first stage amplifier. The second stage amplifier receives output from the first stage amplifier, and a compensation capacitor is connected between the compensation capacitance input of the operational amplifier and the output node of the LDO voltage regulator.

Abstract: An over-current protection apparatus includes a first connector connected to a power supply, a second connector connected to a motherboard. A non-inverting input terminal of a comparator receives a voltage from a power supply and compares the received voltage with a preset voltage, when the received voltage is greater than the preset voltage. The comparator outputs a high level signal to control a first electrical switch to be turned on and a second electrical switch to be turned off. A clock pin of a flip-flop receives a high level signal from the second electrical switch, and an output terminal of the flip-flop outputs a low level signal to a third electrical switch, to control the third electrical switch to be turned off. A control pin of a first connector is disconnected to a control pin of a second connector and the power supply does not provide voltages to a motherboard.

Abstract: The present document relates to low-dropout (LDO) regulators having low output capacitance. The regulator comprises a differential amplification stage configured to amplify a differential voltage between a reference voltage and a measure of the output voltage, thereby yielding a drive current at an output of the amplification stage; a subsequent output amplification stage configured to provide the regulated output voltage and a output current at an output of the output amplification stage, based on a drive voltage at an input of the output amplification stage; and a first output current feedback loop configured to sense the output current; and feed back a first coupling current derived from the sensed output current to a first intermediate point between the output of the differential amplification stage and the input of the output amplification stage; wherein the drive voltage is dependent on the drive current and the first coupling current.