Abstract: A method and apparatus for supplying independently switched, regulated power to a plurality of loads is disclosed.

Abstract: Multiple embodiments of a linear voltage regulator are described that use a bipolar output transistor to deliver current and a regulated voltage to a load. The bipolar output transistor assures low output impedance providing isolation from load induced noise. A first depletion mode field effect transistor FET drives the output transistor dependent on a correction signal from an error amplifier. The error amplifier compares a fixed voltage reference to a portion of the output voltage to set a control voltage for the FET gate. Output voltage is set with an offset voltage referenced to circuit ground and can be generated with a single resistor to circuit ground by a current through the resistor which is set from VREF and the regulated output voltage. Output current is limited with a second depletion mode FET that senses the difference in regulator output voltage and voltage at said first FET transistor drain.

Abstract: A voltage converter for converting an input voltage into an output voltage, wherein the output voltage is output to a load, is provided. An inductor is coupled between an output terminal and a node. A transistor is coupled between an input terminal and the node. A pulse width modulation (PWM) controller generates a first control signal according to the output voltage and a first reference voltage. An amplifier generates a second control signal according to the output voltage and a second reference voltage. A detector detects a loading of the load to generate a switching signal. A switching circuit selectively couples one of the PWM controller and the amplifier to the transistor according to the switching signal. The switching circuit controls the transistor according to the second control signal when the amplifier is coupled to the transistor, such that the transistor is operated in a saturation region.

Abstract: A circuit for recovering charge at the gate of an output transistor arranged to drive the output of a switching circuit such as a switching regulator or controller. A substantial portion of the charge for each switching cycle is recovered under a wide range of load conditions for the switching circuit, e.g., no load, partial load, or full load. Also, charge recovery operates effectively with a switching circuit that is arranged to switch in a synchronous or asynchronous manner. Additionally, if the output voltage of a switching circuit is 12 or more volts, the amount of charge that can be saved can be relatively substantial.

Abstract: A system including a first transistor, a first capacitor and a circuit. The first transistor has a first control input and is configured to regulate an output voltage. The first capacitor is coupled at one end to the first control input and at another end to a circuit reference. The circuit is configured to provide a first voltage to the first control input, where the first voltage includes an offset voltage that is referenced to the output voltage and adjusted to compensate for variations in the first transistor.

Abstract: A driving circuit includes a switching circuit, an acquiring circuit, an amplifying circuit, and an adjusting circuit. The switching circuit includes a driving chip and a switching unit. The switching unit is connected between a power source and a load, the driving chip is configured for controlling the connection and disconnection of the switching unit. The acquiring circuit is connected between the switching unit and the load, and is configured for providing a feedback to the amplifying circuit. The amplifying circuit includes two amplifying input terminals connected to two terminals of the acquiring circuit and an amplifying output terminal outputting an amplified voltage. The adjusting circuit is connected to the amplifying output terminal and is configured for outputting different control voltages to the driving chip according to the amplified voltage. The driving chip outputs different driving voltages to the switching unit according to the control voltages.

Abstract: A power supply circuit includes: an N-type FET outputting electricity of an external power supply to a load; a drive line supplying the electricity from the external power supply to the FET; an output line outputting the electricity from the FET to the load; a charge device charging the electricity according to a potential difference between the drive line and the output line; a drive device in the drive line and applying a voltage to a gate of the FET higher than a source of FET so that the FET switches to be the on-state; a step-down device connected to the output line and reducing a voltage across the output line when the FET is in the off-state; and a current regulation device in the output line and regulating a flow of current from the load toward the step-down device.

Abstract: The present invention relates to a driving device. The driving device according to the present invention includes a main transistor that supplies a current to a load by using a power supply, an auxiliary transistor that drops a predetermined voltage of the voltage of the power supply and transmits the dropped voltage to the main transistor in a turn-on state, and a bypass switch that transmits the voltage of the power supply to the main transistor when the auxiliary transistor is turned off.

Abstract: The present invention relates to a charge pump circuit with current detecting and a method thereof. The current detecting charge pump circuit includes a controlled current source, a load circuit which electrically connects to the charge pump circuit unit, and is driven by the charge pump circuit unit to generate a load current. A detecting circuit unit electrically connects to the load circuit, and produces a feedback signal according to the load circuit. A feedback circuit unit which electrically connects to the detecting circuit unit, receives the feedback signal, and adjusts a current of the controlled current source according to the feedback signal. The charge pump circuit also includes a protecting circuit unit which is able to detect feedback signal to protect the circuit according to the feedback signal.

Abstract: A constant-voltage circuit converts a voltage input to an input terminal and outputs a predetermined constant voltage from an output terminal. The constant-voltage circuit includes an output transistor to output an electrical current to the output terminal in response to a control signal, a reference voltage circuit to generate a predetermined reference voltage, a control circuit to adjust a voltage proportional to the output voltage output from the output terminal to the reference voltage output from the reference voltage circuit by controlling the output transistor and a soft start circuit including a capacitor for soft start that is charged at start-up and a current control unit to control an electrical current supplied to the reference voltage circuit. The current control unit adjusts the reference voltage to a voltage determined by the capacitor for soft start at the start-up until the reference voltage reaches a desired voltage.

Abstract: A replica biased voltage regulator circuit and method of load regulation are provided herein. According to one embodiment, the replica biased voltage regulator circuit includes an operational amplifier and a comparator, wherein outputs of the operational amplifier and comparator are respectively and simultaneously supplied to a front gate and a back gate of an output stage transistor included for regulating an output voltage generated by the replica biased voltage regulator circuit.

Abstract: The regulated output voltage of a voltage regulator is maintained up to a current limit, Ilimit, then as the load impedance continues to decrease the output current does not increase past the current limit, Ilimit, but rather the output voltage decreases forcing the output current to also decrease to satisfy Ohm's Law: IOUT=VOUT/ZLoad. When the output voltage drops below the regulated voltage value because of current limiting the voltage regulator shifts from a current limit mode to a current foldback mode wherein the output current decreases with the decrease in output voltage until the output current reaches a current foldback minimum, Ifoldback, at an output voltage of substantially zero volts. As the load impedance increases so will the output voltage and current until the output voltage is back at substantially the regulation voltage value, and the output current is less than or equal to the current limit, Ilimit.

Abstract: A system and apparatus to reduce current peaking in notification appliances are described. The apparatus may include a current peaking compensation circuit comprising two or more transistors and one or more capacitors configured to reduce a start-up frequency of a pulse-width modulated signal during a first time period and to add a time constant decaying voltage across a resistor divider network to increase a reference voltage during the first time period. Other embodiments are described and claimed.

Abstract: In one implementation, an apparatus includes a first input terminal configured to receive a bias voltage, the bias voltage received from a low-dropout voltage regulator (LDO) error amplifier, and a second input terminal configured to receive a supply voltage; a first output terminal configured to supply a feedback voltage, the feedback voltage supplied to the LDO error amplifier, and a second output terminal configured to supply regulated power to an associated load; a regulating portion configured to regulate power supplied to the associated load; and a switching portion configured to enable or disable the load from receiving the regulated power.

Abstract: A voltage generating circuit according to the present invention comprises a voltage converter which voltage-converts a reference voltage, and an output unit which impedance-converts the voltage outputted from the voltage converter. The voltage converter and the output unit each comprise a low-voltage-side power supply and a high-voltage-side power supply. A voltage level of the high-voltage-side power supply in the output unit is set to be higher than a voltage level of the high-voltage-side power supply in the voltage converter.

Abstract: In one or more embodiments described herein, there is provided an apparatus comprising an input, an output, one or more voltage regulator circuit components, and one or more graphene capacitors. The voltage regulator circuit components are configured to provide for a change in the voltage level of signalling between the input and the output. The one or more graphene capacitors are configured to provide for smoothing of the signalling provided to the output.

Abstract: A series regulator circuit includes one or more transistors each having a channel with one end coupled to an input node to receive an input voltage and another end coupled to an output node, and having a control node to receive a control voltage, a control circuit configured to adjust the control voltage in response to a voltage of the output node such that the voltage of the output node is set equal to a voltage setting selected by an output voltage setting signal, and a switch circuit configured to change an operating condition, excluding the control voltage, of the one or more transistors in conjunction with a change in the voltage setting of the output node.

Abstract: The invention provides a voltage regulator including a voltage divider and a power supply. The voltage divider circuit includes a first, second, third PMOS transistors, a first NMOS transistor, a pull down circuit, and a switching capacitor circuit. The pull down circuit includes a plurality of switches controlled by a pull down control signal. The switching capacitor circuit controlled by a first control pulse includes a capacitor and provides the capacitor connected to the dividing voltage for a short period while the power supply starts up to provide the input voltage. The power supply includes a comparator and a power voltage switch. The comparator compares the dividing voltage and a reference voltage and outputs a comparison result correspondingly. The power voltage switch is controlled by the comparison result to provide the input voltage from a power voltage.

Abstract: A low voltage drop out (LDO) regulator is disclosed. The LDO regulator has a voltage buffer for receiving an input voltage containing a DC component and an AC component, converting the input voltage into a converted voltage having a lower DC component and an AC component following that of the input voltage; a control stage applied with the converted voltage; and an output stage applied with the input voltage. The output stage is controlled by the control stage to output an output voltage of a specific level. In the LDO regulator, elements of small sizes can be used to save a layout area thereof. In the meanwhile, the LDO regulator can maintain a high power supply rejection ratio (PSRR) characteristic.

Abstract: A power extractor suitable for locations proximate to the sink of a signal channel is disclosed. The power extractor can generate power from the signal channel without substantially disturbing a quality of signals within the channel. In one embodiment, the power extraction circuit can include: a current source coupled to a sink side of a signal channel, where the signal channel is independent of any power supply signal, the current source being high impedance to maintain signal quality within the signal channel; a first regulator configured to generate a first regulated supply from a current derived from the signal channel using the current source; and a second regulator coupled to the first regulator, where the second regulator is configured to generate a second regulated supply from the first regulated supply.

Abstract: The present invention discloses a power supply comprising: a switching regulator circuit converting an input voltage to an intermediate voltage; a low dropout linear regulator circuit converting the intermediate voltage to an output voltage so as to supply a load current to a load; and a feedback control circuit which increases the noise filtering effect of the low dropout linear regulator circuit when the load current increases.

Abstract: A series regulator with an over current protection circuit regulates output current by controlling an output transistor. A current sense transistor output depends on the conductivity of the output transistor. A current limiting transistor controls the conductivity of the output transistor. A current supply provides current to a constant current source and a converter output of a current to voltage converter. The converter output is connected to a control electrode of the current limiting transistor. A first differential transistor couples the current sense transistor to the constant current source and a second differential transistor couples the current supply to the constant current source. The current sense transistor controls the second differential transistor to vary a control current. When the control current matches a threshold value, the current limiting transistor limits maximum current flow through the output transistor.

Abstract: Low dropout regulators capable of preventing damage caused by a short circuit or a heavy load are provided, in which a pass transistor receives an unregulated power supply voltage to generate a regulated output voltage according to a control signal. Additionally, a constant overcurrent limiting circuit limits an output current through the pass transistor to below a predetermined current, and a foldback overcurrent limiting circuit enables the constant overcurrent limiting circuit to further decrease the output current, when the regulated output voltage is lower than a predetermined voltage.

Abstract: The present invention mainly relates to a current limiting circuit, also known as over-current protection circuit, and a power regulator using the same. The purpose for the circuit is to protect the power device and the loading circuit for the power regulator. The conventional current limiting circuit takes advantage of a resistor and a MOS to convert the detected over current into a voltage and then turn on a P-typed MOS to clamp the gate voltage of a power transistor so as to achieve the goal of current limiting. However, the process variation for the resistor and said MOS and their temperature variation lead to a significant error to the limiting current. The present invention, therefore, takes advantage of the current comparison to enhance the accuracy for the current limiting circuit.

Abstract: A low-drop out (LDO) regulator circuit is provided having a gate of a pass transistor coupled to an output of an operational transconductance amplifier, the LDO regulator exhibiting a non-dominant pole at an output of the LDO. A dynamic zero-compensation circuit is coupled in parallel to the pass transistor. A compensation control circuit is coupled and configured to adjust a frequency, at which a zero is generated, and cause the generated zero to track with the non-dominant pole.

Abstract: Systems and methods for reducing power consumption of a voltage regulator are disclosed. In accordance with one embodiment of the present disclosure a voltage regulator comprises an input node configured to receive a reference voltage and an output node configured to output an output voltage. The output voltage is a function of the reference voltage and a regulating current. The regulator further comprises a proportional to absolute temperature (PTAT) circuit coupled to at least one of the output node and the input node. The PTAT circuit is configured to vary at least one of the reference voltage and the regulating current as a function of temperature.

Abstract: The present invention discloses a linear regulator and a voltage regulation method. The method comprises: providing a power transistor for converting a supply voltage to an output voltage to a load according to the conduction condition of the power transistor; controlling the conduction condition of the power transistor according to a comparison between a feedback signal relating to the output voltage and a reference voltage; obtaining a signal relating to a load condition; and controlling the conduction capability of the power transistor according to the signal relating to the load condition.

Abstract: A power supply device, a processing chip for a digital microphone and related digital microphone are described herein. In one aspect, a power supply device includes: at least two cascaded low-dropout linear regulators. In another aspect, a processing chip for digital microphone includes a processing module and a power supply module, wherein the power supply modules includes at least two cascaded low dropout linear regulators. In another aspect, a digital microphone includes a microphone and a processing chip, wherein the processing chip includes a processing module and a power supply module, wherein the power module includes at least two cascaded low-dropout linear regulators. Embodiments described herein provide a power supply device with higher PSRR.

Abstract: A power supply circuit and a method for operating a power supply circuit involves selecting a normal operational mode or a pass-through operational mode for a switched mode power supply, in the normal operational mode, converting an input voltage of a power supply circuit to an intermediate voltage using a switching regulator of the switched mode power supply, in the pass-through operational mode, disabling the switching regulator such that the input voltage of the power supply circuit is unchanged by the switching regulator and an electric current consumption of the switching regulator approaches zero, and converting the intermediate voltage or the input voltage of the power supply circuit to an output voltage using a linear voltage regulator.

Abstract: A device configured to suppress the occurrence of an inrush current is provided at a low cost, where the device includes a power circuit configured to generate a voltage used to drive a load, a capacitor connected to a supply line provided to supply power from the power circuit to the load, the capacitor being configured in such manner to stabilize the potential of the load, a charging/discharging circuit that supplies an amount of power smaller than a predetermined amount of power to the capacitor and that discharges the smaller amount of power from the capacitor, a charging circuit that supplies an amount of power larger than the predetermined amount of power to the capacitor, and a switch circuit configured to make each of the charging/discharging circuit and the charging circuit operate.

Abstract: It is desired for semiconductor devices to reduce an inrush current and an overshoot. According to the voltage regulator circuit of the present invention, when a power supply is turned on, a switch SW1 is turned on in response to a control signal CTR1, a switch SW2 is turned off, and a reference voltage Vref is input to the first (+IN) and second (?IN) inputs of a differential amplifier AMP1 as a common voltage. When a common voltage is supplied to the first (+IN) and second (?IN) inputs, the current I flows into a smoothing capacitor C1 from the high-voltage power supply (VDD) via the differential amplifier AMP1 is regulated to be small. Namely, an inrush current can be reduced. Further, according to the voltage regulator circuit 30 of the present invention, the increase of the output voltage Vout from the differential amplifier AMP1 is relaxed so that the overshoot can be suppressed.

Abstract: A circuit for providing an output voltage substantially equal to a reference voltage includes: a low drop-out (LDO) regulator coupled to the reference voltage for producing the output voltage at an output terminal; a reference current source having a first end and a second end for providing a predetermined reference current; a first transistor having a first terminal coupled to a first supply voltage, a second terminal, and a control terminal coupled to the second terminal of the first transistor; a first switch for selectively coupling the second terminal of the first transistor to the first end of the reference current source according to a first control signal; and a second transistor having a first terminal coupled to the first supply voltage, a control terminal coupled to the control terminal of the first transistor, and a second terminal coupled to the output terminal.

Abstract: To provide adequate compensation for a wide range of output loads, a low dropout (LDO) regulator has an amplifier, a pass transistor, a voltage divider, a compensation network, and a control circuit. The amplifier outputs a comparison result according to a reference signal and a feedback signal. The pass transistor generates an output current based on the comparison result of the amplifier. The voltage divider generates the feedback signal according to the output current. The compensation network couples the output of the pass transistor to a low-impedance node of the amplifier, and has a compensation capacitor and a variable resistor coupled to the compensation capacitor. The control circuit is coupled to the input of the pass transistor and to the variable resistor for controlling resistance of the variable resistor according to the output current of the pass transistor.

Abstract: A low dropout regulator includes an error amplifier, an N-type depletion MOSFET, a first switch, a second switch, a low-pass filter resistor, and a low-pass filter capacitor. By switching on both the first switch and the second switch, a voltage level of an output node at a negative input terminal of the error amplifier may be rapidly raised to be close to and lower than a voltage level of an input node at a gate of the N-type depletion MOSFET. Both the first switch and the second switch are then switched off immediately so that the voltage level of the output node is gradually raised to be equal to the voltage level of the input node through the low-pass filter resistor.

Abstract: A low drop out (LDO) voltage regulator (10) includes a pass transistor (MPpass) having a source coupled by an output conductor (4) to a load and a drain coupled to an input voltage to be regulated. An error amplifier (2) has a first input coupled to a reference voltage, a second input connected to a feedback conductor (4A), and an output coupled to a gate of the pass transistor. A parallel path transistor (MPpa) has a source coupled to the input voltage, a gate coupled to the output (3) of the error amplifier (2), and a drain coupled to the feedback conductor. A feedback resistor (Rf) is coupled between the feedback conductor and the output conductor.

Abstract: A power supply circuit arranged in a circuit board to supply a determined voltage to an element is disclosed. The power supply circuit includes two voltage receiving terminals to receive voltage signals, a window comparator, and an electrical switch. The comparator drives the electrical switch to be turned on, therefore a terminal of the electrical switch stably output the determined voltage to the element.

Abstract: A semiconductor circuit includes a voltage regulator and a buffer transistor. The voltage regulator converts an input voltage input to an input terminal thereof into an output voltage output to an output terminal thereof. The buffer transistor is an n-channel depletion-mode metal-oxide semiconductor field effect transistor, disposed between the power supply terminal and the voltage regulator with a gate terminal thereof connected to the power supply terminal, a drain terminal thereof connected to the power supply terminal, and a source terminal thereof connected to the input terminal of the voltage regulator.

Abstract: A voltage regulation circuit includes: a first voltage divider that divides a regulation voltage with a predetermined division ratio to generate a division voltage; a first current driving force control unit configured to compare a reference voltage with the division voltage and generate a first control signal; a current driving unit configured to generate a driving current with a variable driving force based on the first control signal and a second control signal, and generate the regulation voltage; and a second current driving force control unit configured to generate the second control signal in accordance with a level variation of the regulation voltage.

Abstract: A method for reducing noise in an output of a voltage regulator at frequencies above a closed loop bandwidth, by providing a noise injection path for injecting external noise into the voltage regulator, where the noise injection path becomes active at the frequencies above the closed loop bandwidth, where the noise injection path reduces the noise in the output of the voltage regulator.

Abstract: Provided is a voltage regulator capable of performing appropriate phase compensation. Even when a difference between an input voltage and an output voltage is small, an appropriate phase compensation voltage based on an output voltage (Vout) is generated in a resistor circuit (19), and the appropriate phase compensation voltage is applied to a phase compensation capacitor (20). Accordingly, the voltage regulator is capable of performing appropriate phase compensation.

Abstract: A low drop-out (LDO) voltage regulator with efficient frequency compensation is disclosed. The LDO voltage regulator includes an error amplifier, a transmission element, a voltage divider and a pole control unit. The error amplifier generates a control signal according to a reference voltage and a feedback voltage. The transmission element is coupled to the error amplifier, and adjusts an input voltage to generate an output voltage according to the control signal. The voltage divider is coupled to the transmission element, and performs a voltage division operation on the output voltage to generate the feedback voltage. The pole control unit is coupled to the transmission element, and provides and adjusts an output capacitor of the LDO voltage regulator to fix a frequency of a pole according to variation of an output impedance of the transmission element, so as to maintain loop stability.

Abstract: A system for preventing power amplifier supply voltage saturation includes a multiple stage voltage regulator configured to provide a regulated voltage, a power amplifier configured to receive the regulated voltage, and a saturation protection circuit configured to apply a current into a first stage of the multiple stage voltage regulator when the regulated voltage reaches a reference voltage, the applied current causing a subsequent stage of the multiple stage voltage regulator to prevent the regulated voltage from exceeding the reference voltage.

Abstract: A system and a method are disclosed for providing a dynamically configured low drop out regulator that has zero quiescent current and a fast transient response. A power supply control circuit is provided that comprises a switcher circuit and a low drop out regulator and a control signal circuit. When the output voltage of the low drop out regulator is in a steady state condition the control signal circuit generates control signals that turn off the operation of the low drop out regulator to provide zero quiescent current. When the output voltage is not in a steady state condition the control signal circuit generates control signals that turn on the operation of the low drop out regulator to provide a fast transient response.

Abstract: The present invention relates to a power-managed socket adapted for connecting to an electrical device and thus providing the electrical device with power.

Abstract: A multi-processor controller is provided. The multi-processor controller can be used to control the operation of an inverter in a vehicle-based electric traction system. The multi-processor controller includes a first processor device having a first supply voltage node, a second processor device having a second supply voltage node, a first voltage regulator, and a second voltage regulator. The first voltage regulator has a first output voltage node coupled to the first supply voltage node, and the first voltage regulator is configured to generate a first regulated supply voltage for the first processor device. The second voltage regulator has a second output voltage node coupled to the second supply voltage node, and the second voltage regulator is configured to generate a second regulated supply voltage for the second processor device.

Abstract: A low-dropout (LDO) voltage regulator that includes an error amplifier which compares a reference voltage with a feedback voltage of an output voltage and outputs an error signal based on the result of the comparison, the error amplifier being biased by an input voltage; a first MOS transistor having a gate electrically connected to the error signal, a source electrically connected to the input voltage and a drain electrically connected to the output voltage; a voltage divider which transmits a predetermined part of the output voltage to the error amplifier as feedback voltage; and a level limiter which limits a level of the output voltage from changing beyond and below an offset voltage when a level of a load current changes. In accordance with embodiments, A predetermined number of comparators and MOS transistor type-switches are provided to enhance the slew ratio of the regulated output voltage and to reduce standby electricity consumption.

Abstract: A power supply system comprises a parallel arrangement of a linear amplifier (LA) and a DC-DC converter (CO). An output of the linear amplifier (LA) is directly coupled to a load (LO) for supplying a first current (II) to the load (LO). The DC-DC converter (CO) has a converter output coupled to the load (LO) for supplying a second current (12) to the load (LO). The linear amplifier (LA) comprises a first amplifier stage (OS1) to supply the first current (II), and the second amplifier stage (OS2) to generate a third current (13) being proportional to the first current (II). The first amplifier stage (OS1) and the second amplifier stage (OS2) have matched components. The DC-DC converter (CO) further comprises a controller (CON) having a control input for receiving a voltage generated by the third current (13) to control the second current (12) for minimizing a DC-component of the first current (II).

Abstract: The measurement of a current through a load transistor is described.

Abstract: In the field of battery charging for electronic devices, it is known to employ a number of measures to avoid excessive power dissipation by a pass device in a charging system. However, many of these measures are either incompatible with linear charging regimes or add cost to the adapter and/or charging system. The present invention provides a power dissipation measurement circuit for controlling a control device that acts in series with another, but maximum current limiting, control device to control drive current to the pass device so as to limit the power dissipated by the pass device to a maximum threshold value.

Abstract: A controller for use with a power converter including a switch configured to conduct to provide a regulated output characteristic at an output of the power converter, and method of operating the same. In one embodiment, the controller includes a linear control circuit, coupled to the output, configured to provide a first control signal for the switch as a function of the output characteristic. The controller also includes a nonlinear control circuit, coupled to the output, configured to provide a second control signal for the switch as a function of the output characteristic. The controller is configured to select one of the first and second control signals for the switch in response to a change in an operating condition of the power converter.