Abstract: A multi-stage power supply for a load control device is able to operate in a low-power mode in which the power supply has a decreased power consumption when an electrical load controlled by the load control device is off. The load control device comprises a load control circuit and a controller, which operate to control the amount of power delivered to the load. The power supply comprises a first efficient power supply (e.g., a switching power supply) operable to generate a first DC supply voltage. The power supply further comprises a second inefficient power supply (e.g., a linear power supply) operable to receive the first DC supply voltage and to generate a second DC supply voltage for powering the controller. The controller controls the multi-stage power supply to the low-power mode when the electrical load is off, such that the magnitude of the first DC supply voltage decreases to a decreased magnitude and the inefficient power supply continues to generate the second DC supply voltage.

Abstract: In one embodiment, a method of forming a power supply controller may include configuring the power supply controller to control a pass transistor to form an output current responsively to a control signal and independently of the value of the output voltage until the control signal is less than a deviation from a desired value of the output voltage.

Abstract: A regulator circuit that makes it possible to supply a voltage which enables a load circuit to operate normally, even if an external power supply voltage is momentarily interrupted or dropped, includes a ZD/R parallel circuit (a backflow prevention diode and in parallel with a resistor) that is connected between an external power supply voltage terminal and the drain of a MOSFET.

Abstract: A fast load transient response circuit includes a feedback loop that senses a load transient; a first driver and a second driver responsive to a feedback signal from the feedback loop; and a first pass transistor and a second pass transistor with sources and drains being coupled to each other, and a gate of the first pass transistor being driven by the first driver and a gate of the second pass transistor being driven by the second driver. A width of the channel to length of the channel (W/L) ratio of the first pass transistor is different than that of the second pass transistor such that second pass transistor reacts faster than the first pass transistors to a load transient.

Abstract: In a linear voltage regulator, a first stage outputs an output signal. The first stage is configured with a first switchable bias current, and is configured to receive a feedback signal. A second stage provides a regulated voltage output. A decoupling capacitor is coupled to the regulated voltage output. A feedback circuit is coupled with the second stage and configured to generate the feedback signal. A frequency compensation circuit includes a second switchable bias current. The frequency compensation circuit: pushes away an existing pole to a higher frequency when the first and second switchable bias currents are operated in a sleep mode; and creates a left-hand-side zero when the first and second switchable bias currents are operated in an active mode. The active mode comprises the first and second switchable bias currents supplying greater currents than are provided in the sleep mode.

Abstract: A system including a first transistor, a first capacitor and a circuit. The first transistor has a first control input and is configured to regulate an output voltage. The first capacitor is coupled at one end to the first control input and at another end to a circuit reference. The circuit is configured to provide a first voltage to the first control input, where the first voltage includes an offset voltage that is referenced to the output voltage and adjusted to compensate for variations in the first transistor.

Abstract: A shunt regulator for an RFID tag chip is powered from split outputs from the RF rectifier, including a first output for providing a power delivery path to on-chip circuits and a second output for providing a discharge-regulation path. The shunt regulator includes a capacitor coupled between the first output and ground. The shunt regulator further includes an input node for receiving a power supply voltage from the rectifier split outputs, a first diode having an anode coupled to the input node, a second diode having an anode coupled to the input node, a resistor divider circuit and amplifier coupled between a cathode of the first diode and ground, transistor having a control terminal coupled to an output of the resistor divider and amplifier circuit, and a current path coupled between a cathode of the second diode and ground.

Abstract: A voltage regulator includes an amplifier having a first input coupled to a first reference voltage and a second input coupled to a voltage feedback signal; a multiplexer having a first input coupled to an output of the amplifier, a second input coupled to a voltage clamp signal, and a control input; and a control circuit having a first input coupled to an over current indicator, a second input coupled to a no over voltage indicator, a third input coupled to a timer signal, and an output coupled to the control input of the multiplexer.

Abstract: A programmable linear voltage regulator and system for programming the regulator that improves the speed, power usage, and stability over conventional linear voltage regulators is disclosed. A controller that has knowledge of the current or expected activation of various loads sends bias control signals to a programmable biasing circuit of an error amplifier in the voltage regulator to adjust the bias current in accordance with the load current the regulator produces or is expected to produce. A look up table associated with the controller can be used to correlate the bias control signals with current or expected load conditions. Programming of the programmable biasing circuit may precede the enablement of a new load condition to ready the voltage regulator to handle the upcoming change in load current.

Abstract: An output transistor coupled between an input terminal where an input voltage is input and an output terminal where an output voltage is output; an error amplifier configured to generate a first error signal and a second error signal based on a voltage in accordance with the output voltage and a reference voltage, and to output the first error signal to a gate terminal of the output transistor; an anti-overshoot circuit coupled to the output terminal and controlled by the second error signal; an output transistor control part configured to add a control signal based on a first current in accordance with an AC component of the output voltage to the first error signal; and a sensitivity adjustment part configured to decrease the first current based on the second error signal when the output voltage is higher than a certain voltage.

Abstract: The present document relates to a pre-charge circuit of electronic circuits having Miller compensation and significant output capacitance such as LDOs or multistage amplifiers. The pre-charge circuit limits an inrush current right after enabling of the electronic circuit. The pre-charge circuit limits and clamps the fast charging of the Miller capacitor. A delay circuit disables the pre-charge circuit when the bias conditions of the Miller capacitor are close to normal bias conditions.

Abstract: A circuit for a charge-pump low-dropout (LDO) regulator may include a comparator circuit configured to control a pass transistor based on an error signal. A pre-charge path may be provided between a supply voltage and an output node of the regulator. The pre-charge path may be configured to allow charging of an output capacitor to a pre-charge voltage during a pre-charge operation mode. The output capacitor may be coupled between the output node of the regulator and ground potential. The pass transistor may be configured to allow charging of the output capacitor during an LDO mode of operation. A charge-pump circuit may be configured to provide a current for charging the output capacitor during the LDO mode of operation.

Abstract: In one general aspect, an apparatus can include a load terminal, and a power source terminal. The apparatus can include a current limiter coupled to the load terminal and coupled to the power terminal. The current limiter can be configured to limit a current from the power source terminal to the load terminal using an electric field activated in response to a difference in voltage between the power source terminal and the load terminal.

Abstract: The constant voltage includes a sense transistor through which a sense current flows based on an output current flowing through an output transistor; a current division circuit for dividing the sense current and outputting divided currents; a first current to voltage conversion circuit for converting a first division current output from the current division circuit to a first voltage; a second current voltage conversion circuit for converting a second division current output from the current division circuit to a second voltage; an output voltage detection circuit for controlling the current division circuit such that a voltage of the output terminal becomes equal to a drain voltage of the sense transistor; and an overcurrent protection circuit for controlling the output voltage and the output current by detecting an overcurrent flowing through the output transistor based on the first voltage.

Abstract: Provided is a voltage regulator capable of controlling an output voltage to a predetermined voltage quickly after an overshoot occurs in the output voltage. The voltage regulator includes: an overshoot detection circuit configured to detect a voltage that is based on an output voltage of the voltage regulator, and output a current corresponding to an overshoot amount of the output voltage; and an I-V converter circuit configured to control a current flowing through an output transistor based on a current controlled by an output of an error amplifier and a current flowing from the overshoot detection circuit.

Abstract: A low drop out voltage regulator comprising: a transistor having an input node, an output node, and a control node; a differential amplifier having an output connected to the control node of the transistor and having a first input node; and a feedback capacitor connected between the output node of the transistor and the first input of the differential amplifier, wherein a voltage at the output of the transistor is dependent on a charge across the feedback capacitor.

Abstract: Provided is a voltage regulator capable of controlling an output voltage to a predetermined voltage quickly after an undershoot occurs in the output voltage. The voltage regulator includes: an undershoot detection circuit configured to detect a voltage that is based on an output voltage of the voltage regulator, and output a current corresponding to an undershoot amount of the output voltage; and an I-V converter circuit configured to control a current flowing through an output transistor based on a current controlled by an output of an error amplifier and a current flowing from the undershoot detection circuit.

Abstract: The systems and methods of auto-configurable switching/linear regulation disclosed herein enable a device to operate in both DC-to-DC switching regulation and linear regulation applications. The systems and methods disclosed herein differentiate between switching and linear mode. If the application is for a linear regulator, there will only be a capacitor on the output. If the application is for switching mode regulation, there will be an inductor and a capacitor on the output. Then based on the determination, the mode is selected and the hardware is converted into switching regulator operation or linear regulator operation.

Abstract: There is provided a voltage regulator that stably operates without using a large phase compensation capacitance. The voltage regulator has a voltage 3-stage amplifier circuit comprised of a differential amplifier circuit, a first source ground amplifier circuit provided with a phase compensation circuit, and a second source ground amplifier circuit, which serves as an output circuit. The voltage 3-stage amplifier circuit is provided, between the first source ground amplifier circuit and the second source ground amplifier circuit, with a phase compensation circuit that is effective for reducing the gains of the differential amplifier circuit and the first source ground amplifier circuit.

Abstract: Systems and methods for transition control in a hybrid Switched-Mode Power Supply (SMPS). In some embodiments, a hybrid SMPS may include linear circuitry configured to produce an output voltage proportional to a variable duty cycle when the SMPS operates in linear mode and hysteretic circuitry coupled to the linear circuitry, the hysteretic circuitry configured to cause the duty cycle to assume one of two predetermined values when the SMPS operates in hysteretic mode. The hybrid SMPS may also include transition circuitry coupled to the linear circuitry and to the hysteretic circuitry, the transition circuitry configured to bypass at least a portion of the linear circuitry in response to the hybrid SMPS transitioning from the hysteretic mode to the linear mode.

Abstract: A voltage regulator includes a pass transistor, an operational amplifier and a voltage divider circuit. The pass transistor receives a supply voltage to generate a regulated output voltage according to a control signal. The operational amplifier generates the control signal according to a feedback voltage. The voltage divider circuit generates the feedback voltage at a feedback node according to the regulated output voltage, and includes a string of resistors and a stabilization element. The string of resistors is coupled to the pass transistor and includes multiple resistors. The stabilization element is coupled to the resistors and receives the regulated output voltage.

Abstract: A voltage regulator includes a voltage generation unit, a first resistor section, and a second resistor section. The voltage generation unit compares a reference voltage level with a voltage level of a first node and generates an output voltage. The first resistor section includes a first sub-resistor and a second sub-resistor between the first node and a ground voltage node, and controls a connection between the first sub-resistor and the second sub-resistor to change a resistance value of the resistors. The second resistor section includes a reference resistor, a plurality of unit resistors, and a plurality of step resistors, and controls connections of the unit resistors and the step resistors to change a resistance value of the resistors.

Abstract: In accordance with an embodiment, a power supply controller includes an error signal input configured to be coupled to a sensing node of a power supply, a control output configured to be coupled to a switch control circuit, and a control circuit having an input coupled to the error signal input. The control circuit is configured to provide a first variable limit signal if the error signal input is in a first range, and to adjust the first variable limit signal according to the error signal input.

Abstract: A multi-input low dropout regulator includes an amplifier, a first metal-oxide-semiconductor transistor, and a resistor. The amplifier has a plurality of first input terminals, a second input terminal, and an output terminal. Each first input terminal of the plurality of first input terminals is used for receiving an internal voltage. The first metal-oxide-semiconductor transistor has a first terminal for receiving a first voltage, a second terminal coupled to the output terminal of the amplifier, and a third terminal coupled the second input terminal of the amplifier. The resistor has a first terminal coupled to the third terminal of the first metal-oxide-semiconductor transistor, and a second terminal for receiving a second voltage. The third terminal of the first metal-oxide-semiconductor transistor is further used for coupling to a monitor pad, and the monitor pad is used for outputting the internal voltage.

Abstract: A startup circuit in an LDO includes an operational amplifier having an inverting terminal and a non-inverting terminal and an output node. The non-inverting terminal receives a reference voltage. The startup circuit further includes a feedback capacitor coupled between an output node and the inverting terminal and a current source coupled between the inverting terminal and ground such that the current source and the feedback capacitor together control rate of change of an output voltage of the operational amplifier. A comparator is used to stop the rate of change of output voltage after the output voltage reaches a desired value.

Abstract: A constant-voltage circuit having an overcurrent protection circuit which includes: a first sense transistor, one main terminal connected to an input terminal of the constant-voltage circuit and a control terminal connected to a control terminal of an output transistor generates a current corresponding to an output current from the output transistor; a voltage level adjusting circuit configured to generate a voltage corresponding to a voltage of a main terminal of the output transistor at an output terminal side of the constant-voltage circuit by extracting a current that is not affected by a change in the output current from the output transistor, and adjust a voltage of another main terminal of the first sense transistor such that the adjusted voltage becomes equal to the generated voltage; and a protection circuit to control a control voltage applied from an error amplifier to the control terminal of the output transistor.

Abstract: According to one aspect of the embodiment, a linear regulator circuit includes an output transistor outputting an output current based on a input voltage, an error amplifier outputting a control signal based on an electric potential difference between an output voltage based on the output current and a reference voltage, a buffer circuit coupled between the error amplifier and the output transistor, and a drive capability adjustment circuit adjusting a load drive capability of the buffer circuit in synchronization with the output current.

Abstract: Described herein are principles for designing and operating a voltage regulator that will function stably and accurately without an external capacitance for all or a wide range of load circuits and characteristics of load circuits. In accordance with some of these principles, a voltage regulator is disclosed having multiple feedback loops, each responding to transients with different speeds, that operate in parallel to adjust an output current of the regulator in response to variations in the output current/voltage due to, for example, variations in a supply voltage and/or variations in a load current. In this way, a voltage regulator can respond quickly to variations in the output current/voltage and can avoid entering an unstable state.

Abstract: A method to maintain stability of a low drop-out linear voltage regulator (LDO) includes sensing, by a voltage controlled variable resistor, a node voltage in a feedback network of the LDO linear voltage regulator, wherein the feedback network includes an error amplifier configured to regulate an output voltage level of the LDO based on a reference voltage, wherein the node voltage has a dependency on a resistive load current of the LDO, and adjusting, by the voltage controlled variable resistor and based on the sensed node voltage, a resistance value of a RC network in the feedback network, wherein the adaptive RC network produces an adaptive zero in a transfer function of the feedback network, wherein the adaptive zero reduces phase margin degradation due to an output non-dominant pole in the transfer function, and wherein a frequency of the adaptive zero is inversely proportional to the resistance value.

Abstract: A circuit and method provides compensation for disturbance of an output voltage caused by dielectric absorption of a load capacitor of a low dropout voltage regulator after a modification of the output voltage level of the low dropout voltage regulator. A dielectric absorption current compensation circuit generates a profile current that is applied to an output of the low dropout voltage regulator and in parallel with the load capacitor to compensate for the dielectric absorption current. The dielectric absorption current compensation circuit has a programmable profile current generator that generates the profile current. A switchable current mirror transfers a mirror profile compensation current to the load capacitor to compensate for the dielectric absorption current. In some embodiments, the profile current is a continuous profile dielectric absorption compensation current and in other embodiments, the profile current is a digital profile dielectric absorption compensation current.

Abstract: A controller for use with a power converter including a switch configured to conduct to provide a regulated output characteristic at an output of the power converter, and method of operating the same. In one embodiment, the controller includes a linear control circuit, coupled to the output, configured to provide a first control signal for the switch as a function of the output characteristic. The controller also includes a nonlinear control circuit, coupled to the output, configured to provide a second control signal for the switch as a function of the output characteristic. The controller is configured to select one of the first and second control signals for the switch in response to a change in an operating condition of the power converter.

Abstract: A controlled headroom low dropout regulator (CHLDO) having an LDO with an input voltage provided by a capacitor. An incremental voltage is added to an output voltage of the LDO to create a reference voltage. The reference voltage is compared to the input voltage to determine when to couple/de-couple the capacitor with a current source. If the capacitor is coupled to the current source, the capacitor will charge only if the voltage driven by the current source exceeds the input voltage provided by the capacitor. When the input voltage developed on the capacitor exceeds the reference voltage, the capacitor is automatically de-coupled from the current source. Multiple CHLDOs can be charged from a single current source, wherein charging automatically proceeds from the lowest voltage CHLDO to the highest voltage CHLDO.

Abstract: A current limiting circuit for limiting an output current in response to a control current includes a detection circuit to detect a detection voltage responsive to an output voltage, and a control current generating circuit to generate a control current responsive to the detection voltage, wherein the control current generating circuit includes a first transistor through which the control current flows, a second transistor that becomes conductive upon a voltage responsive to an amount of the control current being greater than a predetermined voltage above the detection voltage, and a resistor connecting between a base and an emitter of the second transistor to raise a potential at the base of the second transistor above a predetermined level, wherein the amount of the control current flowing through the first transistor decreases as an amount of a current flowing through the second transistor increases.

Abstract: A transient response accelerated (TRA) low dropout (LDO) regulator has an error amplifier having a feedback input, and a reference input configured to receive a reference voltage, and an output that controls a pass gate. The pass gate output voltage is applied to the feedback input. A transient response accelerator (TRA) circuit detects a rapid voltage drop on the pass gate output and, in response, applies a pulse control that rapidly lowers the resistance of the pass gate.

Abstract: Circuits and methods to improve dynamic load transient performance of circuits supplying high current and having parasitic resistances are disclosed. These circuits comprise e.g. LDOs, amplifiers or buffers. The circuits and methods are characterized by including parasitic resistances, caused by bond wires, metallization of pass devices, and substrate routings, in a loop for fast transient response. Furthermore the circuits comprise a stabilization circuit within said loop and a separate pad for said loop.

Abstract: The present invention relates to a low dropout regulator, and more particularly to a low dropout regulator without load capacitor and ESR (equivalent series resistance) designed in response to the discharge curve of a Li-ion battery, includes an input terminal, a reference circuit, a power transfer element, a level regulating device, a regulating circuit, and a first N-type MOSFET. The regulating circuit detects a load change at an output terminal, amplifies the load change, and couples it to the level regulating device. The level regulating device receives and boosts a received signal and transmits the received signal to the power transfer element, so as to achieve the effect of controlling the power of a power supply.

Abstract: A low dropout (LDO) voltage regulator includes a scaling amplifier for receiving a bandgap voltage, Vbg, and outputting a scaled Vbg. A reference MOSFET device is included for reducing the scaled Vbg by a first voltage Vgs formed across gate and source nodes of the reference MOSFET device. This forms a reduced level of the scaled Vbg. An RC network filters the reduced level of the scaled Vbg and outputs a filtered voltage. An output buffer is included for receiving and increasing the filtered voltage by a second voltage Vgs in order to recover the scaled Vbg. The scaled Vbg is used as the desired regulated voltage output. The second voltage Vgs, which is produced by the output buffer, is equal to the first voltage Vgs, which is produced by the reference MOSFET device.

Abstract: A multiplier circuit to multiply a first signal with a second signal includes an analog-to-digital converter that has a first input and a second input. The first input is to receive the first signal. The multiplier circuit also has an inverting circuit having an input to receive the second signal, and an output connected to the second input of the analog-to-digital converter. An output value produced by a combination of the analog-to-digital converter and the inverting circuit is approximately a multiplication of the first signal and the second signal.

Abstract: A regulator for providing a low dropout voltage at an output node of the regulator is provided. An amplifier has a non-inverting input terminal for receiving an input voltage, an inverting input terminal and an output terminal. A first resistor is coupled between a ground and the inverting input terminal of the amplifier. A second resistor is coupled to the inverting input terminal of the amplifier. A first transistor is coupled between a voltage source and the second resistor. A current source coupled between the voltage source and a gate of the first transistor provides a bias current. A second transistor coupled between the first transistor and a current mirror has a gate coupled to the output terminal of the amplifier. The first and second transistors are different type MOS transistors. The replica unit generates the low dropout voltage according to a voltage of the output terminal of the amplifier.

Abstract: A voltage regulator is provided having one or more discharger circuits that compensate for low on-chip output capacitance and a slow loop response time. In one embodiment, the voltage regulator includes an output transistor coupled to an output voltage line, an output voltage sensing arrangement coupled to the output voltage line for producing an output feedback voltage, and an error amplifier coupled to the output feedback voltage, the output transistor, and a reference voltage for applying feedback control to the output transistor. A first discharger circuit is coupled to the output voltage line and to a reference potential, the first discharger circuit being triggered by a steep-rise overvoltage condition. In another embodiment, a combination of fast and slow discharger circuits is used to improve the load step response—i.e., to stop the output voltage from jumping too high and to pull it back to stable value very quickly, such that the load circuits are protected.

Abstract: The present invention provides a programmable low dropout linear regulator using a reference voltage to convert an input voltage into a regulated voltage according to a control signal. The programmable low dropout linear regulator includes an operational amplifier having a negative input coupled to receive the reference voltage, a first transistor having a gate coupled to an output terminal of the operational amplifier and a first source/drain coupled to an output terminal of the regulated voltage, a first impedance coupled between a positive input of the operational amplifier and the output terminal of the regulated voltage, and a second impedance coupled between the positive input of the operational amplifier and a ground. The second impedance includes a second transistor having a gate coupled to receive the control signal.

Abstract: An integrated circuit voltage regulator uses a simple CMOS structure to implement a High Unity Gain BandWidth voltage regulator providing for low voltage ripple at the output of the regulator up to high frequencies in the hundreds of MHz range. A transconductor first stage is followed by an impedance cancellation second stage allowing DC gain to be set completely independently of the bandwidth.

Abstract: A low drop-out regulator circuit includes a control circuit and a switching device. The control circuit has an output node. The switching device has a first terminal coupled with the output node of the control circuit. The switching device is configured to receive an input voltage at a second terminal of the switching device and provide an output voltage at a third terminal of the switching device. The control circuit is configured to provide a digital signal at the output node of the control circuit based on a feedback voltage of the output voltage at the third terminal of the switching device.

Abstract: A linear current regulator is disclosed herein, which comprises a first amplifier, a current converter unit, a first resistor, a reference current source, a regulating unit, and a reference voltage circuit. The current converter unit converts voltage level of an non-inverting input end of the first amplifier into a regulated current and outputs it. The first resistor is coupled to an inverting input end and an output end of the first amplifier. The reference current source is coupled to the inverting input end of the first amplifier and the first resistor. The regulating unit is coupled to the reference current source and outputs a current signal for adjusting a reference current of the reference current source. The reference voltage circuit has at least two input ends. The reference voltage circuit has one input end coupled to a reference voltage and another input end coupled to the first amplifier.

Abstract: The disclosed embodiments relate to a power-supply circuit, an electronic device that includes the power-supply circuit, and a method for generating high-voltage DC power from AC line power using the power-supply circuit. This power-supply circuit includes a voltage multiplier and a low dropout (LDO) regulator, and does not include a step-up transformer. Conventional power supplies often use a custom step-up transformer, which is expensive unless the power supplies are manufactured in high quantities. In contrast, one embodiment of the present disclosure provides a solid-state implementation of a 700 V regulated power supply that can take up to a 1020 V input from an 6× voltage multiplier powered from the AC mains. Hence, the disclosed power-supply circuit eliminates the need for large, heavy and expensive step-up transformers and chokes that are used in conventional high-voltage DC power supplies.

Abstract: A method involves regulating an output voltage of an output transistor of a voltage regulator circuit by providing a first voltage to a front gate of the output transistor, and simultaneously with providing the first voltage to the output transistor, providing a second voltage to a back gate of the output transistor, in a manner that regulates the output voltage around a target value.

Abstract: A magnetic field sensor has internal power supply generating circuits to generate a higher operating voltage for a magnetic field sensing element, resulting in a magnetic field sensor with improved sensitivity to magnetic fields.

Abstract: An active leakage consuming module (1001) is to be added to an LDO regulator without modification of the structure of this latter. The module provides a low-power operating mode with reduced current consumption, without impairing an operation of the LDO regulator for higher currents output by said LDO regulator. The module comprises a leakage current path (54) and control means (40, 50) for conducting consumed current below a threshold out of a pull-down path of the LDO regulator.

Abstract: A voltage generator includes a controllable voltage divider, a pull-up circuit and a first pull-down circuit. The controllable voltage divider is utilized for generating an output voltage at an output node of the controllable voltage divider according to a first reference voltage, a second reference voltage, and a control signal, wherein the second reference voltage is lower than the first reference voltage. The pull-up circuit is coupled to the output node of the controllable voltage divider and the first reference voltage, and is utilized for selectively connecting the first reference voltage to the output node of the controllable voltage divider. The first pull-down circuit is coupled to the output node of the controllable voltage divider and the second reference voltage, and is utilized for selectively connecting the second reference voltage to the output node of the controllable voltage divider.

Abstract: A voltage regulator circuit comprises active and standby amplifiers, first and second transistors, and a capacitor. The active amplifier has a negative input connected to a first reference voltage, and the standby amplifier has a negative input connected to a second reference voltage. The first reference voltage is greater than the second reference voltage. The first transistor has a gate connected to an output of the active amplifier and a drain connected to a voltage regulated output, and the second transistor has a gate connected to an output of the standby amplifier and a drain connected to the voltage regulated output. The capacitor is connected between a chip enable signal and the voltage regulated output.