With Voltage Or Current Signal Evaluation Patents (Class 324/713)
  • Patent number: 7129718
    Abstract: A structure and a method for measuring the bonding resistance are provided. The structure for measuring a bonding resistance between a first object and a second object is provided, wherein the first object has a plurality of first pins and a reference pin, and the second object has a plurality of second pins corresponding to the plurality of first pins and the reference pin. The structure further includes a first circuit formed by electrically connecting the reference pin to the first pin adjacent to the reference pin in a first direction, and a second circuit formed by electrically connecting a second pin corresponding to the reference pin to the adjacent second pin in a second direction. By connecting the first and the second circuits in series, the value of the bonding resistance is easily measured.
    Type: Grant
    Filed: April 27, 2006
    Date of Patent: October 31, 2006
    Assignee: Hannstar Display Corp.
    Inventors: Shu-Lin Ho, Shih-Chieh Wang
  • Patent number: 7126348
    Abstract: Measuring equipment for forming a measured value for voltage representing an ac voltage on a high-voltage conductor. The measuring equipment includes capacitor equipment with a known capacitance for connection between the high-voltage conductor and ground potential. The measuring equipment further includes a current-measurer for sensing a capacitor current flowing through the capacitor equipment and for forming the measured value for voltage in dependence on the capacitor current.
    Type: Grant
    Filed: December 18, 2003
    Date of Patent: October 24, 2006
    Assignee: ABB AB
    Inventors: Morgan Adolfsson, Jan Lundquist, Jürgen Häfner
  • Patent number: 7126354
    Abstract: A circuit configuration has a load transistor and a current measuring configuration. A method ascertains a load current through a load transistor. The circuit configuration includes a first and a second current sensor with a current measuring transistor in each case. Each of the current sensors provide a current measurement signal that is fed to an evaluation circuit. The evaluation circuit provides, from the first current measurement signal, a current measurement signal that is dependent on the load current. The load transistor and the current measuring transistors are preferably integrated in a common semiconductor body having a multiplicity of transistor cells of identical construction. The evaluation circuit preferably accounts for the spatial position of the cells of the first and second current measuring transistors in the cell array.
    Type: Grant
    Filed: September 4, 2003
    Date of Patent: October 24, 2006
    Assignee: Infineon Technologies AG
    Inventors: Gerald Deboy, Ilia Zverev
  • Patent number: 7126353
    Abstract: The invention relates to a method and a circuit arrangement for determining an electric measurement value for a resistance element (R22), preferably for determining an electric current that flows through said resistance element (R22), whereby the resistance element (R22) to be measured is interconnected to additional resistance elements within a resistance array (2) consisting of columns (CL1, CL2, CL3) and rows (R1, R2, R3) of resistance elements. According to the invention, the load of a basic load resistance element (R13), which is connected between the output of a measurement/supply unit (1) and the common ground terminal connection of the resistance array (2), is applied to the measurement voltage (MEAS). The measurement voltage (MEAS) is simultaneously connected to the input of an impedance transformer (OCL, OR), whose output is connected in a subsequent step to the resistance elements in the resistance array (2) that are not to be measured.
    Type: Grant
    Filed: October 22, 2003
    Date of Patent: October 24, 2006
    Assignee: Siemens Aktiengesellschaft
    Inventors: Arnulf Pietsch, Karlheinz Wamke, Gerhard Wild
  • Patent number: 7126326
    Abstract: The disclosure relates to a semiconductor device testing apparatus, a semiconductor device testing system, and a semiconductor device testing method, in particular a method for measuring or trimming, respectively, the impedance of driver devices provided in a semiconductor device, wherein a device, in particular a driver device, comprising each a pull-up circuit and a pull-down circuit is used, and wherein the method includes: joint activating of both the pull-up circuit and the pull-down circuit; and determining a first current flowing through the pull-up circuit or the pull-down circuit, respectively, with jointly activated pull-up and pull-down circuits.
    Type: Grant
    Filed: September 16, 2003
    Date of Patent: October 24, 2006
    Assignee: Infineon Technologies AG
    Inventor: Georg Muller
  • Patent number: 7123032
    Abstract: A voltage sensor is described that consists of an arrangement of impedance elements. The sensor is optimized to provide an output ratio that is substantially immune to changes in voltage, temperature variations or aging. Also disclosed is a material with a large and stable dielectric constant. The dielectric constant can be tailored to vary with position or direction in the material.
    Type: Grant
    Filed: December 3, 2004
    Date of Patent: October 17, 2006
    Assignee: FieldMetrics, Inc.
    Inventors: Christopher Paul Yakymyshyn, Pamela Jane Yakymyshyn, Michael Allen Brubaker
  • Patent number: 7123019
    Abstract: A polarographic densitometer has a voltage applying circuit, a sensor unit, an impedance reduction circuit, and a current/density conversion unit. The voltage applying circuit applies specified voltage, and the sensor unit includes a group of electrodes to produce a current output in response to any reaction caused in a specimen when the specified voltage is applied by the voltage applying circuit. Furthermore, the impedance reduction circuit reduces impedance of the specimen between the electrodes of the group, and the current/density conversion unit converts the current output of the sensor unit when the impedance is reduced by the impedance reduction circuit into the density of specific material in the specimen.
    Type: Grant
    Filed: May 25, 2005
    Date of Patent: October 17, 2006
    Assignee: Tanita Corporation
    Inventor: Shinichi Harima
  • Patent number: 7123033
    Abstract: A method and an apparatus to detect low voltage have been disclosed. One embodiment of the apparatus includes a main circuit powered at a supply voltage, wherein the supply voltage changes over time and a test circuit coupled to the main circuit, the test circuit being representative of a voltage sensitivity of the main circuit to dynamically determine if the supply voltage is above a minimum voltage at which the main circuit operates correctly, wherein the minimum voltage changes over at least one of a temperature and a time and between different instances of the main circuit.
    Type: Grant
    Filed: September 20, 2004
    Date of Patent: October 17, 2006
    Assignee: Cypress Semiconductor Corporation
    Inventor: David G. Wright
  • Patent number: 7106076
    Abstract: An electrode, in the form of a spike, for insertion into a sample, has a large-area jacket adapted for applying an excitation current to the sample and a small-area tip electrically decoupled from the jacket, at which a potential measurement is made.
    Type: Grant
    Filed: August 22, 2003
    Date of Patent: September 12, 2006
    Assignee: Forschungszentrum Julich GmbH
    Inventors: Axel Tillmann, Andreas Kemna, Egon Zimmermann, Walter Glaas, Arre Verweerd
  • Patent number: 7091728
    Abstract: A high-isolation call cord switch includes connectivity for a standard hospital-style push-button call cord while using low voltage alternating current to isolate detection circuitry from static electricity. An alternating current signal is used to permit transformer coupling, with its intrinsic isolation capability, between the call cord switch and the detection circuit.
    Type: Grant
    Filed: August 27, 2004
    Date of Patent: August 15, 2006
    Assignee: GENCSUS
    Inventors: Guy Drouin, Martin Beaumont, René Goulet
  • Patent number: 7084648
    Abstract: A method of testing a semiconductor circuit including a pair of contact pads, a biasing circuit for applying a voltage to the pair of contact pads, and a sensing circuit for providing a signal indicative of the voltage applied across the contact pads. The method includes determining a voltage gain and voltage offset of the sensing circuit while the biasing circuit is disabled. The method also includes enabling the biasing circuit to produce a voltage across the contact pads and determining, from the resulting output voltage produced by the sensing circuit, an actual output voltage produced by the biasing circuit at the contact pads based on the determined voltage gain and voltage offset of the sensing circuit.
    Type: Grant
    Filed: September 29, 2004
    Date of Patent: August 1, 2006
    Assignee: Agere Systems Inc.
    Inventors: David J. Fitzgerald, David W. Kelly
  • Patent number: 7084647
    Abstract: A transmitter having an improved current output is provided, having: a sensor (1), which serves to register a physical quantity (X) and to convert such to an electrical quantity; electronics, which converts the electrical quantity into a measurement signal and makes such available at an electrical current output in the form of a signal current (I) corresponding to the physical quantity; and a pick-up unit having a magnetoresistive element, whose resistance changes as a function of the magnetic flux (?) produced by the signal current (I).
    Type: Grant
    Filed: March 13, 2003
    Date of Patent: August 1, 2006
    Assignee: Endress + Hauser GmbH + Co. KG
    Inventors: Bernd Rosskopf, Hans-Jorg Brock
  • Patent number: 7078920
    Abstract: A test pattern used for testing an electrical characteristic of a semiconductor substrate, includes: a first conductive pattern formed on a lower surface of the semiconductor substrate; a second conductive pattern formed on an upper surface of the semiconductor substrate; first and second electrodes formed on the second conductive pattern, the electrodes being connected to test probes; and a first test via-hole formed through the semiconductor substrate to connect the first and second conductive pattern electrically to each other.
    Type: Grant
    Filed: October 25, 2004
    Date of Patent: July 18, 2006
    Assignee: Oki Electric Industry Co., Ltd.
    Inventor: Takehiko Okajima
  • Patent number: 7068053
    Abstract: An orientation sensor especially suitable for use in an underground device is disclosed herein. This orientation sensor includes a sensor housing defining a closed internal chamber, an arrangement of electrically conductive members in a predetermined positional relationship to one another within the chamber and a flowable material contained within the housing chamber and through which electrical connections between the electrically conductive members are made such that a comparison between an electrical property, specifically voltage, of a first combination of conductive members to the corresponding electrical property of a second combination of conductive members can be used to determine a particular orientation parameter, specifically pitch or roll of the sensor.
    Type: Grant
    Filed: May 16, 2005
    Date of Patent: June 27, 2006
    Assignee: Merlin Technology Inc
    Inventors: Rudolf Zeller, John E. Mercer
  • Patent number: 7064563
    Abstract: A structure and a method for measuring the bonding resistance are provided. The structure for measuring a bonding resistance between a first object and a second object is provided, wherein the first object has a plurality of first pins and a reference pin, and the second object has a plurality of second pins corresponding to the plurality of first pins and the reference pin. The structure further includes a first circuit formed by electrically connecting the reference pin to the first pin adjacent to the reference pin in a first direction, and a second circuit formed by electrically connecting a second pin corresponding to the reference pin to the adjacent second pin in a second direction. By connecting the first and the second circuits in series, the value of the bonding resistance is easily measured.
    Type: Grant
    Filed: August 17, 2004
    Date of Patent: June 20, 2006
    Assignee: Hannstar Display Corp.
    Inventors: Shu-Lin Ho, Shih-Chieh Wang
  • Patent number: 7064564
    Abstract: A probe apparatus having probe groups comprising two or three probes that independently contact single terminals of tested chips. As a result, the probe apparatus is capable of recognizing voltage drops of a test signal applied prior to the chip testing onto a test path along two or three probes contacting, the terminal and the interfaces between them. The test path does not pass through the chip. An electronic circuit measures the voltage drops and compensated accordingly operational signals passing through the terminals, the probes and the interfaces during the chip testing. A first embodiment comprises two probes per group. A second embodiment comprises three probes per group. In the second embodiment, the variable resistance component of three resistance measurements of first/second, first/third and second/third resistance paths are compared by the electronic circuit, in order to determine absolute resistance values for each of the three signal paths.
    Type: Grant
    Filed: February 1, 2001
    Date of Patent: June 20, 2006
    Assignee: Antares conTech, Inc.
    Inventors: January Kister, Krzysztof Dabrowiecki
  • Patent number: 7057401
    Abstract: A system for testing and documenting the electrical wiring in a building, for example, includes a Portable Circuit Analyzer (PCA) that is connected to the building's Load Center through an umbilical cord. The PCA is in wireless communication with a hand-held computer device, such as a personal digital assistant (PDA) as now widely available, provided with custom software according to the invention. The electrician connects the PCA in succession to each circuit in the building, operating each switch, and each fixture or appliance, while recording the test results of the circuit element on the PDA. The PCA measures the resistance and length of each circuit thus established. When the test process is completed, the PDA is enabled to generate a complete schematic diagram of the building, including, for example, an identification of the branch circuit to which each fixture, outlet, appliance, or other load or connection point is connected.
    Type: Grant
    Filed: March 21, 2005
    Date of Patent: June 6, 2006
    Assignee: Pass & Seymour, Inc.
    Inventor: Frederick K. Blades
  • Patent number: 7053634
    Abstract: A test pattern for testing contact resistance of a subject via hole. The test pattern includes first and second conductive patterns respectively formed on lower and upper substrate surfaces and connected to the subject via hole. First and second electrodes are formed on the second conductive pattern. Third and fourth electrodes are formed on the substrate upper surface. First and second test via-holes are formed through the substrate to connect the first conductive pattern to the third electrode and the first conductive pattern to the fourth electrode, respectively. The first and third electrodes are connected to a current test probe so that a test current flows through the first electrode, the subject via hole, the test via-hole and then the third electrode. The second and fourth electrodes are connected to a voltage test probe so as that a test voltage is applied through the second electrode, the subject via hole, the second test via-hole and then the fourth electrode.
    Type: Grant
    Filed: May 23, 2003
    Date of Patent: May 30, 2006
    Assignee: Oki Electric Industry Co., Ltd.
    Inventor: Takehiko Okajima
  • Patent number: 7049832
    Abstract: Circuit arrangement for determining the load current through an inductive load (L) connected to a supply voltage (Vbat) in a clocked manner includes a current measuring impedance (30) which can be connected in series with the inductive load (L), a first and second connecting terminal (31, 32), a measuring amplifier (20) having a first and second input (21, 22) and an output (23), and a level shifter arrangement (40) having first and second inputs (41, 42) and first and second outputs (43, 44) The arrangement is designed to map a potential present at the first input terminal (41) onto a potential shifted by a predetermined potential value at the first output terminal (43) and to map a potential present at the second input terminal (42) onto a potential shifted by a predetermined potential value at the second output terminal (44).
    Type: Grant
    Filed: February 11, 2005
    Date of Patent: May 23, 2006
    Assignee: Infineon Technologies AG
    Inventors: Heinz Novak, Martin Allram, Michael Hausmann
  • Patent number: 7049833
    Abstract: The present invention provides an apparatus and method for improving the accuracy of circuits. The apparatus includes a replicate circuit and a trim determination circuit. The trim determination circuit includes a measurable circuit element and determines the state of the measurable element. The replicate circuit includes a replicate circuit element which has similar electrical characteristics as the measurable element, and is configured to aid in determining an adjustable test current. The trim determination circuit generates a test current which is proportional to the adjustable test current. The test current is passed through the measurable element such that a first voltage drop occurs across the measurable element. A measured current is generated at a current level dictated by the voltage drop across the measurable element, such that the state of the measurable element is determined by the difference between the measured current and a scaled reference current.
    Type: Grant
    Filed: May 2, 2005
    Date of Patent: May 23, 2006
    Assignee: Micrel, Incorporation
    Inventors: David J. Kunst, Charles L. Vinn
  • Patent number: 7034554
    Abstract: The difference in voltages measured upstream and downstream of a pressure junction in a power distribution system produced by the energizing power is divided by the measured current to calculate a value that is a function of the impedance of the pressure junction, which is monitored for deterioration. To eliminate noise resulting from dividing a small number by a large number and transients in the power distribution system, the impedance is calculated from the squares of the voltage differences and currents for a large number of samples, and the change between successive calculations is limited to produce a stable median value.
    Type: Grant
    Filed: August 19, 2003
    Date of Patent: April 25, 2006
    Assignee: Eaton Corporation
    Inventor: David G. Loucks
  • Patent number: 7023223
    Abstract: An electrostatic capacitance detection circuit 10 comprises an AC voltage generator 11, an operational amplifier 14 of which non-inverting input terminal is connected to specific potential (a ground in this example), an impedance converter 16, a resistance (R1) 12 connected between the AC voltage generator 11 and an inverting input terminal of the operational amplifier 14, a resistance (R2) 13 connected between the inverting input terminal of the operational amplifier 14 and an output terminal of the impedance converter 16, and an impedance element (a capacitor) 15 connected between an output terminal of the operational amplifier 14 and an input terminal of the impedance converter 16. A capacitor to be detected 17 is connected between the input terminal of the impedance converter 16 and the specific potential.
    Type: Grant
    Filed: September 6, 2002
    Date of Patent: April 4, 2006
    Assignee: Tokyo Electron Limited
    Inventors: Masami Yakabe, Naoki Ikeuchi, Toshiyuki Matsumoto, Koichi Nakano
  • Patent number: 7019543
    Abstract: An apparatus (14) for and method of measuring impedance in a capacitively coupled plasma reactor system (10). The apparatus includes a high-frequency RF source (150) in electrical communication with an upper electrode (50). A first high-pass filter (130) is arranged between the upper electrode and the high-frequency RF source, to block low-frequency, high-voltage signals from the electrode RF power source (66) from passing through to the impedance measuring circuit A current-voltage probe (140) is arranged between the high-frequency source and the high-pass filter, and is used to measure the current and voltage of the probe signal with and without the plasma present. An amplifier (250) is electrically connected to the current-voltage probe, and a data acquisition unit (260) is electrically connected to the amplifier.
    Type: Grant
    Filed: March 14, 2002
    Date of Patent: March 28, 2006
    Assignee: Tokyo Electron Limited
    Inventor: Bill H. Quon
  • Patent number: 7005867
    Abstract: A power supply circuit is provided that supplies a voltage to a load. The power supply circuit includes a power supply for generating a predetermined voltage; an electrical path for electrically connecting the power supply and the load to each other; a current draw unit for drawing a current from the electrical path; and a current control unit for controlling the current drawn by the current draw unit from the electrical path.
    Type: Grant
    Filed: December 5, 2003
    Date of Patent: February 28, 2006
    Assignee: Advantest Corporation
    Inventor: Yoshihiro Hashimoto
  • Patent number: 6984995
    Abstract: An Audio Feedback Impedance Comparison Device to audibly express Impedance differences between/amongst components, circuits, materials, substances etc., to make use of the aural sense, while relieving eye, neck and mental strain, as well as reduce probe time. This is achieved by allowing simultaneous yet focused attention to be paid to all aspects of an impedance probe, i.e. hand-eye coordination of probe positioning, while aurally monitoring the feedback, instead of the common practices/methods where eyes have to be re-focused on visual feedback devices. The use of an alternating signal allows “through” comparison, where multiple components some of which are impervious to static signal, contribute to overall impedance. The device can be used to inject and/or detect/trace the presence of an audio signal in an active circuit. With the aid of transducers, this Device may be used with other forms of energy.
    Type: Grant
    Filed: August 29, 2001
    Date of Patent: January 10, 2006
    Inventor: Clifton Lawrence
  • Patent number: 6977513
    Abstract: A bidirectional main switch includes two main switches M1 and M2 formed of two main MOSFET'S Q1 and Q2, respectively; a bidirectional mirror switch including two mirror switches M3 and M4 formed of two mirror MOSFET'S Q3 and Q4, respectively, both being formed so as to allow a small current (a mirror current) to flow therein in a specified ratio to a current in the main MOSFET'S Q1 and Q2; and an operational amplifier Op1 forming feed back amplifying circuit having power supplied from two power sources. Thus, a bidirectional current flowing in the bidirectional main switch for cutting off an excessive charge current and an excessive discharge current of a battery E can be detected by a simple circuit with low power losses and a high accuracy.
    Type: Grant
    Filed: November 30, 2004
    Date of Patent: December 20, 2005
    Assignee: Fuji Electric Holdings Co., Ltd.
    Inventor: Shinichiro Matsunaga
  • Patent number: 6970003
    Abstract: A field device includes circuitry to successively measure a parameter related to current drawn by electronics of the field device. The measurements are provided to a prediction engine which calculates a diagnostic output based upon the plurality of current-related measurements. The diagnostic prediction provided by the prediction engine can provide an estimate of viable life remaining for the device electronics. The diagnostic feature provides on-line status of the overall status of the field transmitter.
    Type: Grant
    Filed: March 5, 2001
    Date of Patent: November 29, 2005
    Assignee: Rosemount Inc.
    Inventors: Gregory H. Rome, Evren Eryurek, Kadir Kavaklioglu
  • Patent number: 6967397
    Abstract: A MCP semiconductor device includes at least first and second chips, each of which has internal pads and an internal circuit, encapsulated by a sealing material together. The device further includes a test circuit. The test circuit connects each of the internal pads to one of the internal circuits under a normal operation mode of the device, and disconnect between them under a test mode.
    Type: Grant
    Filed: December 30, 2003
    Date of Patent: November 22, 2005
    Assignee: Oki Electric Industry Co., Ltd.
    Inventors: Kazutoshi Inoue, Mitsuya Ohie
  • Patent number: 6933734
    Abstract: The vehicle controller performs the overheat detection on the resistor of an electric vehicle that consumes power generated at a time of braking as Joule heat of the resistor, and includes: a calculator (15) for calculating a resistance value (R) of the braking resistor (11) from a current value (I) of a current flowing through a braking resistor (11) and a voltage value (V) of a voltage generated between both ends of the braking resistor (11); and a comparator (16) for comparing the resistance value (R) calculated by the calculator (15) and a resistance value (Rmax) at an allowable temperature of the braking resistor (11) that has been calculated in advance, and when the resistance value (R) is larger, judging that the overheat is detected from the braking resistor (11).
    Type: Grant
    Filed: April 1, 2004
    Date of Patent: August 23, 2005
    Assignee: Mitsubishi Denki Kabushiki Kaisha
    Inventor: Shigeru Kojima
  • Patent number: 6927584
    Abstract: A circuit includes i sensors interconnected in an (n×m) matrix circuit with n row conductors and m column conductors, where i, n, and m are natural numbers different than zero and where 1?i?n×m, each of the n row and m column conductors include a first and a second conductor end. The first conductor end of the n row conductors and the m column conductors is connectable to an evaluation circuit, and each of the i sensors are connected between two respective conductors from the n row and the m column conductors. A first conductor end of an at least one return conductor is connectable to the evaluation circuit and a second conductor end of the at least one return conductor is in contact with the second conductor end of one of the n row conductors or one of the m column conductors.
    Type: Grant
    Filed: March 11, 2002
    Date of Patent: August 9, 2005
    Assignee: IEE International Electronics & Engineering S.A.
    Inventor: Martin Thinnes
  • Patent number: 6922066
    Abstract: In a sampler for use in measuring a waveform of an electric signal, a measurement target current is given as the electric signal to a sampler chip 11 and is also used to produce a trigger current Itr for determining measurement timing on the sampler chip. A comparator 20 compares a sum of a feedback current, a current derived from the measurement target current, and the trigger current Itr with a threshold value to produce an SFQ pulse when the sum exceeds the threshold value. The SFQ pulse produced by the comparator is observed or counted for a predetermined duration to measure the waveform of the electric signal.
    Type: Grant
    Filed: July 16, 2002
    Date of Patent: July 26, 2005
    Assignees: NEC Corporation, International Superconductivity Technology Center
    Inventor: Mutsuo Hidaka
  • Patent number: 6911831
    Abstract: In a method for fast, high-accuracy autoranging measurement, a current detection resistance is shared by a current measurement apparatus and a voltage source with current limiting function, a value of current output from the voltage source via the resistance being measured by the current measurement apparatus, and the current range of the current measurement apparatus and the compliance being automatically changed in accordance with the measured current value.
    Type: Grant
    Filed: December 15, 2003
    Date of Patent: June 28, 2005
    Assignee: Agilent Technologies, Inc.
    Inventor: Junko Tsutsui
  • Patent number: 6906536
    Abstract: An arrangement for measuring current through a phase section of a buck mode DC-DC converter includes an auxiliary integrated circuit containing an auxiliary power MOSFET and a pilot MOSFET coupled in parallel with a current path through a high side MOSFET of a half-bridge of the converter. The pilot MOSFET has a current path coupled to a current measurement terminal. The MOSFETs of the auxiliary circuit are time division multiplexed with the high side MOSFET, whereby a determination of current through the auxiliary high side MOSFET is based upon current through the pilot device and the geometric ratio of the size of the pilot device to that of the high side auxiliary MOSFET. The high side MOSFET is activated for a large number of switching cycles relative to the pilot circuitry, but the pilot circuitry is activated sufficiently often to derive a relatively accurate measure of current flow.
    Type: Grant
    Filed: November 24, 2003
    Date of Patent: June 14, 2005
    Assignee: Intersil Americans Inc.
    Inventors: Lawrence George Pearce, William David Bartlett
  • Patent number: 6906535
    Abstract: A method is provided for characterizing emulsion stability to evaluate suitability of the emulsion for use as a drilling fluid in drilling subterranean boreholes. The method provides a supplement or alternative to the standard method of determining Electrical Stability of the emulsion. In the method of the invention, Breakdown Energy is calculated. Breakdown Energy can be measured at the same test point as Electrical Stability. A digital storage oscilloscope and a computer are used in addition to an electrical stability meter.
    Type: Grant
    Filed: May 2, 2002
    Date of Patent: June 14, 2005
    Assignee: Halliburton Energy Services, Inc.
    Inventors: Robert J. Murphy, Jr., Dale E. Jamison
  • Patent number: 6903560
    Abstract: An orientation sensor especially suitable for use in an underground device is disclosed herein. This orientation sensor includes a sensor housing defining a closed internal chamber, an arrangement of electrically conductive members in a predetermined positional relationship to one another within the chamber and a flowable material contained within the housing chamber and through which electrical connections between the electrically conductive members are made such that a comparison between an electrical property, specifically voltage, of a first combination of conductive members to the corresponding electrical property of a second combination of conductive members can be used to determine a particular orientation parameter, specifically pitch or roll of the sensor.
    Type: Grant
    Filed: November 17, 2003
    Date of Patent: June 7, 2005
    Assignee: Merlin Technology, Inc.
    Inventors: Rudolf Zeller, John E. Mercer
  • Patent number: 6903559
    Abstract: A system may include a first diode and a device coupled to the first diode. The device may be adapted to transmit a first current through the first diode, to determine a first voltage across the first diode, the first voltage associated with the first current, to transmit a second current through the first diode, and to determine a second voltage across the first diode, the second voltage associated with the second current. The device may be further adapted to transmit a third current through the first diode, to determine a third voltage across the first diode, the third voltage associated with the third current, and to determine a temperature of the first diode based at least in part on the first voltage, the second voltage and the third voltage.
    Type: Grant
    Filed: October 6, 2003
    Date of Patent: June 7, 2005
    Assignee: Intel Corporation
    Inventor: Jason A. Gayman
  • Patent number: 6897554
    Abstract: A MCP semiconductor device includes at least first and second chips, each of which has internal pads and an internal circuit, encapsulated by a sealing material together. The device further includes a test circuit. The test circuit connects each of the internal pads to one of the internal circuits under a normal operation mode of the device, and disconnect between them under a test mode.
    Type: Grant
    Filed: December 30, 2003
    Date of Patent: May 24, 2005
    Assignee: Oki Electric Industry Co., Ltd.
    Inventors: Kazutoshi Inoue, Mitsuya Ohie
  • Patent number: 6897662
    Abstract: The present invention provides an apparatus and method for improving the accuracy of circuits. The apparatus includes a replicate circuit and a trim determination circuit. The trim determination circuit includes a measurable circuit element and determines the state of the measurable element. The replicate circuit includes a replicate circuit element which has similar electrical characteristics as the measurable element, and is configured to aid in determining an adjustable test current. The trim determination circuit generates a test current which is proportional to the adjustable test current. The test current is passed through the measurable element such that a first voltage drop occurs across the measurable element. A measured current is generated at a current level dictated by the voltage drop across the measurable element, such that the state of the measurable element is determined by the difference between the measured current and a scaled reference current.
    Type: Grant
    Filed: October 26, 2001
    Date of Patent: May 24, 2005
    Assignee: Micrel, Incorporated
    Inventors: David J. Kunst, Charles L. Vinn
  • Patent number: 6885952
    Abstract: A method for determining a power source voltage level of a power source in a system in which the power source is connected to a microcontroller. A charging circuit is in direct communication with a pin of the microcontroller and the power source voltage level is determined by charging the charging circuit using a constant voltage level and determining a time when the charging circuit attains a voltage level sufficient to transition the pin of the microcontroller from a state corresponding to a logic “0” to a state corresponding to a logic “1.” The determined time and a predetermined relationship between the power source voltage level and an input port transition voltage value of the microcontroller is then used to determine the power source voltage level of the power source.
    Type: Grant
    Filed: April 9, 2003
    Date of Patent: April 26, 2005
    Assignee: Universal Electronics Inc.
    Inventor: Patrick H. Hayes
  • Patent number: 6885094
    Abstract: A MCP semiconductor device includes at least first and second chips, each of which has internal pads and an internal circuit, encapsulated by a sealing material together. The device further includes a test circuit. The test circuit connects each of the internal pads to one of the internal circuits under a normal operation mode of the device, and disconnect between them under a test mode.
    Type: Grant
    Filed: December 30, 2003
    Date of Patent: April 26, 2005
    Assignee: Oki Electric Industry Co., Ltd.
    Inventors: Kazutoshi Inoue, Mitsuya Ohie
  • Patent number: 6885095
    Abstract: A MCP semiconductor device includes at least first and second chips, each of which has internal pads and an internal circuit, encapsulated by a sealing material together. The device further includes a test circuit. The test circuit connects each of the internal pads to one of the internal circuits under a normal operation mode of the device, and disconnect between them under a test mode.
    Type: Grant
    Filed: December 30, 2003
    Date of Patent: April 26, 2005
    Assignee: Oki Electric Industry Co., Ltd.
    Inventors: Kazutoshi Inoue, Mitsuya Ohie
  • Patent number: 6879175
    Abstract: A channel for use in automatic test equipment and adapted for coupling to a device-under-test is disclosed. The channel includes a driver and respective AC and DC-coupled signal paths. The AC-coupled signal path is disposed at the output of the driver and is configured to propagate signal components at and above a predetermined frequency. The DC-coupled signal path is disposed in parallel with the AC-coupled signal path and is configured to propagate signal components from DC to the predetermined frequency.
    Type: Grant
    Filed: March 31, 2003
    Date of Patent: April 12, 2005
    Assignee: Teradyne, Inc.
    Inventor: George W. Conner
  • Patent number: 6867605
    Abstract: A device for measuring the probe impedance of a linear lambda probe of an internal combustion engine which is caused by an AC current measurement signal which is fed into the lambda probe, comprises a voltage amplifier for amplifying an AC voltage which drops across the probe impedance, and a rectifier for rectifying the amplified AC voltage, wherein the rectifier is a synchronous demodulator, by which in each case the upper and lower amplitude of the AC voltage signal is sampled with its frequency, filtered and stored, and by which the difference of the stored signals is amplified with a gain factor and made available as output signal at its output for controlling the temperature of the lambda probe.
    Type: Grant
    Filed: January 13, 2003
    Date of Patent: March 15, 2005
    Assignee: Siemens Aktiengesellschaft
    Inventor: Stephan Bolz
  • Patent number: 6864693
    Abstract: A semiconductor integrated circuit is provided in which a negative voltage generation circuit capable of supplying a memory cell transistor substrate with a stable negative voltage, independently of the fluctuation of a power source voltage or environmental conditions and the process conditions etc., is realized easily, and in which the data holding time of a memory can be secured sufficiently, and the power consumption is reduced.
    Type: Grant
    Filed: May 10, 2001
    Date of Patent: March 8, 2005
    Assignee: Matsushita Electric Industrial Co., Ltd.
    Inventors: Masataka Kondo, Kiyoto Ohta, Tomonori Fujimoto
  • Patent number: 6861850
    Abstract: A device for measuring the internal resistance (Ris) of a linear lambda probe (S) of an internal combustion engine is disclosed. The device comprises a voltage amplifier (V6) for amplifying an alternating voltage (VOSZ), which declines to the internal resistance (Ris) and which is induced by an alternating current applied to the first probe terminal Vs+. The inventive device also comprises a synchronous demodulator (V7) for rectifying the amplified alternating voltage (VEIN) and a successive filtering whose amplification factor can be switched over with the frequency of the alternating voltage (VOSZ).
    Type: Grant
    Filed: December 16, 2002
    Date of Patent: March 1, 2005
    Assignee: Siemens Aktiengesellschaft
    Inventor: Stephan Bolz
  • Patent number: 6859051
    Abstract: The present invention synthesizes a prescribed impedance. The impedance is synthesized by generating a current having a value substantially equal to a voltage divided by a prescribed impedance. Sensing the line voltage and converting that sensed line voltage to its digital equivalent accomplish this first step. The digital line voltage is processed by a factor related to the prescribed impedance to produce an output voltage that has a value substantially equal to the sensed voltage divided by the prescribed impedance. The output voltage controls a voltage to current converter that generates the appropriate current across the points or terminals where the line voltage was measured. Thus, the prescribed impedance is generated across these points or terminals because the line voltage divided by the generated current is substantially equal to the prescribed impedance.
    Type: Grant
    Filed: June 2, 2003
    Date of Patent: February 22, 2005
    Assignee: 3Com Corporation
    Inventors: Spiro Poulis, John Evans, Shayne Messerly
  • Patent number: 6856148
    Abstract: A method for evaluating a power distribution network for a circuit has steps of creating a circuit model of the circuit in which all wires and transistors are represented as circuit elements, with the model comprising a plurality of nodes. A DC power analysis is performed on the circuit model to determine voltage drops at a plurality of the nodes.
    Type: Grant
    Filed: March 8, 2002
    Date of Patent: February 15, 2005
    Assignee: Hewlett-Packard Development Company, L.P.
    Inventor: Paul Robert Bodenstab
  • Patent number: 6856147
    Abstract: An improved system for determining the value of a resistive load is provided. The system includes: a reference voltage source; a reference resistor of known value having a first and second terminal, the first terminal connected to the reference voltage source and the second terminal connected to the resistive load; and a software program stored in a control unit connected to the first and second terminal, the control unit operative to read a value of the reference voltage source and a voltage at the second terminal of the predetermined reference resistor and to calculate the value of the resistive load as a function of the readings of the reference voltage source and the second terminal voltages.
    Type: Grant
    Filed: January 15, 2003
    Date of Patent: February 15, 2005
    Assignee: DaimlerChrysler Corporation
    Inventors: Mikhail Zarkhin, Timothy P Philippart, Roger A. Moon
  • Patent number: 6847267
    Abstract: Systems and methods are described for transmitting a waveform having a controllable attenuation and propagation velocity. An exemplary method comprises: generating an exponential waveform, the exponential waveform (a) being characterized by the equation Vin=De?ASD(x?vSDt), where D is a magnitude, Vin is a voltage, t is time, ASD is an attenuation coefficient, and VSD is a propagation velocity; and (b) being truncated at a maximum value. An exemplary apparatus comprises: an exponential waveform generator; an input recorder coupled to an output of the exponential waveform generator; a transmission line under test coupled to the output of the exponential waveform generator; an output recorder coupled to the transmission line under test; an additional transmission line coupled to the transmission line under test; and a termination impedance coupled to the additional transmission line and to a ground.
    Type: Grant
    Filed: August 20, 2002
    Date of Patent: January 25, 2005
    Assignee: Board of Regents, The University of Texas System
    Inventors: Robert H. Flake, John F. Biskup
  • Patent number: 6844746
    Abstract: An electrical system includes at least one function board and at least one voltage converter. The function board and the voltage converter are connected such that a voltage generated by the voltage converter is supplied to the function board. The electrical system includes an electrical circuit for evaluating the voltage required by the function board and for controlling the voltage converter depending on the evaluated voltage.
    Type: Grant
    Filed: November 26, 2002
    Date of Patent: January 18, 2005
    Assignee: Agilent Technologies, Inc.
    Inventor: Heinz Nuessle