Including Current Mirror Amplifier Patents (Class 330/288)
  • Patent number: 7348850
    Abstract: Consistent with an example embodiment, there is an electronic circuit for amplification of bipolar symmetric current signals. The electronic circuit has a pair of complimentary current mirrors. Depending on the polarity of the bipolar current signal one or the current mirrors is active while the other current mirror is in an off state. This way adding a biasing current to the input signal is avoided which substantially reduces noise.
    Type: Grant
    Filed: October 6, 2004
    Date of Patent: March 25, 2008
    Assignee: NXP B.V.
    Inventor: Rachid El Waffaoui
  • Patent number: 7345529
    Abstract: The chopper stabilized amplifier circuit includes: an amplifier; a first current mirror coupled to an output of the amplifier through a first switch; a second current mirror coupled to the output of the amplifier through a second switch, wherein the first switch is operated out of phase with the second switch; and a summing node for combining currents from the first and second current mirrors.
    Type: Grant
    Filed: June 8, 2005
    Date of Patent: March 18, 2008
    Assignee: Texas Instruments Incorporated
    Inventors: Amer H. Atrash, Brett J. Thompsen
  • Patent number: 7336133
    Abstract: An embodiment to mirror current having a pair of current mirroring transistors and a pair of cascode transistors coupled to the current mirror transistors, and furthermore having an amplifier to provide an offset voltage between the drain of a cascode transistor and the gate of a current mirror transistor, where the drain of the current mirror transistor is connected to the source of the cascode transistor, and where the amplifier buffers the gate of the current mirror transistor from the drain of the cascode transistor. Other embodiments are described and claimed.
    Type: Grant
    Filed: March 31, 2006
    Date of Patent: February 26, 2008
    Assignee: Intel Corporation
    Inventor: Joseph Shor
  • Patent number: 7332965
    Abstract: A gate leakage insensitive current mirror circuit including an input stage, an output stage, and a pair of complementary source followers. The pair of complementary source followers is connected between the input stage and the output stage. In operation, the input stage receives an input current and the pair of complementary source followers receives a first current source and a second current source. The output stage then provides an output current. The complementary source followers form a negative feedback loop and establish a bias voltage for the input stage and the output stage as a function of the input current that is independent of gate leakage between the input stage and the output stage.
    Type: Grant
    Filed: April 19, 2006
    Date of Patent: February 19, 2008
    Assignee: Texas Instruments Incorporated
    Inventors: Sumantra Seth, Somasunder Kattepura Sreenath
  • Patent number: 7323934
    Abstract: An operational transconductance amplifier (OTA) includes a first, a second and a third differential units, a voltage-to-current converting unit and a current subtraction device. The first and the second differential units receive a differential input voltage and the voltage-to-current converting unit converts it into an output current. The OTA adopts a replica scheme, that is, by copying the first differential unit to generate a third differential unit and then performs a subtraction between the first output current from the first differential unit and the second output current from the third differential unit in order to eliminate the static current component in the output current. In addition, since the first and the third differential units have the same layout, the output current will not vary with the channel length modulation of transistors, and the static current component in the output current can be eliminated completely.
    Type: Grant
    Filed: May 3, 2006
    Date of Patent: January 29, 2008
    Assignee: Novatek Microelectronics Corp.
    Inventor: Chun-Yi Huang
  • Publication number: 20080001672
    Abstract: An auto-range current mirror circuit has a current sensing circuit, a front and rear stage current mirrors each has an adjustable amplifying rate. The current sensing circuit presets a threshold current and has an input current of the front stage current mirror. The current sensing current compares the input current with a threshold current and then outputs a controlling signal to the front and rear stage current mirrors to adjust a suitable amplifying rate. Therefore, a bias current of the rear stage current mirror is amplified by the suitable amplifying rate to improve the quality of output current of the rear stage current mirror.
    Type: Application
    Filed: June 30, 2006
    Publication date: January 3, 2008
    Applicant: SILICON TOUCH TECHNOLOGY INC.
    Inventors: Fu-Yang Shih, Hsu-Yuan Chin
  • Patent number: 7312651
    Abstract: A current mirror circuit includes a first transistor having a source node connected to a reference potential, a second transistor having a source node coupled to a drain node of the first transistor and a gate node connected to a first predetermined potential, an inverted amplification circuit having a non-inverted input node coupled to a drain node of the second transistor, an inverted input node coupled to a second predetermined potential, and an output node coupled to a gate node of the first transistor, a third transistor having a gate node connected to a potential substantially equal to a potential of the gate node of the first transistor, and a fourth transistor having a gate node connected to a potential substantially equal to a potential of the gate node of the second transistor.
    Type: Grant
    Filed: February 22, 2005
    Date of Patent: December 25, 2007
    Assignee: Fujitsu Limited
    Inventor: Masahiro Kudo
  • Publication number: 20070290759
    Abstract: An analog transconductance amplifier includes an input stage including a first transistor and a second transistor connected in series to the first transistor. The first and second transistors are connected between positive and negative voltages and are respectively controlled by an input voltage and a first control voltage for generating a normalized drive voltage. An amplification stage includes a first conduction path including an amplification transistor controlled by the normalized drive voltage. A first load transistor is connected in series to the amplification transistor and is controlled by a second control voltage. A second conduction path includes at least one second load transistor controlled by a third control voltage. A current mirror forces through the second conduction path a replica of current flowing through the first conduction path. An output stage transistor delivers an output current, and is controlled by a voltage on the second load transistor.
    Type: Application
    Filed: May 24, 2007
    Publication date: December 20, 2007
    Applicant: STMicroelectronics S.r.l.
    Inventors: Giovanni Sicurella, Manuela La Rosa, Donata Rosaria Nicolosi
  • Patent number: 7304540
    Abstract: A current feedback circuit is used in the source follower. The source follower includes a first MOS transistor and a current mirror. The first MOS transistor has a gate receiving an inputting signal and a source outputting an output signal. A drain current flows through the first MOS transistor. The current mirror generates the drain current according to an adding current. The current feedback circuit is used for stabilizing the drain current to a constant value substantially. The current feedback circuit includes a passive component and an operational amplifier. The passive component has a first end and a second end, which has an error voltage when a corresponding current flows through the passive component. The magnitude of the corresponding current changes with the magnitude of the drain current. The operational amplifier outputs a reference signal to adjust the adding current according to the error voltage and a reference voltage.
    Type: Grant
    Filed: December 15, 2005
    Date of Patent: December 4, 2007
    Assignee: Realtek Semiconductor Corp.
    Inventor: Chuan-Ping Tu
  • Patent number: 7304539
    Abstract: In a high frequency power amplifier circuit that supplies a bias to an amplifying FET by a current mirror method, scattering of a threshold voltage Vth due to the scattering of the channel impurity concentration of the FET, and a shift of a bias point caused by the scattering of the threshold voltage Vth and a channel length modulation coefficient ? due to a short channel effect are corrected automatically. The scattering of a high frequency power amplifying characteristic can be reduced as a result.
    Type: Grant
    Filed: October 8, 2004
    Date of Patent: December 4, 2007
    Assignee: Renesas Technology Corporation
    Inventors: Hirokazu Tsurumaki, Hiroyuki Nagai, Tomio Furuya, Makoto Ishikawa
  • Publication number: 20070241822
    Abstract: A chain-chopping current mirror and a method for stabilizing output currents are disclosed. The current mirror includes multiple output nodes, a bias source unit, multiple current mirroring units and multiple switch components. The bias source unit provides a reference bias according to the received current. Each of the current mirroring units outputs an output current according to the reference bias. The control terminal of each the switch component receives a clock signal and determines whether the first terminal thereof is coupled with the second terminal or the third terminal thereof according to the clock signal, wherein the first terminal of the ith switch component is coupled with the output terminal of the ith current mirroring unit, the second terminal thereof is coupled with the ith output node and the third terminal thereof is coupled with the (i+1)th output node, where i is a natural number.
    Type: Application
    Filed: June 16, 2006
    Publication date: October 18, 2007
    Inventor: Fu-Yang Shih
  • Patent number: 7279981
    Abstract: A unity gain amplifier has a current mirror. A compensation circuit has an input coupled to an output of the current mirror. An output transistor has a base coupled to the output of the current mirror and a source of the output transistor is coupled to an output of the compensation circuit. The compensation circuit has a resistor in series with a capacitor.
    Type: Grant
    Filed: August 24, 2004
    Date of Patent: October 9, 2007
    Assignee: Cypress Semiconductor Corp.
    Inventor: Gary Peter Moscaluk
  • Patent number: 7265628
    Abstract: A margin tracking cascode current mirror system including a current mirror circuit having a current source device having a predetermined operating voltage for providing a current to a load, a cascode circuit interconnected between the current mirror and the load for controlling the output impedance of the system and for establishing a current control voltage, a cascode bias circuit for providing a forward bias to the cascode circuit, and a compound cascode bias circuit for independently controlling the slope and the offset of the current control voltage to track the predetermined operating voltage with a predetermined margin.
    Type: Grant
    Filed: September 13, 2005
    Date of Patent: September 4, 2007
    Assignee: Analog Devices, Inc.
    Inventors: Jennifer A. Lloyd, Kimo Y. F. Tam
  • Patent number: 7262650
    Abstract: An amplitude adjusting circuit comprises a first current mirror where a variable current of a variable current source is copied into each of 1st-3rd transistors; a second current mirror where the variable current is copied into each of 11th-13th transistors; a third current mirror having 6th-7th transistors where a current through the 2nd transistor copied from the variable current flows through the 6th transistor; a fourth current mirror having 8th-9th transistors where a current through the 12th transistor copied from the variable current flows through the 8th transistor; an inverter that has 1st-2nd conductivity type transistors and produces an output signal corresponding to a current level of the 7th or 9th transistor; a fifth current mirror having 15th-14th transistors where a current through the 14th transistor copied from the 15th transistor's becomes a current sourced by the 7th transistor; and a sixth current mirror having 5th-4th transistors where a current through the 4th transistor copied from the
    Type: Grant
    Filed: January 18, 2006
    Date of Patent: August 28, 2007
    Assignee: Sanyo Electric Co., Ltd.
    Inventors: Hirohisa Suzuki, Kazuo Hasegawa, Eiji Akama
  • Patent number: 7245184
    Abstract: A high frequency power amplifier electronic component (RF power module) is so constituted as to apply bias to an amplifier FET in current mirror configuration. In this RF power module, deviation of a bias point due to the short channel effect of the FET is corrected, and variation in high frequency power amplifier characteristics reduced. The high frequency power amplifier circuit (RF power module) is so constituted that the bias voltage for the amplifier transistor in a high frequency power amplifier circuit is supplied from a bias transistor connected with the amplifier transistor in current mirror configuration. In addition to a pad (external terminal) connected with the control terminal of the amplifier transistor, a second pad is provided which is connected with the control terminal of the bias transistor connected with the amplifier transistor in current mirror configuration.
    Type: Grant
    Filed: June 2, 2004
    Date of Patent: July 17, 2007
    Assignee: Renesas Technology Corp.
    Inventors: Makoto Ishikawa, Hirokazu Tsurumaki, Masahiro Kikuchi, Hiroyuki Nagai
  • Patent number: 7245162
    Abstract: An output stage circuit may include a sourcing driver device, a nonlinear local feedback loop having a feedback transistor and a first current mirror, a sinking driver device, and an output signal. The output stage circuit may actively and dynamically adjust the transconductance of the sourcing driver device by sensing its region of operation, and by sending a nonlinear feedback signal through the local feedback loop and the first current mirror. The nonlinear local feedback loop may be used for control and headroom compensation of the sourcing driver transistor to provide low distortion operation using a smaller size driver transistor.
    Type: Grant
    Filed: September 17, 2004
    Date of Patent: July 17, 2007
    Assignee: Cypress Semiconductor Corp.
    Inventor: Richard F. Betts
  • Patent number: 7230491
    Abstract: A bias circuit for biasing a linear input stage of an amplifier comprises a first MOS device having a size. A second MOS device has a size and is arranged with the first MOS device in a cascode configuration. The second MOS device is operated in a saturation region. A third MOS device has a size and biases the first MOS device in a triode region. A bias switch ratio of the size of the first MOS device to the size of the third MOS device is greater than one.
    Type: Grant
    Filed: July 5, 2005
    Date of Patent: June 12, 2007
    Assignee: Marvell International Ltd.
    Inventors: Xiaodong Jin, Lawrence Tse, King Chun Tsai, George Chien
  • Patent number: 7227416
    Abstract: A current mirror with a transconductance amplifier containing the current mirror with a low static current. The current mirror includes: a load with first end and a second end, the first end coupling to a first input current and a fixed voltage difference existing between the first and second ends; a first transistor, whose drain is coupled to the second end of the load, whose gate is coupled to the first end of the load, and whose source is coupled to a second input current; and a second transistor, whose drain is coupled to a third port and an output current, whose gate is coupled to the second end of the load, and whose source is coupled to the ground. The transconductance amplifier contains: a voltage amplifier stage, a transconductance stage, and a current amplifier stage for amplifying the current and containing the current mirror.
    Type: Grant
    Filed: March 10, 2005
    Date of Patent: June 5, 2007
    Assignee: Industrial Technology Research Institute
    Inventors: Chih-Hong Lou, Chia-Chun Liu
  • Patent number: 7224010
    Abstract: A voltage-controlled amplifier for a signal processing system includes an input voltage reception end, a first voltage-to-current converter, a reference current generator, a gain adjustment circuit, a first current mirror, and an output circuit. The voltage-controlled amplifier adjusts a gain according to a variable control voltage, so as to transfer an input voltage to an output voltage according to the adjusted gain. When adjusting the gain, the present invention changes only an alternating current part of the input voltage, and can decrease noise, the production cost, and increase integration degree.
    Type: Grant
    Filed: February 8, 2006
    Date of Patent: May 29, 2007
    Assignee: Princeton Technology Corporation
    Inventor: Yung-Ming Lee
  • Patent number: 7208998
    Abstract: A bias circuit for providing at least first and second bias signals for biasing a cascode current source and/or a cascode current sink includes a resistive element and first, second and third transistors, each transistor having first and second source/drain terminals and a gate terminal. The first source/drain terminal of the first transistor is coupled to the gate terminal, the first bias signal being generated at the first source/drain terminal in response to receiving a first reference current at the first source/drain terminal. A first end of the first resistive element is coupled to the second source/drain terminal of the first transistor. The gate terminal of the second transistor is coupled to the gate terminal of the first transistor, the second bias signal being generated at the first source/drain terminal of the second transistor in response to receiving a second reference current at the first source/drain terminal of the second transistor.
    Type: Grant
    Filed: April 12, 2005
    Date of Patent: April 24, 2007
    Assignee: Agere Systems Inc.
    Inventor: Christopher J. Abel
  • Patent number: 7202744
    Abstract: A transresistance amplifier circuit includes an input terminal receiving an input current, an output terminal providing an output voltage indicative of the input current, a first bias current source providing a first bias current to the input terminal, a first transistor, a second transistor, and a biasing circuit. The first transistor is coupled between the output terminal and the input terminal and controlled by a first bias voltage. The second transistor is coupled between a first supply voltage and the output terminal and controlled by a second bias voltage. The biasing circuit generates the first bias voltage for the first transistor for imposing a first voltage at the input terminal. The first voltage is equivalent to a selected voltage of an application circuit and the biasing circuit generates the first bias voltage in a manner so as to allow the first voltage to track variations in the selected voltage.
    Type: Grant
    Filed: June 15, 2005
    Date of Patent: April 10, 2007
    Assignee: National Semiconductor Corporation
    Inventor: Gabriele Manganaro
  • Patent number: 7193456
    Abstract: A current conveyor circuit with improved power supply noise immunity. Additional biasing circuitry causes the nominal biasing potential applied to the output circuit to be increased, thereby producing a corresponding increase in the magnitude of noise voltage needed to appear on the power supply before the output signal becomes affected.
    Type: Grant
    Filed: October 4, 2004
    Date of Patent: March 20, 2007
    Assignee: National Semiconductor Corporation
    Inventor: Arlo Aude
  • Patent number: 7161411
    Abstract: A circuit, method and system for generating a non-linear transfer characteristic, including a plurality of current mirror circuits in parallel, each current mirror circuit having an offset current applied to an output terminal of an output-side transistor of the current mirror circuit for controlling an output current thereof, wherein the offset current of each current mirror circuit is set to a respective predetermined level, and the transfer characteristic is generated by summing the respective output currents of the current mirror circuits in a piece-wise manner.
    Type: Grant
    Filed: February 20, 2001
    Date of Patent: January 9, 2007
    Assignee: STMicroelectronics Asia Pacific Pte Ltd.
    Inventors: Eric Yves Serge Cirot, Sze Kwang Tan, Mallikarjuna Rao Padala
  • Patent number: 7161432
    Abstract: A current mirror circuit includes a current input node for receiving an input current, an upper, cascoded current mirror, a lower current mirror, and a biasing means. In a FET implementation, the upper mirror includes first and second cascoded FETs which are connected together at the current input node, and third and fourth cascoded FETs connected to mirror the current conducted by the first and second FETs. The lower current mirror receives the mirrored current and mirrors it back to the upper mirror, thereby providing positive feedback. The net loop gain is between zero and one. When so arranged, the third and fourth FETs conduct a current which is proportional to an applied input current. The upper mirror transistors are biased such that the voltage at the current input node is substantially closer to the supply voltage than the voltages at the gates of the first and third FETs.
    Type: Grant
    Filed: April 18, 2005
    Date of Patent: January 9, 2007
    Assignee: Analog Devices, Inc.
    Inventor: A. Paul Brokaw
  • Patent number: 7154340
    Abstract: A circuit having an input amplifier and a second amplifier that provides the circuit with a unity gain crossover frequency that is higher than a unity gain crossover frequency of the input amplifier is provided. The circuit has a control input coupled to a control input of the input amplifier and also has a first current connection and a second current connection. The circuit further includes an additional amplifier that is connected in series with the second amplifier and is controlled by the input amplifier.
    Type: Grant
    Filed: March 31, 2005
    Date of Patent: December 26, 2006
    Assignee: ATMEL Germany GmbH
    Inventors: Mojtaba Joodaki, Juergen Berntgen, Peter Brandl, Christoph Bromberger, Brigitte Kraus
  • Patent number: 7151409
    Abstract: A programmable gain low noise amplifier includes a tail current transistor (Q3) having a source coupled to a first reference voltage (VDD) and a drain coupled to a tail current conductor (18) and, in a differential input embodiment, a plurality of pairs (Q4,5, Q7,8, Q10,11, Q13,14) of differentially coupled input transistors. Each pair includes a first input transistor having a gate coupled to a first input conductor (19A) and a drain coupled to a first output conductor (26A) and a second input transistor having a gate coupled to a second input conductor (19B), a source coupled to a source of the first transistor, and a drain coupled to a second output conductor (26B). The sources of the first and second input transistors of some or all of the pairs are selectively coupled to the tail current conductor (18) in it response to corresponding gain control signals (B1,2,3).
    Type: Grant
    Filed: July 26, 2004
    Date of Patent: December 19, 2006
    Assignee: Texas Instruments Incorporated
    Inventors: Myron J. Koen, Harish Venkataraman
  • Patent number: 7142059
    Abstract: The invention provides an amplifier arrangement which is of multistage design. The output transistor in the output stage has a coupling path between its control input and its controlled path. The coupling path comprises a series circuit comprising a Miller compensation capacitance and a resistance with a controllable resistance value. It is thus possible to ensure stable operation of the amplifier regardless of bias and load conditions while simultaneously reducing the quiescent current drawn.
    Type: Grant
    Filed: September 27, 2004
    Date of Patent: November 28, 2006
    Assignee: Infineon Technology AG
    Inventors: Axel Klein, Ralf-Rainer Schledz, Marcin Augustyniak
  • Patent number: 7135894
    Abstract: A dual-output current driver includes a pair of output stages that provide output current to various devices such as LEDs and laser diodes. An output-stage selector circuit that includes a differential pair is arranged to activate one of the output stages at a time. A pair of push-pull circuits may be employed to drive the differential pair such that high speed switching is possible. A single-ended to differential conversion circuit controls the push-pull circuits. The selected output stage receives a drive current from a differential pair circuit in a current driver circuit. The current driver circuit includes another pair of push-pull circuits that drive its differential pair circuit, and one or more additional differential circuits that are arranged to activate the push-pull circuits. The various differential pair circuits in the current driver circuit can be arranged to provide phase reversal, or modulation of the drive current in the output stages.
    Type: Grant
    Filed: September 13, 2002
    Date of Patent: November 14, 2006
    Assignee: National Semiconductor Corporation
    Inventors: Marc Gerardus Maria Stegers, Rudolphe Gustave Hubertus Eschauzier
  • Patent number: 7126412
    Abstract: This preamplification circuit comprises a first circuit section, second circuit section the input signal of which is the output signal of the first circuit section, and third circuit section which is connected with the input section of the first circuit section and consumes a part of the current to be inputted to a connection point with the input section of the first circuit section and has the capacitance value of the third circuit section set at a value for suppressing a gain peaking of gain frequency characteristics which occurs in the preamplification circuit.
    Type: Grant
    Filed: July 15, 2002
    Date of Patent: October 24, 2006
    Assignee: NEC Corporation
    Inventor: Yasushi Amamiya
  • Patent number: 7123075
    Abstract: A current compensation circuit for use with a current mirror circuit is disclosed. The current mirror circuit has a current path defined by a first programmable current mirror stage driving a first fanout current mirror stage. The first programmable current mirror stage includes at least one transistor with a channel length exhibiting a first channel length modulation factor ?1. The first fanout current mirror stage connects to a supply voltage source. The current compensation circuit comprises a supply voltage current mirror coupled to the supply voltage source and has a current output coupled to the current path. The compensation circuit further includes a second programmable current mirror coupled in series to the supply voltage current mirror and including at least one transistor with a channel length exhibiting a channel length modulation factor ?2. The second channel length modulation factor ?2 is larger than the first channel length modulation factor ?1.
    Type: Grant
    Filed: September 26, 2003
    Date of Patent: October 17, 2006
    Assignee: Teradyne, Inc.
    Inventor: Cosmin Iorga
  • Patent number: 7113044
    Abstract: A voltage-to-current conversion circuit includes an error amplifier (12A) which amplifies a voltage difference between the drains of the first (6) and second (7) transistors of a first current mirror, wherein drain current of the first transistor is proportional to an input voltage (Vin). The output of the error amplifier is connected to the gates of the first and second transistors. A compensation capacitor is coupled between the gate and drain of the first transistor. The drain current of the second transistor flows through a cascode transistor (16) to an input of a second current mirror, an output transistor (31) of which provides a current (Ibias) which is proportional to the input voltage (Vin) as a bias current for the error amplifier, to provide stable operation.
    Type: Grant
    Filed: August 18, 2004
    Date of Patent: September 26, 2006
    Assignee: Texas Instruments Incorporated
    Inventor: Binan Wang
  • Patent number: 7113005
    Abstract: The present invention provides a current mirror circuit of which consistency (ratio) of the input current and output current is more improved. This current mirror circuit comprises input side and output side bi-polar transistors of which bases are commonly connected, an input side MOS transistor of which source is connected to a collector of the input side bi-polar transistor and of which drain and gate are connected to the input terminal, output side MOS transistors of which source is connected to the collectors of the output side bi-polar transistors, of which drain is connected to the output terminals, and of which gate is connected to the gate of the input side MOS transistor, and an MOS transistor for supplying base current of which source is connected to the bases of the input side and output side bi-polar transistors, and of which gate is connected to the gate of the input side MOS transistor.
    Type: Grant
    Filed: September 17, 2004
    Date of Patent: September 26, 2006
    Assignee: Rohm Co., Ltd.
    Inventors: Akihiro Ono, Akira Nakamura
  • Patent number: 7102440
    Abstract: A high output current wideband output stage/buffer amplifier that has reduced quiescent current requirements. The output stage/buffer amplifier includes a diamond follower circuit having a pair of complementary output load-driving bipolar junction transistors (BJTs), a pair of pre-driver BJTs, and a plurality of current boost BJTs. As the base current of one of the driver transistors starts to increase in response to an increasing load current, the current through a corresponding pre-driver transistor decreases, thereby increasing the collector current of a corresponding boost transistor. The increased collector current of the boost transistor is fed back to a current mirror, causing a concomitant increase in the base current of the driver transistor.
    Type: Grant
    Filed: May 28, 2004
    Date of Patent: September 5, 2006
    Assignee: Texas Instruments Incorporated
    Inventors: Paul G. Damitio, Sergey Alenin
  • Patent number: 7098740
    Abstract: There is provided not only a radio frequency power amplifier using an SiGe HBT subject to a little amplification distortion, but also a communication system using the same. A conventional radio frequency power amplifier provides base bias paths of transistors Q1 through QN (SiGe HBT) with bias resistors R11 through R1N having resistance values three to five times higher than those of a ballast resistor attached to each transistor's base. A coil LB is provided in parallel with the bias resistor as a means for compensating a voltage drop due to direct current component IDC flowing through the bias resistor. Addition of the bias resistor suppresses non-linearity of low-frequency variations in an output current. Addition of the coil compensates for voltage drop. Accordingly, the maximum linear output power can be improved. As a result, it is possible to provide the power amplifier subject to a little amplification distortion within a wide output range.
    Type: Grant
    Filed: October 21, 2003
    Date of Patent: August 29, 2006
    Assignee: Renesas Technology Corp.
    Inventors: Masao Kondo, Toru Masuda, Katsuyoshi Washio
  • Patent number: 7084704
    Abstract: A system for controlling gain in a polar loop is disclosed. Embodiments of the invention provide for a substantially constant gain tolerant of changes in supply voltage, ambient temperature, and/or manufacturing process.
    Type: Grant
    Filed: July 31, 2003
    Date of Patent: August 1, 2006
    Assignee: Skyworks Solutions, Inc.
    Inventor: Tirdad Sowlati
  • Patent number: 7084706
    Abstract: A circuitry comprises an amplifier with a bipolar transistor, whose base terminal is coupled to an input terminal for a signal to be amplified. A biasing means for setting a potential at the base terminal of the bipolar transistor is provided. Further, a means for providing such a current to the base terminal of the bipolar transistor is provided, so that a charging or discharging current to the input terminal is larger than a base current of the bipolar transistor. Further, the circuitry comprises a means for detecting whether a potential change at the base terminal of the bipolar transistor is to be effected for switching the bipolar transistor, and a means for connecting the means for providing the current to the base of the bipolar transistor when a potential change is to be effected at the base terminal of the bipolar transistor.
    Type: Grant
    Filed: August 10, 2005
    Date of Patent: August 1, 2006
    Assignee: Infineon Technologies AG
    Inventor: Juergen Minichshofer
  • Patent number: 7081797
    Abstract: A multiplying current mirror provides at least one base current compensation stage between two other stages that establish a desired gain n. (n?1) compensation stages are provided for n>1, and [(1/n)?1] compensation stages for n<1. The compensation stages can be established as series connected repetitions of a basic cell stage. Each stage after the first includes a diode-connected bipolar transistor, with a low overall transistor count.
    Type: Grant
    Filed: December 22, 2004
    Date of Patent: July 25, 2006
    Assignee: Analog Devices, Inc.
    Inventor: Derek F. Bowers
  • Patent number: 7078974
    Abstract: A module including a bias circuit that generates gate bias voltages by resistance dividers creates a problem in that the values of the resistances constituting the bias circuit must be finely adjusted, and accordingly extra trimming tasks are required. The present invention provides current generators that generate currents varying with desired characteristics responsive to a control voltage, independent of variations in transistor threshold voltages, connects output resistors to parallel transistors in respective stages to form current mirror circuits, and supplies currents from the current generators thereto to drive them, instead of supplying dividing voltages.
    Type: Grant
    Filed: September 16, 2005
    Date of Patent: July 18, 2006
    Assignees: Renesas Technology Corp., Hitachi Communication Systems, Inc.
    Inventors: Kouichi Matsushita, Tomio Furuya, Fuminori Morisawa, Takayuki Tsutsui, Nobuhiro Matsudaira
  • Patent number: 7064614
    Abstract: An electronic circuit includes a current mirror bias circuit and a power amplifier that has a power transistor for amplifying radio frequency signals such that the output collector current of the power transistor is approximately constant over a wide range of varying power supply voltages. The power transistor is biased by a current mirror biasing circuit that has a reference voltage that maintains the quiescent DC collector current at an approximately constant value. The reference voltage may be varied to provide control of the output power of the power amplifier.
    Type: Grant
    Filed: July 9, 2004
    Date of Patent: June 20, 2006
    Assignee: Xindium Technologies, Inc.
    Inventors: Jeffrey T. Feng, David Charles Caruth
  • Patent number: 7061307
    Abstract: A current compensation circuit for use with a current mirror is disclosed. The current mirror circuit has a current path defined by a first current mirror stage driving a second current mirror stage, the second current mirror stage is coupled to a supply voltage source. The current compensation circuit comprises an impedance divider coupled to the supply voltage and an output node. The impedance divider operates to generate a compensation signal at the node representative of voltage changes in the supply voltage source. The compensation circuit further includes a gain stage having an input coupled to the output node and a current output connected to the current path. The gain stage operates to generate a compensation current for application to the current path in response to the compensation signal.
    Type: Grant
    Filed: September 26, 2003
    Date of Patent: June 13, 2006
    Assignee: Teradyne, Inc.
    Inventor: Echere Iroaga
  • Patent number: 7053699
    Abstract: Current output stages are provided. In accordance with an embodiment, a current output stage includes a voltage follower circuit, a first current mirror and a second current mirror. A node of the voltage follower circuit provides a voltage that follows a voltage at the output of the current output stage. An input of the first current mirror is connected (e.g., by a current path of a transistor) to the node of the voltage follower circuit that follows the voltage at the output of the current output stage. An output of the first current mirror is connected to an input of the second current mirror. An output of the second current mirror is connected to the input of the current output stage.
    Type: Grant
    Filed: May 11, 2004
    Date of Patent: May 30, 2006
    Assignee: Elantec Semiconductor, Inc.
    Inventor: Brian North
  • Patent number: 7042295
    Abstract: Circuits for converting an input current to an output voltage that employs a uniquely biased common-gate or common-base stage as a current buffer and a direct drive of the current buffer output into an impedance to convert the current signal to a voltage signal.
    Type: Grant
    Filed: March 31, 2004
    Date of Patent: May 9, 2006
    Assignee: Cornell Research Foundation, Inc.
    Inventors: Drew Guckenberger, Kevin T. Kornegay
  • Patent number: 7042432
    Abstract: To provide thin-film transistor circuits used for a driving circuit that realizes a semiconductor display capable of producing an image with high resolution and high precision without image unevenness. TFTs with small channel widths are used to form an analog buffer which comprises a differential amplifier circuit and a current mirror circuit and which is used in a driving circuit of an active matrix semiconductor display. A plurality of such analog buffer circuits are connected in parallel to secure an analog buffer that has a sufficient current capacity.
    Type: Grant
    Filed: September 4, 2002
    Date of Patent: May 9, 2006
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Shunpei Yamazaki, Jun Koyama
  • Patent number: 7034610
    Abstract: An upstream amplifier is integrated on a substrate with a digital-to-analog converter (DAC) to form an integrated circuit. In an embodiment, a low-pass filter is also integrated on the substrate. The output signal level of the upstream amplifier is controllable. In embodiments, fine adjustments are made to the output signal level of the upstream amplifier by varying a bias current of the DAC. A software control bit is used to switch between a power-on mode of operation and a power-down mode of operation. The upstream amplifier transmits in a burst mode. The power consumption of the upstream amplifier scales with the amplifier's output signal level. A high degree of matching is attained between the positive and negative paths of the upstream amplifier. This provides high immunity from common-mode disturbances such as substrate noise, clock spurs, and glitches caused by a gain change.
    Type: Grant
    Filed: June 7, 2004
    Date of Patent: April 25, 2006
    Assignee: Broadcom Corporation
    Inventors: Stephen A. Jantzi, Anilkumar V. Tammineedi, Jungwoo Song, Lawrence M. Burns, Donald G. McMullin, Agnes N. Woo
  • Patent number: 7034616
    Abstract: In a circuit according to the present invention, a multi-collector transistor is provided which includes first to third collectors so that, when a current does not flow from the second collector, a current from the first collector increases but a current from the third collector does not vary. When transistors of the circuit turn off because the voltage of an input signal gets out of an in-phase input voltage range, the supply of the current from the second collector comes to a stop and, hence, the current from the first collector increases. In this situation, further transistors carry out their on/off operations, thereby fixing the output of the circuit to a low level. That is, this circuit can, irrespective of poor pair compatibility between the transistors, fix the output logical level to a desired level when the voltage of an input signal gets out of an in-phase input voltage range.
    Type: Grant
    Filed: February 3, 2004
    Date of Patent: April 25, 2006
    Assignee: Denso Corporation
    Inventors: Naoya Tsuchiya, Hirofumi Abe, Shoichi Okuda
  • Patent number: 7009452
    Abstract: A method and apparatus is disclosed for improving high frequency performance of an amplifier, such as for example, a current mirror. In one embodiment, a delay element is introduced in a current mirror signal path to account for signal propagation delay that may exist in one or more alternative signal paths. The delay element maintains desired phase alignment at a cascade node of the current mirror thereby establishing, in one embodiment, the cascode node (Vc) in an AC ground state. To extend current mirror high frequency capability an embodiment is disclosed having cross-coupled capacitors, active elements, or one or more other devices configured to provide positive feedback to one or more current mirror inputs. The positive feedback may be selectively configured to increase the operational bandwidth of the current mirror.
    Type: Grant
    Filed: October 16, 2003
    Date of Patent: March 7, 2006
    Assignee: SolarFlare Communications, Inc.
    Inventor: Jorge Alberto Grilo
  • Patent number: 6998913
    Abstract: A charge amplifier includes an amplifier, feedback circuit, and cancellation circuit. The feedback circuit includes a capacitor, inverter, and current mirror. The capacitor is coupled across the signal amplifier, the inverter is coupled to the output of the signal amplifier, and the current mirror is coupled to the input of the signal amplifier. The cancellation circuit is coupled to the output of the signal amplifier. A method of charge amplification includes providing a signal amplifier; coupling a first capacitor across the signal amplifier; coupling an inverter to the output of the signal amplifier; coupling a current mirror to the input of the signal amplifier; and coupling a cancellation circuit to the output of the signal amplifier. A front-end system for use with radiation sensors includes a charge amplifier and a current amplifier, shaping amplifier, baseline stabilizer, discriminator, peak detector, timing detector, and logic circuit coupled to the charge amplifier.
    Type: Grant
    Filed: June 14, 2004
    Date of Patent: February 14, 2006
    Assignee: Brookhaven Science Associates, LLC
    Inventor: Gianluigi DeGeronimo
  • Patent number: 6995615
    Abstract: Current-mode preamplifiers are provided. In accordance with an embodiment, a current-mode preamplifier includes a transistor, that acts as an input stage for the preamplifier, and a pair of current mirrors. The transistor includes a gate connected to the input of the preamplifier, a source connected to a first voltage supply rail, and a drain. The first current mirror, which is connected to a second voltage supply rail, includes an input connected to the drain of the first transistor, and an output. The second current mirror, which is connected to the first voltage supply rail, includes an input connected to the output of the first current mirror, a first output connected to the input of the preamplifier, and a second output connected to the output of the preamplifier.
    Type: Grant
    Filed: May 20, 2004
    Date of Patent: February 7, 2006
    Assignee: Elantec Semiconductor, Inc
    Inventor: Yang Zhao
  • Patent number: 6995612
    Abstract: A current mirror that compensates for the effects of gate current leakage related to quantum mechanical tunneling of electrons. An embodiment of the current mirror of the present invention comprises a first reference current leg, first and second current mirror legs and a load leg. Current compensation devices are operable to provide current compensation components to offset the effects of gate current leakage. In one embodiment of the invention the current compensation components comprise P-type CMOS transistors.
    Type: Grant
    Filed: December 15, 2003
    Date of Patent: February 7, 2006
    Assignee: Sun Microsystems, Inc.
    Inventor: Yen-Chung T. Chen
  • Patent number: 6992530
    Abstract: An amplifier having first and second enhancement-mode Field Effect Transistors (FETs) is disclosed. The input port receives an input signal that is to be amplified. The source of the first FET is connected to the input port such that the first FET provides an input impedance match for a signal source connected to the input port. The gate of the second FET is connected to the drain of the first FET such that the second FET amplifies the output signal from the drain of the first FET to provide an amplified input signal. The first and second FETs form a current mirror. An output circuit provides a predetermined output impedance at an output port for coupling the amplified input signal to a circuit that is external to the amplifier. In one embodiment of the invention, the output circuit includes a third FET connected as a source follower with the second FET.
    Type: Grant
    Filed: April 3, 2003
    Date of Patent: January 31, 2006
    Assignee: Agilent Technologies, Inc.
    Inventor: Yut Hoong Chow