Abstract: The asynchronous sense amplifier for a ROM comprises a current-mirror circuit, a first negative feedback inverter, a second negative feedback inverter, a first transistor group, a second transistor group and a feedback transistor. The feedback transistor connects the junction of the first transistor group and the first set of the current-mirror circuit and/or the junction of the second transistor group and the second set of the current-mirror circuit to ground, where the feedback transistor is controlled by the output of the first negative feedback inverter and/or the second negative feedback inverter, and the feedback transistor is smaller than one transistor of the second transistor group.

Abstract: An emitter follower circuit applies to an input terminal of a second amplifying device a voltage according to a reference voltage applied to a reference terminal. First and second resistors are connected in series between the reference terminal and an input terminal of a first amplifying device. The collector of a first transistor is connected to the reference terminal and a control voltage is applied to the base of the first transistor. A third resistor is connected between the emitter of the first transistor and a grounding point. A current mirror circuit draws a current proportional to a current input from the collector of the first transistor from a connection point of the first and second resistors.

Abstract: A current mirror circuit includes a first current-mirror transistor coupled to a second current-mirror transistor. A load is coupled to the second current-mirror transistor. A first current source is coupled to the first current-mirror transistor to cause a bias current to flow through the first current-mirror transistor and a second current source is coupled to the second current-mirror transistor and in parallel with the load to shunt the bias current away from the load.

Abstract: A dual-path current amplifier having a slow high-gain path and a fast low-gain path is described. In one design, the slow high-gain path is implemented with a positive feedback loop and has a gain of greater than one and a bandwidth determined by a pole. The fast low-gain path has unity gain and wide bandwidth. The two signal paths receive an input current and provide first and seconds currents. A summer sums the first and second currents and provides an output current for the dual-path current amplifier. The dual-path current amplifier may be implemented with first and second current mirrors. The first current mirror may implement the fast low-gain path. The first and second current mirrors may be coupled together and implement the slow high-gain path. The first current mirror may be implemented with P-FETs. The second current mirror may be implemented with N-FETs, an operational amplifier, and a capacitor.

Abstract: Ground skimming output stages that are designed to drive wideband signals with the ability to provide a high quality output signal all the way to the low supply rail are provided. In accordance with an embodiment of the present invention, the output stage of the present invention includes a translinear current controller, an output transistor and a current mirror. While not limited thereto, embodiments of the present invention only require a single positive power supply, consistent with the recent trend toward integrated circuits that only require a single low voltage power supply.

Abstract: An all-NPN bipolar junction current mirror circuit for mirroring an input reference current is disclosed. The circuit includes an input stage for providing an input reference current to the current mirror circuit, a reference stage for mirroring the input reference current and an output stage electrically connected to the reference stage for providing the mirrored input current to at least one load.

Abstract: A high frequency power amplifier electronic component (RF power module) is so constituted as to apply bias to an amplifier FET in current mirror configuration. In this RF power module, deviation of a bias point due to the short channel effect of the FET is corrected, and variation in high frequency power amplifier characteristics is reduced. The high frequency power amplifier circuit (RF power module) is so constituted that the bias voltage for the amplifier transistor in a high frequency power amplifier circuit is supplied from a bias transistor connected with the amplifier transistor in current mirror configuration. In addition to a pad (external terminal) connected with the control terminal of the amplifier transistor, a second pad is provided which is connected with the control terminal of the bias transistor connected with the amplifier transistor in current mirror configuration.

Abstract: An RF transmitting device (10) includes an RF amplifier (22) formed having components formed on a common semiconductor substrate (14). RF amplifier (22) includes MOS transistors (42) and (44) and an RF choke (46) stacked between a ground node (32) and a Vdd node (36). Transistors (42) and (44) are directly connected together and are biased by a control terminal bias network (58) so that the voltages appearing across their conduction terminals are about equal. Control terminals (56) and (62) of transistors (42) and (44) are driven by in-phase versions of an RF input signal (20).

Abstract: A signal transfer circuit appropriate for use in realizing both high circuit stability and high current driving ability is disclosed. Signal transfer circuit A has current transfer circuit 3 that transfers a signal current via first reference current I1. In one embodiment, current transfer circuit 3 has current transcription circuit 30 that transcribes signal current Is to first current portion I1-1 of first reference current I1, and output current path 32 that transfers the first current portion I1-1. In one embodiment, current transfer circuit 30 has first current branching circuit 300 and second current branching circuit 302.

Abstract: The present invention provides a photoelectric conversion device capable of detecting light from weak light to strong light and relates to a photoelectric conversion device having a photodiode having a photoelectric conversion layer; an amplifier circuit including a transistor; and a switch, where the photodiode and the amplifier circuit are electrically connected to each other by the switch when intensity of entering light is lower than predetermined intensity so that a photoelectric current is amplified by the amplifier circuit to be outputted, and the photodiode and part or all of the amplifier circuits are electrically disconnected by the switch so that a photoelectric current is reduced in an amplification factor to be outputted. According to such a photoelectric conversion device, light from weak light to strong light can be detected.

Abstract: A temperature-sensitive current source includes a first MOS transistor having a source coupled to a first voltage; a second MOS transistor having a source coupled to the first voltage, and a gate coupled to a gate of the first MOS transistor, such that a current output at a drain of the second MOS transistor mirrors a current passing across the first MOS transistor; and a resistor coupled between the source and a drain of the first MOS transistor in parallel, such that the current passing across the first MOS transistor is substantially larger than a current passing through the resistor, wherein the first and second MOS transistors operate in a saturation mode, such that the output current at the drain of the second MOS transistor is responsive to a change of temperature.

Abstract: An amplifier circuit includes a first series circuit connected between a supply voltage and a reference potential. The first series circuit includes a current source, a first tap and a first component configured as a diode. The amplifier circuit also includes a second series circuit connected between the supply voltage and the reference potential, and includes a controlled path between a first connection and a second connection of a first transistor and a second tap. The control connection of the first transistor is coupled to the first tap. The second tap is used to output a bias voltage. The amplifier circuit includes an amplifier stage coupled to the second tap for setting an operating point of the amplifier stage.

Abstract: A voltage regulator circuit comprises an amplifier, bias network and startup circuit. The bias network is configured to generate a bias voltage for setting a bias current in the amplifier. The startup circuit is configured to mirror the amplifier bias current and to assist the bias network in setting the amplifier bias current based on the mirrored amplifier bias current until the bias voltage approximates a desired level.

Abstract: Briefly, in accordance with one or more embodiments, a dual mode power amplifier is capable of operating in either linear mode such as class A operation, or a non-linear mode such as class F operation. The power amplifier may be utilized in an RFID interrogator. The power amplifier may be biased to operate in a linear mode if the power amplifier is operating in a higher linearity mode, or may be biased to operate in a non-linear mode if the power amplifier is operating in a higher efficiency, lower power mode. The power amplifier may comprise two or more amplifiers coupled in parallel. A current mirror circuit may turn on more amplifiers if the power amplifier is operating in a higher power mode, and may turn on fewer amplifiers if the power amplifier is operating a lower power mode.

Abstract: A CMOS current mirror is provided that includes a current input, an input transistor, whose conductivity path is located between the current input and a reference potential terminal, a current output, an output transistor, whose conductivity path is connected to the reference potential terminal and which supplies the current output with an output current, a gate node common for both transistors, and a supply potential terminal. The current mirror further includes a first additional transistor, whose conductivity path is located between the supply potential terminal and the gate node and whose gate terminal is connected to the current input, and a second additional transistor, whose conductivity path is located between the gate node and the reference potential terminal and whose gate terminal is connected to the gate node.

Abstract: An amplifier circuit is disclosed having an output transistor for driving a complex load over a drive frequency range, wherein in the lower part of the range an inductive component of the load dominates and in the upper part the inductive component does not dominate. The amplifier circuit includes a current mirror circuit that is connected upstream of the output transistor and has a shunt path to a second potential, for the purpose of relatively reducing a DC current flowing through the output transistor in comparison with an AC current flowing through the latter.

Abstract: A signal transfer circuit appropriate for use in realizing both high circuit stability and high current driving ability is disclosed. Signal transfer circuit A has current transfer circuit 3 that transfers a signal current via first reference current I1. In one embodiment, current transfer circuit 3 has current transcription circuit 30 that transcribes signal current Is to first current portion I1-1 of first reference current I1, and output current path 32 that transfers the first current portion I1-1. In one embodiment, current transfer circuit 30 has first current branching circuit 300 and second current branching circuit 302.

Abstract: A chain-chopping current mirror and a method for stabilizing output currents are disclosed. The current mirror includes multiple output nodes, a bias source unit, multiple current mirroring units and multiple switch components. The bias source unit provides a reference bias according to the received current. Each of the current mirroring units outputs an output current according to the reference bias. The control terminal of each the switch component receives a clock signal and determines whether the first terminal thereof is coupled with the second terminal or the third terminal thereof according to the clock signal, wherein the first terminal of the ith switch component is coupled with the output terminal of the ith current mirroring unit, the second terminal thereof is coupled with the ith output node and the third terminal thereof is coupled with the (i+1)th output node, where i is a natural number.

Abstract: A current mirror circuit that allows for over voltage stress testing includes: a first transistor; a second transistor having a gate coupled to a gate of the first transistor; a switch coupled between the gate of the first transistor and the drain of the first transistor; a bias source coupled to a control node of the switch such that the switch is ON during normal current mirror operation, and the switch is OFF during over voltage stress testing; and a clamp coupled between the control node of the switch and a source node.

Abstract: A bias control circuit for an RF amplifier having an output device for providing an output signal to a load and a driver device for driving the output device includes a current mirror circuit for providing a driver device bias current to the driver device and an output device bias current to the output device. When the amplifier operates in a high power mode, the current mirror circuit supplies the driver device bias current at a level to turn on the driver device at a high current level and an output device bias current to turn on the output device. When the amplifier operates in a low power mode, the current mirror circuit supplies a driver device bias current to turn on the driver device at a reduced current level and an output device bias current to turn off the output device.

Abstract: A peak detector can advantageously increase its bandwidth, i.e. its charging and discharging speed, while minimizing the ripple of its output signal by sensing the charging current of a storage device. In response to that charging current, the peak detector can control a discharge current, thereby accelerating its response. For example, the peak detector can reduce a discharge current in response to an increased charging current (which indicates a charging phase) and increase the discharge current in response to a decreased charging current (which indicates a discharge phase).

Abstract: A variable gain amplifier includes a voltage-to-current converter for converting the input voltage to a current, a current amplifier for amplifying the current converted by the voltage-to-current converter, a current-to-voltage converter for converting the current amplified by the current amplifier into a voltage, and a controller for controlling an amplification factor of the current amplifier.

Abstract: There is disclosed a current mirror circuit comprising a first transistor having a first electrode connected to a first potential, a second electrode connected to a second potential lower than the first potential, and a third electrode connected to a third potential higher than the second potential, a second transistor having a first electrode connected to the first potential and the first electrode of the first transistor, and a second electrode connected to the second potential, an operational amplifier having a high-potential input connected to the third potential and the third electrode of the first transistor, and a low-potential input connected to the third electrode of the second transistor, and a third transistor having a first electrode connected to an output of the operational amplifier, a second electrode connected to the low-potential input and the third electrode of the second transistor, and a third electrode used as an output terminal.

Abstract: A variable gain voltage/current converter circuit of the present invention has an input section active element having an input terminal, an output terminal, and a ground terminal for performing a voltage/current conversion, a potential control circuit for controlling a conversion gain of the input section active element based on a potential at the output terminal of the input section active element, an output section voltage/current converter circuit for generating a current corresponding to a voltage signal generated from the potential control circuit, and a current compensation circuit connected to the output terminal of the input section active element for generating a DC current in accordance with the amount of DC current which flows from the output terminal of the input section active element to the input section active element. The current compensation circuit compensates for a change in a DC current of the input section active element, which occurs when the conversion gain is adjusted.

Abstract: A circuit and a method for biasing a compound cascode current mirror (CCCM) that enables high-voltage swing at the output and accurate current mirroring is presented. The CCCM has mirror transistors and cascode transistors which may be of a different technology kind. The drain-source voltage Vds of the mirror transistor on the input leg of the CCCM is held at a voltage Vov that is generated by the biasing circuit; Vov is the overdrive voltage of the input mirror transistor of the CCCM and the value of Vov is maintained by the bias circuit and a feed-back amplifier such that the mirror transistor remains on the edge of its active region, over manufacture deviations and tracks even over operational conditions such as temperature and supply variations. The feed-back amplifier drives the gates of the cascode transistors and uses its feedback node to hold the Vds at Vov.

Abstract: A current mirror circuit includes a first current-mirror transistor coupled to a second current-mirror transistor. A load is coupled to the second current-mirror transistor. A first current source is coupled to the first current-mirror transistor to cause a bias current to flow through the first current-mirror transistor and a second current source is coupled to the second current-mirror transistor and in parallel with the load to shunt the bias current away from the load.

Abstract: Aspects of a method and system for precise current matching in deep sub-micron technology may include adjusting a current mirror to compensate for MOSFET gate leakage currents by using feedback circuits. The feedback circuits may be implemented from active components to create active feedback circuits. If the reference current to be mirrored is noisy, a smoothing effect may be achieved by introducing a low-pass filter coupled to the current mirror design. The active feedback may comprise amplifiers, which may comprise one or more amplifier stages. The amplifier may amplify either a bias voltage error or a bias current error. Furthermore, a transimpedance amplifier may be utilized in the feedback loop. The output bias current of the current mirror may be stabilized dynamically during adjusting. Multiple current sources may be utilized in the current mirrors.

Abstract: A circuit for generating a reference current, comprising a positive feedback loop, a negative feedback loop, and a floating current mirror coupled to the positive feedback loop. The negative feedback loop may operate to divert current directly from the floating mirror, and may also operate to divert current from the floating mirror by using a voltage follower. The circuit may operate with a minimum supply voltage of approximately the sum of the threshold voltage of a transistor plus three drain saturation voltages, in one example.

Abstract: There is provided a thin film transistor circuit used for a driver circuit for providing a semiconductor display device without a picture blur and with high fineness/high resolution. In the thin film transistor circuit, a TFT having a large size (channel width) is not used, but a plurality of TFTs each having a small size are connected in parallel to each other and are used. By this, while sufficient current capacity of the thin film transistors is secured, fluctuation in the characteristics can be decreased.

Abstract: The invention relates to a current pre-amplifier (11) with an input (N1) capable of receiving or supplying an input current (i3) with at least one pulse, wherein the pre-amplifier comprises a regulated cascode stage comprising an input transistor (M1) and a first current generator (S1) as well as an output transistor (M2) and a second current generator (S2), wherein said pre-amplifier comprises: detection means (M5, M6) capable of detecting an input current pulse (i3), and feedback means (M3, M6, M4, M5, R1, C1, M3, M7, M8, R2, C2) capable of increasing the current supplied by the first and/or the second current generator during the entire detection of the input current pulse.

Abstract: A circuit for biasing a gallium arsenide (GaAs) power amplifier includes a reference voltage generator circuit implemented in a gallium arsenide (GaAs) material system, a field effect transistor (FET) bias circuit implemented in the gallium arsenide material system and adapted to receive an output of the reference voltage generator circuit and adapted to provide an output to a radio frequency (RF) amplifier stage.

Abstract: A system for pre-charging a current mirror includes a controller configured to provide a first current and an additional current to a current mirror to rapidly charge a capacitance associated with the current mirror based on a reference voltage.

Abstract: The present invention provides methods and apparatuses for an amplifier circuit for amplifying an input signal. An amplifier circuit for amplifying an input signal comprises an amplifying transistor circuit having a power transistor and a dc bias circuit having a plurality of current mirror circuits and a discharge transistor wherein the discharge transistor and the power transistor form a combined current mirror circuit to control quiescent current in the power transistor.

Abstract: An amplifier for amplifying a signal which is applied to a signal input having a first pair of transistors (10), which is connected to the signal input and which contains two transistors (10-1, 10-2), currents flowing through the two transistors (10-1, 10-2) which have a specific operating current ratio (m) in relation to one another, a second pair of transistors (4), which is connected to the first pair of transistors (10) and which contains two transistors (4-1, 4-2), currents flowing through the two transistors (4-1, 4-2) which have the same operating current ratio (m) in relation to one another, and a signal output (3) of the amplifier (1) being provided between the first pair of transistors (10) and the second pair of transistors (4).

Abstract: An auto-range current mirror circuit has a current sensing circuit, a front and rear stage current mirrors each has an adjustable amplifying rate. The current sensing circuit presets a threshold current and has an input current of the front stage current mirror. The current sensing current compares the input current with a threshold current and then outputs a controlling signal to the front and rear stage current mirrors to adjust a suitable amplifying rate. Therefore, a bias current of the rear stage current mirror is amplified by the suitable amplifying rate to improve the quality of output current of the rear stage current mirror.

Abstract: Consistent with an example embodiment, there is an electronic circuit for amplification of bipolar symmetric current signals. The electronic circuit has a pair of complimentary current mirrors. Depending on the polarity of the bipolar current signal one or the current mirrors is active while the other current mirror is in an off state. This way adding a biasing current to the input signal is avoided which substantially reduces noise.

Abstract: The present invention relates to an amplifier arrangement having a plurality of amplifier stages that form a series circuit. Each amplifier stage comprises a current mirror, the translation ratio of which defines the gain of the amplifier stage. Moreover, a current coupling-out element is provided in each amplifier stage, a partial current being output at said element, and the partial currents are added together in a summation element. An RSSI signal associated with the summed currents is provided at the output of the summation element. The RSSI amplifier arrangement provides constant and thermostable signal amplification, low sensitivity to overvoltages, and exhibits a low current requirement and good radio frequency properties.

Abstract: The chopper stabilized amplifier circuit includes: an amplifier; a first current mirror coupled to an output of the amplifier through a first switch; a second current mirror coupled to the output of the amplifier through a second switch, wherein the first switch is operated out of phase with the second switch; and a summing node for combining currents from the first and second current mirrors.

Abstract: An embodiment to mirror current having a pair of current mirroring transistors and a pair of cascode transistors coupled to the current mirror transistors, and furthermore having an amplifier to provide an offset voltage between the drain of a cascode transistor and the gate of a current mirror transistor, where the drain of the current mirror transistor is connected to the source of the cascode transistor, and where the amplifier buffers the gate of the current mirror transistor from the drain of the cascode transistor. Other embodiments are described and claimed.

Abstract: A gate leakage insensitive current mirror circuit including an input stage, an output stage, and a pair of complementary source followers. The pair of complementary source followers is connected between the input stage and the output stage. In operation, the input stage receives an input current and the pair of complementary source followers receives a first current source and a second current source. The output stage then provides an output current. The complementary source followers form a negative feedback loop and establish a bias voltage for the input stage and the output stage as a function of the input current that is independent of gate leakage between the input stage and the output stage.

Abstract: An operational transconductance amplifier (OTA) includes a first, a second and a third differential units, a voltage-to-current converting unit and a current subtraction device. The first and the second differential units receive a differential input voltage and the voltage-to-current converting unit converts it into an output current. The OTA adopts a replica scheme, that is, by copying the first differential unit to generate a third differential unit and then performs a subtraction between the first output current from the first differential unit and the second output current from the third differential unit in order to eliminate the static current component in the output current. In addition, since the first and the third differential units have the same layout, the output current will not vary with the channel length modulation of transistors, and the static current component in the output current can be eliminated completely.

Abstract: An auto-range current mirror circuit has a current sensing circuit, a front and rear stage current mirrors each has an adjustable amplifying rate. The current sensing circuit presets a threshold current and has an input current of the front stage current mirror. The current sensing current compares the input current with a threshold current and then outputs a controlling signal to the front and rear stage current mirrors to adjust a suitable amplifying rate. Therefore, a bias current of the rear stage current mirror is amplified by the suitable amplifying rate to improve the quality of output current of the rear stage current mirror.

Abstract: A current mirror circuit includes a first transistor having a source node connected to a reference potential, a second transistor having a source node coupled to a drain node of the first transistor and a gate node connected to a first predetermined potential, an inverted amplification circuit having a non-inverted input node coupled to a drain node of the second transistor, an inverted input node coupled to a second predetermined potential, and an output node coupled to a gate node of the first transistor, a third transistor having a gate node connected to a potential substantially equal to a potential of the gate node of the first transistor, and a fourth transistor having a gate node connected to a potential substantially equal to a potential of the gate node of the second transistor.

Abstract: An analog transconductance amplifier includes an input stage including a first transistor and a second transistor connected in series to the first transistor. The first and second transistors are connected between positive and negative voltages and are respectively controlled by an input voltage and a first control voltage for generating a normalized drive voltage. An amplification stage includes a first conduction path including an amplification transistor controlled by the normalized drive voltage. A first load transistor is connected in series to the amplification transistor and is controlled by a second control voltage. A second conduction path includes at least one second load transistor controlled by a third control voltage. A current mirror forces through the second conduction path a replica of current flowing through the first conduction path. An output stage transistor delivers an output current, and is controlled by a voltage on the second load transistor.

Abstract: A current feedback circuit is used in the source follower. The source follower includes a first MOS transistor and a current mirror. The first MOS transistor has a gate receiving an inputting signal and a source outputting an output signal. A drain current flows through the first MOS transistor. The current mirror generates the drain current according to an adding current. The current feedback circuit is used for stabilizing the drain current to a constant value substantially. The current feedback circuit includes a passive component and an operational amplifier. The passive component has a first end and a second end, which has an error voltage when a corresponding current flows through the passive component. The magnitude of the corresponding current changes with the magnitude of the drain current. The operational amplifier outputs a reference signal to adjust the adding current according to the error voltage and a reference voltage.

Abstract: In a high frequency power amplifier circuit that supplies a bias to an amplifying FET by a current mirror method, scattering of a threshold voltage Vth due to the scattering of the channel impurity concentration of the FET, and a shift of a bias point caused by the scattering of the threshold voltage Vth and a channel length modulation coefficient ? due to a short channel effect are corrected automatically. The scattering of a high frequency power amplifying characteristic can be reduced as a result.

Abstract: A chain-chopping current mirror and a method for stabilizing output currents are disclosed. The current mirror includes multiple output nodes, a bias source unit, multiple current mirroring units and multiple switch components. The bias source unit provides a reference bias according to the received current. Each of the current mirroring units outputs an output current according to the reference bias. The control terminal of each the switch component receives a clock signal and determines whether the first terminal thereof is coupled with the second terminal or the third terminal thereof according to the clock signal, wherein the first terminal of the ith switch component is coupled with the output terminal of the ith current mirroring unit, the second terminal thereof is coupled with the ith output node and the third terminal thereof is coupled with the (i+1)th output node, where i is a natural number.

Abstract: A unity gain amplifier has a current mirror. A compensation circuit has an input coupled to an output of the current mirror. An output transistor has a base coupled to the output of the current mirror and a source of the output transistor is coupled to an output of the compensation circuit. The compensation circuit has a resistor in series with a capacitor.

Abstract: A margin tracking cascode current mirror system including a current mirror circuit having a current source device having a predetermined operating voltage for providing a current to a load, a cascode circuit interconnected between the current mirror and the load for controlling the output impedance of the system and for establishing a current control voltage, a cascode bias circuit for providing a forward bias to the cascode circuit, and a compound cascode bias circuit for independently controlling the slope and the offset of the current control voltage to track the predetermined operating voltage with a predetermined margin.

Abstract: An amplitude adjusting circuit comprises a first current mirror where a variable current of a variable current source is copied into each of 1st-3rd transistors; a second current mirror where the variable current is copied into each of 11th-13th transistors; a third current mirror having 6th-7th transistors where a current through the 2nd transistor copied from the variable current flows through the 6th transistor; a fourth current mirror having 8th-9th transistors where a current through the 12th transistor copied from the variable current flows through the 8th transistor; an inverter that has 1st-2nd conductivity type transistors and produces an output signal corresponding to a current level of the 7th or 9th transistor; a fifth current mirror having 15th-14th transistors where a current through the 14th transistor copied from the 15th transistor's becomes a current sourced by the 7th transistor; and a sixth current mirror having 5th-4th transistors where a current through the 4th transistor copied from the