Plural Graphics Processors Patents (Class 345/502)
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Patent number: 8537166Abstract: One embodiment of the present invention sets forth a technique for displaying high-resolution images using multiple graphics processing units (GPUs). The graphics driver is configured to present one virtual display device, simulating a high-resolution mosaic display surface, to the operating system and the application programs. The graphics driver is also configured to partition the display surface amongst the GPUs and transmit commands and data to the local memory associated with the first GPU. A video bridge automatically broadcasts this information to the local memories associated with the remaining GPUs. Each GPU renders and displays only the partition of the display surface assigned to that particular GPU, and the GPUs are synchronized to ensure the continuity of the displayed images. This technique allows the system to display higher resolution images than the system hardware would otherwise support, transparently to the operating system and the application programs.Type: GrantFiled: December 6, 2007Date of Patent: September 17, 2013Assignee: NVIDIA CorporationInventors: Franck R. Diard, Ian M. Williams, Eric Boucher
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Patent number: 8537160Abstract: Systems and methods for generating distributed dataflow graphs and processing data elements in parallel utilizing the distributed dataflow graphs are provided. A sequential dataflow graph is formed from incoming data elements, and a variety of heuristics is applied to the sequential dataflow graph to determine which of the data transformation steps within the graph are capable of being processed multiple times in parallel. Once determined, the sequential dataflow graph is divided into subgraphs, which are then replicated, e.g., based on available resources and.or external constraints. The resulting subgraphs are connected, based on the semantics of each vertex, and a distributed dataflow graph is generated, which can efficiently process data elements, for instance, for data warehousing and the like.Type: GrantFiled: March 5, 2008Date of Patent: September 17, 2013Assignee: Microsoft CorporationInventors: Thomas Hargrove, Mosha Pasumansky, Alexander Berger
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Patent number: 8537167Abstract: A method and system for using bundle decoders in a processing pipeline is disclosed. In one embodiment, to perform a context switch between a first process and a second process operating in a processing pipeline, the first state information that is associated with the first process is placed on a connection separate from the processing pipeline. A number of decoders are coupled to this connection. The decoders obtain the first state information from a number of pipeline units on the processing pipeline by monitoring the data stream going into these pipeline units. Also, to restore the first state information after having switched out the second state information that is associated with the second process, the first state information is placed on the connection for the decoders to retrieve.Type: GrantFiled: October 17, 2006Date of Patent: September 17, 2013Assignee: Nvidia CorporationInventors: Robert C. Keller, Richard A. Silkebakken, Matthew J. P. Regan
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Patent number: 8531468Abstract: An apparatus for use in image processing is set forth that comprises a pixel processor, context memory, and a context memory controller. The pixel processor is adapted to execute a pixel processing operation on a target pixel using a context of the target pixel. The context memory is adapted to store context values associated with the target pixel. The context memory controller may be adapted to control communication of context values between the pixel processor and the context memory. Further, the context memory controller may be responsive to a context initialization signal or the like provided by the pixel processor to initialize the content of the context memory to a known state, even before the pixel processor has completed its image processing operations and/or immediately after completion of its image processing operations. In one embodiment, the pixel processor executes a JBIG coding operation on the target pixel.Type: GrantFiled: September 14, 2012Date of Patent: September 10, 2013Assignee: Marvell International Ltd.Inventors: Amit Joshi, Akash Sood, Rakesh Pandey
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Publication number: 20130229420Abstract: In accordance with some embodiments, a graphics process frame generation frame rate may be monitored in combination with a utilization or work load metric for the graphics process in order to allocate performance resources to the graphics process and in some cases, between the graphics process and a central processing unit.Type: ApplicationFiled: February 28, 2013Publication date: September 5, 2013Inventors: Eric Samson, Murali Ramadoss
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Publication number: 20130222397Abstract: Exemplary apparatus, method, and system embodiments provide for accelerated hardware processing of an action script for a graphical image for visual display. An exemplary method comprises: converting a plurality of descriptive elements into a plurality of operational codes which at least partially control at least one processor circuit; and using at least one processor circuit, performing one or more operations corresponding to an operational code to generate pixel data for the graphical image. Another exemplary method for processing a data file which has not been fully compiled to a machine code and comprising interpretable descriptions of the graphical image in a non-pixel-bitmap form, comprises: separating the data file from other data; parsing and converting the data file to a plurality of hardware-level operational codes and corresponding data; and performing a plurality of operations in response to at least some hardware-level operational codes to generate pixel data for the graphical image.Type: ApplicationFiled: March 31, 2013Publication date: August 29, 2013Applicant: LeoNovus USA Inc.Inventor: LeoNovus USA Inc.
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Patent number: 8520011Abstract: An image processing apparatus capable of providing a plurality of image processing functions includes: a first controller to execute and control a plurality of application programs; and a second controller to execute and control a part of the plurality of application programs. When the power of the image processing apparatus is turned on, the second controller completes the execution of the part of the plurality of application programs before the execution of the plurality of application programs by the first controller completes, and causes a part of the plurality of image processing functions provided by the part of the application programs executed by the second controller to be available for use by a user before the plurality of image processing functions becomes available for use by the user.Type: GrantFiled: June 26, 2009Date of Patent: August 27, 2013Assignee: Ricoh Company, LimitedInventor: Yoshiaki Toriyama
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Patent number: 8520010Abstract: In processing a game scene for display, in one embodiment input controller position information from a host memory is provided directly to a graphics processor rather than first being processed by a 3D application in a host processor. This results in more direct and timely processing of position information and reduces the number of 3D processing pipeline steps the controller position information must pass through thus reducing the user's perceived latency between moving the input controller and seeing the displayed results. In another embodiment, the input controller position information is provided directly from an input controller to a graphics card or subsystem rather than first going through a host processor or memory. This results in even more direct and timely processing of position information by further reducing the number of 3D processing pipeline steps the controller position information must pass through thus further reducing the user's perceived latency.Type: GrantFiled: August 2, 2010Date of Patent: August 27, 2013Assignee: Sixense Entertainment, Inc.Inventors: Amir Rubin, Jeffrey Peter Bellinghausen
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Patent number: 8520014Abstract: An information handling system includes a host processing system and a remote processing system. The host processing system includes a display, a host processor, and a video multiplexer that receives a video signal from the host processor and outputs the video signal to the display. The remote processing module is coupled to the host processing system and includes a remote processor configured to output a second video signal, and an interface between the host processing system and the remote processing system. The interface includes a video output channel configured to provide the second video signal to the video multiplexer. The video multiplexer is further configured to receive the second video signal and to output the second video signal to the display during a reduced operating state of the host processing system.Type: GrantFiled: February 3, 2012Date of Patent: August 27, 2013Assignee: Dell Products, LPInventors: James R. Utz, Andrew T. Sultenfuss, David C. Loadman
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Publication number: 20130215124Abstract: Exemplary apparatus, method, and system embodiments provide for accelerated hardware processing of an action script for a graphical image for visual display. An exemplary apparatus comprises: a first memory; and a plurality of processors to separate the action script from other data, to convert a plurality of descriptive elements of the action script into a plurality of hardware-level operational or control codes, and to perform one or more operations corresponding to an operational code of the plurality of operational codes using corresponding data to generate pixel data for the graphical image. In an exemplary embodiment, at least one processor further is to parse the action script into the plurality of descriptive elements and the corresponding data, and to extract data from the action script and to store the extracted data in the first memory as a plurality of control words having the corresponding data in predetermined fields.Type: ApplicationFiled: March 31, 2013Publication date: August 22, 2013Inventor: LeoNouvus USA Inc.
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Patent number: 8514247Abstract: A system includes a memory, a specialized processing unit and a processor. The processor receives data from a user and creates a first set of objects in a first structure based on the data. The system further creates, contemporaneously with the creation of the first set of objects and based on the first set of objects in the first structure, a second set of objects in a second structure, where the second set of objects is optimized for use by the specialized processing unit, and stores the first and second sets of objects in the memory. The specialized processing unit executes an algorithm based on the second set of objects.Type: GrantFiled: October 31, 2012Date of Patent: August 20, 2013Assignee: The MathWorks, Inc.Inventor: Michael P. Garrity
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Patent number: 8508538Abstract: A display system is disclosed that is capable of switching between graphics processing units (GPUs). Some embodiments may include a display system, including a display, a timing controller (T-CON) coupled to the display, the T-CON including a plurality of receivers, and a plurality of GPUs, where each GPU is coupled to at least one of the plurality of receivers, and where the T-CON selectively couples only one of the plurality of GPUs to the display at a time.Type: GrantFiled: December 31, 2008Date of Patent: August 13, 2013Assignee: Apple Inc.Inventors: Kapil V. Sakariya, Michael F. Culbert, Michael Nugent
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Patent number: 8508539Abstract: A method of server site rendering 3D images on a server computer coupled to a client computer wherein the client computer instructs a server computer to load data for 3D rendering and sends a stream of rendering parameter sets to the server computer, each set of rendering parameters corresponding with an image to be rendered; next the render computer renders a stream of images corresponding to the stream of parameter sets and the stream of images is compressed with a video compression scheme and sent from the server computer to the client computer where the client computer decompresses the received compressed video stream and displays the result in a viewing port. The rendering and communication chain is subdivided in successive pipeline stages that work in parallel on successive rendered image information.Type: GrantFiled: February 26, 2009Date of Patent: August 13, 2013Assignee: Agfa HealthCare NVInventor: Jan Vlietinck
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Patent number: 8504068Abstract: Various devices may include a short-range wireless transmitter and/or one or more short-range wireless readers. When a first device including the transmitter is placed near a second device including the one or more readers, a relative location of the first device may be determined. Information regarding the relative location of the first device, may be used to facilitate use of the first device with a processing device. In one embodiment, the processing device may automatically configure itself, such that the first device may be used with the processing device. In another embodiment, the processing device may provide feedback, such as, for example, step-by-step instructions to facilitate setup and use of the first device with the processing device. In some embodiments, an application program interface may provide information about the device to an application executing on the processing device.Type: GrantFiled: July 2, 2012Date of Patent: August 6, 2013Assignee: Microsoft CorporationInventors: Ruston Panabaker, Pasquale DeMaio
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Patent number: 8502828Abstract: A method includes performing a task in response to a request of a secondary user interface of a secondary device. The method also includes calculating a utilization of a graphics processing unit of a machine based on the task performed by the graphics processing unit. The method further includes determining the utilization, through a processor, based on a comparison of a consumption of a computing resource of the graphics processing unit and a sum of the computing resource available. The method furthermore includes performing another task in response to the request of another secondary user interface of another secondary device. The method furthermore includes calculating another utilization of another graphics processing unit based on the another task performed by the another graphics processing unit. The method furthermore includes determining the another utilization based on the comparison of a consumption of the computing resource of the another graphics processing unit.Type: GrantFiled: April 12, 2010Date of Patent: August 6, 2013Assignee: Nvidia CorporationInventor: Amruta S Lonkar
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Patent number: 8502829Abstract: A method and an apparatus are provided for combining multiple independent tile-based graphic cores. An incoming geometry stream is split into a plurality of streams and sent to respective tile based graphics processing cores. Each one generates a separate tiled geometry list as described. These may be combined into a master tiling unit or, alternatively, markers may be inserted into the tiled geometry lists which are used in the rasterization phase to switch between tiling lists from different geometry processing cores.Type: GrantFiled: September 11, 2012Date of Patent: August 6, 2013Assignee: Imagination Technologies, LimitedInventor: John W. Howson
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Publication number: 20130194282Abstract: A display apparatus, an upgrade apparatus, a display system including the same, and a control method thereof are provided, the display apparatus including: a first image processor which processes an input image signal and outputs a first output signal; an upgrade apparatus connector which is connectable to an upgrade apparatus including a second image processor; a display which displays at least one of a first image corresponding to the first output signal and a second image corresponding to a second output signal output by the second image processor; a first storage which stores first apparatus information about the upgrade apparatus; and a first controller which sets the upgrade apparatus to a communication state based on the first apparatus information stored in the first storage if the upgrade apparatus is connected to the upgrade apparatus connector.Type: ApplicationFiled: January 23, 2013Publication date: August 1, 2013Applicant: SAMSUNG ELECTRONICS CO., LTD.Inventor: SAMSUNG ELECTRONICS CO., LTD.
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Patent number: 8497865Abstract: A multiple graphics processing unit (GPU) based parallel graphics system comprising multiple graphics processing pipelines with multiple GPUs supporting a parallel graphics rendering process having an object division mode of operation. Each GPU comprises video memory, a geometry processing subsystem and a pixel processing subsystem. According to the principles of the present invention, pixel (color and z depth) data buffered in the video memory of each GPU is communicated to the video memory of a primary GPU, and the video memory and the pixel processing subsystem in the primary GPU are used to carry out the image recomposition process, without the need for dedicated or specialized apparatus.Type: GrantFiled: December 31, 2006Date of Patent: July 30, 2013Assignee: Lucid Information Technology, Ltd.Inventors: Reuven Bakalash, Yaniv Leviathan
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Publication number: 20130191722Abstract: In a first embodiment of the present invention, a method for enabling hardware acceleration of web applications is provided, comprising: parsing a web page using a scripting engine, wherein the web page necessitates running a web application; accessing one or more Application Program Interfaces (APIs) that provide parallelization, and distribute tasks of the web application among multiple cores of a multi-core central processing unit (CPU) or graphical processing unit (GPU), wherein the accessing uses a compute context class that, when instantiated, creates a compute context object that acts as a bridge between the scripting engine and the one or more APIs; and creating one or more kernels to operate on the multiple cores.Type: ApplicationFiled: June 8, 2012Publication date: July 25, 2013Inventors: Simon J. GIBBS, Tasneem G. BRUTCH, Won JEON
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Patent number: 8493393Abstract: An apparatus for displaying graphics includes a memory to store graphics data and output the graphics data to the bus in series, and a plurality of transform modules, wherein, each transform module, based on a type of the graphics outputted to the bus and employing a feedback signal provided by each transform module after a transform operation is executed therein, transforms the corresponding graphics data into image information for the display memory in turn.Type: GrantFiled: November 30, 2006Date of Patent: July 23, 2013Assignee: Shenzhen Mindray Bio-Medical Electronics Co, Ltd.Inventors: Li Yao, Xuguang Ci
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Patent number: 8493394Abstract: One embodiment of the present invention sets forth a method, which includes the steps of detecting the presence of an external graphics subsystem after the external graphics subsystem is attached to the mobile computing device, transmitting a power enable signal to the external graphics subsystem, and activating PCIe signaling channels after having received a ready signal from the external graphics subsystem to enable data communications between the mobile computing device and the external graphics subsystem.Type: GrantFiled: January 22, 2008Date of Patent: July 23, 2013Assignee: Nvidia CorporationInventor: Sien Chen
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Patent number: 8487944Abstract: An image processing system in the medical field is provided. The system for processing image data includes at lest two graphics processors, at least one renderer module for rendering image data and at least one reconstruction module for volume reconstruction. In a first operating mode of the system in which at least one reconstruction module is inactive, the instructions of at least one renderer module is able to be executed by at least two of the graphics processors. In a second operating mode of the system in which at least one reconstruction module is active, the instructions of at least one renderer module and the instructions of at least one reconstruction module is able to be executed separately on different graphics processors of the said graphics processors. During operation in one of the two operating modes, a switch can be made to the other operating mode in each case.Type: GrantFiled: October 27, 2009Date of Patent: July 16, 2013Assignee: Siemens AktiengesellschaftInventors: Manfred Koch, Stefan Lautenschläger
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Patent number: 8487947Abstract: In a system comprising a plurality of processors and a memory shared by at least a subset of the processors, a method for processing video data includes the steps of: (a) a first one of the processors receiving a first video frame and storing the first video frame in the memory; (b) the first one of the processors receiving at least a second video frame, receipt of the second video frame initiating a release of the first video frame from the memory; (c) the first one of the processors sending the first and second video frames to a second one of the processors together for processing by the second one of the processors; (d) the second one of the processors generating an output video frame based at least on the first and second video frames; (e) storing the output video frame in the memory by overwriting an available memory location therein, the output video frame becoming a new first video frame; and (f) repeating steps (b) through (e) until all video frames to be processed have been received.Type: GrantFiled: September 28, 2006Date of Patent: July 16, 2013Assignee: Agere Systems Inc.Inventors: Richard Benson, Peter Kroon, Nigel Henry Wood
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Patent number: 8487942Abstract: Exemplary apparatus, method, and system embodiments provide for accelerated hardware processing of an action script for a graphical image for visual display. An exemplary system comprises: a network I/O interface; a frame buffer; a first memory; and a plurality of processors to separate the action script from other data, to convert a plurality of descriptive elements of the action script into a plurality of hardware-level operational or control codes, and to perform one or more operations corresponding to an operational code to generate pixel data for the graphical image. In an exemplary embodiment, at least one processor further is to parse the action script into the plurality of descriptive elements and the corresponding data, and to extract data from the action script and to store the extracted data in the first memory as a plurality of control words having the corresponding data in predetermined fields.Type: GrantFiled: February 14, 2009Date of Patent: July 16, 2013Assignee: LeoNovus USA Inc.Inventors: Bhaskar Kota, Lakshmikanth Surya Naga Satyavolu, Ganapathi Venkata Puppala, Praveen Kumar Bollam, Sairam Sambaraju, Paul L. Master
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Patent number: 8487886Abstract: An information input device is provided, which may perform highly-convenient processing in response to input of information with an external proximity object. The information input device includes: an input panel having a detection function of detecting an external proximity object, to be used in a state of being placed on a display panel; a position detection section detecting position and area value of the external proximity object based on a detection signal of the external proximity object obtained by the input panel; and an image generation section generating display data to be utilized to display an image including a display object, in such a manner that size of the display object displayed on the display panel at the detected position of the external proximity object is allowed to vary in accordance with the detected area value of the external proximity object.Type: GrantFiled: August 28, 2009Date of Patent: July 16, 2013Assignee: Japan Display West Inc.Inventors: Ryoichi Tsuzaki, Nobuki Furue, Mitsuo Okumura, Shingo Kurokawa, Kazunori Yamaguchi, Tsutomu Harada, Mitsuru Tateuchi
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Patent number: 8487941Abstract: Exemplary apparatus, method, and system embodiments provide for accelerated hardware processing of an action script for a graphical image for visual display. An exemplary apparatus comprises: a first memory to store corresponding data; a first processor to separate the action script from other data; and a second processor to convert a plurality of descriptive elements of the action script into a plurality of operational codes, and to perform an operation corresponding to an operational code of the plurality of operational codes using the corresponding data to generate pixel data for the graphical image. In exemplary embodiments the second processor further is to parse the action script into the plurality of descriptive elements and the corresponding data, and to extract data from the action script and to store the extracted data in the first memory as a plurality of control words having the corresponding data in predetermined fields.Type: GrantFiled: February 14, 2009Date of Patent: July 16, 2013Assignee: LeoNovus USA Inc.Inventors: Bhaskar Kota, Lakshmikanth Surya Naga Satyavolu, Ganapathi Venkata Puppala, Praveen Kumar Bollam, Sairam Sambaraju, Paul L. Master
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Patent number: 8487943Abstract: Many computing device may now include two or more graphics subsystems. The multiple graphics subsystems may have different abilities, and may, for example, consume differing amount of electrical power, with one subsystem consuming more average power than the others. The higher power consuming graphics subsystem may be coupled to the device and used instead of, or in addition to, the lower power consuming graphics subsystem, resulting in higher performance or additional capabilities, but increased overall power consumption. By transitioning from the use of the higher power consuming graphics subsystem to the lower power consuming graphics subsystem, while placing the higher power consuming graphics subsystem in a lower power consumption mode, overall power consumption is reduced. A processor executes application software and driver software. The driver software includes first and second driver components for respectively controlling operation of the first and second graphics subsystems.Type: GrantFiled: December 15, 2008Date of Patent: July 16, 2013Assignee: Advanced Micro Devices, Inc.Inventors: Paul Blinzer, Phil Mummah
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Publication number: 20130176319Abstract: The invention provides, in some aspects, a system for rendering images, the system having one or more client digital data processors and a server digital data processor in communications coupling with the one or more client digital data processors, the server digital data processor having one or more graphics processing units. The system additionally comprises a render server module executing on the server digital data processor and in communications coupling with the graphics processing units, where the render server module issues a command in response to a request from a first client digital data processor.Type: ApplicationFiled: November 23, 2012Publication date: July 11, 2013Applicant: PME IP AUSTRALIA PTY LTD.Inventor: PME IP Australia PTY LTD.
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Patent number: 8482571Abstract: There is provided an information processing apparatus, including a first processing unit capable of processing an image, a second processing unit capable of processing the image in parallel for each unit dividing the image, and a controller section configured to perform a control to select one of the first processing unit, the second processing unit, and both of them as a subject or subjects processing the image, to divide, in a case where both the first processing unit and the second processing unit are selected, the image into a first region and a second region, and to assign processing of an image of the first region and processing of an image of the second region, which are obtained by the division, to the first processing unit and the second processing unit, respectively, to cause the first processing unit and the second processing unit to perform the processing.Type: GrantFiled: June 10, 2011Date of Patent: July 9, 2013Assignee: Sony CorporationInventor: Hisakazu Shiraki
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Publication number: 20130162658Abstract: A method for performing an operation using more than one resource may include several steps: requesting an operation performed by a resource; populating a ring frame with an indirect buffer command packet corresponding to the operation using a method that may include for the resource requested to perform the operation, creating a semaphore object with a resource identifier and timestamp, in the event that the resource is found to be unavailable; inserting a command packet (wait) into the ring frame, wherein the command packet (wait) corresponds to the semaphore object; and submitting the ring frame to the graphics engine.Type: ApplicationFiled: December 22, 2011Publication date: June 27, 2013Applicant: ATI TECHNOLOGIES ULCInventor: Pat Truong
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Patent number: 8473716Abstract: According to an aspect of the embodiment, a user apparatus transmits a parameter on generation of drawing data to each of drawing data generation apparatuses through a network, to assign generation processing of the drawing data to each of drawing data generation apparatuses. The user apparatus receives the drawing data generated based on the parameter by each of the plurality of drawing data generation apparatuses through the network, and displays the received drawing data. The user apparatus changes the parameter corresponding to the displayed drawing data, and displays a new drawing data corresponding to the changed parameter.Type: GrantFiled: July 8, 2010Date of Patent: June 25, 2013Assignees: Fujitsu Limited, The University of TokyoInventors: Masahiro Watanabe, Toshiaki Hisada, Seiryo Sugiura, Takumi Washio, Jun-ichi Okada
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Patent number: 8471858Abstract: The present disclosure describes various techniques for displaying a visual representation of performance metrics for rendered graphics elements. One example method comprises receiving performance information provided by a graphics processing unit, wherein the performance information has been measured by the graphics processing unit in association with individual graphics elements for rendering a graphics scene, and computing values of a performance metric for the graphics elements based upon the performance information, wherein each computed value is associated with at least one of the graphics elements.Type: GrantFiled: June 1, 2010Date of Patent: June 25, 2013Assignee: QUALCOMM IncorporatedInventors: James P. Ritts, Baback Elmieh
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Publication number: 20130155076Abstract: Disclosed are methods and apparatus for processing display data. The display data specify one or more presentations (e.g., digital signage information) for displaying to a user on an end-user device (e.g., a digital signage device). One or more processors receive one or more criteria (e.g., “user preferences”) and the display data. The one or more processors select some or all of the received display data. This selection may be dependent upon the one or more criteria. The one or more processors then provide, for display by the end-user device, the selected display data. This provision may be dependent upon the one or more criteria.Type: ApplicationFiled: December 14, 2011Publication date: June 20, 2013Applicant: General Instrument CorporationInventors: Joseph F. Wodka, Nitya Narasimhan, Jehan Wickramasuriya
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Patent number: 8466921Abstract: In a case that a first processor assists a second processor, the first processor issues a request for execution of a type of image processing assigned to the second processor, receives information specifying data on which the first processor performs the type of image processing assigned to the second processor, and performs the type image processing assigned to the second processor on the data specified by the information. According to this, it is possible to execute auxiliary processing by a light-loaded processor for a heavy-loaded processor in correspondence with loads of plural processors.Type: GrantFiled: April 16, 2008Date of Patent: June 18, 2013Assignee: Canon Kabushiki KaishaInventors: Ken Achiwa, Tomohiro Tachikawa
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Publication number: 20130147815Abstract: Embodiments of a multi-processor architecture and method are described herein. Embodiments provide alternatives to the use of an external bridge integrated circuit (IC) architecture. For example, an embodiment multiplexes a peripheral bus such that multiple processors can use one peripheral interface slot without requiring an external bridge IC. Embodiments are usable with known bus protocols.Type: ApplicationFiled: February 11, 2013Publication date: June 13, 2013Applicants: ATI TECHNOLOGIES ULC, ADVANCED MICRO DEVICESInventors: Advanced Micro Devices, ATI Technologies ULC
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Publication number: 20130147814Abstract: Systems and methods are provided for processing data. The systems and methods include multiple processors that each couple to receive commands and data, where the commands and/or data correspond to frames of video that include multiple pixels. An interlink module is coupled to receive processed data corresponding to the frames from each of the processors. The interlink module divides a first frame into multiple frame portions by dividing pixels of the first frame using at least one balance point. The interlink module dynamically determines a position for the balance point that minimizes differences between the workload of the processors during processing of commands and/or data of one or more subsequent frames.Type: ApplicationFiled: February 6, 2013Publication date: June 13, 2013Applicant: ATI TECHNOLOGIES, INC.Inventor: Ati Technologies, Inc.
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Publication number: 20130147813Abstract: Methods and systems relating to providing constants are provided. In an embodiment, a method of providing constants in a processing device includes copying a constant of a first constant buffer to a second constant buffer, the first and second constant buffers being included in a ring of constant buffers and a size of the ring being one greater than a number of processes that the processing device can process concurrently, updating a value of the constant in the second buffer, and binding a command to be executed on the processing device to the second constant buffer.Type: ApplicationFiled: December 13, 2011Publication date: June 13, 2013Applicant: Advanced Micro Devices, Inc.Inventor: Philip J. ROGERS
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Patent number: 8462141Abstract: A display controller for controlling data in an isochronous display where fluctuation of data feed latency occurs, the display controller including an input memory which receives pixel data and transmits the pixel data through a main route and a secondary route; wherein pixel data is transmitted through the main route and is processed for delivery to the display in a predetermined manner; characterized in that the secondary route comprises a memory for storing a two-dimensional section of the pixel data that corresponds at least in part to the pixel data being transmitted through the main route at that time; further characterized in that the display controller includes a detector for identifying a data feed latency event and in response there to switching the transmission of the pixel data to the secondary route and processing the pixel data through secondary route for delivery to the display such that when a data feed latency event occurs the stored two-dimensional section of the pixel data from the secondarType: GrantFiled: April 26, 2007Date of Patent: June 11, 2013Assignee: Freescale Semiconductor, Inc.Inventors: Roman Mostinski, Mikhail Bourgart, Edward Vaiberman
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Patent number: 8464025Abstract: A signal processing apparatus able to raise a processing capability in processing accompanying access to a storing means is provided. Stream control units (SCU) 203—0 to 203—3 access data at an external memory system or local memories 204—0 to 204—3 according to a thread under control from a host processor. Processor units (PU) arrays 202—0 to 202—3 perform image processing by a different thread from the thread of the SCUs 203—0 to 203—3.Type: GrantFiled: May 22, 2006Date of Patent: June 11, 2013Assignee: Sony CorporationInventors: Yuji Yamaguchi, Masatoshi Imai, Toshiharu Noda, Naosuke Asari, Tomoo Mitsunaga, Mitsuharu Ohki, Kazumasa Ito, Hidetoshi Nagano, Sumito Arakawa, Kei Ito
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Patent number: 8463244Abstract: A display apparatus for use in a wireless terminal is provided. A memory stores user interface (UI) data for cases mapped to events occurring in the wireless terminal. A controller collects the events occurring in the wireless terminal. The controller selects at least one executable case for the collected events. The controller selects UI data including a character image for the at least one selected executable case from the memory and outputs the selected UI data. A display unit displays the UI data.Type: GrantFiled: October 3, 2005Date of Patent: June 11, 2013Assignee: Samsung Electronics Co., Ltd.Inventors: Jae-Ho Kim, Jeong-Wook Seo, Sung-Pil Kim, Hyun-Ji Kim, Sang-Min Park
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Patent number: 8462369Abstract: The present invention provides a hybrid image processing system, which generally includes an image processing unit for receiving image data corresponding to a set of images, generating commands for processing the image data, and sending the images and the commands to an image processing unit of the hybrid image processing system. Upon receipt, the image processing unit will recognize and interpret the commands, assign and/or schedule tasks for processing the image data to a set of (e.g., special) processing engines based on the commands, and return results and/or processed image data to the image interface unit.Type: GrantFiled: June 25, 2007Date of Patent: June 11, 2013Assignee: International Business Machines CorporationInventors: Munehiro Doi, Moon J. Kim, Yumi Mori, James R. Moulic, Hiroki Nakano
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Publication number: 20130141442Abstract: Various methods, computer-readable mediums and apparatus are disclosed. In one aspect, a method of generating a graphical image on a display device is provided that includes splitting geometry level processing of the image between plural processors coupled to an interposer. Primitives are created using each of the plural processors. Any primitives not needed to render the image are discarded. The image is rasterized using each of the plural processors. A portion of the image is rendered using one of the plural processors and any remaining portion of the image using one or more of the other plural processors.Type: ApplicationFiled: December 6, 2011Publication date: June 6, 2013Inventors: John W. Brothers, Greg Sadowski, Konstantine Iourcha, Bryan Black
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Patent number: 8456480Abstract: In a single-instruction-multiple-data (SIMD) processor having multiple lanes, and local memory dedicated to each lane, a method of processing an image is disclosed. The method comprises mapping consecutive rasters of the image to consecutive lanes such that groups of consecutive rasters form image strips, and vertical stacks of strips comprise strip columns. Local memory allocates memory to the image strips. A sequence of functions is processed for execution on the SIMD processor in a pipeline implementation, such that the pipeline loops over portions of the image in multiple iterations, and intermediate data processed during the functions is stored in the local memory. Data associated with the image is traversed by first processing image strips from top to bottom in a left-most strip column, then progressing to each adjacent unprocessed strip column.Type: GrantFiled: January 13, 2010Date of Patent: June 4, 2013Assignee: Calos Fund Limited Liability CompanyInventors: Donald James Curry, Ujval J. Kapasi
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Patent number: 8456478Abstract: A microcontroller with an integrated special instruction processing unit and a programmable cycle state machine. The special instruction processing unit allows offloading of intensive processing of output data and the programmable cycle state machine minimizes the amount of customized, off chip circuitry necessary to connect the microcontroller to an external display.Type: GrantFiled: October 30, 2008Date of Patent: June 4, 2013Assignee: Microchip Technology IncorporatedInventors: Roshan Samuel, Joseph Julicher
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Patent number: 8451284Abstract: Systems and techniques for processing sequences of video images involve receiving, on a computer, data corresponding to a sequence of video images detected by an image sensor. The received data is processed using a graphics processor to adjust one or more visual characteristics of the video images corresponding to the received data. The received data can include video data defining pixel values and ancillary data relating to settings on the image sensor. The video data can be processed in accordance with ancillary data to adjust the visual characteristics, which can include filtering the images, blending images, and/or other processing operations.Type: GrantFiled: January 13, 2012Date of Patent: May 28, 2013Assignee: Apple Inc.Inventors: Brett Bilbrey, Jay Zipnick, Alexei V. Ouzilevski, Fernando Urbina, Harry Guo
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Publication number: 20130127882Abstract: An input/output (I/O) device is provided. The I/O device is capable of operating in a first mode or a second mode. The I/O device includes a first connection unit and a switch unit. The first connection unit has a plurality of down-link I/O ports and an up-link I/O port. The switch unit is controlled by a selection signal. The switch unit has an input terminal coupled to the up-link I/O port, a first output terminal, and a second output terminal. When the I/O device is operating in the first mode, the switch unit couples the input terminal to the first output terminal according to the selection signal. When the I/O device is operating in the second mode, the switch unit couples the input terminal to the second output terminal according to the selection signal.Type: ApplicationFiled: May 1, 2012Publication date: May 23, 2013Applicant: WISTRON CORP.Inventor: HSIANG-CHIA WU
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Patent number: 8446416Abstract: Disclosed is a system for producing images including techniques for reducing the memory and processing power required for such operations. The system provides techniques for programmatically representing a graphics problem. The system further provides techniques for reducing and optimizing graphics problems for rendering with consideration of the system resources, such as the availability of a compatible GPU.Type: GrantFiled: February 11, 2011Date of Patent: May 21, 2013Assignee: Apple Inc.Inventors: John Harper, Ralph Brunner, Peter Graffagnino, Mark Zimmer
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Patent number: 8446417Abstract: A DGS (discrete graphics system) unit is disclosed. The DGS unit includes a system chassis configured to house a GPU, the GPU for executing 3-D graphics instructions, and a GPU mounting unit coupled to the system chassis and configured to receive the GPU. A serial bus connector is coupled to the chassis and is coupled to the GPU mounting unit, wherein the serial bus connector is configured removably connect the GPU to a computer system to enable the GPU to access the computer system via the serial bus connector and execute the 3-D graphics instructions for the computer system. A power supply coupled to the system chassis for supplying power to the GPU independent of the computer system.Type: GrantFiled: June 25, 2004Date of Patent: May 21, 2013Assignee: Nvidia CorporationInventor: Michael B. Diamond
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Patent number: 8446418Abstract: An image processing apparatus includes: a plurality of image processing units each of which is disposed so as to correspond to each of partial images and processes data of each of pixels composing the partial image with reference to data of peripheral pixels of the pixel, wherein the plurality of image processing units includes at least a first image processing unit which use data of pixels composing other partial images adjacent to a first partial image as the data of the peripheral pixels for the image processing on a first partial image, and a second image processing unit which performs the image processing on a second partial image and brokers data of pixels treated as the peripheral pixels by the first image processing unit from an image processing unit which processes the other partial image to the first image processing unit.Type: GrantFiled: October 12, 2010Date of Patent: May 21, 2013Assignee: Seiko Epson CorporationInventor: Kazuyoshi Kegasawa
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Publication number: 20130120407Abstract: Systems, methods, and computer-readable storage media for resizing images using seam carving techniques may include generation of a partial solution matrix by at least partially isolating dependencies between sub-problems of a dynamic programming problem corresponding to its solution within different regions of an input image. The number and/or shape of the isolated (or partially isolated) sub-problems may be dependent on the access pattern used by a dynamic programming operation to identify seams in the input image. Multiple sub-problems may be processed independently and in parallel on respective processor core(s) or threads thereof to generate the partial solution matrix. The partial solution matrix may then be processed to identify one or more low-cost seams of the input image. The methods may be implemented as stand-alone applications or as program instructions implementing components of a graphics application, executable by a CPU and/or GPU configured for parallel processing.Type: ApplicationFiled: October 14, 2008Publication date: May 16, 2013Inventor: Chintan Intwala