Abstract: In a multilayer ceramic electronic component including directly plated external electrodes, in an exposed area defined by exposed portions of a plurality of internal conductors, an area ratio of the exposed portions in an end section of the exposed area is smaller than an area of exposed portions in a center section of the exposed area.

Abstract: The present invention relates to a multilayer ceramic capacitor and a method of manufacturing the same. The multilayer ceramic capacitor includes a ceramic body having a first side and a second side opposed to each other and having a third side and a fourth side connecting the first side to the second side; a plurality of inner electrodes formed within the ceramic body and having respective one ends exposed to the third side and the fourth side; and outer electrodes formed on the third side and the fourth side and electrically connected to the inner electrodes. A shortest distance from distal edges of an outermost inner electrode among the plurality of inner electrodes to the first side or the second side is smaller than a shortest distance from distal edges of a central inner electrode to the first side or the second side.

Abstract: There is provided a multilayer ceramic electronic part, including: a ceramic body including dielectric layers each having an average thickness of 0.6 ?m or less; and first and second internal electrodes disposed to face each other within the ceramic body with the dielectric layer interposed therebetween, wherein the ceramic body includes a capacitance forming part and non-capacitance forming parts, and when the capacitance forming part is divided into 2n+1 (n is 1 or more) regions in a thickness direction of the ceramic body, the dielectric layers of the capacitance forming part get thinner in directions from a central region toward upper and lower regions, whereby continuity of the internal electrode may be improved and a high-capacity multilayer ceramic electronic part may be realized.

Abstract: An on-chip capacitor includes a first layer first polarity conducting strip and a first layer second polarity conducting strip, wherein the first layer second polarity conducting strip is arranged adjacent to and spaced apart from the first layer first polarity conducting strip, a second layer first polarity conducting strip and a second layer second polarity conducting strip, wherein the second layer second polarity conducting strip is arranged adjacent to and spaced apart from the second layer first polarity conducting strip, wherein the second layer second polarity conducting strip is arranged overlying the first layer second polarity conducting strip, wherein the second layer first polarity conducting strip is arranged overlying the first layer first polarity conducting strip; wherein the first layer first-polarity conducting strip electrically couples with the second layer first polarity conducting strip; and wherein the first-layer second polarity conducting strip electrically couples with the second la

Abstract: A capacitor forming unit includes a dielectric plate, a first conductor film formed on a plate upper surface region other than front and rear end portions, a first insulator film formed on the upper surface front end portion, a second insulator film formed on the upper surface rear end portion, a second conductor film formed on a plate lower surface region other than front and rear end portion, a third insulator film formed on the front end portion lower surface, and a fourth insulator film formed on the lower surface rear end portion. One or more first electrode rods are disposed in through holes, and electrically connected to the first conductor film and electrically insulated from the second conductor film. One or more second electrode rods are disposed in other through holes, and electrically connected to the second conductor film and electrically insulated from the first conductor film.

Abstract: Improved equivalent circuits and circuit analysis using the same for a multilayer capacitor are provided. In one aspect, the equivalent series capacitance C and part of the equivalent series resistance R of a basic equivalent circuit for a multilayer chip capacitor are replaced with a capacitance CO, and capacitances Cm and C1 and the resistance Rc1 to take into consideration abnormal characteristics in electromagnetic distribution that occur at the corners and edges of the internal electrodes in the multilayer chip capacitor. In one aspect, additional circuit elements, such as resistances Rp1 and Rp2, the capacitance Cp, the inductances Lm and L1, and the resistance RL1, are provided to take into consideration the skin effects of the internal electrodes within the multilayer chip capacitor, electromagnetic proximity effects, losses and parasitic capacitance of the dielectric material, as well as parasitic inductance of the external electrodes.

Abstract: An object of the present invention is to provide a multi-layer ceramic capacitor that includes a laminated block 4 formed by laminating ceramic dielectric layers 2 and internal electrodes 3 alternately, a pair of cover layers 5 laminated on top and bottom of the laminated block, a ceramic body 6 formed on both side surfaces of the laminated block 4, and a pair of external electrodes 7 electrically connected to the internal electrodes 3 and that can effectively prevent an occurrence of a crack. In the multi-layer ceramic capacitor 1, a silicate crystal made of an oxide including Ba and Si or a silicate crystal made of an oxide including Ti and Si is formed in boundary portions between the laminated block 4 and the ceramic bodies 6.

Abstract: A laminated electronic component includes a first plating film that defines a base for external terminal electrodes and that includes a plurality of layers including a first layer made of, for example, copper and a second layer provided on the first layer. The total thickness of the first plating film is about 3 ?m to about 15 ?m, and the thickness of the second layer is about 2 to 10 times as thick as the thickness of the first layer. The first layer is formed by electroless plating, and the second layer is formed by electrolytic plating. This formation results in a grain size of about 0.5 ?m or more of a metal grain included in the second layer, and thus makes the film less susceptible to oxidation.

Abstract: In a method of forming an external electrode by growing plated depositions on exposed ends of a plurality of internal electrodes in a component main body, the component main body is polished to increase exposure of the internal electrodes. To prevent decreased external electrode fixing strength, a radius of curvature is reduced to about 0.01 mm or less for an R chamfered section formed in a ridge section of the component main body during polishing by ion milling, and exposed ends of the internal electrodes are recessed from end surfaces of the component main body with a recess length of about 1 ?m or less. Plating films to serve as external electrodes are formed to extend from the end surfaces of the component main body across the R chamfered section, and include end edges located on at least one of the principal surfaces and the side surfaces.

Abstract: Substrates having power and ground planes, such as, for example, printed circuit boards, include at least one noise suppression structure configured to suppress electrical waves propagating through at least one of a power plane and a ground plane. The at least one noise suppression structure may include a power plane extension that extends from the power plane generally toward the ground plane, and a ground plane extension that extends from the ground plane generally toward the power plane. The ground plane extension may be separated from the power plane extension by a distance that is less than the distance separating the power and ground planes. Electronic device assemblies and systems include such substrates. Methods for suppressing noise in at least one of a power plane and a ground plane include providing such noise suppression structures between power and ground planes.

Abstract: A capacitor includes a capacitor body made of a dielectric, a first internal electrode, a second internal electrode, a first signal terminal, a second signal terminal, and a grounding terminal. The first and second signal terminals are connected to the first internal electrode. The grounding terminal is disposed on the outer surface of the capacitor body so as to be connected to the second internal electrode. The grounding terminal is connected to the ground potential. The grounding terminal includes a plating layer which is disposed on the capacitor body and which is connected to the second internal electrode.

Abstract: A multilayer body includes first and second capacitance conductors and an internal conductor, which define a capacitor, provided therein. First and second external electrodes are respectively connected to the first and second capacitance conductors via first and second led out conductors. The internal conductor faces the first and second capacitance conductors. Third and fourth external electrodes are connected to the first capacitance conductor via third and fourth led out conductors. Fifth and sixth external electrodes are connected to the second capacitance conductor via fifth and sixth led out conductors.

Abstract: A ceramic electronic component includes a first dielectric layer, a second dielectric layer, and an intermediate layer. The first dielectric layer is a layer containing BaO, Nd2O3, and TiO2, the second dielectric layer is a layer containing a different material from the material of the first dielectric layer, and the intermediate layer is a layer formed between the first dielectric layer and the second dielectric layer and containing main components that are not contained in the first dielectric layer and the second dielectric layer in common as the main components.

Abstract: Disclosed are a multilayer ceramic condenser and a method of manufacturing a multilayer ceramic condenser. There is provided a method of manufacturing a multilayer ceramic condenser, including: printing a plurality of stripe-type inner electrode patterns on a ceramic green sheet in parallel; forming a laminate by stacking ceramic green sheets on which a plurality of stripe-type inner electrode patterns are formed; cutting the laminate so that a first inner electrode pattern and a second inner electrode pattern are alternately stacked; and forming a first side part and a second side part by applying ceramic slurry in order to cover the side of the laminate to which both the first inner electrode pattern and the second inner electrode pattern are exposed.

Abstract: In a method of manufacturing a laminate type electronic component, when a heat treatment is carried out after plating films, which at least partially define external electrodes, are formed by growing plated depositions deposited on exposed ends of a plurality of internal electrodes in a component main body, the presence of the plating films may not only interfere with moisture release, but may also cause blisters or bulge defects in the plating films, while moisture such as a plating solution in the component main body is removed by evaporation. To avoid such problems, cuts to divide exposed ends into multiple sections are formed in extending sections of internal electrodes. Thus, plating films include slits extending in the stacking direction at locations corresponding to positions of the cuts.

Abstract: A capacitor includes a first metal plate; a second metal plate in close proximity to the first metal plate; a third metal plate in close proximity to the first metal plate, and at least one dielectric layer interposed between the first, second and three vertical metal plates. The first, second and third metal plate are connected to three different terminals of an integrated circuit.

Abstract: In an electronic component, a first capacitor conductor includes a first exposed portion exposed between insulating layers at a surface of a laminate including a first shorter side and two longer sides. A second capacitor conductor includes a second exposed portion exposed between the insulating layers at a surface of the laminate including a second shorter side and the two longer sides. First and second external electrodes are arranged on the laminate so as to cover the first and the second exposed portions, respectively. A first width of the first capacitor conductor in a region located between the second shorter side and a first straight line obtained by connecting two edges of the second external electrode is greater than a width of the first capacitor conductor in a region located between the first straight line and a straight line obtained by connecting two edges of the first external electrode.

Abstract: A device according to various aspects of the present invention generally includes a surface mount device having a top side, a bottom side, a plurality of sidewalls, and a circuit comprising one or more layers. The device includes a first conductive surface covering a portion of one of the sidewalls for providing an input to the circuit, a second conductive surface covering a portion of one of the sidewalls for providing an output from the circuit, and a third conductive surface covering a portion of one of the sidewalls for providing an electrical ground to the circuit. When the surface mount device is mounted to a provided mounting surface, at least one layer of the circuit is orthogonal to the provided mounting surface.

Abstract: A method for manufacturing a laminated electronic component including an electronic component main body including laminated functional layers, internal conductors which are disposed inside the electronic component main body and a portion of which are exposed portions exposed at outer surfaces of the electronic component main body, and external terminal electrodes disposed on the outer surfaces of the electronic component main body so as to connect to the internal conductors and cover the exposed portions of the internal conductors includes the step of forming a substrate plating film having an average particle diameter of metal particles of at least about 1.0 ?m on the outer surface of the electronic component main body through direct plating so as to cover the exposed portions of the internal conductors in the formation of the external terminal electrodes on the electronic component main body.

Abstract: A multilayer capacitor which can control ESR in a wide frequency band is provided. In a multilayer capacitor 1, inner electrodes 8a, 8b oppose each other as different polarities through a dielectric layer 7 in a capacitance unit 10, inner electrodes 8c to 8f oppose each other as different polarities through dielectric layers 7 in ESR control units 11A, 11B, and the inner electrodes 8a, 8b of the capacitance unit 10 connected to the outer electrodes 3, 4 and the inner electrodes 8c, 8f of the ESR control units 11A, 11B connected to the outer electrodes 3, 4 are kept from opposing each other as different polarities through the dielectric layer 7 at boundaries between the capacitance unit 10 and the ESR control units 11A, 11B.

Abstract: A laminate includes ceramic layers laminated to each other. Internal conductors are embedded in the laminate and include exposed portions that are exposed between the ceramic layers at a lower surface and an upper surface of the laminate. External electrodes are directly plated on the lower surface and the upper surface so as to cover the respective exposed portions. Regions of the lower surface at which the exposed portions are provided are arranged to protrude from the other regions of the lower surface, and regions of the upper surface at which the exposed portions are provided are arranged to protrude from the other regions of the upper surface.

Abstract: A die having a base formed of a first material is connected to a board having a base formed of a second material. An interposer having a coefficient of thermal expansion intermediate coefficients of thermal expansion of the first and second materials is positioned between the die and the board.

Abstract: A ceramic electronic component includes a ceramic element including opposed side surfaces, an inner electrode, and an external terminal electrode. The external terminal electrode includes a first conductive layer and a second conductive layer. The first conductive layer is formed by plating so as to be electrically coupled to an exposed section of the internal electrode exposed to the side surfaces. The second conductive layer is arranged so as to cover the first conductive layer and includes conductive resin. The value of T2/T1 is in the range of about 3.4 to about 11.3, where T1 indicates the thickness of the first conductive layer and T2 indicates the thickness of the second conductive layer.

Abstract: An electronic component includes a laminate including a plurality of insulating layers that are laminated on each other. A capacitor conductor is embedded in the laminate and includes an exposed portion exposed between the insulating layers at a predetermined surface of the laminate. An external electrode is provided on the predetermined surface by direct plating so as to cover the exposed portion. An outer edge of the external electrode is spaced away from the exposed portion by about 0.8 ?m or more.

Abstract: A monolithic electronic component includes a laminate including a plurality of stacked insulating layers and a plurality of internal electrodes which extend between the insulating layers and which have end portions exposed at predetermined surfaces of the laminate, first plating layers disposed on the predetermined surfaces of the laminate, and second plating layers disposed on the first plating layer. The first plating layers are made of a metal different from that used to make the internal electrodes. The first plating layers are formed by electroless plating. The second plating layers are formed by electroplating.

Abstract: Dielectric ceramic composition includes a hexagonal type barium titanate as a main component shown by a generic formula of (Ba1-?M?)A(Ti1-?Mn?)BO3 and having hexagonal structure wherein an effective ionic radius of 12-coordinated “M” is ?20% or more to +20% or less with respect to an effective ionic radius of 12-coordinated Ba2+ and the A, B, ? and ? satisfy relations of 1.000<(A/B)?1.040, 0??<0.003, 0.03???0.2, and as subcomponents, with respect to the main component, certain contents of alkaline earth oxide such as MgO and the like, Mn3O4 and/or Cr2O3, and CuO and Al2O3 and rare earth element oxide and glass component including SiO2. According to the present invention, it can be provided the hexagonal type barium titanate powder and the dielectric ceramic composition which are preferable for producing electronic components such as a capacitor and the like showing comparatively high specific permittivity, having advantageous insulation property and having sufficient reliability.

Abstract: Lithium ion batteries having an anode comprising at least one graphene layer in electrical communication with titania to form a nanocomposite material, a cathode comprising a lithium olivine structure, and an electrolyte. The graphene layer has a carbon to oxygen ratio of between 15 to 1 and 500 to 1 and a surface area of between 400 and 2630 m2/g. The nanocomposite material has a specific capacity at least twice that of a titania material without graphene material at a charge/discharge rate greater than about 10 C. The olivine structure of the cathode of the lithium ion battery of the present invention is LiMPO4 where M is selected from the group consisting of Fe, Mn, Co, Ni and combinations thereof.

Abstract: Disclosed are apparatus and methodology for inexpensive realization of one or more secondary capacitors within a monolithic body that already includes a first, larger capacitor to provide ultra wideband structures. Alternating layers of electrodes are provided with arm portions that embrace portions of adjacent electrode layers so as to create additional coupling effects within the capacitor structure thereby producing multiple additional equivalent capacitor structures within the device.

Abstract: In a ceramic capacitor according to the present invention, the electrode strips of an internal electrode and the dielectric strips of a ceramic dielectric member are arranged perpendicularly to the surface of a substrate, and as such, the plurality of electrode strips and the plurality of dielectric strips are arranged alternately along a parallel direction relative to the substrate surface. That is, the electrode strips and the dielectric strips are multi-layered along a parallel direction relative to the substrate surface, thereby facilitating the realization of multi-layering in the ceramic capacitor by a known patterning technology.

Abstract: Disclosed herein are a multilayer ceramic capacitor and a method for manufacturing the same. The multilayer ceramic capacitor includes: a capacitor main body having dielectric layers and inner electrodes laminated therein; external electrodes and plating layers formed on a surface of the capacitor main body; and electroless plating layers formed between the external electrodes and the plating layers. According to the examples of the present invention, the electroless plating layer is formed before the plating layer is formed on the external electrode, thereby solving non-plating problems when the plating layer made of nickel or the like is formed on the external electrode. Therefore, soldering defects due to nickel non-plating or the like can be solved at the time of mounting, and thus, a multilayer ceramic capacitor having high reliability can be provided.

Abstract: An electronic component including a wiring board having a power-source pattern and a signal pattern, a semiconductor element mounted on the wiring board and having a power-source electrode pad and a signal electrode pad, a first connection portion being made of a conductive material and connecting the signal pattern of the wiring board and the signal electrode pad of the semiconductor element, and a second connection portion being made of a conductive material and connecting the power-source pattern of the wiring board and the power-source electrode pad of the semiconductor element. The conductive material of the first connection portion and the conductive material of the second connection portion are selected such that the conductive material of the second connection portion has an electrical resistance which is lower than an electrical resistance of the conductive material of the first connection portion.

Abstract: A power electronics module includes a capacitor having a trough-shaped housing and at least one capacitor winding. An electronic unit includes a base on which the capacitor is mounted. A cooling plate in thermal contact with a cooling surface of the capacitor is formed by a bus bar. The cooling plate is on the base of the electronic unit.

Abstract: When an external terminal electrode of a ceramic electronic component such as a laminated ceramic capacitor is formed by plating, plating growth may be also caused even in an undesired location. The ceramic surface provided by a component main body is configured to include a high plating growth region of, for example, a barium titanate based ceramic, which exhibits relatively high plating growth, and a low plating growth region of, for example, a calcium zirconate based ceramic, which exhibits relatively low plating growth. The plating film constituting a first layer to define a base for an external terminal electrode is formed in such a way that the growth of a plated deposit deposited with conductive surfaces provided by exposed ends of internal electrodes as starting points is limited so as not to cross over a boundary between the high plating growth region and the low plating growth region toward the low plating growth region.

Abstract: A capacitor-embedded substrate includes a base material having a desired thickness, and a pair of conductors (feedthrough electrodes) each formed in a desired pattern to penetrate through the base material in the thickness direction thereof, and oppositely disposed with an insulating layer interposed therebetween. The pair of electrodes are formed in comb-shaped patterns, and are oppositely disposed in such a manner that respective comb-tooth portions are meshed with each other.

Abstract: A monolithic ceramic electronic component includes a first internal electrode including a first region extending to a first end surface and having a relatively large dimension in a width direction and a second region located at the side closer to a front end than is the first region and having a relatively small dimension in a width direction, wherein d1>c1+ng (n represents a constant based on the size of the monolithic ceramic electronic component) is satisfied, where the distance from a first end point which is closest in the first region to the first side surface and which is closest to the second end surface to the second end surface is d1, the distance between first and second wraparound portions is g, and the distance between a front end of the second wraparound portion and the second end surface is c1.

Abstract: A multilayer feedthrough capacitor has a capacitor element body of a substantially rectangular parallelepiped shape, a signal internal electrode, a ground internal electrode, first and second signal terminal electrodes, and a first ground terminal electrode. The capacitor element body includes first and second end faces opposed in a longitudinal direction thereof, and a mounting surface perpendicular to a direction in which a plurality of insulator layers are laminated. The first signal terminal electrode and the first ground terminal electrode are arranged in proximity to each other in a first region near the first end face in the mounting surface. The second signal terminal electrode is arranged in a second region near the second end face in the mounting surface. No conductor is arranged in a third region between the first region and the second region in the longitudinal direction of the capacitor element body, in the mounting surface.

Abstract: An electronic apparatus includes an electronic component electrically connected to a substrate positioned beneath the electronic component. A member includes a plurality of decoupling capacitors having different voltages, and the decoupling capacitors are electrically connected to the electronic component. A plurality of voltage planes in the member are electrically connected to the decoupling capacitors. The decoupling capacitors, via the voltage planes in the member, provide different voltages to the voltage planes and thus the electronic component.

Abstract: Disclosed herein is a mounting structure of a circuit board having a multi-layered ceramic capacitor thereon, the multi-layered ceramic capacitor including dielectric sheets laminated thereon and external terminal electrodes formed at both ends thereof, the dielectric sheets having internal electrodes formed thereon, and the external terminal electrodes being connected in parallel with the internal electrode, wherein the internal electrodes are disposed to be in parallel with the circuit board, the external terminal electrodes are bonded to lands of the circuit board by a conductive material, and a bonding height (Ts) of the conductive material is lower than a sum of a gap (Ta) between the circuit board and a bottom surface of the multi-layered ceramic capacitor and a thickness (Tc) of a cover layer on a lower portion of the multi-layered ceramic capacitor, whereby vibration noise can be greatly reduced.

Abstract: There is provided a multilayer ceramic capacitor including: a ceramic body; first and second internal electrodes including respective lead-out portions having an overlapping area, the overlapping area being exposed to one surface of the ceramic body; first and second external electrodes extended from the one surface of the ceramic body to side surfaces thereof in a y-direction, in which the first and second internal electrodes are laminated, and connected to the respective lead-out portions; and an insulation layer formed on the one surface of the ceramic body.

Abstract: A multi-layer film-stack and method for forming the multilayer film-stack is given where a series of alternating layers of conducting and dielectric materials are deposited such that the conducting layers can be selectively addressed. The use of the method to form integratable high capacitance density capacitors and complete the formation of an integrated power system-on-a-chip device including transistors, conductors, inductors, and capacitors is also given.

Abstract: There is provided a chip type laminated capacitor, including: a ceramic body including a dielectric layer having a thickness equal to 10 or more times an average particle diameter of a grain included therein and being 3 ?m or less; first and second outer electrodes formed on both ends of the ceramic body in a length direction; first and second band parts formed to extend inwardly of the ceramic body in the length direction on a length-width (L-W) plane from the first and second outer electrodes and having different lengths; and third and fourth band parts formed to extend inwardly of the ceramic body in the length direction on a length-thickness (L-T) plane from the first and second outer electrodes and having different lengths.

Abstract: A structural body which includes a first dielectric layer formed on a first substrate and including first conductive particles, each surface of the first conductive particles being entirely covered with a first dielectric film; and a second dielectric layer formed on the first dielectric layer wherein a volume ratio of a dielectric in the second dielectric layer is higher than a volume ratio of a dielectric in the first dielectric layer.

Abstract: There is provided a multi-layered ceramic capacitor with reduced internal resistance by forming internal electrode groups including internal electrodes having different lengths.

Abstract: A dielectric ceramic composition includes BaTiO3 as a main component; as subcomponents, with respect to 100 moles of BaTiO3, 0.9 to 2.0 moles of an oxide of RA in terms of RA2O3, where RA is at least one selected from Dy, Gd and Tb; 0.3 to 2.0 moles of an oxide of RB in terms of RB2O3, where RB is at least one selected from Ho and Y; 0.75 to 2.5 moles of an oxide of Yb in terms of Yb2O3; and 0.5 to 2.0 moles of an oxide of Mg in terms of Mg. when contents of oxide of RA, oxide of RB and oxide of Yb with respect to 100 moles of BaTiO3 are defined as “?”, “?” and “?”, respectively, “?”, “?” and “?” satisfy relations of 0.66?(?/?)?3.0 and 0.85?(?+?)/??2.4. According to the present invention, a dielectric ceramic composition having good properties can be provided.

Abstract: A multilayer ceramic device comprises a laminated ceramic body having opposite end surfaces, a pair of conductive electrodes each respectively attached to one end surface of the laminated ceramic body and a plurality of alternately staggered internal electrodes within the laminated ceramic body configured in an alternating manner and each electrically connected to the corresponding conductive electrodes respectively; each conductive electrodes of the multilayer ceramic device is further covered with a solder paste layer so that the multilayer ceramic device is thus made without any plating step and no need of treating waste liquid nickel or waste liquid tin as well as no problem of environmental pollution caused by plating solution, thereby lowering manufacturing costs and reducing processing time.

Abstract: An orthogonal array is formed by performing electromagnetic field analysis only once and determining a range by using the mount position and type of a capacitor and the number of capacitors as parameters to perform circuit analysis a small number of times. An estimation equation is formed by using as an index a result of the absolute value of the calculated power source impedance, and a capacitor is disposed to reduce noises by using the estimation equation.

Abstract: A multilayer capacitor operable to allow adjustment of its equivalent series resistance substantially independent of its equivalent series inductance is disclosed. The multilayer capacitor can be used in decoupling circuits such as power supply decoupling circuits. The equivalent series resistance of the multilayer capacitor can be increased while suppressing an increase in the equivalent series inductance resulting in improved noise grounding.

Abstract: There is provided a multilayer ceramic capacitor, including: a multilayer body in which a plurality of dielectric layers are stacked in a thickness direction; and inner electrode layers formed within the multilayer body and including first and second inner electrodes disposed to be opposed to each other; wherein a ratio (MA1/CA1) of MA1 to CA1 is between 0.07 and 0.20, wherein CA1 represents an area of the multilayer body in a cross section of the multilayer body taken in a length and thickness direction, and MA1 represents an area of a first margin part in the cross section of the multilayer body taken in the length and thickness direction, the first margin part being a portion of the multilayer body, other than a first capacitance forming part thereof in which the first and second inner electrodes overlap in the thickness direction.

Abstract: A package enclosing at least one microelectronic element (60) such as a sensor die and having electrically conductive connection pads (31) for electric connection of the package to another device is manufactured by providing a sacrificial carrier; applying an electrically conductive pattern (30) to one side of the carrier; bending the carrier in order to create a shape of the carrier in which the carrier has an elevated portion and recessed portions; forming a body member (45) on the carrier at the side where the electrically conductive pattern (30) is present; removing the sacrificial carrier; and placing a microelectronic element (60) in a recess (47) which has been created in the body member (45) at the position where the elevated portion of the carrier has been, and connecting the microelectronic element (60) to the electrically conductive pattern (30). Furthermore, a hole (41) is arranged in the package for providing access to a sensitive surface of the microelectronic element (60).

Abstract: There is provided a chip type laminated capacitor including: a ceramic body formed by laminating a dielectric layer having a thickness equal to 10 or more times an average particle diameter of a grain included therein and being 3 ?m or less; first and second outer electrodes; a first inner electrode having one end forming a first margin together with one end surface of the ceramic body at which the second outer electrode is formed and the other end leading to the first outer electrode; and a second inner electrode having one end forming a second margin together with the other end surface of the ceramic body at which the first outer electrode is formed and the other end leading to the second outer electrode, wherein the first and second margins have different widths under a condition that they are 200 ?m or less.