Abstract: A multilayer electronic component includes a plurality of dielectric layers interleaved with a plurality of first and second polarity electrode layers. Internal and/or external anchor tabs may also be selectively interleaved with the dielectric layers. Portions of the electrodes and anchor tabs are exposed along the periphery of the electronic component in respective groups and thin-film plated deposition is formed thereon by electroless and/or electrolytic plating techniques. A solder dam layer is provided over a given component surface and formed to expose predetermined areas where solder barrier and flash materials may be deposited before attaching solder preforms. Some embodiments include plated terminations substantially covering selected component surfaces to facilitate with heat dissipation and signal isolation for the electronic components.

Abstract: The object of the invention is to provide a method of forming an external electrode of an electronic component whereby the external electrode can be formed in a stable fashion.

Abstract: A laminated ceramic substrate includes a side electrode in which a side edge electrode layer formed on a side edge portion of a ceramic layer overlaps with and connects to a side edge electrode layer formed on a side edge portion of another ceramic layer directly above and/or directly below the former ceramic layer. The side edge electrode layer includes a parallel wall unexposed and approximately parallel to a side surface of the laminated ceramic substrate and a perpendicular wall approximately perpendicular to the side surface of the laminated ceramic substrate. A length La of the parallel wall and a depth Lb of the parallel wall from the side surface of the laminated ceramic substrate have a relationship of La>Lb.

Abstract: A multi-terminal multilayer capacitor reducing an equivalent series inductance (ESL), whose design flexibility is high, in which cost of electrode material is low, and in which a structural defect hardly occurs includes lead portions of first and second internal electrodes and lead portions of third and fourth internal electrodes that are disposed along the length of each of two side surfaces so as to be alternately exposed. Preferably, the first and third internal electrodes, and the second and fourth internal electrodes are disposed so as to be arranged along the length of each side surface in a coplanar manner, with a predetermined distance provided between two internal electrodes.

Abstract: A multilayer capacitor comprises a capacitor body, a first connecting conductor arranged on a first side face of the capacitor body, first and second terminal electrodes, and a first insulator arranged between the first connecting conductor and first terminal electrode. The capacitor body has a plurality of laminated insulator layers and a plurality of first and second inner electrodes. The second terminal electrode is connected to the second inner electrode. Each of the first inner electrodes has a first lead portion exposing an end to the first side face. At least one of the first inner electrodes also has a second lead portion whose end is exposed to the first side face. The first connecting conductor continuously covers all the ends of the first lead portions of the first inner electrodes and mechanically connects with the ends of the first lead portions.

Abstract: A multilayer capacitor array comprises a multilayer body, and first to fourth terminal conductors and first and second outer connecting conductors formed on the multilayer body. The multilayer body includes a first electrode group having a plurality of first and second inner electrodes, and a second electrode group having a plurality of third and fourth inner electrodes. The first to fourth inner electrodes are connected to the first to fourth terminal conductors, respectively. In the plurality of first inner electrodes, at least one first inner electrode whose number is smaller than the total number of the first inner electrodes by at least one is connected to the first terminal conductor. In the plurality of second inner electrodes, at least one second inner electrode whose number is smaller than the total number of the second inner electrodes by at least one is connected to the second terminal conductor.

Abstract: A chip-type electronic component includes a ceramic chip body, an external electrode formed on the chip body, a conductive elastic resin film made of a mixture of metal powder and elastic resin and formed to cover the external electrode, and a metal plating film. The metal powder is exposed at an obverse surface of the conductive elastic resin film. The metal plating film is formed on the obverse surface of the conductive elastic resin film at which the metal powder is exposed.

Abstract: A multilayer capacitor 10 of the present invention including: a dielectric body 12 formed by stacking a plurality of dielectric layers 12a; an internal layer portion 17 in which a first and second internal conductor layers 21 and 22 are stacked alternately in the dielectric body 12 via the dielectric layer 12a; external layer portions 19a and 19b in which a first and second external conductor layers 23 and 25 are stacked via the dielectric layer 12a; a first terminal electrode 31 connected with the first internal conductor layer 21 and the first external conductor layer 23, formed at least on a first side face 12A of the dielectric body 12; and a second terminal electrode 32 connected with the second internal conductor layer 22 and the second external conductor layer 25, formed at least on a second side face 12 B opposed to the first side face 12A.

Abstract: In the capacitor, an insulating structural member 28 is arranged on an earth metal fitting 27. In the earth metal fitting 27, two sets of cylindrical-shaped portions 26 are separately arranged in an interval, and a floating portion 27a is formed. The insulating structural member 28 is arranged opposite to the floating portion 27a of this earth metal fitting 27 in such a manner that both a concave portion 28a and a convex portion 28b are formed on the insulating structural member 28 to be fitted to the cylindrical-shaped portion 26. Since a feedthrough conductor 29 penetrates a through hole 30 of the insulating structural member 28, the earth metal fitting 27, the insulating structural member 28, and the feedthrough conductor 29 are positioned with each other. Then, one opening portion 31a of an insulating case 31 is fitted into the floating portion 27a of the earth metal fitting 27.

Abstract: A ceramic capacitor comprises a ceramic sintered body, and first and second terminal electrodes formed on outer surfaces of the ceramic sintered body. The first terminal electrode is electrically connected to a land formed on a substrate through a first metal terminal. The first metal terminal has a first capacitor connecting portion mechanically connected to the first terminal electrode, a first terminal portion mechanically connected to the land, and a first intermediate portion electrically connecting the first capacitor connecting portion and the first terminal portion to each other. The first capacitor connecting portion of the first metal terminal is parallel to the substrate.

Abstract: A chip-type electronic component includes a ceramic chip body incorporating an element, an external electrode formed on a side surface of the chip body, a conductive elastic resin film which is larger in width than the external electrode and formed to cover the external electrode and extend onto part of a mount surface of the chip body, and a metal plating film for soldering formed on the conductive elastic resin film.

Abstract: A capacitor has stacking capacitor elements, each of which contains a conductor plate, a first band being an insulator and disposed around the plate, a second band being an insulator and disposed around the plate so as to be substantially parallel to the first band, an insulating coating covering a region sandwiched between the first and second bands, a cathode layer formed on the insulating coating, and an anode containing the plate and formed on an outer side of at least one of the first and second bands. The cathode layers are elctrically connected to each other through paths each connecting in series the facing two cathode layers of the adjacent two elements and path(s) connecting in parallel the cathode layers to each other, and the anodes are electrically connected to each other through path(s) connecting in parallel the anodes to each other.

Abstract: A stacked electronic component includes multiple energy storage units and a fastening device. Each energy storage unit has a first electrode and a second electrode. The fastening device includes first and second fastening member disposed on opposite sides of the energy storage units. Each of the first and second fastening members includes a body plate, at least a clamping structure extending from two edges of the body plate and at least a connecting part electrically connected to the body plate and the circuit board. The energy storage units are clamped by the clamping structures of the first and second fastening members and the first and second electrodes are electrically connected to the body plates of the first and second fastening members, so that the first and second electrodes are electrically connected to the circuit board through the body plates and the connecting parts of the first and second fastening members.

Abstract: A feedthrough filter capacitor assembly includes a capacitor having first and second sets of conductive electrode plates embedded within a dielectric body and mounted to the hermetic terminal of an implantable medical device. A laminar delamination gap is provided between the capacitor sealing materials and the hermetic terminal assembly to facilitate helium leak detection. At least one feedthrough terminal pin extends through the capacitor in conductive relation with the first set of electrode plates, and an outer ferrule is mounted about the capacitor in conductive relation with the second set of electrode plates. The mounting washer is spaced against the hermetic seal and is adhesively connected to the feedthrough capacitor. The mounting washer forms a laminar flow delamination through which helium molecules can flow during a helium leak detection test. Provision is made for a pre-connection to the gold braze so that the capacitor inside diameter termination is not electrically isolated from the lead wire.

Abstract: A multilayer electronic component is composed of a ceramic body obtained by laminating a plurality of ceramic layers via a conductor layer. The conductor layer is a plated film and extracted to one end face of the ceramic body, thereby contributing to the formation of capacity. A peripheral edge portion of the conductor layer composed of the plated film is thicker than its inner region. This avoids stripping on the peripheral edge portion of the conductor layer and avoids internal defects such as delamination. A dummy conductor layer may be formed at a distance on the end opposite the end face for extraction.

Abstract: A multilayer ceramic electronic component includes a skittered laminated body including internal electrodes that have a strength that is greater than that of ceramic layers provided therein. End portions of the internal electrodes protrude from end surfaces of the laminated body and are deformed so as to extend along the end surfaces by a barrel polishing process using balls. When external electrodes are formed on the end surfaces of the laminated body, a large contact area with the internal electrodes can be obtained. Therefore, a reliability of the electrical connection between the electrodes is definitely secured.

Abstract: A multilayer capacitor comprises a multilayer body in which a plurality of dielectric layers and a plurality of first and second inner electrodes are alternately laminated, and a plurality of outer conductors (first and second terminal conductors, and first and second outer connecting conductors) formed on the multilayer body. Each of the outer conductors is formed on one of two side faces of the multilayer body opposing each other. Each of the first and second inner electrodes is electrically connected to the corresponding outer connecting conductor. At least one inner connecting conductor layer including a first and a second inner connecting conductors is laminated in the multilayer body. Each of the inner connecting conductors is electrically connected to the corresponding terminal and outer connecting conductors. The equivalent series resistance of the multilayer capacitor is set to a desirable value by adjusting the number or position of inner connecting conductor layer.

Abstract: The invention provides a multilayer chip capacitor reduced in ESL. A capacitor body has a plurality of dielectric layers stacked in a thickness direction. A plurality of first and second internal electrodes are separated from one another by the dielectric layers within the capacitor body. Each of the first internal electrodes opposes each of the second internal electrodes. Each of the first and second internal electrodes includes at least two leads extending toward any side of the capacitor body. Also, a plurality of external electrodes are formed on an outer surface of the capacitor body and connected to the internal electrodes via the leads. Further, vertically adjacent ones of the leads having the same polarity extend in different directions at a predetermined angle. The leads of the first and second internal electrodes are disposed adjacent to and alternate with those of the second internal electrodes.

Abstract: A first inner conductor, a second inner conductor, a first inner conductor, and a second inner conductor are disposed in the order mentioned from the top in the dielectric element. The first inner conductors are respectively led out to two opposing side surfaces of the dielectric element. A pair of the second inner conductors is respectively led out to two opposing side surfaces different from the two opposing side surfaces to which the first inner conductors are respectively led out. Terminal electrodes are respectively disposed on four side surfaces of the dielectric element for connection with these four inner conductors respectively.

Abstract: A first inner conductor, a second inner conductor, a first inner conductor, and a second inner conductor are disposed in the order mentioned from the top in the dielectric element. The first inner conductors are respectively led out to two opposing side surfaces of the dielectric element. A pair of the second inner conductors is respectively led out to two opposing side surfaces different from the two opposing side surfaces to which the first inner conductors are respectively led out. Terminal electrodes are respectively disposed on four side surfaces of the dielectric element for connection with these four inner conductors respectively.

Abstract: A multilayer electronic component includes a plurality of dielectric layers interleaved with a plurality of internal electrode elements and a plurality of internal anchor tabs. Portions of the internal electrode elements and anchor tabs are exposed along the periphery of the electronic component in one or more aligned columns. Each exposed portion is within a predetermined distance from other exposed portions in a given column such that bridged terminations may be formed by depositing one or more plated termination materials over selected of the respectively aligned columns. Internal anchor tabs may be provided and exposed in prearranged relationships with other exposed conductive portions to help nucleate metallized plating material along the periphery of a device. External anchor tabs or lands may be provided to form terminations that extend to top and/or bottom surfaces of the device.

Abstract: A chip-type electronic component comprises a chip element body including an inner circuit element, and a pair of terminal electrodes electrically connected to the inner circuit element. The pair of terminal electrodes are positioned at respective end portions of the chip element body. The chip element body has one side face acting as a mounting surface opposing a circuit substrate. The pair of terminal electrodes include an electrode portion formed on the mounting surface. Here, it is assumed that a first direction is a direction orthogonal to the mounting surface, a second direction is a direction along which the pair of terminal electrodes oppose each other on the mounting surface, and a third direction is a direction orthogonal to the first and second directions.

Abstract: Improved terminations, interconnection techniques, and inductive element features for multilayer electronic components are formed in accordance with disclosed plating techniques. Monolithic components are provided with plated terminations whereby the need for typical thick-film termination stripes is eliminated or greatly simplified. Such plated termination technology eliminates many typical termination problems and enables a higher number of terminations with finer pitch, which may be especially beneficial on smaller electronic components. The subject plated terminations are guided and anchored by exposed varying width internal electrode tabs and additional anchor tab portions. Such anchor tabs may be positioned internally or externally relative to a chip structure to nucleate additional metallized plating material. The combination of electrode tabs and anchor tabs may be exposed in respective arrangements to form generally discoidal portions of plated material.

Abstract: A capacitor module incorporating a ceramic capacitor having terminal members for reducing stress caused by thermal stress or electrostriction in the ceramic capacitor itself, and a semiconductor device using the capacitor module. The capacitor module and the semiconductor device are designed to have a reduced size and improved reliability.

Abstract: An electronic component includes plural elements, a pair of terminal sections provided to each one of the elements, and a packaging material covering the elements and parts of the terminal sections. A non-conductive shielding section is provided between the terminal sections led outside the packaging material. The presence of the shielding section allows the electronic component to downsize the electronic apparatus, embody a greater density in mounting, and eliminate adverse influence to the apparatus for achieving higher performance as well as improving the durability.

Abstract: This invention describes a means by which performance characteristics of capacitors can be improved. This is achieved by reducing the temperature, preferably but not exclusively to cryogenic temperatures below 100 K. This is based on the observation that the dielectric strength, dielectric losses and plate losses in many capacitors, such as film capacitors, improve as the temperature is decreased. A cryogenic capacitor bank is also described, which exhibits energy densities up to four times those of conventional, room-temperature capacitor banks. Cryogenic capacitors can be combined with cryogenically operated semiconductors or with superconductors in such a way as to reduce the size, weight, and losses of a complete system.

Abstract: A multilayer inductor has a rectangular parallelepiped element body and its length in the lengthwise direction (L), length in the direction of height (H), and length in the direction of width (W) are L?0.6 mm, H?0.3 mm, and W?0.3 mm, respectively. Terminal electrodes are provided so as to cover the vertices of the element body and come round to the side face from the end faces on both sides. The radius of curvature R of the vertex of the terminal electrode is set to a value being 10% or more and 20% or less of H or W.

Abstract: A capacitor structure including a conductive layer and a dielectric layer is provided. The conductive layer includes a first pattern and a second pattern arranged alternatively with respect to each other. In addition, the dielectric layer is disposed between the first spiral pattern and the second spiral pattern. Since in the capacitor structure described in the present invention, the first pattern and the second pattern being used as electrodes are disposed in a spiral shape, the capacitance per unit area of the capacitor structure is increased.

Abstract: A stacked capacitor includes a dielectric member, a plurality of internal electrodes, and a plurality of extraction electrodes. The dielectric member is a stacked member formed of a plurality of sheet-like stacked dielectric layers and has at least one side surface. The internal electrodes fit within the surface area of the dielectric layers and are stacked alternately with the dielectric layers. Further, the internal electrodes have first edges positioned near the side surface. Each extraction electrode has an overlapping portion A overlapping another extraction electrode at the side surface in a direction orthogonal to the mounting direction.

Abstract: A multilayer capacitor includes: a dielectric element; a pair of first internal conductors with same polarity disposed in the dielectric element to be adjacent to each other while being separated from each other by the dielectric layer; first leadout portions led out from the pair of first internal conductors respectively, one being provided for each of the first internal conductors; a pair of second internal conductors with same polarity disposed in the dielectric element to be adjacent to each other while being separated from each other by the dielectric layer; and second leadout portions led out from the pair of second internal conductors respectively, one being provided for each of the second internal conductors, wherein the first leadout portion and the second leadout portion led out respectively from the first internal conductor and the second internal conductor disposed adjacent to each other are led out to substantially the same positions in side faces facing each other of the dielectric element, resp

Abstract: A C-shaped combination capacitor assembly has a C-shaped shell, multiple capacitors, two conducting wires, two lead wires and encapsulant. The capacitors are mounted in the C-shaped shell. The conducting wires connect the capacitors in parallel. The two lead wires connect respectively to the conducting wires and protrude from the C-shaped shell. The encapsulant fills the C-shaped shell and covers and seals the capacitors, the conducting wires and the lead wires inside the C-shaped shell.

Abstract: An electro-magnetic interference filter terminal assembly for active implantable medical devices includes a structural pad in the form of a substrate or attached wire bond pad, for convenient attachment of wires from the circuitry inside the implantable medical device to the capacitor structure via thermal or ultrasonic bonding, soldering or the like while shielding the capacitor from forces applied to the assembly during attachment of the wires.

Abstract: A capacitor includes a planar electrode layer which is mounted between a pair of dielectric layers. The electrode layer generally is placed slightly off-center with respect to the dielectric layers so that the electrode layer extends to an end portion of the dielectric layers. One layer of the pair of dielectric layers has a pair of spaced apart contact members, each having a different polarity from the other. The contact members extend onto end portions of the dielectric layers with one of the contact members forming an electrical connection with the electrode layer. The combination of the electrode layer, the dielectric layer on which the contact members are mounted, and the contact member not connected to the electrode layer, allow development of a selected value of capacitance. Providing trimmed contact members as well as controlling their size and spacing allow for convenient preselection of desired operative characteristics of the capacitor.

Abstract: The present invention provides a thin film type multi-layered ceramic capacitor including a stacked body composed of a plurality of capacitor layers. Each of the capacitor layers comprises a substrate having an upper surface where a plurality of holes are formed and a flat lower surface, and a thin film capacitor on the upper surface of the substrate. The thin film capacitor includes a lower electrode film, a dielectric film, and an upper electrode film. The lower electrode film, the dielectric film, and the upper electrode film are formed in sequence on the upper surface of the substrate. The lower and the upper electrode films extend to one side and the other side of the substrate and contact first and second external electrodes, respectively.

Abstract: A multilayered chip capacitor including a capacitor main body including a plurality of dielectric layers, which are laminated; at least one pair of first and second internal electrodes, each of which is formed on the corresponding one of the plural dielectric layers and includes at least one lead extended to one end of the corresponding dielectric layer; a plurality of external terminals formed on the outer surface of the capacitor main body, and respectively connected to the first and second internal electrodes through the leads; and at least one opened region, formed through the inner area of each of the first and second internal electrodes, for branching the flow of current so as to increase the offset quantity of parasitic inductances between the first and second internal electrodes.

Abstract: An electronic component includes: an element having a pair of terminal electrodes; and a pair of metal terminals formed of metal materials respectively and connected to the pair of terminal electrodes respectively, in which: a portion of the metal terminal that extends from a base-end side of the metal terminal connectable to an external circuit to face the terminal electrode of the element is an electrode facing portion; and a tip side portion of the metal terminal in the electrode facing portion is connected to the terminal electrode, and a gap exists between a base-end side portion of the metal terminal in the electrode facing portion and the terminal electrode. Therefore, the electronic component is capable of fully absorbing a stress and realizes reduction in production cost.

Abstract: An interposer connector for connecting an interdigitated capacitor to a substrate having a first track to be electrically connected to first capacitor terminals and an opposed second track to be electrically connected to second capacitor terminals. The interposer connector supports the interdigitated capacitor and has a first electrical conductor electrically connectable to the first track and the first capacitor terminals and a second electrical conductor electrically connectable to the second track substrate and the second capacitor terminals.

Abstract: A method and apparatus is provided that pertains to a low inductance capacitor. The capacitor has a first surface electrically interconnected to a plurality of conductive electrodes and one or more second surfaces electrically interconnected to a plurality of electrodes interposed between the electrodes electrically interconnected to the first conductive surface. A dielectric layer separates the layered plurality of electrodes. The one or more second conductive surfaces are positioned within the body of the layered electrodes, such that the distance between the terminations of the first conductive surface and the one or more second conductive surfaces is shortened to lower inductance.

Abstract: A multilayer capacitor includes: a capacitor body formed by stacking a plurality of dielectric sheets with a first internal conductor and a second internal conductor sandwiching at least one of the dielectric sheets; a signal terminal electrode disposed on a side face of the capacitor body and connected to the first internal conductor; a leadout portion led out from the second internal conductor in a plurally divided form; and a grounding terminal electrode disposed on a side face of the capacitor body and connected to the second internal conductor via the leadout portion. Therefore, it is possible to reduce structural defects or the like to enhance reliability and to reduce ESL to allow more effective execution of a noise countermeasure in a high frequency range.

Abstract: A shielded planar capacitor structure (202) is discussed, formed within a Faraday cage (210) in an integrated circuit device (200). The capacitor structure (202) reduces parasitic capacitances within the integrated circuit device (200). The capacitor (202) comprises a capacitor stack (102) formed between a first and second metal layers (230,232) of the integrated circuit. The capacitor stack (102) has a first conductive layer formed from a third metal layer (106) disposed between the first and second metal layers (230,232) of the integrated circuit, a dielectric isolation layer (110) disposed upon the first conductive layer (106); and a second conductive layer (112) disposed upon the dielectric isolation layer (110) and overlying the first conductive layer (106). The structure (202) further has a first and second isolation layers (104,114) disposed upon opposite sides of the capacitor stack (102).

Abstract: An electrical component includes a stack of layers. The layers include dielectric layers and electrode layers. The dielectric layers have a resistance with a positive temperature coefficient. The electrode layers are electrically conductive and are interspersed among the dielectric layers. At least one of the electrode layers includes a constituent that is comprised of a base metal and that is at least partially coated with a protective layer. The protective layer includes a material that slows oxidation of the base metal.

Abstract: A power capacitor for high voltage and including at least one capacitor element that has improved electrical properties and that allows simple manufacture. Each capacitor element has a substantially circular-cylindrical shape. The inside of the container has a corresponding shape to closely surround each capacitor element. In addition, each capacitor element is oriented with the axial direction coinciding with the axial direction of the container. A capacitor bank includes a plurality of the power capacitors, and uses of one or more of the invented power capacitors can be used as a component in electrical installations.

Abstract: A capacitor mounting structure is proposed which can easily relieve a stress given to an extraction lead when ambient temperature is changed, soldering is made, or vibration is given, and can prevent breakage of the extraction lead. An outside holder is provided at an outside of a resin case housing a capacitor covered with a filler, and an inside holder is provided. The outside holder includes an upper outer wall bonded to an upper resin wall of the resin case. Lower openings of the resin case and the outside holder overlap with each other and form a lower space. An extraction lead is disposed in the lower space.

Abstract: According to the present invention, a method of manufacturing a ferroelectric capacitor using a ferroelectric thin film, includes steps of: forming a lower conductive layer on a semiconductor substrate; coating solution of ferroelectric coking including organic solvent and organometallic complex on the lower conductive layer; performing a heating process for coated solution at temperature, to decompose said organometallic complex in solution of ferroelectric coking, or more and ferroelectric crystallization temperature or below to form said metal compound thin film; forming an upper conductive layer on said metal compound thin film; and performing a heating process for said metal compound thin film at ferroelectric crystallization temperature or more to form said ferroelectric thin film.

Abstract: There is disclosed herein a high voltage and high temperature power electronics capacitor which comprises one or more insulator layers of mica paper, and one or more metal conductor layers, all dispersed in a pressurized environment of a nonreactive and high voltage strength gas maintained at near ambient to about 405.2 kPa of pressure. The insulator and conductor layers are isolated and separated from one another by the alternating placement of conductor layers between said insulator layers. These capacitors are readily packaged for commercial use in containers or housings of almost any geometric form and any material of construction. Moreover, low inductance ceramic bushings can be employed on these containers for establishing external electrical contacts. These capacitors can be economically manufactured and used in large commercial volumes with currently available materials and production methods.

Abstract: A method for fabrication of ceramic tantalum nitride and improved structures based thereon is disclosed. According to the disclosed method, an ionized metal plasma (“IMP”) tool is used to create a plasma containing tantalum ions where the plasma is sustained by a mixture of nitrogen and argon gases. The percentage of nitrogen partial flow in the mixture of gases is adjusted so as to result in a layer of tantalum nitride with a nitrogen content of at least 30%. With a nitrogen content of at least 30%, the tantalum nitride becomes ceramic. The ceramic tantalum nitride presents a number of advantages. For example, the fabrication of ceramic tantalum nitride can be easily incorporated into fabrication of semiconductor chips using copper as the interconnect metal. Also, ceramic tantalum nitride can be used as an effective etch stop layer.

Abstract: A capacitor module incorporating a ceramic capacitor having terminal members for reducing stress caused by thermal stress or electrostriction in the ceramic capacitor itself, and a semiconductor device using the capacitor module. The capacitor module and the semiconductor device are designed to have a reduced size and improved reliability.

Abstract: An electronic component includes external electrodes formed on a base member, each external electrode including a plurality of layers of which the outermost layer is a tin plating layer. The tin plating layer has a polycrystalline structure, and atoms of a metal other than tin are diffused into the tin crystal grain boundaries. Alternatively, each external electrode includes a plurality of layers including a thick-film electrode formed on the base member, a nickel layer or a nickel alloy layer formed on the thick-film electrode and a tin plating layer formed on the nickel layer or the nickel alloy layer. The tin plating layer has a polycrystalline structure and nickel atoms are diffused into the tin crystal grain boundaries. Methods for fabricating electronic components and a circuit board provided with a plurality of electronic components are also disclosed.

Abstract: A multi-layer capacitor includes first and second side-surface terminal electrodes alternately arranged on four side surfaces of a capacitor body. First and second major-surface terminal electrodes are arranged on a major surface of the capacitor body. First and second internal electrodes which are opposed to each other within the capacitor body are respectively electrically connected at ends thereof to the first and second side-surface terminal electrodes, and are also respectively electrically connected to the first and second major-surface terminal electrodes through via hole conductors. With this arrangement, the directions of the currents flowing within the multi-layer capacitor are diversified, and the lengths of current-carrying paths are shortened so as to achieve a very low ESL value.

Abstract: A multilayer ceramic capacitor with external terminals having terminal electrodes and external terminals of the electronic device body electrically bonded through a solder layer, wherein the solder layer is comprised of an Sn—Sb high temperature lead-free solder, the ratio between the Sn and Sb in this solder layer is, by ratio by weight percent, in a range of Sn/Sb=70/30 to 90/10, and the solder layer and terminal electrodes are formed between them with a diffusion layer formed by diffusion of a conductive ingredient of the terminal electrodes into the solder layer.