Abstract: A ceramic electronic component includes a ceramic element assembly and external electrodes. The external electrodes are disposed on the ceramic element assembly. The external electrodes include an underlying electrode layer and a first Cu plating film. The underlying electrode layer is disposed on the ceramic element assembly. The first Cu plating film is disposed on the underlying electrode layer. The underlying electrode layer includes a metal that is diffusible in Cu and a ceramic bonding material. The metal that is diffusible in Cu is diffused in at least a surface layer in the underlying electrode layer side of the first Cu plating film.

Abstract: A monolithic electronic component includes a laminate including a plurality of stacked insulating layers and a plurality of internal electrodes which extend between the insulating layers and which have end portions exposed at predetermined surfaces of the laminate, first plating layers disposed on the predetermined surfaces of the laminate, and second plating layers disposed on the first plating layer. The first plating layers are made of a metal different from that used to make the internal electrodes. The first plating layers are formed by electroless plating. The second plating layers are formed by electroplating.

Abstract: A capacitive element that can efficiently reduce high-frequency noise generated in a circuit is provided. A capacitive element 1 includes a capacitive formation portion 100, which is formed in the shape of a loop to separate the inside from the outside. The capacitive formation portion 100 includes an electrode 110, an opposite electrode 111, and a dielectric layer 120. One or more outgoing terminals (one or more outer circumference outgoing terminals 140, and one or more internal circumference outgoing terminals 130) are provided at the outer and inner circumferences of the electrode 110, respectively. A printed wiring board is made by mounting the capacitive element inside the board or on the surface of the board. A semiconductor package is made by putting the capacitive element 1 on a target semiconductor circuit portion. Moreover, a semiconductor circuit is made by placing the capacitive element on a target functional circuit portion 301.

Abstract: A multilayer ceramic device comprises a laminated ceramic body having opposite end surfaces, a pair of conductive electrodes each respectively attached to one end surface of the laminated ceramic body and a plurality of alternately staggered internal electrodes within the laminated ceramic body configured in an alternating manner and each electrically connected to the corresponding conductive electrodes respectively; each conductive electrodes of the multilayer ceramic device is further covered with a solder paste layer so that the multilayer ceramic device is thus made without any plating step and no need of treating waste liquid nickel or waste liquid tin as well as no problem of environmental pollution caused by plating solution, thereby lowering manufacturing costs and reducing processing time.

Abstract: A multilayer capacitor which can prevent chattering noises from occurring and improve the packaging density and packaging yield, and a method of manufacturing a multilayer capacitor are provided. Even when an electrostrictive vibration is generated in this multilayer capacitor upon voltage application, a joint surface of a metal terminal can flex, so as to mitigate the electrostrictive vibration, thereby preventing chattering noises from occurring. The joint surface is formed with a cutout and thus can fully secure its flexibility. In this multilayer capacitor, a step formed by a terminal connecting surface, a substrate connecting surface, and the joint surface is positioned within an area overlapping a capacitor element body as seen in the laminating direction of dielectric layers. Therefore, solder fillets do not protrude out of the capacitor element body, whereby the packaging density on a mounting substrate K can be improved.

Abstract: Disclosed are a semiconductor integrated circuit chip, a multilayer chip capacitor, and a semiconductor integrated circuit chip package. The semiconductor integrated circuit chip includes a semiconductor integrated circuit chip body, an input/output terminal disposed on the outside of the semiconductor integrated circuit chip body, and a decoupling capacitor disposed at a side face of the semiconductor integrated circuit chip body and electrically connected to the input/output terminal. The semiconductor integrated circuit chip cab be obtained, which can maintain an impedance of a power distribution network below a target impedance in a wide frequency range, particularly at a high frequency, by minimizing an inductance between a decoupling capacitor and a semiconductor integrated circuit chip.

Abstract: A capacitor device mountable on a plane of a substrate includes an electrically conductive bottom plate adapted to be mounted substantially parallel to, and in electrical contact at the plane of the substrate and a first multilayer capacitor having substantially parallel first and second electrode plates oriented substantially perpendicular to the bottom plate with the first electrode plates being electrically connected to the bottom plate. An electrically conductive top lead frame overlaps with, and is electrically isolated from, the bottom plate. The top lead frame electrically connected to the second electrode plates and adapted to be electrically connected at the plane of the substrate. The bottom lead frame may have a corrugated shape, where the corrugated shape provides compliance between the first multilayer capacitor and the substrate. A portion of the top lead frame may contact at least a portion of a side of the first multilayer capacitor.

Abstract: An electronic component includes an electronic component body. The electronic component body includes a base member including two opposed end surfaces, and two outer electrodes respectively disposed on at least the two opposed end surfaces of the base member. Two connection portions of two metal terminals are respectively connected to the two outer electrodes. A relationship of 6.4?h/t is satisfied where h is a length of each of two leg portions of the two metal terminals and t is a thickness of each of the two leg portions of the two metal terminals.

Abstract: A capacitor module in which the structure of a connecting portion is highly resistant against vibration and has a low inductance. The capacitor module includes a plurality of capacitors and a laminate made up of a first wide conductor and a second wide conductor joined in a layered form with an insulation sheet interposed between the first and second wide conductors. The laminate comprises a first flat portion including the plurality of capacitors which are supported thereon and electrically connected thereto, a second flat portion continuously extending from the first flat portion while being bent, and connecting portions formed at ends of the first flat portion and the second flat portion and electrically connected to the exterior.

Abstract: A multilayer capacitor is provided which can efficiently prevent chattering noises from occurring in a simple structure. In the multilayer capacitor, a metal terminal is disposed about a capacitor element body. Even when an electrostrictive vibration is generated in the multilayer capacitor upon voltage application, a joint surface joining a substrate connecting surface and a terminal connecting surface together in the metal terminal can flex, so as to mitigate the electrostrictive vibration, thereby preventing chattering noises from occurring. In the multilayer capacitor, the terminal connecting surface and joint surface form a rising part having a height which is about half that of the capacitor element body.

Abstract: A first inner electrode is integrally provided with a first terminal connection part connected to a first terminal electrode and a first linking connection part connected to a first linking electrode. A second inner electrode is integrally provided with a second terminal connection part connected to a second terminal electrode and a second linking connection part connected to a second linking electrode. A third inner electrode is integrally provided with a third linking connection part connected to the first linking electrode. A fourth inner electrode is integrally provided with a fourth linking connection part connected to the second linking electrode. The third inner electrode is adjacent to the first and fourth inner electrodes in a laminating direction of the plurality of dielectric layers. The first and fourth inner electrodes overlap the third inner electrode as seen in the laminating direction of the plurality of dielectric layers.

Abstract: A highly reliable electronic device that prevents entry of a plating solution via an external electrode and entry of moisture of external environment inside thereof, and generates no soldering defects or solder popping defects which are caused by precipitation of a glass component on a surface of the external electrode. The electrode structure of the electronic device is formed of Cu-baked electrode layers primarily composed of Cu, Cu plating layers formed on the Cu-baked electrode layers and which are processed by a recrystallization treatment, and upper-side plating layers formed on the Cu plating layers. After the Cu plating layers are formed, a heat treatment is performed at a temperature in the range of a temperature at which the Cu plating layers are recrystallized to a temperature at which glass contained in a conductive paste is not softened, so that the Cu plating layers are recrystallized.

Abstract: A discoidal feedthrough capacitor has its active electrode plates disposed within a dielectric body so that an edge of the active electrode plates is exposed at a surface of a through-hole for a conductive lead. The conductive lead is conductively coupled to the exposed edge of the electrode plates without an intervening conductive termination surface. Similarly, a ground electrode plate set of the feedthrough capacitor may have an edge exposed at the outer periphery of the capacitor for conductively coupling the exposed edge of the ground electrode plate to a conductive ferrule without an intervening conductive termination surface.

Abstract: A ceramic electronic component has a ceramic element assembly, external electrodes, and metal terminals. The external electrodes are arranged on the surface of the ceramic element assembly. The external electrodes contain a sintered metal. The metal terminals are electrically connected to the external electrodes, respectively. The external electrode and the metal terminal are directly diffusion-bonded by diffusion of metal in the metal terminals into the external electrodes. The above arrangement provides a ceramic electronic component having highly reliable metal particle bonding and a method for manufacturing the same.

Abstract: There are a plurality of types of first internal electrodes and each type of first internal electrode includes a first main electrode portion and a first lead portion. A second internal electrode includes a plurality of second main electrode portions forming respective capacitance components with the respective types of first internal electrodes, an interconnection portion connecting between each pair of second main electrode portions, and a second lead portion. Positions of the first lead portions of the respective types of first internal electrodes are different from each other and distances from the first lead portions of the respective types of first internal electrodes to the second lead portion are different from each other. The width of the interconnection portion is smaller than the width of at least one second main electrode portion out of the plurality of second main electrode portions.

Abstract: A capacitive module is provided. The capacitive module may include a first capacitor including a first electrode and a second electrode, one of the first electrode and the second electrode being coupled to at least one first conductive via and the other one of the first electrode and the second electrode being coupled to at least one second conductive via. The capacitive module may also include a second capacitor spaced apart from the first capacitor, the second capacitor including a third electrode and a fourth electrode, one of the third electrode and the fourth electrode being coupled to the at least one first conductive via and the other one of the third electrode and the fourth electrode being coupled to the at least one second conductive via.

Abstract: A capacitor is provided having a capacitor element, with first and second metalized thermoplastic sheets, which are offset and wound together to create common edges at opposite ends, a zinc or zinc-rich conductive coating thermally sprayed on each of the common edges of the capacitor element, and aluminum or aluminum-rich terminals welded to each of the conductive coatings to form a metallurgical bond, having a pull strength of at least 5 pounds, without damaging the capacitor element.

Abstract: Capacitors are provided comprising a first plate, a second plate spaced from the first plate and a dielectric between the first and second plates. In certain embodiments the plates are arranged generally opposite each other and each is shaped in a periodically repeating pattern that is spatially out of phase with the other so that misregistration of the plates is compensated. In certain embodiments, a floating equipotential conductor is positioned between the plates and has a larger dimension than a corresponding dimension of the plates so that misregistration of the plates is compensated. Methods of manufacturing the capacitors are also provided.

Abstract: A method for manufacturing a monolithic ceramic electronic component includes a plating substep of depositing precipitates primarily composed of a specific metal on an end of each of internal electrodes exposed at a predetermined surface of a laminate and growing the precipitates to coalesce into a continuous plated layer, wherein the specific metal is different from that of the internal electrodes, and the same or substantially the same metal that defines the internal electrodes is distributed throughout the plated layer.

Abstract: According to the configuration and the manufacturing method of forming a moisture proof agent on both surfaces of a circuit substrate after soldering a capacitor connection pin in a vertical direction to the circuit substrate, and electrically connecting the capacitor so as to be in a perpendicular direction to the length direction of the capacitor connection pin at the upper space of the circuit substrate, the possibility of the moisture proof agent attaching to the capacitor is eliminated, the productivity enhances since the moisture proof agent can be easily formed on both surfaces of the circuit substrate, and a capacitor unit of miniaturized and low height configuration is realized since the capacitor is mounted in the horizontal direction in the upper space with respect to the circuit substrate.

Abstract: A first internal conductor has a first portion. A second internal conductor has a lead portion and a main electrode portion. The second internal conductor is arranged in the same layer as the first internal conductor. A third internal conductor has a lead portion and a main electrode portion. The third internal conductor is arranged so as to be adjacent to the second internal conductor in a laminate direction. A fourth internal conductor has a lead portion and a main electrode portion. The fourth internal conductor is arranged so as to be adjacent to the third internal conductor in the laminate direction. When the laminate body is viewed from the laminate direction, the main electrode portion of the third internal conductor overlaps with the main electrode portions of the second and fourth internal conductors.

Abstract: A multilayer ceramic electronic component includes a ceramic body including a plurality of ceramic layers, the ceramic body having a first main surface and a second main surface and a plurality of side surfaces that connect the first main surface to the second main surface, an internal conductor including nickel, the internal conductor being disposed in the ceramic body and having an exposed portion exposed at least one of the side surfaces, and an external terminal electrode disposed on at least one of the side surfaces of the ceramic body, the external terminal electrode being electrically connected to the internal conductor. The external terminal electrode includes a first conductive layer including a Sn—Cu—Ni intermetallic compound, the first conductive layer covering the exposed portion of the internal conductor at least one of the side surfaces of the ceramic body.

Abstract: Better high-temperature load characteristics are obtained in a laminated ceramic capacitor including a dielectric ceramic layer with a thickness of 1 ?m or less. The laminated ceramic capacitor includes a plurality of stacked dielectric ceramic layers, a plurality of internal electrode layers, each disposed between dielectric ceramic layers, and external electrodes that are electrically connected to internal electrode layers. In this laminated ceramic capacitor, when the thickness of each dielectric ceramic layer is denoted by tc and the thickness of each internal electrode layer is denoted by te, tc is 1 ?m or less, and tc/te is equal to or less than 1.

Abstract: A collective component has a first region that intersects a conductive paste film for external terminal electrodes in a break line in which break leading holes are arranged and a second region that does not intersect a conductive paste film for external terminal electrodes in the break line. The first break leading holes are formed in the first region so as not to reach the second region. The second break leading holes are formed only in the second region or from the second region to a portion of the first region. The pitch of the first break leading holes is wider than the pitch of the second break leading holes.

Abstract: A laminated ceramic electronic component includes a ceramic element and two external electrodes on both end surfaces of the ceramic element. The ceramic element includes a function part and lead parts thinner than the function part. Internal electrode layers are provided facing each other via a ceramic layer therebetween in the function part. The internal electrode layers are drawn out of the function part in the lead part. The external electrode includes an extended part and a curled part. The extended part is formed from the lead part through the function part on the main face. On the main face, the part of the extended part in the lead part is lower than the part of the function part. The curled part is formed from the end face of the ceramic element through the surface of the part of the extended part in the lead part on the main face.

Abstract: At least one of a plurality of first internal electrodes and a second internal electrode are arranged as opposed with at least one of the dielectric layers in between. Third and fourth internal electrodes are arranged as opposed with at least one of the dielectric layers in between. The first internal electrodes are electrically connected to a first external connecting conductor through lead conductors. The second, third, and fourth internal electrodes are electrically connected to second, third, and fourth terminal conductors, respectively, through lead conductors. At last one but not all of the first internal electrodes are electrically connected to the first terminal conductor through a lead conductor.

Abstract: A multilayer capacitor has a capacitor element body, first and second terminal electrodes, and a connection conductor. The capacitor element body has a plurality of insulator layers laminated, and a plurality of first and second internal electrodes arranged with at least one of the insulator layers in between. The first and second terminal electrodes are disposed on one external surface extending parallel to a laminating direction of the insulator layers. The connection conductor is disposed on an exterior surface extending parallel to the laminating direction of the insulator layers. The first internal electrodes include two types of internal electrodes, a type of internal electrode connected to the first terminal electrode and the connection conductor and a type of internal electrode connected to the connection conductor only. The second internal electrodes are connected to the second terminal electrode.

Abstract: An electronic component is provided which includes external electrodes having a multilayer structure of first and second sintered electrode layers that are densely sintered and have less possibility of causing poor appearance and decreased reliability in electrical connection. The external electrodes include a first sintered electrode layer and a second sintered electrode layer containing different metals. The first and second sintered electrode layers contain a borosilicate glass containing an alkali metal.

Abstract: The present invention is intended to solve the problem of a conventional thermosetting conductive paste with respect to bonding-property between an internal electrode(s) and an external electrode(s) so as to provide a multilayer ceramic electronic part suitable for its mounting on a substrate and for its plating-treatment. The present invention relates to a multilayer ceramic electronic part, characterized in that it has an external electrode(s) formed from a thermosetting conductive paste comprising conductive particles having a high melting point, metal powder having a melting point of 300° C. or less and a resin(s).

Abstract: In a ceramic capacitor, first and second electrode terminals each include a bonded-to-substrate portion, a first bonded-to-electrode portion bonded to a first edge of one of first and second external electrodes, a second bonded-to-electrode portion bonded to a second edge of the one of first and second external electrodes and disposed at a distance from the first bonded-to-electrode portion in the first directions, and a connecting portion connecting the first and second bonded-to-electrode portions and the bonded-to-substrate portion. W1/W0 is about 0.3 or more, and h/L is about 0.1 or more.

Abstract: A method is provided for testing a built-in component including multiple terminals in a multi-layered circuit board. At least one signal pad is provided on a top surface of the multi-layered circuit board for signal transmission. Each of the signal pads are electrically connected to one of the multiple terminals. At least one test pad is provided on the top surface of the multi-layered circuit board and each of the test pads is electrically connected to one of the multiple terminals. Then, detection occurs regarding one of the signal pads and one of the test pads that are electrically connected to a same one of the multiple terminals in order to determine a connection status of an electric path extending from the one signal pad through the same one terminal to the one test pad.

Abstract: A multilayer positive temperature coefficient thermistor that has semiconductor ceramic layers containing a BaTiO3-based ceramic material as a primary component, and at least one element selected from the group consisting of Eu, Gd, Tb, Dy, Y, Ho, Er, and Tm as a semiconductor dopant in the range of 0.1 to 0.5 molar parts with respect to 100 molar parts of Ti. The ratio of the Ba site to the Ti site is in the range of 0.998 to 1.006. Accordingly, even when the semiconductor ceramic layers have a low actual-measured sintered density in the range of 65% to 90% of a theoretical sintered density, a multilayer positive temperature coefficient thermistor having a sufficiently high rate of resistance change and a high rising coefficient of resistance at the Curie temperature or more can be realized.

Abstract: There is provided a multilayer capacitor including an inner connecting conductor of at least one polarity; a plurality of first and second outer electrodes formed on a surface of the body, wherein the inner connecting conductor is connected to a corresponding one of the outer electrodes having identical polarity, a corresponding one of the inner electrodes having identical polarity to the inner connecting conductor includes a plurality of groups each including at least one of the inner electrodes, wherein the inner electrodes of the respective groups are connected to the outer electrodes having identical polarity that are different from one another for each of the groups and electrically connected to the inner connecting conductor through the connected outer electrode.

Abstract: A first internal electrode includes a main electrode portion whose longer-side direction agrees with a longer-side direction of first and second principal faces, and a lead portion extending from an end of the main electrode portion on the first end face side toward a first side face and connected to a first terminal electrode. A second internal electrode includes a main electrode portion whose longer-side direction agrees with the longer-side direction of the first and second principal faces, and a lead portion extending from an end of the main electrode portion on the first end face side toward a second side face and connected to a second terminal electrode. A third internal electrode includes a main electrode portion whose longer-side direction agrees with the longer-side direction of the first and second principal faces, and a lead portion extending from an end of the main electrode portion on the second end face side toward the first side face and connected to the first terminal electrode.

Abstract: A through-type multilayer capacitor array comprises a capacitor body, and two first signal terminal electrodes, two second signal terminal electrodes, two grounding terminal electrodes, a first outer connecting conductor, and a second outer connecting conductor. The capacitor body includes a grounding inner electrode, and first to fourth signal inner electrodes. The grounding inner electrode is arranged to oppose the first or second signal inner electrode with an insulator layer in between and oppose the third or fourth signal inner electrode with an insulator layer in between while being connected to the grounding terminal electrodes. The first signal inner electrode is connected to the first signal terminal electrodes and first outer connecting conductor. The third signal inner electrode is connected to the second signal terminal electrodes and the second outer connecting conductor. The second and fourth signal inner electrodes are respectively connected to the first and second outer connecting conductor.

Abstract: A capacitor device, which is mountable on a substrate, has an electrically conductive bottom lead frame with a bottom plate mountable substantially parallel to, and in contact with, the substrate and an electrically conductive top lead frame having a top plate spaced apart from the bottom plate and a first transition portion having a first end connected to the top plate and a second end, opposite the first end, electrically connectable to the substrate. Multilayer capacitors are mounted between the top plate and the bottom plate. The capacitors have opposed end terminations electrically connected to the top and bottom plates, such that internal electrode plates are substantially nonparallel to the substrate.

Abstract: A multilayer capacitor is provided that includes a dielectric body, an internal layer portion, an external layer portion and a first terminal electrode and a second terminal electrode to be set at different electric potentials from each other and formed at least on a side face parallel to stacking direction Z of side faces of the dielectric body. Each of the first terminal electrodes are connected with at least one of the first internal conductor layer and a plurality of the first external conductor layers and each of the second terminal electrodes are connected with at least one of the second internal conductor layer and a plurality of the second external conductor layers. The dielectric layer positioned at the external layer portions comprises a plurality of pin hole conducting portions.

Abstract: There is provided a multilayer chip capacitor including: a capacitor body including first and second capacitor units disposed in a laminated direction; first to fourth outer electrodes formed on side surfaces of the capacitor body, respectively; and at least one connecting conductor line connecting the first and third outer electrodes having identical polarity to each other and the second and fourth outer electrodes having identical polarity to each other, wherein the first capacitor body includes first and second inner electrodes, the second capacitor unit includes a plurality of third and fourth inner electrodes, the first to fourth outer electrodes are connected to the first to fourth inner electrodes, respectively, and an equivalent series resistance (R1) of the first capacitor unit and a combined equivalent series resistance (R2?) of the second capacitor and the connecting conductor line satisfy the Equation 0.7(R1)?R2??1.3(R1).

Abstract: A multilayer capacitor has a first inner electrode connected to a first terminal electrode, a second inner electrode connected to a second terminal electrode, and third and fourth inner electrodes connected to third and fourth terminal electrodes. The first and second inner electrodes have no overlapping area therebetween when seen in the opposing direction of the first and second main faces and are arranged at respective positions different from each other in the opposing direction of the first and second main faces and in the opposing direction of the first and second side faces. The third and fourth inner electrodes have no overlapping area therebetween when seen in the opposing direction of the first and second main faces and are arranged at respective positions different from each other in the opposing direction of the first and second main faces and in the opposing direction of the first and second side faces.

Abstract: In a ceramic electronic component, an electrically conductive resin layer is arranged to cover a thick film layer and to extend beyond the end of the thick film layer by at least about 100 ?m and a plating layer is arranged to cover the electrically conductive resin layer except a region having a dimension of at least about 50 ?m and extending along the end of the electrically conductive resin layer. Consequently, the concentration of the stress is reduced.

Abstract: A monolithic ceramic electronic component includes a ceramic laminate which includes a plurality of stacked ceramic layers and which has a first principal surface, a second principal surface opposed to the first principal surface, a first side surface, and a second side surface opposed to the first side surface, first external terminal electrodes arranged on the first side surface, second external terminal electrodes arranged on the second side surface, first internal electrodes arranged in the ceramic laminate, and second internal electrodes arranged in the ceramic laminate. The first internal electrodes include first opposed portions, first lead portions, and first projecting portions. The second internal electrodes include second opposed portions, second lead portions, and second projecting portions.

Abstract: There is provided a multilayer chip capacitor including: a capacitor body including first and second capacitor units; and first to fourth outer electrodes, wherein the first capacitor unit includes at least one pair of first and second inner electrodes, the second capacitor unit includes at least one pair of third and fourth inner electrodes, an alternate laminated portion is formed in one area within the capacitor body, the alternate laminated portion having the first to fourth inner electrodes sequentially laminated therein, and a capacitance adjusting portion is formed in another area within the capacitor body, the capacitance adjusting portion having at least one of the one pair of first and second inner electrodes and the one pair of third and fourth inner electrodes laminated repeatedly.

Abstract: Terminal pins comprising an outer coating of palladium coating a core material other than of palladium for incorporated into feedthrough filter capacitor assemblies are described. The feedthrough filter capacitor assemblies are particularly useful for incorporation into implantable medical devices such as cardiac pacemakers, cardioverter defibrillators, and the like, to decouple and shield internal electronic components of the medical device from undesirable electromagnetic interference (EMI) signals.

Abstract: A multi-segment capacitor fabricated on a semiconductor substrate includes M×N capacitor segments arranged in a matrix of M rows and N columns. Each capacitor segment includes two groups of conductive fingers preferably made of metal wires. The metal wire fingers are distributed within multiple metal layers in such a manner that two neighboring parallel metal wire fingers within a particular metal layer are electrically insulated and connected to different terminals of the capacitor. Further, at least the longitudinal axes of the parallel metal wire fingers within two different metal layers are not parallel to each other within the same capacitor segment.

Abstract: An electronic component is provided which includes external electrodes having a multilayer structure of first and second sintered electrode layers that are densely sintered and have less possibility of causing poor appearance and decreased reliability in electrical connection. Each external electrode includes a first sintered electrode layer and a second sintered electrode layer. The first sintered electrode layer contains a first borosilicate glass containing an alkali metal in which there is 85% to 95% by weight of silicon and 0.5% to 1.5% by weight of the alkali metal based on 100% by weight of all contained elements other than boron. The second sintered electrode layer contains a second borosilicate glass containing an alkali metal in which there is 65% to 80% by weight of silicon and 3.5% to 8.0% by weight of the alkali metal based on 100% by weight of all contained elements other than boron.

Abstract: Among a plurality of first inner electrodes, at least one first inner and a second inner electrode are arranged as opposed with at least one of the dielectric layers in between. Third and fourth inner electrodes are arranged as opposed with at least one of the dielectric layers in between. The first inner electrodes are electrically connected to a first external connection conductor via lead conductors. The second inner electrode is electrically connected to a second terminal conductor via a lead conductor. The third inner electrode is electrically connected to a third terminal conductor via a lead conductor. The fourth inner electrode is electrically connected to a fourth terminal conductor via a lead conductor. Among all the first inner electrodes, one to multiple first inner electrodes that are less than the total first inner electrodes are electrically connected to the first terminal conductors via lead conductors.

Abstract: A capacitor array with a multiplicity of capacitors with terminations of alternating polarity wherein the terminations are arranged in M columns and N rows. A circuit is provided with terminations in a grid of L columns and K rows wherein the terminations are of alternating polarity with the proviso that a first terminal with L={acute over (?)}M has the same polarity as a second terminal with L={acute over (?)}M+1 wherein {acute over (?)} is an integer.

Abstract: A parallel-plate capacitor structure includes a capacitor electrode including a first resistance and an electrode tab appended to the capacitor electrode and including a second resistance. The second equivalent series resistance is greater than the first equivalent series resistance. A process of assembling a parallel-plate capacitor package is also disclosed. A computing system is also disclosed that includes the parallel-plate capacitor package.

Abstract: A multilayer chip capacitor includes: a capacitor body; internal electrodes disposed in the capacitor body, each internal electrode having one or more lead; and external electrodes disposed on first and second side surfaces of the capacitor body to be electrically connected to the internal electrodes through the leads. The average number of leads in each internal electrode is smaller than half (½) of the total number of external electrodes. The leads of the internal electrodes having opposite polarities and adjacent in the lamination direction are disposed to be adjacent to each other as seen from the lamination direction. All the internal electrodes having the same polarity are electrically connected to each other in the capacitor.

Abstract: In a multilayer capacitor including a capacitor body, first capacitor portions and a second capacitor portion are arranged in the direction of lamination. While a resonant frequency of the first capacitor portions is set to be greater than a resonant frequency of the second capacitor portion so that the first capacitor portions contribute to low impedance, an ESR per layer of the second capacitor portion is set to be greater than an ESR per layer of the first capacitor portions so that the second capacitor portion contributes to high ESR. Further, a combined ESR of the first capacitor portions is set to be substantially equal to a combined ESR of the second capacitor portion.