Abstract: Surface mount capacitors are made having ultra-small dimensions of length, width and height. For example, capacitors of 0402 size and smaller may be produced having lower height than has been achieved in the prior art. The components have L-shaped terminations on respective ends thereof, providing bottom lands for mounting to a circuit board. At most, the component will have top lands of negligible size to provide a large gap width between the terminations across the top surface of the component. In some embodiments, the top surface may also include orientation indicia located thereon. The invention also provides improved methodology for terminating a capacitor or other surface mount component.

Abstract: An apparatus is provided for packaging a laminated capacitor made to have a low ESL value and is used for a decoupling capacitor to be connected to a power supply circuit for a MPU chip providing a MPU. The laminated capacitor is accommodated within a cavity provided on a wiring board. The capacitor includes a plurality of first external terminal electrodes connected to first internal electrodes via a plurality of first feedthrough conductors and a plurality of second external terminal electrodes connected to second internal electrodes via a plurality of second feedthrough conductors. The first external terminal electrodes provided on a first major surface of a capacitor body are connected to via-hole conductors at the hot side for the power source within a substrate, and the second external terminal electrodes provided on first and second major surfaces are connected to grounding via-hole conductors and a mother board within the substrate.

Abstract: In a terminal member, a protuberance is formed so as to protrude toward an external electrode, and thereby, a bonding portion where the terminal member is bonded to the external electrode, the bonding portion being formed with solder, is extended substantially linearly across a part of the external electrode. Preferably, the direction in which the bonding portion is elongated linearly is in parallel to that in which internal electrodes are extended. Further, it is preferable that the bonding portion is as wide as possible, and the center of the bonding portion in the width direction is as near to the center of the end-face of the capacitor body as possible.

Abstract: Implantable medical devices (IMDs) and their various components, particularly a simplified, miniature capacitor connector block and wiring harness utilizing an epoxy droplet and method of making same are disclosed. An electrode stack comprises a plurality of capacitor layers stacked in registration upon one another, each capacitor layer comprising a cathode layer having a cathode tab, an anode sub-assembly comprising at least one anode layer having an anode tab, and a separator layer located between adjacent anode and cathode layers. A connector assembly is electrically attached to the anode connection terminal for making electrical connection with anode tabs and to the cathode connection terminal for making electrical connection with cathode tabs. The connector block is formed on an encapsulation area of a case side wall of epoxy that is cured for a period of time under elevated temperature conditions while rotating the capacitor assembly.

Abstract: A multi-layer capacitor includes first and second side-surface terminal electrodes alternately arranged on four side surfaces of a capacitor body. First and second major-surface terminal electrodes are arranged on a major surface of the capacitor body. First and second internal electrodes which are opposed to each other within the capacitor body are respectively electrically connected at ends thereof to the first and second side-surface terminal electrodes, and are also respectively electrically connected to the first and second major-surface terminal electrodes through via hole conductors. With this arrangement, the directions of the currents flowing within the multi-layer capacitor are diversified, and the lengths of current-carrying paths are shortened so as to achieve a very low ESL value.

Abstract: A monolithic capacitor structure includes at least first and second plates internal to a dielectric body, the plates extending inward from opposed conductive contacts on surfaces of the body, and forming capacitor(s) therebetween. A third plate extends within said body, electrically floating relative to the exterior contacts, and forming a capacitor with the first and second plates, and further forming a capacitor with additional conductive structures connected to the conductive contacts on the body. The resulting array of combined series and parallel capacitors formed by the third plate, in conjunction with the capacitor(s) formed by the first and second plates, provides effective wideband performance in an integrated, cost-effective structure.

Abstract: In a terminal member, a protuberance is formed so as to protrude toward an external electrode, and thereby, a bonding portion where the terminal member is bonded to the external electrode, the bonding portion being formed with solder, is extended substantially linearly across a part of the external electrode. Preferably, the direction in which the bonding portion is elongated linearly is in parallel to that in which internal electrodes are extended. Further, it is preferable that the bonding portion is as wide as possible, and the center of the bonding portion in the width direction is as near to the center of the end-face of the capacitor body as possible.

Abstract: A multilayer ceramic capacitor includes a multilayer ceramic body having alternately stacked ceramic layers and internal electrodes, the ceramic layers containing therein an acceptor representing one or more metallic elements for facilitating a reoxidation process of the multilayer ceramic body, and a pair of external electrodes installed at two opposite sides of the multilayer ceramic body, wherein the acceptor concentration in the ceramic layers stacked at a central portion of the multilayer ceramic body is higher than that in the remaining ceramic layers of the multilayer ceramic body.

Abstract: In one aspect, a method of interconnecting two or more foils of a capacitor, the method comprising connecting together one or more anode connection members of one or more anode foils and one or more cathode connection members of one or more cathode foils and electrically isolating the one or more anode foils from the one or more cathode foils.

Abstract: First and second external terminal electrodes are formed on the same principal surface of a capacitor main body. The connection between first internal electrodes in the capacitor main body and the first external terminal electrodes, and the mutual connection between the plurality of first internal electrodes, is achieved by a first connection portion. The connection between second internal electrodes and the second external terminal electrodes, and the mutual connection between the plurality of second internal electrodes, is achieved by a second connection portion. The first and second connection portions are arranged alternately. Currents flow through the connection portions in opposite directions with the result that components of magnetic flux generated by such currents are cancelled and the ESL is reduced.

Abstract: An apparatus (100) for reducing inductance in a capacitor having a first terminal (12) and a spaced-apart second terminal (14), includes a first conductive plate (120) and a second conductive plate (140). The first conductive plate (120) is electrically coupled to the first terminal (12). The second conductive plate (140) is electrically coupled to the second terminal (14) and is disposed in parallel with the first conductive plate (120) so as to overlap at least a portion of the first conductive plate (120). An insulating member (122 and 142) is disposed between the first conductive plate (120) and the second conductive plate (140). The insulating member (122 and 142) insulates the first conductive plate (120) from the second conductive plate (140).

Abstract: An electronic component includes external electrodes formed on a base member, each external electrode including a plurality of layers of which the outermost layer is a tin plating layer. The tin plating layer has a polycrystalline structure, and atoms of a metal other than tin are diffused into the tin crystal grain boundaries. Alternatively, each external electrode includes a plurality of layers including a thick-film electrode formed on the base member, a nickel layer or a nickel alloy layer formed on the thick-film electrode and a tin plating layer formed on the nickel layer or the nickel alloy layer. The tin plating layer has a polycrystalline structure and nickel atoms are diffused into the tin crystal grain boundaries. Methods for fabricating electronic components and a circuit board provided with a plurality of electronic components are also disclosed.

Abstract: An electronic device having a resonance frequency with a margin of error sufficiently small for high frequency applications. The electronic device includes a first capacitor electrode in a first electrically conducting layer, a dielectric including a layer of dielectric material and a distinct electrically insulating material, and a second capacitor electrode in a second electrically conducting layer.

Abstract: In a terminal member, a protuberance is formed so as to protrude toward an external electrode, and thereby, a bonding portion where the terminal member is bonded to the external electrode, the bonding portion being formed with solder, is extended substantially linearly across a part of the external electrode. Preferably, the direction in which the bonding portion is elongated linearly is in parallel to that in which internal electrodes are extended. Further, it is preferable that the bonding portion is as wide as possible, and the center of the bonding portion in the width direction is as near to the center of the end-face of the capacitor body as possible.

Abstract: A ceramic electronic component having a ceramic member into which no plating intrudes, and a method of producing the ceramic electronic component by which the ceramic electronic component can be easily produced are provided. The ceramic electronic component contains a ceramic member, and terminal electrodes formed on both of end-faces of the ceramic member. Each terminal electrode comprises an external electrode, and a plating coat formed thereon. To produce the ceramic electronic component, the ceramic member having the external electrodes are dipped into a water-repelling agent, dried, and plated. The water-repelling agent contains a functional group which is readily adsorbed to the external electrodes and a hydrophobic functional group.

Abstract: A wound metalized film and metal foil capacitor with layers arranged and wound to provide internal parallel capacitors utilizing offsets between the internal spacings, or margins, of the metal electrodes. The arrangement permits more efficient heat transfer from the interior of the capacitor by the metal electrodes from internal regions that generate heat.

Abstract: A multilayer electronic device comprised of a capacitor body in which a plurality of internal electrodes are separately arranged in a plurality of blocks via ceramic layers. At least one lead is led out from each internal electrode. The terminal electrodes connected to each lead is arranged at the side faces of the capacitor body. The polarities of the voltages supplied to the nearby terminal electrodes in the same side face differ.

Abstract: A capacitor (FIGS. 6-9) includes one or more extended surface lands (604, 704, 804, 904, FIGS. 6-9). In one embodiment, each extended surface land is a land on a top or bottom surface of the capacitor, having a land length that is equal to at least 30% of the width (614, FIG. 6) of the capacitor or 20% of the length (914, FIG. 9) of the capacitor. When embedded within an integrated circuit package (1102, FIG. 11), two or more vias (1112) can be electrically connected to the extended surface lands (1108).

Abstract: The present invention aims at providing an electronic component that can be readily reduced in size. Further, even when the electronic component is reduced in size, the miniaturized electronic component has (i) a wide range in capacitance, (ii) is allowed to be produced easily, (iii) has excellent electrical characteristics and (iv) can prevent defects due to a poor connection between the electronic component and a circuit board caused by warpage of the circuit board and the like when the electronic component is connected to the circuit board. The electronic component includes a capacitor element with a pair of lead terminals and an exterior packaging material disposed so as to encapsulate the capacitor element. The maximum length of the exterior packaging material is 7.5 mm or less and the maximum length of the capacitor element is 5.5 mm or less. Capacitance C of the capacitor element satisfies an inequality of 4 pF≦C≦4700 pF and a DC break down voltage BDV satisfies an inequality of BDV≧4.5 KV.

Abstract: A capacitor including a ceramic body, a glass layer formed on each of opposite surfaces of the ceramic body, and a first metallic layer formed on the glass layer. Preferably, a lead terminal is connected to the first metallic layer or to a second metallic layer which is provided on the first metallic layer, by use of solder containing Pb in an amount of 2.5 wt. % or less. Preferably, a lead terminal which is plated with a substance containing Pb in an amount of 5 wt. % or less is soldered onto the first metallic layer or the second metallic layer.

Abstract: An integrated circuit structure includes a planar capacitor positioned adjacent to a logic circuit implemented on a silicon die. The silicon die is bonded to a mounting base using controlled collapse chip connection methods such that a ground terminal of the silicon die is coupled to a ground trace in the mounting base and a Vdd terminal of the silicon die is coupled to a Vdd trace in the mounting base. The capacitor includes via structures with controlled collapse chip connection structures for bonding to the mounting base directly above the silicon die and coupling a first charge accumulation plate to the Vdd trace and a second charge accumulation plate to the ground trace.

Abstract: The multilayer electronic device comprises a dielectric body formed by stacking dielectric layers. Flat first internal electrodes and flat second internal electrodes insulated via dielectric layers and arranged facing to the first internal electrodes are alternately stacked. First through-hole electrodes are connected to the first internal electrodes by penetrating, penetrate the second internal electrodes without connecting thereto and extend crossing the internal electrodes. The second through-hole electrodes are connected to the second internal electrodes by penetrating, penetrate the first internal electrodes without connecting thereto and extend crossing the internal electrodes. The first terminal electrodes are arranged on the outer surface of the dielectric body and connected to the first through-hole electrodes.

Abstract: A multilayer electronic device comprised of a capacitor body in which a plurality of internal electrodes are separately arranged in a plurality of blocks via ceramic layers. At least one lead is led out from each internal electrode. The terminal electrodes connected to each lead is arranged at the side faces of the capacitor body. The polarities of the voltages supplied to the nearby terminal electrodes in the same side face differ.

Abstract: A ceramic electronic part includes at least one chip ceramic electronic part body having terminal electrodes and terminals provided on both sides. Each terminal is composed of a metal plate bent into a u shape. The outer face of a first leg of each bent terminal faces and is attached to a terminal electrode, and a second leg is attached to a substrate. The inner face of the bent terminal is provided with a solder-phobic surface not having affinity for solder, and the outer face of the bent terminal is provided with a solder-philic surface having high affinity for solder.

Abstract: A multilayer capacitor whose equivalent series inductance is reduced includes a capacitor main body having a generally rectangular parallelpiped shape with two principal surfaces in a face-to-face relationship with each other and four side surfaces connecting the principal surfaces. A capacitor unit is formed in the capacitor main body by a respective pair of first and second internal electrodes disposed in the main body in a face-to-face relationship with a dielectric material layer interposed therebetween. At least three first external electrodes are located on respective ones of the side surfaces of the capacitor main body, with at least one of the first external electrodes being located on each of at least three of the side surfaces. The first internal electrode has at least three first lead electrodes, each of which extends to and is electrically coupled to a respective one of the first external electrodes.

Abstract: A pulse generating capacitor is provided in which a capacitor element has electrodes provided on the front and rear faces thereof, and lead terminals connected to the electrodes by means of bonding members. The bonding members can contain Ag as a major component with a ZrO2 powder added thereto at a content of about 20% to 60% by volume. The capacitor solves a problem of crack generation on the capacitor element in response to thermal cycling, while maintaining the effects of preventing its pulse voltage from being decreased and enhancing the bonding strength of its lead terminals.

Abstract: The present invention provides an electrode material for capacitors, capable of ensuring a large capacitance per unit weight without worsening the leakage current property, and a capacitor using the material. The present invention also provides an electrode material for capacitors, obtained by reacting a tantalum metal and/or a niobium metal or an alloy thereof having an oxide film on the surface thereof with an alkali solution to form a tantalic acid compound and/or a niobic acid compound on the surface thereof. Furthermore, the present invention provides a capacitor using the electrode material.

Abstract: A capacitor (FIGS. 6-9) includes one or more extended surface lands (604, 704, 804, 904, FIGS. 6-9). In one embodiment, each extended surface land is a land on a top or bottom surface of the capacitor, having a land length that is equal to at least 30% of the width (614, FIG. 6) of the capacitor or 20% of the length (914, FIG. 9) of the capacitor. When embedded within an integrated circuit package (1102, FIG. 11), two or more vias (1112) can be electrically connected to the extended surface lands (1108).

Abstract: A multi-layer capacitor is constructed to minimize equivalent series inductance, increase resonance frequency, reduce the size of the capacitor and greatly improve the ease of mounting of the capacitor. A dimension in a length direction and a dimension in a width direction of a capacitor body are substantially equal, and a pattern of opposing first and second internal electrodes is substantially square. First lead-out portions of the first internal electrode and second lead-out portions of the second internal electrode are extended onto two side surfaces and two end surfaces. First external electrode terminals connected to the first lead-out portions and second external electrode terminals connected to the second lead-out portions are arranged so that they alternate adjacently and are arranged such that oppositely disposed external electrode terminals have opposite polarities.

Abstract: A multilayer capacitor having a hexagonally-shaped capacitor body, a first internal electrode arranged therein, and a second internal electrode arranged below the first internal electrode separated by a ceramic layer. The capacitor body is provided with a first through-hole electrode passing through the second non-contact hole, of the second internal electrode and electrically connected to the first internal electrode and a second through-hole electrode passing through the first non-contact hole of the first internal electrode and electrically connected to the second internal electrode in columnar shapes extending to intersect the internal electrodes. The first through-hole electrode is electrically connected to the first external electrodes arranged in island shapes at the upper and lower flat portions. The second through-hole electrode is electrically connected to the second external electrodes arranged in island shapes at the surfaces of the capacitor body.

Abstract: An improved structure of a capacitor having a housing comprising two copper plates mounted at two lateral sides of the housing having a capacitor element in between, and a securing rubber filled within the remaining space of the housing, characterized in that a plurality of downwardly slanting elastic plates mounted at the corresponding plate of the two copper plates for the engagement with the capacitor element, the lower section of the copper plates is inwardly bent to connect with a 90 degree connection pins, the top of the connection pins are provided with solder for soldering onto a circuit board, the connection pins are punched to form a fine insertion pin for optionally mounting onto any circuit board, thereby the elastic plates clip the capacitor element to provide and/or to secure a stable soldering and contact.

Abstract: A ceramic electronic component comprising external electrodes having first electrode layers containing at least a noble metal, cuprous oxide, and glass ingredient electrically connected to internal electrodes having a noble metal. As the ceramic electronic components, for example, a multi-layer ceramic capacitor, multi-layer varistor, multi-layer dielectric resonator, multi-layer piezoelectric element, etc. may be mentioned.

Abstract: An electronic part includes a body and an outer electrode formed on the surface of the body, the outer electrode comprising a plurality of layers and having a Sn plating layer as the outermost layer. The Sn plating layer has an average crystal grain size of about 1 &mgr;m or less.

Abstract: A multi-layer capacitor includes first and second side-surface terminal electrodes alternately arranged on four side surfaces of a capacitor body. First and second major-surface terminal electrodes are arranged on a major surface of the capacitor body. First and second internal electrodes which are opposed to each other within the capacitor body are respectively electrically connected at ends thereof to the first and second side-surface terminal electrodes, and are also respectively electrically connected to the first and second major-surface terminal electrodes through via hole conductors. With this arrangement, the directions of the currents flowing within the multi-layer capacitor are diversified, and the lengths of current-carrying paths are shortened so as to achieve a very low ESL value.

Abstract: A first metallic terminal plate is joined to a first side-face of an electronic chip formed by lamination of lamination-capacitors as plural electronic elements, and a second terminal plate to the second side-face of the chip. The first and second metallic terminal plates comprises first terminal plate portions joined to the first and second side-faces, respectively, and the second terminal plate portions bent along the lower edges of the first terminal plate portions toward the opposed side-faces, respectively and elongated from the range under the electronic chip to be out of the range in the width direction.

Abstract: A structure of connection pins of a capacitor includes a housing, connection pins positioned at the lateral sides of the interior of the housing, and a capacitor element located between two pins, and the remaining space of the housing being filled with fixing glue, characterized in that one opening of the housing holds the capacitor element at a larger surface thereof and the two pins are located at the sides of the housing a plurality of elastic plates with a slanting angle are provided to the connection pins, and the lower section of the connection pins are bent to form a contact plate for contacting with a circuit board, the contact plate is a hook-like structure and is provided with solder at appropriate position, an insertion leg is provided on the contact plate for mounting with the circuit board, thereby the elastic plate clips the capacitor element to provide a good position and stable contact.

Abstract: A multi-chip module has an integral capacitor element embedded within the substrate and comprises a plurality of substrate layers forming a multi-chip module substrate. The substrate has a cut edge and forms at the cut edge a bondable edge. A via is formed in the substrate, and a dielectric capacitive material fills the via for a plurality of substrate layers and defines a multilayer capacitor. The multilayer capacitor and via are positioned at the bondable edge and connects to the bondable edge. In one aspect, the via having the dielectric capacitive material is positioned at the cut edge, and includes a conductive material filling at least a portion of the cut via to form the bondable edge. The dielectric capacitive material and bondable edge form a junction surface. A signal trace can be formed on a substrate layer and connected to the capacitor to form a DC blocking capacitor structure. A ground line can be formed on one substrate layer and engage the capacitive material.

Abstract: A multi-layer capacitor is constructed to minimize equivalent series inductance (ESL) and includes first inner electrodes and second inner electrodes disposed opposite to each other. The first inner electrodes are electrically connected to a first outer terminal electrode via a first feed-through conductor and the second inner electrodes are electrically connected to a second outer terminal electrode via a second feed-through conductor. The first and second feed-through conductors are arranged in such a manner that magnetic fields induced by current flowing through the inner electrodes are cancelled. In addition, some of these feed-through conductors are arranged to define first and second peripheral feed-through conductors connected to the first and second inner electrodes at each periphery of the first and second inner electrodes.

Abstract: The present invention provides a new type of thin-film capacitor which is insensitive to breakdown voltages during its mounting on a printed circuit board. Said capacitor has an insulating substrate having at least two internal electrode layers which are mutually separated by means of a dielectric layer. The substrate also has two end contacts each of which are electroconductively connected to one of said internal electrode layers. According to the invention, the capacitor also has breakable electrically conductive means, preferably formed as a metal layer, which means are electrically connected to said end contacts. The presence of said breakable electrically conductive means between said end contacts prevents damage due to electrical storage which can arise during the mounting of the capacitor on a printed circuit board.

Abstract: A monolithic capacitor chip includes a first electrode layer enclosed in a ceramic which comprises a ceramic layer. The first electrode is on one side of the ceramic layer. A second electrode is formed as a pad for contact with the other side of the ceramic layer. In one embodiment of the present invention, the first electrode is accessed electrically by way of an end cap. In another embodiment the first electrode is accessed electrically by way of a conductive via through the ceramic layer.

Abstract: A multilayer capacitor is constructed and arranged to significantly reduce an equivalent serial inductance (ESL) and includes a capacitor body in which first and second inner electrodes extend, respectively, so as to connect first and second end surfaces and first and second side surfaces. First and second end surface terminal electrodes are provided on the first and second end surfaces. Also, first and second side surface terminal electrodes are provided on the first and second side surfaces, respectively. The widthwise dimension of the capacitor body is within a range of about 0.9 to about 1.1 times of the lengthwise dimension. Also, when a represents a lengthwise dimension and a widthwise dimension of the capacitor body, and b represents widths of the first inner electrodes and the second inner electrodes, it is preferable that a and b are determined so as to have the relationship of: 0.45≦b/a≦0.90.

Abstract: A monolithic capacitor assembly is provided that is designed to easily and efficiently attach to an external device, such as a motor. The capacitor assembly comprises a capacitor body and an electrical termination electrically coupled to the capacitor body. The capacitor body and electrical termination are inserted into a cylindrical nylon shell that is sized and configured to receive the capacitor body and electrical termination such that the electrical termination extends through an indentation located along the open end of the nylon shell. In another embodiment of the present invention, the electrical termination is an electrical termination device. The electrical termination device rests within the indentation located along the open end of the nylon shell and is substantially flush with mounting surface of the nylon shell.

Abstract: A multi-layer capacitor includes first and second side-surface terminal electrodes alternately arranged on four side surfaces of a capacitor body. First and second major-surface terminal electrodes are arranged on a major surface of the capacitor body. First and second internal electrodes which are opposed to each other within the capacitor body are respectively electrically connected at ends thereof to the first and second side-surface terminal electrodes, and are also respectively electrically connected to the first and second major-surface terminal electrodes through via hole conductors. With this arrangement, the directions of the currents flowing within the multi-layer capacitor are diversified, and the lengths of current-carrying paths are shortened so as to achieve a very low ESL value.

Abstract: A surface mountable electronic device (1) includes a mount (2), an electrical component (3) supported by the mount and two external terminals (5, 5a) electrically coupled to the component, the external terminals being mounted on the mount at diagonally opposite corners. The device is orientation dependent relative to solder pads (6) on a substrate (7) in that the device can be rotated through 90° about a central axis (8) in either direction and still allow alignment between the external terminals of the device and the substrate solder pads.

Abstract: There are provided an electronic component having external electrodes and a method for manufacturing thereof for which treatment of the wastewater is not needed and has electrolytically plated layers which are substantially plated only on the conductive layers but not on the ceramic surfaces. In the method for manufacturing the electronic component, an activation treatment is performed in which palladium is deposited on a conductive layer on the electronic component, and then electrolytic Ni plating and electrolytic solder plating are performed sequentially.

Abstract: An electronic component device includes first and second lead terminals arranged to hold an electronic component element, e.g. a piezoelectric resonator, and are electrically connected to the piezoelectric resonator. In the first and second lead terminals, first and second substantially L-shaped end sections are provided at ends of first and second substantially linear lead terminal bodies. The electronic component device is held by a first side and a second side of the first substantially L-shaped end section and a first side and a second side of the second substantially L-shaped end section. Lead terminals arranged to be joined to and to hold the electronic component element between the lead terminals. The lead terminals are arranged such that the distance between the lead terminals does not need to be changed even when electronic component elements having different thicknesses are used.

Abstract: A multi-layer capacitor including a capacitor body having four sides including a first pair of opposed sides and a second pair of opposed sides, the capacitor body including a plurality of dielectric layers and at least a pair of first and second internal electrodes that oppose each other via one of the dielectric layers, the first internal electrode having first lead-out portions, the second internal electrode having second lead-out portions, the first and second lead-out portions being arranged to interdigitate with each other. The first polarity external electrode terminals are electrically connected to the first lead-out portions. At least one of the first polarity external electrode terminals is arranged on each of the first pair of opposed sides and at least one of the first polarity external electrode terminals being arranged on each of the second pair of opposed sides of the capacitor body. Second polarity external electrode terminals are electrically connected to the second lead-out portions.

Abstract: A multiterminal multilayer ceramic capacitor having a capacitor body comprised of first internal electrodes and second internal electrodes alternately stacked via rectangular ceramic layers so that the short sides of the ceramic layers register with the height direction of the capacitor body. First external terminals and/or second external terminals connected to the first internal electrodes and/or second internal electrodes are formed on a top face and bottom face of the capacitor body. The first external terminals and second external terminals are connected directly to different circuit patterns of the circuit board so as to enable three-dimensional mounting of the multilayer ceramic capacitor with circuit boards.

Abstract: A multi-layer capacitor device includes a capacitor body including first electrode plates and a plurality of second electrode plates. The first and second electrode plates are interleaved with each other in opposed and spaced apart relation. A dielectric material is located between each opposed set of the first and second electrode plates. The first and second electrode plates each include a main electrode portion and a plurality of spaced apart lead structures extending therefrom. Respective lead structures of the first electrodes plates are located adjacent respective lead structures of the second electrode plates in an interdigitated arrangement. A plurality of electrical terminals are located on each of the opposed side surfaces of the capacitor body. A plurality of first polarity electrical terminals and a plurality of second polarity electrical terminals, respectively, located on the capacitor body.

Abstract: A multi-layer capacitor device includes a substantially rectangular capacitor body including first electrode plates and second electrode plates. and a dielectric material is located between each opposed set of the first and second electrode plates. The first and second electrode plates each includes a main electrode portion and a plurality of spaced apart lead structures extending therefrom, respective lead structures of the first electrodes plates being located adjacent respective lead structures of the second electrode plates in an interdigitated arrangement. A plurality of electrical terminals are located on the side surfaces of the substantially rectangular capacitor body. Each of the first polarity terminals is adjacent to one of the second polarity terminals and each of the second polarity terminals is adjacent to one of the first polarity terminals.