Abstract: A display device includes an array substrate, a driving film and an adhesive member. The array substrate includes a first base substrate, a plurality of first signal pads formed on the first base substrate and a first dummy pad formed adjacent to the first signal pads. The driving film includes a base film, a plurality of output terminals formed on the base film and a first alignment mark formed adjacent to the output terminals. The adhesive member adheres the first signal pads to the output terminals, and adheres the first dummy pad to the first alignment mark.

Abstract: In a bond portion between an electrical conductive land and a connection terminal member, an intermetallic compound producing region in which at least a Cu—Sn-based, an M-Sn-based (M indicates Ni and/or Mn), and a Cu-M-Sn-based intermetallic compound are produced is arranged so as to be present at a connection terminal member side. In this intermetallic compound producing region, when a cross section of the bond portion is equally defined into 10 boxes in a longitudinal direction and a lateral direction to define 100 boxes in total, a ratio of the number of boxes in each of which at least two types of intermetallic compounds having different constituent elements are present to the total number of boxes other than boxes in each of which only a Sn-based metal component is present is about 70% or more.

Abstract: A high-frequency module includes first and second switch IC elements and a substrate. The first and second switch IC elements are the same or substantially the same IC chips, and are mounted in the same or substantially the same orientation. The first switch IC element is mounted on the substrate. The second switch IC element is mounted above the first switch IC element. Due to wire bonding, the individual pad electrodes of the first and second switch IC elements are connected to the land electrodes of the substrate, which are to be connected to the individual pad electrodes. Between a pad electrode and a land electrode connected to each other, another land electrode is not provided.

Abstract: A mounting structure includes a first ceramic electronic component including a ceramic body including internal electrodes and outer electrodes. When a voltage is applied to the outer electrodes, the ceramic body is strained with a first strain amount, and a second ceramic electronic component including a ceramic body including internal electrodes and outer electrodes. When a voltage is applied to the outer electrodes, the ceramic body is strained with a second strain amount greater than the first strain amount. The second ceramic electronic component is arranged above the first ceramic electronic component, and the first and second ceramic electronic components are connected to each other via each other's outer electrodes. The first ceramic electronic component to which the second ceramic electronic component is connected is connected to a land on a circuit substrate via the outer electrodes of at least the first ceramic electronic component.

Abstract: A circuit board mounting apparatus includes a circuit board, a chassis, and two mounting members. Two slots are defined in a front side of the circuit board. The chassis includes a side plate. The mounting members are fixed to the side plate and respectively connected to the slots of the circuit board. Each of the mounting members includes a hook locked to the circuit board, to perpendicularly fix the circuit board to the side plate.

Abstract: A wiring board includes an insulating layer; a connection part provided on a surface of the insulating layer, the connection part including a first plating layer including a flat surface and a curved surface continuous with the flat surface, wherein the flat surface and the curved surface are exposed on the insulating layer, and an end portion of the curved surface is in contact with the surface of the insulating layer; and a second plating layer formed on an interior surface of the first plating layer so as to be coated with the first plating layer; and a via formed in the insulating layer so as to be connected to the second plating layer.

Abstract: A method for manufacturing a printed wiring board includes forming a metal film on a surface of an insulative board, a plating resist on the metal film, and a plated-metal film on the metal film exposed from the plating resist, covering a portion of the plated-metal film with an etching resist, etching to reduce thickness of the plated-metal film exposed from the etching resist, removing the etching and plating resists, and forming a wiring having a pad for wire-bonding an electrode of an electronic component and a conductive circuit thinner than the pad by removing the metal film exposed after the plating resist is removed, a solder-resist layer on the surface of the board and wiring, an opening in the layer exposing the pad and a portion of the circuit contiguous to the pad, and a metal coating on the pad and portion of the circuit exposed through the opening.

Abstract: A manufacturing technique for constructing passive electronic components in vertical configurations is disclosed. Electrically passive components are constructed in a structure that is substantially perpendicular to target platform including a first plane to provide a larger electrode contact area and a smaller physical dimension. Passive components structured to be substantially perpendicular to a plane associated with a target platform can be directly connected to pad contacts of an integrated circuit or substrate or can be embedded in a package to reduce the area overhead of a passive component while improving the effectiveness of the passive components in their applications.

Abstract: A manufacturing method according to an embodiment of the invention includes a first step of providing a sheet substrate having a piezoelectric resonator element and an integrated circuit disposed on a mounting surface of each substrate region, having implementation electrodes that are electrically connected to the integrated circuit disposed the side facing away from the mounting surface, and disposing wiring lines on the sheet substrate, the wiring liens electrically connecting the piezoelectric resonator element disposed in a first substrate region to the implementation electrode in a second substrate region in the vicinity of the piezoelectric resonator element, a second step of inputting and outputting a signal to and from the piezoelectric resonator element in the first substrate region via the implementation electrodes connected to the wiring lines, and a third step of dividing the sheet substrate along the substrate regions to cut the wiring lines.

Abstract: A sheet substrate includes a plurality of substrate regions arranged in a matrix, an integrated circuit disposed in each of the substrate regions, and a first implementation electrode and a second implementation electrode disposed in each of the substrate regions and electrically connected to the integrated circuit. The sheet substrate according to an embodiment of the invention further includes first terminals to each of which the first implementation electrodes arranged in a row of part of the substrate regions are connected in parallel to each other and second terminals to each of which the second implementation electrodes arranged in a column of part of the substrate regions and can activate an arbitrary one of the integrated circuits that is specified by selected ones of the first terminals and the second terminals.

Abstract: In a power inverter, a coolant passage is fixed to a chassis to cool the chassis; the chassis is divided into a first region and a second region by providing the coolant passage in the chassis; a power module is provided in the first region as fixed to the coolant passage; a capacitor module is provided in the second region; and the DC terminal of the capacitor module is directly connected to the DC terminal of the power module.

Abstract: A production line for producing electronic modules including a printed-circuit board, at least one first-type component, and at least one second-type component, wherein the production line includes a unit for putting the first-type component in place, a general heating unit for melting a solder placed between the at least one first-type component and the circuit, a unit for putting the second-type component in place, and a local heating unit for melting a solder placed between the at least one second-type component and the circuit.

Abstract: A high-frequency device includes a wireless IC chip and a board which is coupled to the wireless IC chip and electrically connected to radiator plates, and an inductor and/or a capacitance are provided as a static electricity countermeasure element in the board. The inductor is connected in parallel between the wireless IC chip and the radiator plates, and its impedance at the frequency of static electricity is less than an impedance of the wireless IC chip.

Abstract: There is provided an interconnection structure. An interconnection structure according to an aspect of the invention may include: a plurality of side portions provided on one surface of a substrate part and a plurality of cavities located between the side portions and located further inward than the side portions; and electrode pattern portions provided on surfaces of the side portions and the cavities.

Abstract: Switched capacitor networks for power delivery to packaged integrated circuits. In certain embodiments, the switched capacitor network is employed in place of at least one stage of a cascaded buck converter for power delivery. In accordance with particular embodiments of the present invention, a two-stage power delivery network comprising both switched capacitor stage and a buck regulator stage deliver power to a microprocessor or other packaged integrated circuit (IC). In further embodiments, a switched capacitor stage is implemented with a series switch module comprising low voltage MOS transistors that is then integrated onto a package of at least one IC to be powered. In certain embodiments, a switched capacitor stage is implemented with capacitors formed on a motherboard, embedded into an IC package or integrated into a series switch module.

Abstract: A transceiver comprising a CMOS chip and a plurality of semiconductor lasers coupled with the CMOS chip may be operable to communicate optical source signals from the plurality of semiconductor lasers into the CMOS chip. The source signals may be used to generate first optical signals that may be transmitted from the CMOS chip to optical fibers. Second optical signals may be received from the optical fibers and converted to electrical signals for use by the CMOS chip. The optical source signals may be communicated from the semiconductor lasers into the CMOS chip via optical fibers in to a top surface and the first optical signals may be communicated out of a top surface of the CMOS chip. The first optical signals may be communicated from the CMOS chip via optical couplers, which may comprise grating couplers.

Abstract: A method for manufacturing a printed circuit board includes forming an opening portion in a substrate, positioning chip capacitors in the opening portion of the substrate such that the chip capacitors are accommodated in the opening portion of the substrate, forming a buildup structure including an interlayer resin insulating layer and a conductive layer over a surface of the substrate and the chip capacitors accommodated in the opening portion of the substrate, and forming on a surface of the buildup structure bump structures positioned to mount an IC chip such that the chip capacitors in the opening portion of the substrate are positioned directly below the IC chip.

Abstract: A high quality component-incorporated substrate achieves a sufficient connection between an in-plane electrode and an interlayer connection conductor at low cost. A method of forming a hole for an interlayer connection conductor of a resin substrate includes a step of forming an in-plane electrode in a core substrate, a step of forming a light reflective conductor for reflecting a laser beam applied on the in-plane electrode in a later step, a step of forming a resin layer so as to cover the core substrate, the in-plane electrode and the light reflective conductor, and a step of forming a hole for the interlayer connection conductor by removing the resin layer on the light reflective conductor through the use of a laser beam.

Abstract: Disclosed is a liquid crystal display module comprising a display panel, and a plurality of panel lands is positioned on the display panel, and lengths of the panel lands extend along a straight direction of wire directions, and the module further comprise a flexible circuit board, and the flexible circuit board comprises a plurality of flexible circuit board lands, and the flexible circuit board lands are soldered with the panel lands one-to-one correspondingly. Two adjacent panel lands and corresponding flexible circuit board lands constitute a soldering unit, comprising a first panel land, a second panel land, a first flexible circuit board land corresponding to the first panel land and a second flexible circuit board land corresponding to the second panel land. The first panel land and the second panel land stagger transversely. The present invention also discloses a liquid crystal panel.

Abstract: An embodiment of a micro-electro-mechanical system of the MEMS type comprising at least one micro-electro-mechanical device of the MEMS type and one junction with a duct suitable to being associated with an external apparatus. Said junction being a printed circuit board PCB comprising at least two layers with juxtaposed faces, a channel being present in at least one face of at least one of said at least two layers suitable for realizing the duct with the juxtaposition of the other face of at least another one of at least two layers.

Abstract: First and second signal wiring patterns are formed in a first conductor layer. A first electrode pad electrically connected to the first signal wiring pattern through a first via and a second electrode pad electrically connected to the second signal wiring pattern through a second via are formed in a second conductor layer as a surface layer. A third conductor layer is disposed between the first conductor layer and the second conductor layer with an insulator interposed between those conductor layers. A first pad electrically connected to the first via is formed in the third conductor layer. The first pad includes an opposed portion which overlaps the second electrode pad as viewed in a direction perpendicular to the surface of a printed board and which is opposed to the second electrode pad through intermediation of the insulator. This enables reduction of crosstalk noise caused between the signal wirings.

Abstract: Embodiments include but are not limited to apparatuses and systems including a die package including a substrate, a die coupled with a top surface of the substrate, a package wall disposed on the top surface of the substrate and bounding the die, and a package lid coupled with the package wall, and including at least one protrusion facilitating a coupling of the package lid with the package wall. At least one edge of the top surface of the die pad may include an etched portion such that a width of the top surface is narrower than a width of the bottom surface. At least one edge of a top surface of at least one of the leads may include an etched portion such that a width of the top surface is narrower than a width of the bottom surface. Other embodiments may be described and claimed.

Abstract: An offset interposer includes a land side including land-side ball-grid array (BGA) and a package-on-package (POP) side including a POP-side BGA. The land-side BGA includes two adjacent, spaced-apart land-side pads, and the POP-side BGA includes two adjacent, spaced-apart POP-side pads that are coupled to the respective two land-side BGA pads through the offset interposer. The land-side BGA is configured to interface with a first-level interconnect The POP-side BGA is configured to interface with a POP substrate. Each of the two land-side pads has a different footprint than the respective two POP-side pads.

Abstract: Discussed is a display device and a method of manufacturing the same, wherein the display comprises an upper substrate; a lower substrate provided under the upper substrate, wherein the lower substrate extends to be longer than the upper substrate so as to expose a pad region provided at one side of the lower substrate; a panel driver on the pad region of the lower substrate; an exposure prevention member formed on the panel driver, for preventing the panel driver from being exposed to the external; and an upper film formed on the exposure prevention member.

Abstract: A mounting structure of an electronic component includes: a bump electrode included in the electronic component, the bump electrode having an internal resin as a core and a conductive film covering a surface of the internal resin, and elastically deforming so as to follow a shape of at least one corner of a terminal so that the conductive film makes direct conductive contact with at least part of a top surface of the terminal and at least part of a surface along a thickness direction of the terminal; a substrate having the terminal and the electronic component that is mounted on the substrate; and a holding unit provided to the substrate and the electronic component so as to hold a state in which the bump electrode electrically deformed makes conductive contact with the terminal.

Abstract: A method of making a wiring substrate includes forming a first metal layer on a surface of a support member, the first metal layer having at least one columnar through hole that exposes the surface of the support member, forming a columnar metal layer that fills the columnar through hole, forming an insulating layer on the columnar metal layer and on the first metal layer, forming an interconnection layer on a first surface of the insulating layer such that the interconnection layer is electrically connected to the columnar metal layer through the insulating layer, and forming a protruding part including at least part of the columnar metal layer by removing at least the support member and the first metal layer, the protruding part protruding from a second surface of the insulating layer opposite the first surface and serving as at least part of a connection terminal of the wiring substrate.

Abstract: A chip assembly includes a PCB and a chip positioned on the PCB. The PCB includes a number of first bonding pads. Each bonding pad includes two first soldering balls formed thereon. The chip includes a number of second bonding pads each corresponding to a first bonding pad. Each second bonding pad includes a second soldering ball. The two first soldering balls of a first bonding pad are electrically connected to the second soldering ball of a corresponding second bonding pad via two bonding wires.

Abstract: A printed circuit board on which a surface mount electronic device is mounted. The printed circuit board includes a substrate on which land arrangements are disposed in an array. Each land arrangement includes a core portion and drawing portions. The drawings are disposed along diagonal directions relative to the core portions of the array of the land arrangements.

Abstract: A high performance electrical interconnect adapted to provide an interface between terminals on first and second circuit members. The electrical interconnect includes a first circuitry layer with a first surface and a second surface having a plurality of contact pads adapted to electrically coupled with the terminals on the first circuit member. At least one dielectric layer is printed on the first surface of the first circuitry layer. The dielectric layer includes a plurality recesses. A conductive material is deposited in at least a portion of the recesses to create circuit geometry electrically coupled with the first circuitry layer. A second circuitry layer includes a first surface a plurality of contact pads adapted to electrically couple with the terminals on the second circuit member and a second surface attached to the dielectric layers. The circuit geometry electrically couples the first circuitry layer to the second circuitry layer.

Abstract: A wiring substrate includes a motherboard including insulation layers, conductive layers and interlayer connection conductors, a packaging substrate mounted to the motherboard and having through-hole conductors, pads positioned to mount a semiconductor, uppermost via conductors connecting the through-hole conductors and the pads for the semiconductor, pads positioned to connect a motherboard and lowermost via conductors connecting the through-hole conductors and the pads for the motherboard, and bonding members interposed between the motherboard and packaging substrate and connecting the pads for the motherboard and an outermost conductive layer of the motherboard facing the packaging substrate.

Abstract: An electrical device that is electrically and mechanically connectable to another electrical device includes a face equipped with contact pads. An adhesive layer is on the face equipped with the contact pads. The adhesive layer is composed of a substance with adhesive properties. A plurality of openings through the adhesive are layer over each contact pad, and small metal sticks which have been grown electrolessly or electrochemically are in the areas where the openings have been created to form a plurality of conductive paths over each contact pad, the volume of which is defined by the openings.

Abstract: Stacked arrays of components are disclosed. In one embodiment, a first and a second layer of components are electrically and mechanically coupled to a thin interposer disposed between the first and second layers. The first layer can be configured to attach the stacked array to a host printed circuit board. The interposer can insulate the components from one another and also couple signals between the components on the first and second layers. In one embodiment, the components in the first and second layers are passive components.

Abstract: An apparatus capable of selectively applying different types of connectors to a substrate is disclosed. The memory apparatus includes a substrate having a controller. First and second connector pads may be arranged on edges of top and bottom surfaces of the substrate. A via hole may be arranged between the controller and the first and second connector pads. A first passive device pad may be arranged between the via hole and the first connector pads. A second passive device pad may be arranged between the via hole and the second connector pads. A passive device may be coupled to only one of the first passive device pad or the second passive device pad.

Abstract: In one embodiment of the present invention, inert nano-sized particles having dimensions from 1 nm to 1,000 nm are added into a solder ball. The inert nano-sized particles may comprise metal oxides, metal nitrides, metal carbides, metal borides, etc. The inert nano-sized particles may be a single compound, or may be a metallic material having a coating of a different material. In another embodiment of the present invention, a small quantity of at least one elemental metal that forms stable high melting intermetallic compound with tin is added to a solder ball. The added at least one elemental metal forms precipitates of intermetallic compounds with tin, which are dispersed as fine particles in the solder.

Abstract: A printed circuit board to which a localised solder connection is to be made, the surface of said printed circuit board having a continuous or non-continuous coating of a composition comprising a halo-hydrocarbon polymer at a thickness of from 1 nm to 10 ?m.

Abstract: A die having a base formed of a first material is connected to a board having a base formed of a second material. An interposer having a coefficient of thermal expansion intermediate coefficients of thermal expansion of the first and second materials is positioned between the die and the board.

Abstract: On a circuit substrate on which an adhesive is used to couple electronic or structural components to the substrate, an adhesive dam is positioned to prevent the adhesive from interfering with the operation of the circuit. A contact pad can be provided at a selected location and with a selected shape, and solder deposited on the pad, then reflowed to form the dam. The dam can be a structure soldered to a contact pad, or the dam can be supported at its ends by another structure of the device, so that, at the location where it functions to contain the adhesive, it is not attached to the substrate.

Abstract: An automotive alternator rectifying apparatus includes a circuit board that connects a positive-side rectifying element mounted to the positive-side heatsink and a negative-side rectifying element mounted to the negative-side heatsink to configure a bridge circuit. The circuit board includes a tubular lead guiding portion that includes a lead insertion aperture; and a terminal that is disposed so as to extend outward in an aperture direction of the lead insertion aperture from an exit edge portion of the lead insertion aperture, and to which is connected a lead that is subject to connection that is inserted through an entrance of the lead insertion aperture and that extends outward from an exit, and the lead insertion aperture is formed such that cross-sectional area thereof becomes gradually smaller from the entrance toward the exit.

Abstract: An electronic module includes a board with a printed circuit, at least one component of a first type soldered to the board, and at least one component of a second type. The component of the second type extends above the at least one component of the first type. The at least one component of the first type is placed at least partially between the at least one component of the second type and the board and the at least one component of the second type includes a plurality of pads soldered to the board.

Abstract: In a power inverter, a coolant passage is fixed to a chassis to cool the chassis; the chassis is divided into a first region and a second region by providing the coolant passage in the chassis; a power module is provided in the first region as fixed to the coolant passage; a capacitor module is provided in the second region; and the DC terminal of the capacitor module is directly connected to the DC terminal of the power module.

Abstract: A board-level package includes a printed circuit board, a semiconductor die package mounted on the printed circuit board, a tuned mass structure, and a support structure mounted to the printed circuit board and supporting the tuned mass structure.

Abstract: An interconnect structure, an interconnect structure for interconnecting first and second components, an interconnect structure for interconnecting a multiple component stack and a substrate, and a method of fabricating an interconnect structure. The interconnect structure comprising a base portion formed on a mounting surface of a first component; a pillar portion extending from the base portion and substantially perpendicularly to the mounting surface; and a head portion formed on the pillar portion and having larger lateral dimensions than the pillar portion; wherein the base portion and the pillar portion are integrally formed of a homogeneous material.

Abstract: According to one embodiment, an electronic component structure includes an electronic component, an electrode, and a restriction portion. The electrode is connected to the electronic component in a multilayer state and comprises a plurality of solder regions on a side opposite to a side of the electronic component. Each of the solder regions is soldered to a substrate by separate solders. The restriction portion is connected to a periphery of the solder regions, and has a level difference relative to the solder regions.

Abstract: A printed circuit board includes a first to a fifth connector pads, a first to an eighth coupling capacitor pads, a first to a tenth transmission lines, a first via and a second via, a first to a fourth sharing pads, and a voltage converting circuit. The printed circuit board is operable to selectively support different types of connectors.

Abstract: A method for manufacturing a printed circuit board, including providing a core substrate having an electronic component accommodated in the core substrate; forming a positioning mark on the core substrate; forming an interlayer insulating layer over the core substrate, the positioning mark and the electronic component; forming a via hole opening connecting to the electronic component through the interlayer insulating layer in accordance with the positioning mark on the core substrate; and forming a via hole structure in the via hole opening in the interlayer insulating layer such that the via hole structure is electrically connected to the electronic component.

Abstract: A technique provides security to an electronic device. The technique involves disposing a microprocessor between a printed circuit board and a circuit element to restrict physical access to the microprocessor, the microprocessor having (i) a bottom which faces the printed circuit board in a first direction and (ii) a top which faces the circuit element in a second direction which is opposite the first direction. The technique further involves delivering power to the microprocessor from a power source while the microprocessor is disposed between the printed circuit board and the circuit element, the microprocessor performing electronic operations in response to the power delivered from the power source. The technique further involves electronically altering or preventing the microprocessor from further performing the electronic operations in response to tampering activity on the circuit element. Such detection of the tampering activity may involve monitoring a covert signal for tamper evidence detection.

Abstract: Solutions for improving current spreading in organic substrates are disclosed. In one aspect, a packaging substrate is disclosed, the packaging substrate comprising: a substrate base having a first surface and a second surface; and a controlled collapse chip connect (C4) pad over a portion of the first surface, the C4 pad including: an electrolessly plated copper (Cu) layer over the first surface; an electrolytic nickel (Ni) portion over the first electrolytic Cu portion; and a first electrolytic Cu portion over the electrolytic Ni portion; wherein the electrolessly plated Cu layer has a portion extending in one direction away from the C4 pad.

Abstract: The present invention discloses an electrical device with a connection interface, a circuit board thereof, and a method for manufacturing the same. The electrical device with a connection interface includes: a circuit board on which a first circuit layer and a second circuit layer are formed and the second circuit layer has plural terminal pads, wherein a cavity is formed in the terminal pads and extends to the first circuit layer, and a metal layer is disposed in the cavity and connected to the first circuit layer and the terminal pads and defines an opening; a semiconductor chip electrically connected to the first circuit layer; and a conductive element interlaid in the opening. The electrical device with a connection interface does not need to be formed by assembling a terminal module because the conductive element is directly mounted on the circuit board.

Abstract: A circuit board circuit apparatus and a light source apparatus including a substrate, a circuit layer, and at least one electronic component are disclosed. The circuit layer is formed on a surface of the substrate. The circuit layer includes a first circuit and a second circuit which are coplanar-disposed. The at least one electronic component is disposed on the circuit layer and connected with the circuit layer. Each electronic component has a first contact and a second contact. At least a part of the second circuit is disposed between the at least one electronic component and the first circuit. The at least one electronic component crosses over the second circuit, so that the second circuit penetrates through the bottom of the electronic component between the first contact and the second contact.

Abstract: A semiconductor device reduces the impedance of a wiring for supplying the circuit excluding a data output circuit with a power source voltage or a ground voltage and of speedup of data signal transmission in the data output circuit. Additional substrates 2a, 2b are on the upper surface of semiconductor chip 1. First additional wiring layer for power source 10d and first additional wiring layer for ground 10s formed on respective additional substrates 2a, 2b form prescribed conductive areas on semiconductor chip 1. First power source wiring 40C1d or first ground wiring 40C1s are interconnected through additional wiring layers 10d and 10s. Second power source wiring 40C2d and second ground wiring 40C2s, which is extended in the same direction as with DQ system signal wiring 40CDQ, forms a feedback current path. Second power source wiring 40C2d and second ground wiring 40C2s are disposed adjacent to DQ system signal wiring 40CDQ.