Abstract: An electronic device includes an electronic component including a plurality of terminals and a circuit board on which the electronic component is mounted. The circuit board includes a board body, a plurality of electrode pads arranged on the board body, each of the electrode pads being connected to each of the terminals by solder, a first solder resist formed on the board body and having a plurality of first openings, each of the first openings accommodating each of the electrode pads, and a second solder resist formed on the first solder resist and having a plurality of second openings, each of the second openings being larger than each of the first openings and communicating with each of the first openings.

Abstract: An electronic device includes a circuit board, a connector and an electronic module. The connector includes an insulating body and a first terminal set. The insulating body includes a concave. The first terminal set is fastened on the insulating body and is electrically connected to the circuit board. The electronic module is detachably disposed in the concave and includes a second terminal set. The second terminal set contacts the first terminal set to be electrically connected to the circuit board.

Abstract: A mounting structure of a chip component includes a chip component that is bonded by having a pair of external terminal electrodes provided on both ends of an element body of the thin chip component bonded to a pair of lands respectively through solder, the pair of lands being provided on an attaching substrate in a lateral direction with respect to each other. Where plan view distances from ends of the external terminal electrodes at the ridge lines formed between the surfaces and side faces of the element body of the chip component to the edges of the lands connected to the external terminal electrodes are designated as “d,” and the vertical distances from the bottom surfaces of the external terminal electrodes and the lands are designated as “t,” then d>t/tan 35° and preferably d>t/tan 25° is fulfilled.

Abstract: A circuit substrate which is capable of decreasing the possibility that the amount of solder in the overall mounting land is uneven and reducing formation of a solder void even when a mounting terminal has a large soldering area. An electronic component having the mounting terminal is mounted on the circuit substrate. A mounting land is connected to the mounting terminal of the electronic component by soldering, and the mounting land has a protruding portion of an insulating material formed so as to protrude from an outer side of the mounting land toward an inner side of the mounting land, and the protruding portion does not divide the mounting land into a plurality of areas.

Abstract: A composite electronic component may include: a composite body including a capacitor and an inductor coupled to each other, the capacitor having a ceramic body in which dielectric layers and internal electrodes facing each other with the dielectric layers interposed therebetween are stacked, and the inductor having a magnetic body in which magnetic layers having conductive patterns are stacked; an input terminal disposed on a first end surface of the composite body; an output terminal including a first output terminal disposed on a second end surface of the composite body and a second output terminal disposed on any one or more of upper and lower surfaces and a second side surface of the capacitor; and a ground terminal disposed on any one or more of the upper and lower surfaces and a first side surface of the capacitor and connected to the internal electrodes.

Abstract: There is provided a circuit board to which a solder ball composed of a lead (Pb)-free solder is to be connected, a semiconductor device including an electrode and a solder ball composed of a lead (Pb)-free solder disposed on the electrode, and a method of manufacturing the semiconductor device, in which mounting reliability can be improved by enhancing the bonding strength (adhesion strength) between the solder ball composed of a lead (Pb)-free solder and the electrode.

Abstract: A surface metal wiring structure for a substrate includes one or more functional ?bumps formed of a first metal and an electrical test pad formed of a second metal for receiving an electrical test probe and electrically connected to the one or more functional ?bumps. The surface metal wiring structure also includes a plurality of sacrificial ?bumps formed of the first metal that are electrically connected to the electrical test pads, where the sacrificial ?bumps are positioned closer to the electrical test pad than the one or more functional ?bumps.

Abstract: A circuit board is described. The circuit board comprises a substrate (4), a set of contact pads (6) supported on the substrate and a plurality of discrete adhesive conductive regions disposed on the contact pads and the substrate such that at some adhesive conductive regions are disposed on and between two contact pads.

Abstract: A bump structure provided on an electrode pad includes a solder member, and a metal layer having a cylindrical portion covering a side surface of the solder member, the metal layer being made of a metal which is higher in melting point than the solder member. An upper part of the cylindrical portion of the metal layer is opened wide.

Abstract: A circuit assembly (1800) includes a first circuit substrate (1200) defining a first major face (1201) and a second circuit substrate (1500) defining a second major face (1502). A plurality of electrical components (1203,1204,1205) can be disposed on one or more of the first major face or the second major face. One or more substrate bridging members (1301,1302,1303,1304) are disposed between the first circuit substrate and the second circuit substrate. Each substrate bridging member can define a unitary structure having a first end bonded to the first major face and a second end bonded to the second major face to bridge the first circuit substrate and the second circuit substrate.

Abstract: An electronic device includes an integrated circuit chip with an insulating passivation layer. An opening in the passivation layer uncovers a first region of an electrical contact. An electrical connection pad is formed to fill the opening by covering the first region and extend in projection in such a way as to cover a second region situated on the passivation layer surrounding the opening. The periphery of at least one of the first and second regions has an elongate or oblong shape. Centers of the opening and the pad are aligned with each other.

Abstract: A connection apparatus for electrically conductive pads includes a first substrate and a second substrate arranged in opposition, wherein a plurality of first electrically conductive pads are arranged on the inside of the first substrate, and a plurality of second electrically conductive pads are arranged on the inside of the second substrate. An electrically conductive glue is arranged between the first electrically conductive pads and the second electrically conductive pads, and the first electrically conductive pads each include a first body, the second electrically conductive pads each include a second body, and the first body and/or the second body includes a hollow portion or portions. The electrically conductive pads with a hollow portion(s) allowing light rays to illuminate and solidify the electrically conductive for bonding and interconnecting the upper and lower electrically conductive pads.

Abstract: An integrated circuit package includes a packaging substrate, which has an electrically conductive grid formed on a dielectric layer, and an integrated circuit die electrically coupled to the electrically conductive grid at one or more locations. In this embodiment, the electrically conductive grid includes a plurality of electrically conductive portions, wherein each portion is electrically coupled to at least one other portion, and a plurality of void regions that are electrically non-contiguous and substantially free of electrically conductive material. One advantage of the integrated circuit package is that a packaging substrate that is reduced in thickness, and therefore rigidity, can still maintain planarity during operation.

Abstract: A method for manufacturing an embedded package comprises the steps of: coupling at least one first embedded body including at least one connection port with a first circuit substrate and packaging the first embedded body and the first circuit substrate to form a package; and exposing the connection port of the package on an outer side of the package for other electronic carriers to couple with. The invention can overcome the disadvantage of the conventional System in Package manufacturing process which integrally packages multiple ICs in a same package to result in discard of the entire package because of failure of a single IC. The method of the invention makes assembly simpler, expansion, test and replacement of IC components easier, and also can reduce manufacturing time and accumulated heat, lower the cost and improve yield rate.

Abstract: An integrated circuit package includes a packaging substrate with an electrical connection pad formed thereon and an integrated circuit die coupled to the electrical connection pad. The electrical connection pad includes an electroplated surface finish layer, but does not include an electrical trace configured as a plating tail. Because the electrical connection pad is free of a plating tail, signal degradation caused by the presence of plating tails in the integrated circuit package is avoided.

Abstract: A wiring substrate includes an insulating layer that is an outermost layer of the wiring substrate and includes an external exposed surface, a pad forming part formed on a side of the external exposed surface, and a pad that projects from the external exposed surface. The pad forming part includes a recess part recessed from the external exposed surface, and a weir part that projects from the external exposed surface and encompasses the recess part from a plan view. The pad includes a pad body formed within the recess part and the weir part, and an eave part formed on the weir part. The pad body includes an end part that projects to the weir part. The eave part projects in a horizontal direction from the end part of the pad body. The end part of the pad body includes a flat surface.

Abstract: A method of making an electronic device includes forming an electrically conductive pattern on a substrate, forming a cover layer on the substrate and the electrically conductive pattern, and forming openings in the cover layer and being aligned with the electrically conductive pattern. The method also includes positioning an IC on the cover layer so that bond pads of the IC are aligned with the openings, and heating under pressure the cover layer to both mechanically secure and electrically interconnect the IC.

Abstract: Embodiments of a printed circuit board (PCB) and an electronic apparatus are provided. The PCB includes a PCB substrate and a plurality of the pads. The PCB substrate is disposed with the plurality of the pads. The plurality of the pads include a first type of the pads and a second type of the pads. The first type of the pads adopts the solder mask defined structure, and the second type of the pads adopts the non-solder mask defined structure.

Abstract: A circuit board includes an electric circuit having a wiring section and a pad section in the surface of an insulating base substrate. The electric circuit is configured such that a conductor is embedded in a circuit recess formed in the surface of the insulating base substrate, and the surface roughness of the conductor is different in the wiring section and the pad section of the electric circuit. In this case, it is preferable that the surface roughness of the conductor in the pad section is greater than the surface roughness of the conductor in the wiring section.

Abstract: A circuit board includes an insulation layer having a first surface and a second surface on the opposite side of the first surface, an electronic component positioned in the insulation layer and having a terminal, a conductive pattern formed on the second surface of the insulation layer and electrically connected to the terminal, and an insulative film formed on the second surface of the insulation layer and on the conductive pattern. The terminal of the electronic component has a protruding portion which protrudes from the second surface of the insulation layer.

Abstract: An electronic device may contain components such as flexible printed circuits and rigid printed circuits. Electrical contact pads on a flexible printed circuit may be coupled electrical contact pads on a rigid printed circuit using a coupling member. The coupling member may be configured to electrically couple contact pads on a top surface of the flexible circuit to contact pads on a top surface of the rigid circuit. The coupling member may be configured to bear against a top surface of the flexible circuit so that pads on a bottom surface of the flexible circuit rest against pads on a top surface of the rigid circuit. The coupling member may bear against the top surface of the flexible circuit. The coupling member may include protrusions that extend into openings in the rigid printed circuit. The protrusions may be engaged with engagement members in the openings.

Abstract: An electronic-component mounted body of the present invention includes an electronic component mounted on a circuit board. The electronic component includes multiple component-side electrode terminals, and the circuit board includes multiple circuit-board side electrode terminals for the component-side electrode terminals. The electronic-component mounted body further includes: multiple protruded electrodes formed respectively on the component-side electrode terminals of the electronic component to electrically connect the electronic component and the circuit board; and a dummy electrode formed on the electronic component and electrically connected to the component-side electrode terminal in a predetermined position out of the component-side electrode terminals. The protruded electrode on the component-side electrode terminal in the predetermined position is higher than the protruded electrode on the component-side electrode terminal in a different position from the predetermined position.

Abstract: A device with low dielectric absorption includes a printed circuit board (PCB), a component connection area including a first conductor layered on a top surface of the component connection area and a second conductor layered on a bottom surface of the component connection area, an aperture surrounding the component connection area, a low-leakage component connecting the component connection area to the PCB across the aperture, and a guard composed of a third conductor at least substantially surrounding the aperture on a top surface of the PCB and a fourth conductor at least substantially surrounding the aperture on a bottom surface of the PCB.

Abstract: First electrode pads formed on one semiconductor package surface include a first reinforcing electrode pad having a surface area larger than that of other first electrode pads. Second electrode pads formed on a printed wiring board on which the semiconductor package is mounted include at least one second reinforcing electrode pad. The second reinforcing electrode pad opposes the first reinforcing electrode pad, and has a surface area greater than that of the other second electrode pads. The first and second electrode pads are connected by solder connection parts. A cylindrical enclosing member encloses an outer perimeter of a solder connection part connecting the first and second reinforcing electrode pads. Increases in the amount of warping of semiconductor devices such as the package substrate and the printed wiring board are suppressed, and the development of solder bridges with respect to adjacent solder connecting parts or adjacent components is reduced.

Abstract: A semiconductor package, a substrate and a manufacturing method thereof are provided. The substrate comprises a conductive carrier, a first metal layer and a second metal layer. The first metal layer is formed on the conductive carrier and comprises an lead pad having an upper surface. The second metal layer is formed on the first metal layer and comprises a bond pad. The bond pad overlaps and is in contact with the upper surface of the first metal layer. The upper surface of the lead pad is partially exposed. A part of the bond pad overhang outward from the edge of the lead pad.

Abstract: An electronic panel assembly (EPA) includes one or more electronic devices with primary faces having electrical contacts, opposed rear faces and edges therebetween. The devices are mounted primary faces down in openings in a warp control sheet (WCS). Cured plastic encapsulation is formed at least between lateral edges of the devices and WCS openings. Undesirable panel warping during encapsulation is mitigated by choosing the WCS coefficient of thermal expansion (CTE) to be less than the encapsulation CTE. Thin film insulators and conductors couple electrical contacts on various devices to each other and to external terminals, thereby forming an integrated multi-device EPA.

Abstract: An object of the present invention is to allow stress that may be applied to a semiconductor package to be suppressed, when the semiconductor package is mounted on a curved board. In a mount board 1, a semiconductor package 20 is mounted on a curved board 10 including a curved surface on at least a portion thereof. The curved board 10 includes a pedestal portion 13a disposed on a region of the curved surface portion where the semiconductor package 20 is mounted and having an upper surface thereof formed flat, and a plurality of pad portions 15a disposed on the flat surface of the pedestal portion 13a. The pedestal portion 13a is formed of an insulating material. The semiconductor package 20 is mounted on the pad portions 15a.

Abstract: One embodiment of the invention sets forth a packaging system, which includes a first package substrate, an electrically conductive pad formed on a surface of the first package substrate, and a supporting structure formed on the electrically conductive pad. The supporting structure has a top surface and a side surface, and only the top surface of the supporting structure is coupled to a solder joint to establish an electrical connection between the first package substrate and an adjacent, parallel second package substrate. By having the solder joint connected only to the top surface of the supporting structure, the resulting solder joint structure is narrower and taller. Therefore, even if solder joints are placed at a finer pitch, a standoff height between the first and second package substrates can be maintained at a desired height to accommodate a fixed-size IC chip that is disposed between the first and second package substrates.

Abstract: Embodiments of the present disclosure describe apparatuses, methods, and systems of thermal via structures with surface features. In some embodiments the surface features may have dimensions greater than approximately one micron. The thermal via structures may be incorporated into a substrate of an integrated circuit device. Other embodiments may be described and/or claimed.

Abstract: A printed circuit board assembly (PCBA) chip package component includes: a module board and an interface board. A first soldering pad is set on the bottom of the module board, a second soldering pad is set on top of the interface board, and the second soldering pad is of a castle-type structure. The first soldering pad includes a first soldering area, a second soldering area, and a connection bridge that connects the first soldering area and the second soldering area. The first soldering area corresponds to a top surface of the second soldering pad, and when the first soldering area is soldered to second soldering pad, the second soldering area is located outside the second soldering pad.

Abstract: An electronic device may include at least one power component and a printed circuit board. The at least one power component may include a main body and a lead. The printed circuit board may include at least two conductive layers parallel to a plane. The printed circuit board may further include a mounting element and a conductor. The mounting element may include first conductive tubes. The conductor may include second conductive tubes. The first conductive tubes and the second conductive tubes may elongate through a thickness of the printed circuit board along a direction substantially perpendicular to the plane. The main body of the at least one power component may be fixed to the mounting element. The lead of the at least one power component may be fixed to the conductor.

Abstract: An assembly for physically securing, and providing data and power to, a portable electronic consumer product that has opposed sides that each include one or more protrusions or depressions, where the portable electronic consumer product also has an electrical power input connector and a data input connector. The assembly has first and second separate housing portions that are constructed and arranged to be separably coupled together to thereby define a housing. The first and second housing portions each define one or more protrusions or depressions that complement the depressions or protrusions on a side of the portable electronic consumer product such that the housing forms a tight locational clearance fit with the consumer product when the first and second housing portions are coupled together around the opposed sides of the consumer product. There is a cord assembly that is constructed and arranged to carry electrical power and data, the cord assembly located in part inside the housing.

Abstract: An apparatus includes a sheet of circuit board material, at least one electrically conductive trace positioned on the sheet of circuit board material, and at least one electrically conductive contact pad positioned on the sheet of circuit board material and coupled to the at least one electrically conductive trace. The apparatus further includes at least one deformation point configured to absorb stresses developed in the sheet of circuit board material when the sheet of circuit board material experiences resistance to expansion or compression caused by connection to an object resisting expansion or compression.

Abstract: A wiring board includes multiple insulation layers including an outermost insulation layer, a first conductive pattern formed between the insulation layers, a wiring structure positioned in the outermost insulation layer and having multiple first pads such that the first pads are positioned to connect multiple terminals of a first electronic component, respectively, and multiple second pads formed on the outermost insulation layer such that the second pads are positioned to connect terminals of a second electronic component, respectively, and are set at intervals which are greater than intervals of the first pads.

Abstract: A bonding pad structure is disclosed, which is composed of two bonding pad units that are symmetrically disposed with respect to an axial line. Each bonding pad units is further composed of at least two bonding pads, i.e. each bonding pad unit is composed of at least one first bonding pad and at least one second bonding pad. In an embodiment, the first bonding pad is arranged next to the axial line and the second bonding pad is arranged at a side of the corresponding first bonding pad away from the axial line while enabling the first bonding pad and the corresponding second bonding pad to be interconnected to each other by a first neck portion. Thereby, a plurality of solder areas of different sizes can be formed by the interconnecting of the at least two bonding pad units that can be used for soldering electronic components of different sizes.

Abstract: The invention comprises an at least one-layer electrical circuit board (1) having internal and/or external conducting tracks or electrical circuits (3, 8), which circuit board has copper pads (4, 5) arranged on the surface for population with electrical components and/or which has copper pads (5) for electrically connecting at least two layers of the circuit board, and which is at least partially surrounded by media, in particular liquid media, further in particular oil, or is directly exposed thereto, wherein said copper pads (4, 5) and exposed conducting tracks (8) are coated with a further metal (7).

Abstract: Electronic devices may include a first substrate including circuitry components within the substrate, a microscale bond pad on a surface of the substrate, and a via electrically connecting the microscale bond pad to one of the circuitry components. A distance between centers of at least some adjacent circuitry components of the circuitry components may be a nanoscale distance. A second substrate may be electrically connected to the microscale bond pad. Methods of forming electronic devices may involve positioning a first substrate adjacent to a second substrate and electrically connecting the second substrate to a microscale bond pad on a surface of the first substrate. The first substrate may include circuitry components within the first substrate and a via electrically connecting the microscale bond pad to one of the circuitry components. A distance between centers of at least some adjacent circuitry components of the circuitry components may be a nanoscale distance.

Abstract: A multilayer PCB comprises vias for power-supply connected to power-supply wiring, vias for ground connected to ground wiring, ball pads for power-supply connected to balls for power-supply connected to power-supply wiring, and ball pads for ground connected to balls for ground connected to ground wiring. The vias for power-supply and the vias for ground are alternately arranged in a first direction. The vias for power-supply and the vias for ground are not alternately arranged in a second direction perpendicular to the first direction. The ball pads for power-supply and the ball pads for ground are alternately arranged in at least one of the first and second directions. Areas where the ball pads for power-supply and the ball pads for ground are provided are arranged on both sides in the second direction of an area where the vias for power-supply and the vias for ground are provided.

Abstract: An electronic device comprises a circuit substrate, and a moulded interconnect device incorporating integral legs to mount the interconnect device upon the substrate, the legs spacing at least part of the interconnect device from the substrate, at least one of the legs carrying a conducting track to provide an electrical interconnection between the interconnect device and the substrate.

Abstract: An embodiment of the invention provides a chip package which includes: a carrier substrate; a semiconductor substrate having an upper surface and a lower surface, disposed overlying the carrier substrate; a device region or sensing region located on the upper surface of the semiconductor substrate; a conducting pad located on the upper surface of the semiconductor substrate; a conducting layer electrically connected to the conducting pad and extending from the upper surface of the semiconductor substrate to a sidewall of the semiconductor substrate; and an insulating layer located between the conducting layer and the semiconductor substrate.

Abstract: An electronic device and a display module used therein are provided. The display module includes a display panel, a backlight module and a sensing antenna. The backlight module has a light exit surface and a reflective plate opposite to the light exit surface, and the display panel is stacked on the light exit surface. The sensing antenna is disposed on a surface of the reflective plate opposite to the light exit surface and has a body and two signal connecting terminals connecting the body. The electronic device includes the display module, a system circuit module, and a conductive device. The system circuit module is disposed on a back side of the display module and has a signal connecting parts corresponding to and connecting the signal connecting terminals.

Abstract: In accordance with one or more aspects, a method of reducing void formation in a solder joint may comprise applying a solder paste deposit to a substrate, placing a solder preform in the solder paste deposit, disposing a device on the solder preform and the solder paste deposit, and processing the solder paste deposit and the solder preform to form the solder joint between the device and the substrate. In some aspects, the substrate is a printed circuit board and the device is an integrated circuit package.

Abstract: A display panel includes a display configured to display an image by receiving a drive signal, and a pad region including first and second pads groups configured to receive the drive signal from an external and to provide the received drive signal to the display, wherein the first pad group includes a plurality of first pads extending along a plurality of first imaginary lines, wherein the second pad group includes a plurality of second pads extending along a plurality of second imaginary lines, and wherein the plurality of first imaginary lines converges into a first point and the plurality of second imaginary lines converges into a second point, the first point and the second point are located at different positions.

Abstract: A method of making an electronic device includes forming a circuit layer on a liquid crystal polymer (LCP) substrate and having at least one solder pad. The method also includes forming an LCP solder mask having at least one aperture therein alignable with the at least one solder pad. The method further includes aligning and laminating the LCP solder mask and the LCP substrate together, then positioning solder paste in the at least one aperture. At least one circuit component may then be attached to the at least one solder pad using the solder paste.

Abstract: The described embodiments relate generally to electronic devices and more particularly to methods for forming mechanical and electrical connections between components within an electronic device. In one embodiment, an interconnect component such as a flex cable is attached to a substrate such as a printed circuit board. A plurality of apertures can be created in the interconnect component, passing through bonding pads located on one end of the interconnect component. The interconnect component can then be aligned with bonding pads on the substrate with the bonding pads on the interconnect component facing away from the substrate. A conductive compound can be injected into the apertures through the interconnect component, forming a mechanical and electrical connection between the bonding pads. In some embodiments, an adhesive layer can be used to further strengthen the bond between the interconnect component and the substrate.

Abstract: Embodiments of the present disclosure are directed towards techniques and configurations for dual surface finish package substrate assemblies. In one embodiment a method includes depositing a first surface finish on one or more electrical routing features located on a first side of a package substrate and on one or more lands located on a second side of the package substrate, the second side being opposite the first side of the substrate. The method may further include removing the first surface finish on the first side of the package substrate; and depositing a second surface finish on the one or more electrical routing features of the first side. The depositing of the second surface finish may be accomplished by one of a Direct Immersion Gold (DIG) process or an Organic Solderability Preservative (OSP) process. Other embodiments may be described and/or claimed.

Abstract: A composite electronic component includes a metal component with a wide surface terminal, a printed circuit board with a wide surface mounting pad; and a plurality of small area solder films partitioned into small sectioned regions. The small sectioned regions are sectioned by grid-shaped solder resist banks on the wide surface mounting pad. A cream solder is applied on the individual small sectioned regions to form the plurality of small area solder films. The grid-shaped solder resist bank has a width configured to: reduce a bubble that occurs in the sectioned region at one side of the grid-shaped solder resist bank from merging with a bubble that occurs in the sectioned region at another side of the grid-shaped solder resist bank; and act as an escaping route for a bubble that occur in the small area solder film.

Abstract: An electrode bonding structure sealed with a sealing resin, in which a flexible substrate is bonded to a first substrate via an adhesive, wherein: a region along a bottom face edge of an flexible substrate end part is bonded, via the adhesive, to an inner side region of a region along a top face edge of an first substrate end part; a gap is formed between an inner side region of the region along the bottom face edge of the flexible substrate end part and the region along the top face edge of the first substrate end part; the sealing resin is formed so as to enter, while covering a top face of the flexible substrate end part, at least a portion of the gap; and a height of the gap gets smaller towards the adhesive from the top face edge of the first substrate end part.

Abstract: A transceiver on a CMOS chip including optical and optoelectronic devices, and electronic circuitry may be operable to communicate optical signals between the CMOS chip and optical fibers coupled to the CMOS chip via a semiconductor laser and one or more photodetectors. The optical and optoelectronic devices may include waveguides, modulators, multiplexers, switches, and couplers. The photodetector may be integrated in the CMOS chip. The photodetector and the semiconductor laser may be mounted on the CMOS chip. The optical signals may be communicated out of and in to a top surface of the CMOS chip. A transceiver on a CMOS chip including optical and optoelectronic devices, and electronic circuitry, may be operable to communicate optical signals between the CMOS chip and optical fibers coupled to the CMOS chip via grating couplers. The optical signals may be communicated out of and in to a top surface of the CMOS chip.

Abstract: A transceiver comprising a plurality of CMOS chips may be operable to communicate an optical source signal from a semiconductor laser into a first CMOS chip via optical couplers. The optical source signal may be used to generate first optical signals that are transmitted from the first CMOS chip to optical fibers coupled to the first CMOS chip via one or more optical couplers. Second optical signals may be received from the optical fibers and converted to electrical signals via photodetectors in the first CMOS chip. The optical source signal may be communicated from the semiconductor laser into the first CMOS chip via optical fibers in to a top surface and the first optical signals may be communicated out of a top surface of the first CMOS chip. The electrical signals may be communicated to at least a second of the plurality of CMOS chips comprising electronic devices.