Having Backplane Connection Patents (Class 361/788)
  • Patent number: 6848913
    Abstract: An IDE connector with opposite male plug and female socket includes a circuit board with a control circuit, a chip, a male plug and a female socket. The male plug is joined to one side of the circuit and the female socket is joined to another side of the circuit board so as to be disposed oppositely. The female socket is connected to the male plug of an IDE device to enhance the data transmission quality between two IDE devices and decrease using of the flexible flat cable.
    Type: Grant
    Filed: March 6, 2003
    Date of Patent: February 1, 2005
    Assignee: EPO Science & Technology Inc.
    Inventor: Hong-Chuan Wang
  • Patent number: 6836811
    Abstract: A system and apparatus for a compact peripheral component interconnect (CPCI) computer system having exclusive front card access for both active and passive CPCI cards is provided. This system is further comprised of an active backplane with a front and rear side, a plurality of slots, each of these slots comprising of at least one connector and each of these connectors having a column and row arrangement of connector-pins, wherein individual ones of these connector-pins correspond to selected pairs of adjacent slots, and wherein selected adjacent slot pairs are reserved for particular pairs of CPCI cards comprising a single active card and a single passive card.
    Type: Grant
    Filed: September 12, 2001
    Date of Patent: December 28, 2004
    Assignee: Sun Microsystems, Inc.
    Inventors: Raymond K. Ho, Richard R. Creason, Kaamel M. Kermaani
  • Publication number: 20040257781
    Abstract: An electronic assembly is described which includes a printed circuit board, and a processor and a memory mounted on the printed circuit board. A routing channel is provided in the printed circuit board comprising a plurality of conductors interconnecting the processor and the memory. A regulator assembly includes a regulator for providing power to the processor, a first connector mounted on the printed circuit board adjacent a first edge of the routing channel, and a second connector mounted on the printed circuit board adjacent a second edge of the routing channel opposite the first edge. The first and second connectors are coupled to the regulator and facilitate distribution of the power to the processor. The regulator and the first and second connectors form a bridge across the routing channel.
    Type: Application
    Filed: June 23, 2003
    Publication date: December 23, 2004
    Applicant: Newisys, Inc.
    Inventors: Leslie J. Record, William G. Kulpa, Robert Gontarek
  • Patent number: 6833996
    Abstract: 1. An electronics assembly comprises: (i) a frame (1); (ii) a plurality of power supply modules (2) for supplying power to electrical circuitry of the assembly, each of which has an input power connector and an output power connector (27); and (iii) a power inlet connection module (26) which is electrically connected to a plurality of the power supply modules; wherein the power inlet connection module (26) is separated from the power supply modules (2) by an internal wall (36) of the frame which has, on one side thereof, at least one location element (50) for locating the power inlet connection module relative to the wall and, on the other side thereof, at least one location element (54) for locating each power supply module that is connected to the power inlet connection module relative to the wall so that the power supply modules are aligned with the power inlet connection module by means of the internal wall.
    Type: Grant
    Filed: June 10, 2002
    Date of Patent: December 21, 2004
    Assignee: Sun Microsystems, Inc.
    Inventor: Stephen Paul Haworth
  • Publication number: 20040252470
    Abstract: A slot apparatus for a memory module on a printed circuit board. The slot apparatus includes a first memory slot set, a second memory slot set, a terminal resistor, and a serial resistance. The first and second memory slot sets are disposed on the printed circuit board. The terminal resistor is disposed between the first and second memory slot sets. The serial resistance is disposed on the printed circuit board and is electrically connected to the first and second memory slot sets through the printed circuit board. The terminal resistor is respectively and electrically connected to the first and second memory slot sets through the printed circuit board. The terminal resistor and the first and second memory slot sets are connected to a terminator voltage.
    Type: Application
    Filed: April 16, 2004
    Publication date: December 16, 2004
    Inventors: Long-Kun Yu, Yao-Hui Wu
  • Patent number: 6824393
    Abstract: A backplane system allowing a very large number of interconnections between high-connectivity printed circuit boards and a backplane is disclosed. The backplane is fragmented into a plurality of backplane parts that comprise connectors on their edges to mate connectors arranged on the high-connectivity printed circuit boards. These backplane parts may also include other connectors on their edges to couple to extension printed circuit boards requiring less interconnections or cables. Interposers can be used to link several backplane parts and provide enhanced air circulation.
    Type: Grant
    Filed: May 22, 2002
    Date of Patent: November 30, 2004
    Assignee: International Business Machines Corporation
    Inventors: Pierre Debord, Rene Glaise, Claude Gomez
  • Publication number: 20040233652
    Abstract: A bladed architecture, backplane-based network (100) having N payload slots (108) includes an N/2 slot switch module (102), wherein the N/2 slot switch module is reconfigurable to one of a left-hand slot switch configuration (603) and a right-hand slot switch configuration (605), and wherein the N/2 slot switch module is coupled to N/2 of the N payload slots such that the bladed architecture, backplane-based network is in a sub-optimal configuration (601).
    Type: Application
    Filed: May 20, 2003
    Publication date: November 25, 2004
    Inventors: Douglas L. Sandy, Mark S. Lanus, Robert C. Tufford
  • Patent number: 6822876
    Abstract: A high-speed router backplane is disclosed. Because of the large number of high-speed conductive traces present in such a backplane, electromagnetic interference (EMI) can be a serious issue. And because such a router consumes significant amounts of power, some provision must exist (e.g., bus bars in the prior art) within the router for distributing power to the router components. In preferred embodiments, power distribution is accomplished using relatively thick (e.g., three- or four-ounce copper) power distribution planes within the same backplane used for high-speed signaling. To shield these planes from EMI, they are preferably placed near the center of the material stack, shielded from the signaling layers by adjacent digital ground planes. Also, where two power supply planes exist, the power supply planes are placed adjacent, further shielded by their respective power return planes.
    Type: Grant
    Filed: February 5, 2002
    Date of Patent: November 23, 2004
    Assignee: Force10 Networks, Inc.
    Inventor: Joel R. Goergen
  • Patent number: 6819571
    Abstract: A circuit card that includes a single ground plane connectable to a chassis-ground and a logic device having a ground pin connected to the single ground plane. The connection between the ground pin and the single ground plane provides a direct path between the logic device and the chassis-ground. A power supply is connected to an input pin of the logic device for providing a logic voltage to the logic device. The power supply is connectable to a battery.
    Type: Grant
    Filed: April 22, 2002
    Date of Patent: November 16, 2004
    Assignee: ADC DSL Systems, INc.
    Inventors: Donald J. Glaser, Douglas G. Gilliland, Dennis J. Vandenberg
  • Patent number: 6816390
    Abstract: An apparatus for guiding a card enclosure into a daughter card enclosure includes a daughter card removeably positioned within a cage for connecting the daughter card with a mother card. A cassette assembly removably positioned with the daughter card enclosure for connection with said daughter card includes a card configured for pluggable signal interconnection with the daughter card. A guide means for guiding the cassette assembly into proper alignment with the daughter card is mountable therewith and an associated stiffener using two mounting locations. The guide means is configured to insure full insertion of said cassette assembly before plugging in the card and insure an unplugged status of the card before extraction of the cassette assembly from the daughter card enclosure.
    Type: Grant
    Filed: November 5, 2003
    Date of Patent: November 9, 2004
    Assignee: International Business Machines Corporation
    Inventors: Dennis R. Barringer, Justin C. Rogers, Harold M. Toffler
  • Patent number: 6815614
    Abstract: The invention provides a subassembly to facilitate co-planar vertical surface mounting of subassembly boards. By “vertically mounting” is meant that a subassembly circuit board with a major surface is mounted perpendicular to the major surface of a circuit motherboard. In accordance with the invention, a subassembly for co-planar vertical surface mounting comprises a subassembly board coupled between a pair of base headers. Advantageously one base header comprises a plurality of mounting lugs secured to a transverse element in a co-planar configuration. The other base header conveniently comprises a plurality of connector pins secured to an elongated header element in co-planar configuration. The two headers interlock with the board to provide connection and co-planar support. A pickup cap attached at the board edge opposite the base permits pick-and-place positioning of the subassembly by conventional equipment without the need for special grippers.
    Type: Grant
    Filed: November 18, 2003
    Date of Patent: November 9, 2004
    Assignee: Power-One Limited
    Inventors: David Keating, Antoin Russell
  • Publication number: 20040218374
    Abstract: A modular and adjustable backplane assembly for providing a fiber-optics backplane interface to a plurality of router cards functioning as a data router is provided. The assembly includes a first portion having a first array of connectors for interfacing with a compatible array of second connectors engaging specific ones of the router cards, and a second portion having a second array of connectors for interfacing with a compatible array of second connectors engaging specific others of the router cards. The mechanics of the assembly enable a moveable attachment with respect to the first and second portions such that they may be positionally adjusted during mounting, and wherein external data paths are provided from individual ones of the connectors to individual others of the connectors by fiber-optic conductors.
    Type: Application
    Filed: June 3, 2004
    Publication date: November 4, 2004
    Inventor: Peter John Doyle
  • Patent number: 6813157
    Abstract: A mother board and a computer system capable of flexibly using the SDRAM and the DDRAM. The mother board has several memory module slots, a voltage comparator, a clock generator and a chip set. Each of the memory module slots comprises a reference voltage pin, and the reference voltage pins of the memory module slots are connected to each other in parallel. The voltage comparator is coupled to the reference voltage pins of the memory module slots to detect whether the voltage at the reference voltage pin is equivalent to a reference voltage. The clock generator is coupled to an output of the voltage comparator. When the voltage at the reference voltage pin is equal to the reference voltage, a differential clock signal is generated, and when the votlage is different from the reference voltage, a normal clock signal is generated. The chip set is coupled to the output of the voltage comparator. When the voltage is equal to the reference voltage, the chip set is operated under a double data rate mode.
    Type: Grant
    Filed: May 28, 2002
    Date of Patent: November 2, 2004
    Assignee: VIA Technologies, Inc.
    Inventor: Nai-Shung Chang
  • Patent number: 6807066
    Abstract: A power supply terminal that prevents damage to capacitors included in a noise filter circuit therein which may occur due to a BWB's warp or thermal stresses at soldering time. The noise filter circuit is formed on a noise filter circuit substrate, being a substrate separate from the BWB. The noise filter circuit substrate is connected conductively to part of each of press fit terminals.
    Type: Grant
    Filed: December 12, 2002
    Date of Patent: October 19, 2004
    Assignee: Fujitsu Limited
    Inventors: Junichi Hayama, Noburo Nakama, Tetsuya Murayama, Kenji Tsutsumi, Satoshi Tojo, Hiroshi Kadoya, Kiyonori Kusuda, Kenji Toshimitsu
  • Publication number: 20040201972
    Abstract: A backplane for a motor controller having a control module and one or more axis modules provides both low power and low powered signals and high power used to produce motor drive signals.
    Type: Application
    Filed: April 11, 2003
    Publication date: October 14, 2004
    Inventor: Phillip John Walesa
  • Publication number: 20040184249
    Abstract: A backplane has a plurality of interface slots that each couple to a number of buses. Depending upon the embodiment, these buses include a power distribution bus, a digital ground bus, an earth ground bus, a system timing bus, a time division multiplexed bus, a system control bus, a hardware resource bus, a media data bus, and one or more network distribution buses. Various modules can be interfaced with the backplane and function independently and/or dependently upon one another, including shelf controllers, switches, and application boards. In one embodiment, the backplane can include two backplanes, wherein the second backplane further provides connections between such modules and one or more external connectors.
    Type: Application
    Filed: March 20, 2003
    Publication date: September 23, 2004
    Applicant: 3Com Corporation
    Inventors: Salvador Aguinaga, Dwight Dipert, Martin Schwan
  • Patent number: 6795885
    Abstract: Apparatus for connecting a plurality of electronic devices with corresponding backplanes to improve reliability of accessing the devices are described. In one embodiment, the apparatus includes first and second backplanes having connectors for at least one device. A device having a plurality of data paths has a first data path coupled to a data path connector of the first backplane. A second data path of the device is coupled to a data path connector of the second backplane. Alternatively, a Y-adapter is used to connect a single data path device to data path connectors of distinct backplanes. In various embodiments, the backplanes lie in a common plane. Alternatively, the backplanes lie in distinct parallel planes.
    Type: Grant
    Filed: June 21, 2001
    Date of Patent: September 21, 2004
    Assignee: Hewlett-Packard Development Company, L.P.
    Inventors: James J. deBlanc, David M. Dickey, James L. White
  • Patent number: 6784526
    Abstract: According to the present invention, for a module in which a plurality of integrated circuit devices are mounted in parallel, the inductance generated by the unit length of a branched signal line on a motherboard is so set that it is smaller for a branched signal line a longer distance from its branching point to its distal end, and is so set that it is larger for a branched signal line having a shorter distance from its branching point to its distal end, so that the time required for transmission of a signal from the branching point to the distal end of each branched signal line is the same.
    Type: Grant
    Filed: July 22, 1998
    Date of Patent: August 31, 2004
    Assignee: Fujitsu Limited
    Inventor: Tsutomu Mezawa
  • Patent number: 6785149
    Abstract: An electronic module having a chassis and a single backplane disposed within the chassis. A plurality of bridge circuit cards is disposed within the chassis and is electrically connected to the single backplane. Each of the plurality of bridge circuit cards is for converting between a local area network protocol and a wide area network protocol. A hub circuit card is disposed within the chassis and is electrically connected to the single backplane so that the hub circuit card is electrically connected to each of the plurality of bridge circuit cards. The single backplane is connectable to each of a plurality of remote units for respectively electrically connecting each of the plurality of remote units to each of the plurality of bridge circuit cards. The single backplane is connectable to a data network for electrically connecting the data network to the hub circuit card.
    Type: Grant
    Filed: August 28, 2002
    Date of Patent: August 31, 2004
    Assignee: ADC DSL Systems, Inc.
    Inventors: Douglas G. Gilliland, Donald J. Glaser, Dennis Patrick Miller
  • Patent number: 6775151
    Abstract: A circuit board is provided with extending portions having terminal patterns formed thereon. A housing contains the circuit board while permitting the extending portions to protrude. A mother board has, formed therein, through holes in which the extending portions are to be inserted, having, formed thereon, wiring pattern that is to be electrically connected to the terminal patterns, and permitting the extending portions to be inserted in the through holes so that the housing is placed thereon. The circuit board is provided with a protruded portion which extends separately from the extending portions and pushes the terminal patterns onto the wiring pattern of the mother board. The mother board is provided with an insertion hole in which the protruded portion is to be inserted being slightly deviated from the positions of the through holes in which the extending portions are to be inserted.
    Type: Grant
    Filed: December 5, 2002
    Date of Patent: August 10, 2004
    Assignee: Alps Electric Co., Ltd.
    Inventor: Norio Suzuki
  • Patent number: 6771515
    Abstract: In some embodiments, the invention includes a system having first and second modules and a circuit board including first and second module connectors to receive the first and second modules, respectively. A first path of conductors extends from the circuit board to the first module connector, to the first module, back to the first module connector, to the circuit board, to the second module connector and to the second module. The first path couples to chips of the first and second modules, and each of the chips include on die terminations, but only some of the chips include on die terminations that are enabled.
    Type: Grant
    Filed: October 4, 2001
    Date of Patent: August 3, 2004
    Assignee: Intel Corporation
    Inventors: James A. McCall, Hing Y. To
  • Patent number: 6771514
    Abstract: An apparatus for protecting an electronic card is described. The apparatus has a protective contact. The protective contact has a contact face that, when the apparatus is in a locked protruding state, makes contact with a first incorrect card slot backplane feature. In the locked protruding state, the contact face extends outward a first distance from a feature of the card that can receive resultant damage if the card is fully inserted into the incorrect card slot. The first distance is greater than a second distance between a second incorrect card slot backplane feature that can cause the resultant damage and the first incorrect card slot backplane feature. The apparatus includes a guide along which the protective contact slides in order to transition between the locked protruding state and a collapsed state. The protective contact extends less outward from the card in the collapsed state as compared to the locked protruding state so as to allow the card to be fully inserted into a correct card slot.
    Type: Grant
    Filed: August 15, 2002
    Date of Patent: August 3, 2004
    Assignee: Cisco Technology, Inc.
    Inventor: Cedric Elg
  • Patent number: 6771935
    Abstract: In order to avoid mechanical assembly problems and transmission of undesired electrical currents among circuit cards or boards in a telecommunications switch or similar digital device, a conventional hard-wired midplane bus is replaced by a wireless bus. The wireless bus includes a radio frequency or light wave transceiver on each card. Antennas on respective cards can either be oriented within direct line-of-sight of each other, or can project into a waveguide which directs the transmitted signals past all the other antennas. For example, the waveguide may be a metal enclosure which surrounds all the cards. Alternatively, respective aligned apertures in the cards can define a continuous transmission path. A data rate exceeding 1 megabit per second and a transmission power on the order of 1 milliWatt are preferred, since the bus is intended for use within a single switch housing.
    Type: Grant
    Filed: October 5, 1998
    Date of Patent: August 3, 2004
    Assignee: Alcatel
    Inventor: Nickolaus E. Leggett
  • Publication number: 20040145879
    Abstract: A CompactPCI blade assembly includes a main printed circuit assembly (PCA), a mezzanine PCA, an electrical connector, and at least one support structure. The main PCA is couplable to a connector plane of a CompactPCI-based computer system. The electrical connector is coupled between the mezzanine PCA and the main PCA. The at least one support structure is mechanically coupled between the main PCA and the mezzanine PCA and establishes a board-to-board distance between the mezzanine PCA and the main PCA of at least one slot unit width.
    Type: Application
    Filed: January 23, 2003
    Publication date: July 29, 2004
    Inventors: James D. Hensley, Kirk M. Bresniker, Glenn C. Simon
  • Patent number: 6768651
    Abstract: A communication device includes a sub-rack unit and a plurality of plug-in units. The sub-rack unit includes a back wiring board having first connectors arranged in lines thereon, and a frame plate including vertical ribs and placed on said back wiring board so that the vertical ribs separate the lines of the first connectors. Each of the plug-in units includes: a printed board including top and bottom sides and parallel first and second sides, the printed board having second connectors provided on the first side thereof; a metal case including top and bottom faces, and parallel first and second side faces so as to cover the printed board; and first and second spring members. Each of said plug-in units is mounted in the sub-rack unit with the first and second connectors being connected so that the first and second side faces of the metal case are pressed outward against the vertical ribs of the frame plate by resilient forces of the first and second spring members, respectively.
    Type: Grant
    Filed: March 20, 2001
    Date of Patent: July 27, 2004
    Assignees: Fujitsu Limited, Fujitsu Denso Ltd.
    Inventors: Tsutomu Takahashi, Katsuya Fujii, Hisao Hayashi, Shiro Tani, Kazunori Oomori, Koichi Namimatsu, Hideki Zenitani, Masato Konishi
  • Patent number: 6760339
    Abstract: The present invention provides a high switching capacity network device in one telco rack including both physical layer switch/router subsystems and an upper layer switch/router subsystem. Instead of providing a single physical layer switch/router subsystem, multiple physical layer switch/router subsystems are provided. Segmenting the physical layer switch/router into multiple, for example, four, subsystems better utilizes routing resources by allowing etches for the physical layer subsystems to be moved away from the center of the mid-plane/back-plane of the network device. Moving the physical layer subsystem etches away from the center of the mid-plane enables the network device to include an upper layer/switch router subsystem with etches toward the center of the mid-plane.
    Type: Grant
    Filed: June 16, 2000
    Date of Patent: July 6, 2004
    Assignee: Equipe Communications Corporation
    Inventors: Chris R. Noel, Terrence S. Pearson, Joe Whitehouse, Corey Simons, Brian Branscomb
  • Patent number: 6757177
    Abstract: A stacked backplane assembly, including two or more backplanes or midplanes having different functionality and combined together so as to form an integral unit, is provided. The backplanes forming the assembly are manufactured with prime and secondary manufacturing holes to enable alignment, so that the resulting tolerance build-up of the assembly is similar to that of a single backplane. Connectors can be arranged on the backplanes of the assembly so that an electronic or optical card can be simultaneously plugged in to one or more of the backplanes that comprise the stacked backplane assembly. The stacked backplane assembly of the embodiments of the invention is illustrated by having power and signal backplanes and midplanes, but can be equally applied to backplanes that provide other types of functionality.
    Type: Grant
    Filed: February 5, 2002
    Date of Patent: June 29, 2004
    Assignee: Tropic Networks Inc.
    Inventors: Mark Roy Harris, Rodney Stephen Batterton
  • Patent number: 6749439
    Abstract: A riser card, such as a peripheral component interconnect (PCI) card, attaches to a circuit board such as a mother board in a transverse orientation and has a first connector and a second connector attached to opposing sides of the card for receiving expansion cards. In one embodiment, the first connector is offset from the second connector with respect to an axis in the plane of the riser card. In another embodiment, the first and second connectors each have a first and last pin, and the first pin of the first card is opposite the first pin of the second connector. The riser card may mount one expansion board right side up, and the second board upside down. The first and second connectors can be female connectors which are each matable with a male connector on the corresponding expansion board, or can be card edge connectors. The expansion boards, when mated with the connectors, are substantially parallel to, but offset from the circuit board.
    Type: Grant
    Filed: January 7, 2003
    Date of Patent: June 15, 2004
    Assignee: Network Engineers, Inc.
    Inventors: David Potter, Jerry Jarvis, Robert Wiley
  • Publication number: 20040109299
    Abstract: A sensor array includes a substrate including a front side and a back side, a plurality of transducers fabricated on the front side of the substrate, a plurality of input/output connections positioned on the back side of the substrate, the input/output connections electrically coupled to the transducers, at least one electronic device, and an interposer positioned between the substrate and the electronic device, the interposer including a multilayer interconnect system configured to electrically connect the input/output connections to the electronic device.
    Type: Application
    Filed: December 6, 2002
    Publication date: June 10, 2004
    Inventors: William E. Burdick, James W. Rose, Donna M. Sherman, James E. Sabatini, George Edward Possin
  • Patent number: 6747878
    Abstract: A network interface card including a first printed circuit board is provided. First and second connectors may be coupled with the first printed circuit board, and a plurality of ethernet communications links may form at least a portion of a coupling between the first and second connectors. The first connector may be configured to receive a third connector associated with a midplane. A chip may be coupled with the first printed circuit board wherein the plurality of ethernet communications links couple the first connector with the chip. A second communication link may also be provided which couples the chip and the second connector. In accordance with one embodiment of the present invention the chip consolidates data received through the first connector for distribution of the data to the second connector. A single board computer may be coupled with the first printed circuit board, and a third communication link may couple the chip with the single board computer.
    Type: Grant
    Filed: July 20, 2000
    Date of Patent: June 8, 2004
    Assignee: RLX Technologies, Inc.
    Inventors: Christopher G. Hipp, Walter L. Johnston, Jr., Guy B. Irving, David M. Kirkeby, Walter R. Otto
  • Publication number: 20040105242
    Abstract: A stackable module for a processor system including a support plate with a set of topside circuit components mounted to its topside, and topside and underside connectors. The module is stackable with other such modules and are provided with conductive tracks that are arranged to convey transport stream data and transport stream control signals between modules in a stack. A stack of such modules in a processor system is also provided.
    Type: Application
    Filed: November 17, 2003
    Publication date: June 3, 2004
    Applicant: STMicroelectronics Limited
    Inventor: Paul Evans
  • Patent number: 6735090
    Abstract: A memory device is constructed by connecting a plurality of flat high-speed memory modules each including a connector on one side of which input side and output side terminals for dealing with a high-speed signal of plural-bit width whose impedance is controlled and which is transmitted from a memory controller to a terminal resistor are arranged. The memory device in which memory modules can be cascade-connected and which can maintain the impedance of a memory bus signal in a constant value by use of an inexpensive multi-layered circuit board structure is provided. A socket mounting structure of the memory device and a mounting method of the memory device is provided.
    Type: Grant
    Filed: September 1, 2000
    Date of Patent: May 11, 2004
    Assignee: Kabushiki Kaisha Toshiba
    Inventor: Masahiko Kasashima
  • Patent number: 6731515
    Abstract: A riser card assembly for coupling two or more peripheral cards to a motherboard. The riser card assembly routes all necessary signal lines to each of the peripheral cards disposed thereon and, therefore, a customized motherboard is not required to achieve a small form factor. The riser card assembly includes a mounting portion and at least one routing portion. The mounting portion is secured in a card connector on the motherboard and includes a plurality of secondary card connectors, each secondary card connector for receiving a peripheral card. The mounting portion couples the signal lines at the card connector in which it is inserted to one of its secondary card connectors. The routing portion couples the signal lines from at least one adjacent card connector on the motherboard to the mounting portion, the mounting portion routing those signal lines to another one of its secondary card connectors.
    Type: Grant
    Filed: March 30, 2001
    Date of Patent: May 4, 2004
    Assignee: Intel Corporation
    Inventor: Monte J. Rhoads
  • Patent number: 6724082
    Abstract: In some embodiments, the invention includes a system having first and second modules; and a circuit board including first and second module connectors to receive the first and second modules, respectively. A first path of conductors extending from the circuit board to the first module connector, to the first module, back to the first module connector, to the circuit board, to the second module connector and to the second module, and wherein the first path in the first module couples to stubs for first and second chips of the first module and the first path in the second module couples to stubs for first and second chips of the first module; and each of the first and second chips include selectable on die terminations.
    Type: Grant
    Filed: July 23, 2001
    Date of Patent: April 20, 2004
    Assignee: Intel Corporation
    Inventors: James A. McCall, Hing Y. To, Michael W. Leddige
  • Patent number: 6724636
    Abstract: Disclosed herein is an electronic device including a cabinet and a shelf accommodated in the cabinet. The shelf has a floating mechanism and a plurality of guide rails for guiding a plurality of printed circuit board units. The floating mechanism includes a plurality of holes formed through the shelf, each of the holes having a first diameter; a plurality of tapped holes formed through the cabinet so as to respectively correspond to the holes of the shelf; and a plurality of screws inserted through the holes of the shelf and threadedly engaged with the tapped holes of the cabinet, respectively, each of the screws having a second diameter smaller than the first diameter. The cabinet has a plurality of first guide pins, and the shelf has a plurality of second guide pins each having a diameter smaller than that of each first guide pin.
    Type: Grant
    Filed: October 2, 2002
    Date of Patent: April 20, 2004
    Assignee: Fujitsu Limited
    Inventors: Michiyuki Yamamoto, Masaki Yoshimaru
  • Publication number: 20040070958
    Abstract: A PCB having a card slot receiving a card provided with signal input/output pins and a circuit element to provide extended capability is inserted, and having data transmission pins, a power pin and a ground pin in correspondence to the signal input/output pins, comprises an electronic device internally provided for impedance matching with the card, and having a first end connected to one of the data transmission pins and a second end connected to one of the power pin and the ground pin. With this configuration, a card slot internally comprises an electronic device for impedance matching, so that a space of the PCB can be efficiently utilized.
    Type: Application
    Filed: May 27, 2003
    Publication date: April 15, 2004
    Applicant: Samsung Electronics Co., Ltd.
    Inventors: Jin-Kwon Park, Chan-Youn Won
  • Publication number: 20040066638
    Abstract: The invention is related to the computer science and may be used in the design of miniature high-performance computing systems. The purpose of the invention is to increase the IC stuffing density and to reduce the microelectronic module assembly effort. The multilayered hybrid electronic module contains a backplane with multilayer wiring with ICs and sockets installed. A socket body is a box of elastic dielectric material, whose vertical walls have vertical metallized contact slots connected to the contact pads on the outer bottom surface of the socket. IC packages to be installed in the sockets have a rigid peripheral frame with cylindrical leads on the perimeter. The leads are parallel to the base of the package and lie in the same plane. Dimensions and shape of the IC package correspond to those of the socket cavity. Dimensions and positions of the IC leads correspond to those of the contact slots.
    Type: Application
    Filed: June 20, 2003
    Publication date: April 8, 2004
    Inventor: Nikolai Victorovich Streltsov
  • Patent number: 6717825
    Abstract: Two connector printed circuit boards with electrical connections are mounted on opposite sides of a mid-plane printed circuit board at angles to each other. Via holes are positioned on the faces of the mid-plane board according to one of two schemes. In the first scheme, the via holes are positioned along an axis perpendicular to an axis that bisects the angle of misalignment of the connector boards, and the via holes are equidistant from a point on the axis that bisects the angle of misalignment of the connector boards. In the second scheme, the via holes are positioned along an axis that bisects the angle of misalignment of the connector boards, and the via holes are equidistant from the electrical connections.
    Type: Grant
    Filed: January 18, 2002
    Date of Patent: April 6, 2004
    Assignee: FCI Americas Technology, Inc.
    Inventor: James R. Volstorf
  • Publication number: 20040062018
    Abstract: The present invention is related to a Compact Peripheral Component Interconnect (cPCI) front panel assembly that is adapted to keep its corresponding cPCI front card's printed circuit board from bending. The cPCI front panel assembly should make its corresponding printed circuit board stronger to prevent circuit board damage and to maintain the cPCI front card envelope standard even before the card is inserted into the card slot. The front panel assembly should be stronger than its corresponding cPCI front card's circuit board. The front panel couples its stronger strength with its weaker circuit board. In addition, the front panel assembly prevents the bending of its corresponding circuit board at the upper, middle, and lower portions. The present invention provides the important advantage of protecting the cPCI front card even before the card is inserted into a card cage.
    Type: Application
    Filed: September 27, 2002
    Publication date: April 1, 2004
    Applicant: SUN MICROSYSTEMS, INC.
    Inventor: Peter Cuong Dac Ta
  • Patent number: 6711022
    Abstract: A modular electronic chassis system with nested electronic plug-in modules including at least one circuit board providing a first-module-receiving-location and a second-module-receiving-location such that the system is capable of supporting modules in a nested configuration having increased packaging density. A first plug-in module detachably engaged with the first-module-receiving-location. A second plug-in module detachably engaged with the second-module-receiving-location so that the first plug-in module and the second plug-in module are nested.
    Type: Grant
    Filed: May 13, 2002
    Date of Patent: March 23, 2004
    Assignee: General Instrument Corporation
    Inventors: Steven F. Frederick, Kimberly A. Smedley, Ronald L. Gebhardt, Jr., Douglas A. Tenney
  • Patent number: 6710266
    Abstract: A technique to simultaneously reduce high-frequency insertion loss and cross-talk for a multi-layered add-in card is disclosed. The technique is based on selective removal of ground and power planes beneath the edge fingers. This selective removal of power and ground planes removes excess capacitance at the edge fingers, lowering the insertion loss at high frequencies, while maintaining an impedance match with an associated connector. Simultaneously, the leftover metallic ground/power plane provides electromagnetic shielding and thus reduces the cross-talk between the differential pairs. Optimum performance of the connector with minimized insertion loss and cross-talk can be obtained for high-speed analog and digital applications.
    Type: Grant
    Filed: July 26, 2002
    Date of Patent: March 23, 2004
    Assignee: Intel Corporation
    Inventors: Jason A. Mix, Yun Ling, Alok Tripathi, Kent E. Mallory
  • Patent number: 6711028
    Abstract: A switching device and a method for the configuration thereof is disclosed. A first aspect of the present invention comprises a switching device. The switching device comprises at least one line card and at least one switching card. The device includes a mid-plane coupled to the at least one line card and the at least one switching card. The A second aspect of the invention comprises a method for configuring a switching device. The method for configuring a switching device comprises providing a mid-plane, and providing at least one switching card and at least one line card on the mid-plane. The at least one switching card and the at least one line card are perpendicular to each other.
    Type: Grant
    Filed: January 30, 2002
    Date of Patent: March 23, 2004
    Assignee: Dune Networks
    Inventor: Ofer Iny
  • Patent number: 6711027
    Abstract: In some embodiments, the invention includes a module including a circuit board and first and second groups of conductors supported by the circuit board. A first group of chips each include on die terminations that are enabled. At least some of a second group of chips have on die terminations that are disabled. The first group of chips are coupled to conductors of the first group of conductors and the second group of chips are coupled to conductors of the second group of conductors, and wherein the second group of conductors have higher impedances than do the first group of conductors.
    Type: Grant
    Filed: October 4, 2001
    Date of Patent: March 23, 2004
    Assignee: Intel Corporation
    Inventors: James A. McCall, Hing“Thomas” Y. To
  • Patent number: 6690584
    Abstract: An information-processing device comprises at least one crossbar-board; a plurality of back panels detachably connected electrically and mechanically to different sides of the crossbar-board; and at least one motherboard detachably connected electrically and mechanically to each of the back panels. The crossbar-board has a switching element mounted thereon. The motherboard has an information-processing semiconductor element mounted thereon.
    Type: Grant
    Filed: March 20, 2001
    Date of Patent: February 10, 2004
    Assignee: Fujitsu Limited
    Inventors: Yoshinori Uzuka, Yoshihiro Morita, Koji Hanada, Hajime Murakami, Yasushi Masuda
  • Patent number: 6683792
    Abstract: A communication apparatus including a metallic shelf having a pair of side plates, a back wiring board mounted in the shelf on the back side thereof and having a plurality of first connectors and a solid ground pattern, and upper and lower guide plates mounted in the shelf, each guide plate having a plurality of guide rails and a plurality of vent holes. A first shield board having numerous openings is mounted on the upper guide plate, and a second shield board having numerous openings is mounted on the lower guide plate. A plurality of plug-in units are mounted in the shelf so as to be inserted along the guide rails of the upper and lower guide plates.
    Type: Grant
    Filed: November 14, 2002
    Date of Patent: January 27, 2004
    Assignee: Fujitsu Limited
    Inventors: Takashi Shirakami, Naoya Yamazaki, Kazuhiro Iino, Yoshiaki Tada, Hiroshi Katagiri, Yoshinori Hoshino
  • Patent number: 6683793
    Abstract: A backplane is disclosed for attaching storage devices to the backplane that utilize removable media. The backplane is distributed and scalable. The backplane includes a generally horizontal portion for distributing electronic signals to the storage devices and a plurality of connectors coupled to said generally horizontal portion for receiving the storage devices. The storage devices are coupled to the backplane utilizing the generally horizontal portion. The storage devices are not coupled to the backplane utilizing a front or a back of any one of the storage devices such that the front and back of each storage device remain accessible when the storage devices are coupled to the backplane.
    Type: Grant
    Filed: December 13, 2002
    Date of Patent: January 27, 2004
    Assignee: Storage Technology Corporation
    Inventors: James P. Campbell, Bernard A. Johnson, Donald Robert Manes, Kenneth Lee Manes
  • Patent number: 6677687
    Abstract: A system for distributing power in a compact peripheral component interconnect (CPCI) computer architecture is provided. A CPCI computer architecture comprises a plurality of CPCI systems each having respective backplanes. The backplanes further having respective local power rails providing power for a corresponding one of the plurality of CPCI systems. The power distribution system provides power to the backplanes, and comprises a common power rail connected to each one of the local power rails of the backplanes. A plurality of power supplies is connected to the common power rail of the power distribution system. Power taken from any one of the plurality of power supplies is available to any one of the backplanes.
    Type: Grant
    Filed: October 23, 2001
    Date of Patent: January 13, 2004
    Assignee: Sun Microsystems, Inc.
    Inventors: Raymond K. Ho, Richard R. Creason, Victor E. Jochiong
  • Patent number: 6674649
    Abstract: In some embodiments, the invention includes a system having first and second modules and a circuit board including first and second module connectors to receive the first and second modules, respectively. The system includes a first path of conductors extending from the circuit board to the first module connector, to the first module, back to the first module connector, to the circuit board, to the second module connector, to the second module, and to on module terminations of the second module; and a second path of conductors extending from the circuit board to the second module connector, to the second module, back to the second module connector, to the circuit board, to the first module connector, to the first module, and to on module terminations of the first module.
    Type: Grant
    Filed: July 23, 2001
    Date of Patent: January 6, 2004
    Assignee: Intel Corporation
    Inventors: James A. McCall, Hing Thomas Y. To
  • Patent number: 6674648
    Abstract: In some embodiments, the invention includes a termination card having a substrate having groups of fingers on a first side of the substrate and groups of fingers on a second side of the substrate and wherein some of the groups of fingers on the first side and some of the groups of fingers on the second side are connected through module connectors, and others of the groups of fingers on the first side are coupled to on module terminations on the first side.
    Type: Grant
    Filed: July 23, 2001
    Date of Patent: January 6, 2004
    Assignee: Intel Corporation
    Inventors: James A. McCall, Bryce D. Horine, Hing Thomas Y. To
  • Publication number: 20040001328
    Abstract: A back plane structure for SCSI used in server or array storing machine comprises a plate member including two stacked layers of PCB and an opening therethrough for fluid communication with the outside, at least two connectors on the plate member that are in electrical connection therewith for obtaining power for normal operation, and a plurality of cables respectively interconnecting the connectors. With the provision of an opening, the invention can sufficiently dissipate heat accumulated in the server during operation.
    Type: Application
    Filed: June 26, 2002
    Publication date: January 1, 2004
    Inventor: Chun Liang Lee