Plural Contiguous Boards Patents (Class 361/792)
  • Patent number: 8978245
    Abstract: A method includes securing a midplane to a bracket disposed between a first and second ends of a chassis, wherein a first surface of the midplane engages the bracket and faces the first end of the chassis. A first electronic device is secured within the first end of the chassis with a first device connector coupled to a first midplane connector on the first surface of the midplane and a first device latch secured directly to a first slot in the chassis adjacent the first end. A sub-chassis is secured within the second end of the chassis, wherein the sub-chassis has a proximal end that engages a second surface of the midplane. Furthermore, a second electronic device is secured within the sub-chassis with a second device connector coupled to a second midplane connector on the second surface of the midplane and a second device latch secured directly to a slot in the sub-chassis adjacent the distal end of the sub-chassis.
    Type: Grant
    Filed: December 30, 2012
    Date of Patent: March 17, 2015
    Assignee: Lenovo Enterprise Solutions (Singapore) Pte. Ltd.
    Inventors: Karl K. Dittus, David J. Jensen, Brian A. Trumbo
  • Publication number: 20150062855
    Abstract: A hybrid circuit assembly includes an integrated metal substrate (IMS) having high-voltage, high-power components mounted thereon. The IMS includes a metal base plate an insulating adhesive on the metal base plate, and one or more wiring layers on the insulating adhesive. The hybrid circuit assembly includes a multi-layer printed wiring board (PWB) having low-voltage, low-power components mounted thereon. The multi-layer PWB is connected to the IMS and has an upper surface that is co-planar with an upper surface of the IMS. The PWB is mounted on the metal base plate via the insulating adhesive.
    Type: Application
    Filed: September 3, 2013
    Publication date: March 5, 2015
    Applicant: RAYTHEON COMPANY
    Inventors: Peter D. Morico, John D. Walker
  • Patent number: 8964219
    Abstract: An image forming apparatus includes an installation section, a control board, a first connection terminal provided on an outer surface of the control board, a first electrical connection member provided on the installation section and electrically connected to a point of reference potential, a substrate installable in the installation section in a thickness direction of the control board, an external connection terminal provided on the substrate and externally exposed, a second connection terminal provided on a first surface of the substrate and connected to the first connection terminal when the substrate is installed into the installation section, and a second electrical connection member provided on a second surface of the substrate. The second electrical connection member makes contact with the first electrical connection member and is electrically connected to the point of reference potential via the first electrical connection member when the substrate is installed into the installation section.
    Type: Grant
    Filed: January 31, 2012
    Date of Patent: February 24, 2015
    Assignee: Fuji Xerox Co., Ltd.
    Inventor: Tetsuo Ishizuka
  • Patent number: 8958214
    Abstract: Mechanisms for interconnecting and distributing signals and power between PCBs are provided. A first PCB having land grid arrays (LGAs) and a first wiring layer designed for interconnect components on the first PCB, and a second wiring layer for connecting the components to a second PCB, are provided. The second PCB has opposed parallel first and second surfaces, the first surface having a LGA. A wiring layer designed to interconnect components on the second PCB, and a layer for interconnecting the components on the second PCB with the components on the first PCB, are provided. A first interposer couples to a LGA of a first surface of the first PCB and connects a component to the first PCB. A second interposer is sandwiched between and couples to a LGA of a second surface of the first PCB and to the LGA of the first surface of the second PCB.
    Type: Grant
    Filed: September 12, 2012
    Date of Patent: February 17, 2015
    Assignee: International Business Machines Corporation
    Inventors: John L. Colbert, Arvind K. Sinha, Roger D. Weekly
  • Patent number: 8952265
    Abstract: An EMI noise reduction package board, having a top layer and a bottom layer, one of which having a semiconductor device mounted thereon, can include: a first area having a signal layer arranged on one surface thereof; and a second area placed on a lateral side of the first area and having unit structures arranged repeatedly therein, the unit structures configured for inhibiting EMI noise from being radiated to an outside through the lateral side of the first area. The unit structure can include: a top conductive plate and a bottom conductive plate, formed, respectively, on the top layer and the bottom layer of the second area to face each other in a pair; and a via, connecting the top conductive plate with the bottom conductive plate.
    Type: Grant
    Filed: August 21, 2012
    Date of Patent: February 10, 2015
    Assignee: Samsung Electro-Mechanics Co., Ltd.
    Inventors: Han Kim, Dae-Hyun Park, Young-Min Ban
  • Patent number: 8946892
    Abstract: A semiconductor package includes a package substrate including a first wiring embedded in the package substrate, a second wiring embedded in the package substrate, the second wiring electrically insulated from the first wiring, and a capacitor embedded in the package substrate, the capacitor including a first electrode electrically connected to the first wiring and a second electrode electrically connected to the second wiring. At least a first semiconductor chip is disposed on the package substrate. A plurality of connection terminals are disposed between the package substrate and the first semiconductor chip and contact the package substrate, and form at least a first group of at least two connection terminals formed continuously adjacent to each other and electrically connected to the first wiring, and at least a second group of at least two connection terminals formed continuously adjacent to each other and electrically connected to the second wiring.
    Type: Grant
    Filed: October 14, 2011
    Date of Patent: February 3, 2015
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Yonghoon Kim, Jihyun Lee
  • Patent number: 8942005
    Abstract: An electronics module is provided for utilization onboard an airborne object. In one embodiment, the electronics module includes a housing having a cavity therein, a first printed circuit board (PCB) disposed in the cavity, a second PCB disposed in the cavity above the first PCB, and a supportive interconnect structure. The supportive interconnect structure includes a substantially annular insulative body and a plurality of vias. The substantially annular insulative body extends around an inner circumferential portion of the housing between the first PCB and the second PCB to support the second PCB and to axially space the second PCB from the first PCB. The plurality of vias is formed through the substantially annular insulative body and electrically couples the first PCB to the second PCB.
    Type: Grant
    Filed: May 21, 2009
    Date of Patent: January 27, 2015
    Assignee: Raytheon Company
    Inventor: Chris E. Geswender
  • Publication number: 20150022990
    Abstract: Two system boards may be connected by a blind plug connector assembly. The top system board supports a first connector and has a hole adjacent the first connector that secures a guide bracket. The blind plug connector assembly is selectively received in the guide bracket to position a proximal connector on the assembly for connecting to the first connector on the top system board and position a distal connector on the assembly for connecting to a second connector on the lower system board. A flexible wired connection extends within the assembly between the proximal connector and the distal connector, and may form a scalability cable. The interaction between the assembly and the guide bracket provide alignment of the connectors.
    Type: Application
    Filed: July 18, 2013
    Publication date: January 22, 2015
    Inventors: Michael D. French, JR., Edward J. McNulty, Tony C. Sass, Paul A. Wormsbecher
  • Patent number: 8934261
    Abstract: High density electronic device assemblies and techniques for forming high density electronic device assemblies are disclosed. These assemblies and techniques can be used to form compact electronic devices. In one embodiment, substrate arrangements that include a multiple-part substrate can be used to form a high density electronic device assembly. In another embodiment, one or more clips can be used in a high density electronic device assembly to provide mechanical and electrical interconnection between electrical structures that are to be removably coupled together as parts of the high density electronic device assembly. In still another embodiment, a removable cap (and a method for forming the removable cap) can be used for an electronic device housing.
    Type: Grant
    Filed: June 23, 2009
    Date of Patent: January 13, 2015
    Assignee: Apple Inc.
    Inventors: Wey-Jiun Lin, Kevin Pan, Conrado Sacluti de la Cruz
  • Patent number: 8934262
    Abstract: A wiring board including a first rigid wiring board having an accommodation portion and a conductor, a second rigid wiring board accommodated in the accommodation portion of the first rigid wiring board and having a conductor electrically connected to the conductor of the first rigid wiring board, and an insulation layer formed on the first rigid wiring board and the second rigid wiring board. The accommodation portion of the first rigid wiring board has wall surfaces tapering from a first surface of the first rigid wiring board to a second surface on the opposite side of the first surface, and the second rigid wiring board has side surfaces tapering such that the side surfaces of the second rigid wiring board substantially fit into the wall surfaces of the accommodation portion of the first rigid wiring board.
    Type: Grant
    Filed: September 22, 2011
    Date of Patent: January 13, 2015
    Assignee: Ibiden Co., Ltd.
    Inventors: Masakazu Aoyama, Hidetoshi Noguchi
  • Patent number: 8928114
    Abstract: A discrete Through-Assembly Via (TAV) module includes a substrate, and vias extending from a surface of the substrate into the substrate. The TAV module is free from conductive features in contact with one end of each of the conductive vias.
    Type: Grant
    Filed: January 17, 2012
    Date of Patent: January 6, 2015
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Chih-Hua Chen, Chen-Shien Chen, Ching-Wen Hsiao
  • Patent number: 8923003
    Abstract: An electronic device may contain components such as flexible printed circuits and rigid printed circuits. Electrical contact pads on a flexible printed circuit may be coupled electrical contact pads on a rigid printed circuit using a coupling member. The coupling member may be configured to electrically couple contact pads on a top surface of the flexible circuit to contact pads on a top surface of the rigid circuit. The coupling member may be configured to bear against a top surface of the flexible circuit so that pads on a bottom surface of the flexible circuit rest against pads on a top surface of the rigid circuit. The coupling member may bear against the top surface of the flexible circuit. The coupling member may include protrusions that extend into openings in the rigid printed circuit. The protrusions may be engaged with engagement members in the openings.
    Type: Grant
    Filed: February 6, 2012
    Date of Patent: December 30, 2014
    Assignee: Apple Inc.
    Inventors: Alexander D. Schlaupitz, Joshua G. Wurzel
  • Patent number: 8923011
    Abstract: A combination of an interconnect board and a module board for connecting a plurality of electronic modules to a processing unit is described. The interconnect board comprises a plurality of interconnect data lines connected between a plurality of interconnect board input terminals and interconnect board output terminals. The module board comprises at least one electronic module connected to a module connection input terminal, a plurality of module board data lines connected between a plurality of module board input terminals and a plurality of module board output terminals, and an unconnected module board output terminal. A first one of the interconnect board output terminals is connectable to the module connection input terminal, and the unconnected module board output terminal is connectable to one of the interconnect board input terminals.
    Type: Grant
    Filed: November 7, 2011
    Date of Patent: December 30, 2014
    Assignee: Kathrein-Werke KG
    Inventors: Lothar Schmidt, Christoph Kutscher
  • Publication number: 20140362553
    Abstract: A reconfigurable advanced rapid-prototyping environment (RARE) solution provides a three-dimensional (x, y, z) interconnection fabric that is a modular, reconfigurable, fully scalable high performance computing architecture. RARE allows processing nodes (modules) to communicate with other processing nodes (modules) in a three-dimensional mesh architecture where every processing node (module) has access to all other nodes (modules) in the system. The RARE architecture is a modular form-factor design which is fully stand-alone. It does not require the use of a backplane or chassis infrastructure for connectivity. RARE is widely scalable and provides full cross-channel communication in all three dimensions (x, y, z). RARE yields a scalable and morphable hardware architecture for a processing system where the system can scale by one module at a time without limit and it can take on any shape and those shapes can be easily changed.
    Type: Application
    Filed: June 6, 2013
    Publication date: December 11, 2014
    Inventor: Lawrence James Scally
  • Patent number: 8898362
    Abstract: A lane jumper for transmitting at least one lane from a first interface to a second interface is disclosed. The at least one lane is connected with the first interface. The first interface defines a first pin group and a second pin group, and the second interface defines a third pin group connected with the second pin group. The lane jumper includes a fourth pin group and a fifth pin group, wherein the fourth pin group and the fifth pin group of the lane jumper are configured for being respectively connected with the first pin group and the second pin group. The at least one lane is transmitted from the first interface to the second interface sequentially through the first pin group, the fourth pin group, the fifth pin group, the second pin group, and the third pin group.
    Type: Grant
    Filed: September 1, 2011
    Date of Patent: November 25, 2014
    Assignee: Hon Hai Precision Industry Co., Ltd.
    Inventor: Zheng-Heng Sun
  • Patent number: 8897030
    Abstract: An expansion apparatus includes a first connector having first power pins and first signal pins, and a second connector having second power pins and second signal pins. A power circuit is connected to the first and second power pins. A serial advanced technology attachment (SATA) expansion controller is connected to the first and second signal pins. First control chips are connected to the SATA expansion controller and the power circuit. First storage chips are connected to the first control chips and the power circuit. A third connector has third power pins corresponding to second power pins, and third signal pins corresponding to second signal pins. Second control chips are connected to the third power pins and the third signal pins. Second storage chips are connected to the second control chips and the third power pins.
    Type: Grant
    Filed: March 14, 2013
    Date of Patent: November 25, 2014
    Assignees: Hong Fu Jin Precision Industry (ShenZhen) Co., Ltd., Hon Hai Precision Industry Co., Ltd.
    Inventor: Meng-Liang Yang
  • Patent number: 8885357
    Abstract: A multi-layer printed circuit board has a number of landing pads that are configured to engage a connector secured thereto. Between the landing pads associated with different signals is at least one micro via that is electrically connected to a ground plane on an outer surface of the multi-layer printed circuit board, and a ground plane on an inner layer of the multi-layer printed circuit board.
    Type: Grant
    Filed: January 6, 2012
    Date of Patent: November 11, 2014
    Assignee: Cray Inc.
    Inventors: Hyunjun Kim, Jeffrey S. Conger, Gregory E. Scott
  • Patent number: 8885349
    Abstract: A daughter circuit board of a brushless DC motor for interface signal conversion, having circuit units integrated on the daughter circuit and eight ports for communicating with a control system of a user terminal. The daughter circuit board is plugged into a motor controller for signal conversion so that the motor controller communicates with the control system of the user terminal. The eight ports include a signal input port of analog control, a signal port for activating a fan mode, signal ports of speed feedback, a reserved signal port, a port of COM, a port of DC power supply, and a R/T port.
    Type: Grant
    Filed: January 8, 2013
    Date of Patent: November 11, 2014
    Assignee: Zhongshan Broad-Ocean Motor Co., Ltd.
    Inventors: Yong Zhao, Xiansheng Zhang
  • Patent number: 8867231
    Abstract: An electronic module package that includes an electronic module configured to receive input signals and process the input signals to provide output signals. The module package also includes an interposer having a board substrate with opposite mounting and substrate surfaces. The mounting surface has a mounting array of electrical contacts. The substrate surface has a module array of electrical contacts and a component array of electrical contacts. The electronic module is attached to the substrate surface and electrically coupled to the module array. The interposer includes first conductive pathways that electrically couple the module array and the mounting array and also includes second conductive pathways that electrically couple the module array and the component array.
    Type: Grant
    Filed: January 13, 2012
    Date of Patent: October 21, 2014
    Assignee: Tyco Electronics Corporation
    Inventors: Lee Jacobo Jose Roitberg, Terry R. Billger
  • Patent number: 8853547
    Abstract: A flexible printed circuit board, in particular for the spatial connection of electronic components, includes a carrier foil (1), several bonding surfaces (10) arranged on a solder side (4) of the carrier foil (1), and several soldering surfaces (2) arranged on a bonding side (12) of the carrier foil (1) opposite the solder side. The soldering surfaces (2) are connected to the bonding surfaces (10) via electrical strip conductors, and a stiffening plate (3) is inseparably connected to the carrier foil (1) on the solder side thereof.
    Type: Grant
    Filed: October 9, 2009
    Date of Patent: October 7, 2014
    Assignees: Conti Temic microelectronic GmbH, Carl Freudenberg KG
    Inventors: Andreas Voegerl, Tilo Liebl, Gerhard Bauer, Marion Gebhardt, Alexander Wenk, Matthias Wieczorek, Juergen Henniger, Karl-Heinz Baumann
  • Patent number: 8848389
    Abstract: An electronic device provided with a plurality of circuit boards uses a support member for supporting the circuit boards as the transmission path of a wireless signal. For example, the electronic device is provided with a first printed circuit board for processing a millimeter-wave signal, a second printed circuit board which is signal-coupled to the printed circuit board and receives the millimeter-wave signal to subject the received signal to signal processing, and a waveguide which is disposed with a predetermined dielectric constant between the printed circuit boards, wherein the waveguide constitutes the dielectric transmission path, and the waveguide supports the printed circuit boards. This configuration makes it possible to receive the electromagnetic wave based on a millimeter-wave signal radiated from one end of the waveguide constituting the dielectric transmission path, at the other end thereof.
    Type: Grant
    Filed: September 15, 2009
    Date of Patent: September 30, 2014
    Assignee: Sony Corporation
    Inventors: Hirofumi Kawamura, Yasuhiro Okada
  • Patent number: 8842440
    Abstract: A method for manufacturing a printed circuit board includes forming an opening portion in a substrate, positioning chip capacitors in the opening portion of the substrate such that the chip capacitors are accommodated in the opening portion of the substrate, forming a buildup structure including an interlayer resin insulating layer and a conductive layer over a surface of the substrate and the chip capacitors accommodated in the opening portion of the substrate, and forming on a surface of the buildup structure bump structures positioned to mount an IC chip such that the chip capacitors in the opening portion of the substrate are positioned directly below the IC chip.
    Type: Grant
    Filed: June 28, 2013
    Date of Patent: September 23, 2014
    Assignee: Ibiden Co., Ltd.
    Inventors: Yasushi Inagaki, Motoo Asai, Dongdong Wang, Hideo Yabashi, Seiji Shirai
  • Patent number: 8835774
    Abstract: According to an aspect of the invention, there is provided a circuit board assembly including a first circuit board including a first circuit pattern formed on a surface of the first circuit board, and an opening that is adjacent to the first circuit pattern; and a second circuit board including a second circuit pattern corresponding to the first circuit pattern and a protection film that is applied to a surface of the second circuit board so as to form a hollow place located corresponding to the opening, wherein the first circuit board and the second circuit board are combined with each other.
    Type: Grant
    Filed: October 28, 2011
    Date of Patent: September 16, 2014
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Hyun-seok Kim, Inh-seok Suh, Tak-kyoum Kim
  • Patent number: 8830689
    Abstract: Disclosed herein is an interposer-embedded printed circuit board, including: a substrate including a cavity formed in one side thereof and having a predetermined height in a thickness direction of the substrate; an interposer disposed in the cavity and including a wiring region and an insulating region; and a circuit layer formed in the substrate and including a connection pattern connected with one side of the wiring region. The interposer-embedded printed circuit board is advantageous in that an interposer is embedded in a substrate, so that the thickness of a semiconductor package can be reduced, thereby keeping up with the trend of slimming the semiconductor package.
    Type: Grant
    Filed: September 15, 2011
    Date of Patent: September 9, 2014
    Assignee: Samsung Electro-Mechanics Co., Ltd.
    Inventors: Jin Gu Kim, Mi Jin Park, Young Ho Kim, Seung Wook Park, Hee Kon Lee, Young Do Kweon
  • Patent number: 8824159
    Abstract: A Three-Dimensional Structure (3DS) Memory allows for physical separation of the memory circuits and the control logic circuit onto different layers such that each layer may be separately optimized. One control logic circuit suffices for several memory circuits, reducing cost. Fabrication of 3DS memory involves thinning of the memory circuit to less than 50 ?m in thickness and bonding the circuit to a circuit stack while still in wafer substrate form. Fine-grain high density inter-layer vertical bus connections are used. The 3DS memory manufacturing method enables several performance and physical size efficiencies, and is implemented with established semiconductor processing techniques.
    Type: Grant
    Filed: March 31, 2009
    Date of Patent: September 2, 2014
    Inventor: Glenn J. Leedy
  • Patent number: 8824163
    Abstract: Provided is a structure and disposing method of a radio frequency (RF) layered module using three dimensional (3D) vertical wiring. A first wafer in the RF layered module having the 3D vertical wiring may include a first RF device and at least one first via-hole. A second wafer may include a second RF device and at least one second via-hole disposed at a location corresponding to the at least one first via-hole. A vertical wiring may connect the at least one first via-hole and the at least one second via-hole. The vertical wiring may be configured to be connected to an external device through a bottom surface of the at least one first via-hole or a top surface of the at least one second via-hole.
    Type: Grant
    Filed: August 25, 2011
    Date of Patent: September 2, 2014
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Young Il Kim, In Sang Song, Duck Hwan Kim, Chul Soo Kim, Yun Kwon Park, Jea Shik Shin, Hyung Rak Kim, Jae Chun Lee
  • Patent number: 8810833
    Abstract: An image processing device includes a body that has a first connection portion and a second connection portion inside the body; an image processing board that is electrically connected to the first connection portion, the image processing board performing image processing; a functional board that is disposed so as to cover a part of the image processing board on one side of the image processing board; a side panel attached to the image processing board at a position opposite to the first connection portion, the side panel being a part of a side surface of the body; and an extension board disposed so as to cover another part of the image processing board on the same side as the functional board with respect to the image processing board, the extension board being electrically connected to the second connection portion and independently attachable to and removable from the image processing board.
    Type: Grant
    Filed: January 28, 2011
    Date of Patent: August 19, 2014
    Assignee: Fuji Xerox Co., Ltd.
    Inventors: Shiroh Suzuki, Tetsuo Ishizuka, Fumio Furusawa, Osamu Uto
  • Patent number: 8804368
    Abstract: A motherboard for an electronic device comprising a main printed circuit board (PCB) with a through-hole extending between the upper component surface and the lower surface. The motherboard includes a carrier PCB having a top surface and a bottom surface, and at least one component, e.g. an optical device, sensor, or the like, coupled to the top surface. The carrier PCB is mounted in an in an inverted orientation with respect to the main PCB such that the top surface of the carrier PCB faces the upper component surface of the main PCB. The carrier PCB is aligned with the main PCB such that the component is substantially aligned with the through hole of the main PCB and is visible from the lower surface of the PCB.
    Type: Grant
    Filed: April 30, 2009
    Date of Patent: August 12, 2014
    Assignees: Sony Corporation, Sony Electronics Inc.
    Inventors: Yoshinari Matsuda, Ramon Osuma, Ivan Cazarez, Rogelio Ruiz
  • Patent number: 8804313
    Abstract: Computational enclosures may be designed to distribute power from power supplies to load units (e.g., processors, storage devices, or network routers). The architecture may affect the efficiency, cost, modularity, accessibility, and space utilization of the components within the enclosure. Presented herein are power distribution architectures involving a distribution board oriented along a first (e.g., vertical) axis within the enclosure, comprising a power interconnect configured to distribute power among a set of load boards oriented along a second (e.g., lateral) axis and respectively connecting with a set of load units oriented along a third (e.g., sagittal) axis, and a set of power supplies also oriented along the third axis. This orientation may compactly and proximately position the loads near the power supplies in the distribution system, and result in a comparatively low local current that enables the use of printed circuit boards for the distribution board and load boards.
    Type: Grant
    Filed: June 22, 2012
    Date of Patent: August 12, 2014
    Assignee: Microsoft Corporation
    Inventors: Eric C. Peterson, Shaun L. Harris
  • Publication number: 20140212711
    Abstract: Disclosed herein is a switching board having switching elements for temperature measurement mounted on a printed circuit board (PCB) having a circuit electrically connected to a unit cell constituting a battery module, the switching board including an upper board having a pair of switching elements, a temperature detection element, and one or more vertical through holes, the switching elements being electrically connected to the circuit, the temperature detection element and the vertical through holes being disposed between the switching elements, and a lower board having a heating pad at a position corresponding to the vertical through holes and the temperature detection element.
    Type: Application
    Filed: April 1, 2014
    Publication date: July 31, 2014
    Applicant: LG CHEM, LTD.
    Inventors: Hyun min LEE, Jae Chan LEE
  • Patent number: 8773277
    Abstract: A routing facility (1) for a subsea electronics module (7) has on a single circuit board (2) a facility (5) for routing data packets between segments of a differential serial bus, and at least one input/output interface (14, 15, 16) for digital and/or analog process values, wherein the process values are accessible via the differential serial bus.
    Type: Grant
    Filed: September 25, 2006
    Date of Patent: July 8, 2014
    Assignee: Siemens Aktiengesellschaft
    Inventors: Endre Brekke, Vegard Horten, Vidar Steigen
  • Patent number: 8754328
    Abstract: A laminate circuit board with a multi-layer circuit structure which includes a substrate, a first circuit metal layer, a second circuit metal layer, a first nanometer plating layer, a second nanometer plating layer and a cover layer is disclosed. The first circuit metal layer is embedded in the substrate or formed on at least one surface of the substrate which is smooth. The first nanometer plating layer with a smooth surface covers the first circuit metal layer. The second nanometer plating layer is formed on the other surface of the substrate and fills up the opening in the cover layer to electrically connect the first circuit metal layer. The junction adhesion is improved by the chemical bonding between the nanometer plating layer and the cover layer/the substrate. Therefore, the circuit metal layer does not need to be roughened and the density of the circuit increases.
    Type: Grant
    Filed: October 29, 2012
    Date of Patent: June 17, 2014
    Assignee: Kinsus Interconnect Technology Corp.
    Inventors: Jun-Chung Hsu, Chi-Ming Lin, Tso-Hung Yeh, Ya-Hsiang Chen
  • Patent number: 8743562
    Abstract: A cam system includes a beam including a plurality of coupling features. A first handle is operable to be coupled to the beam using the coupling features. A plurality of cam elements are each operable to be coupled to the beam at different locations along the beam using the coupling features. A plurality of cam brackets are each operable to be mounted to a first member having a first connector. The coupled-together beam, first handle, and cam elements are operable to be coupled a second member having a second connector such that, with the cam brackets mounted to the first member, the engagement of the cam elements with the cam brackets mate the first connector and the second connector.
    Type: Grant
    Filed: January 5, 2012
    Date of Patent: June 3, 2014
    Assignee: Dell Products L.P.
    Inventors: Corey D. Hartman, Alejandro Z. Rodriguez, Russell Smith
  • Patent number: 8741411
    Abstract: A method for manufacturing a multi-piece board having a frame section and a multiple piece sections connected to the frame section includes forming a frame section from a manufacturing panel for the frame section, sorting out multiple acceptable piece sections by inspecting quality of piece sections, forming notch portions in the frame section and the acceptable piece sections such that the notch portions allow the acceptable piece sections to be arranged with respect to the frame section, provisionally fixing the piece sections and the frame section in respective positions, injecting an adhesive agent into cavities formed by the notch portions when the frame section and the piece sections are provisionally fixed to each other, and joining the acceptable piece sections with the frame section by curing the adhesive agent injected into the cavities.
    Type: Grant
    Filed: January 29, 2010
    Date of Patent: June 3, 2014
    Assignee: Ibiden Co., Ltd.
    Inventor: Takahiro Yada
  • Patent number: 8711575
    Abstract: A printed circuit board unit usable with a computer device includes a main board on which a first component and a second component are mounted on an upper surface, and a routing unit mounted on at least one of the upper surface and a lower surface of the main board and including a sub-wire forming at least part of a wire to transmit a data between the first component and the second component.
    Type: Grant
    Filed: January 24, 2011
    Date of Patent: April 29, 2014
    Assignee: Samsung Electronics Co., Ltd.
    Inventor: Do-kyun Lee
  • Patent number: 8698004
    Abstract: A fabrication method for a multi-piece board includes: checking whether pieces (printed wiring boards) are defect-free or not; forming a first recess in a joint portion between a defective piece and a frame; forming a first fitting portion at the frame by separating the defective piece; cutting out a defect-free piece having a second fitting portion from another board; forming a second recess in the second fitting portion; fitting the second fitting portion into the first fitting portion; flattening a joint portion; and filling an adhesive in a third recess which is formed by the first recess and the second recess, and curing the adhesive to adhere the frame and the defect-free piece.
    Type: Grant
    Filed: July 8, 2009
    Date of Patent: April 15, 2014
    Assignee: IBIDEN Co., Ltd.
    Inventor: Yasushi Hasegawa
  • Patent number: 8687380
    Abstract: A wiring board including a first rigid wiring board including a conductor and having an accommodation portion, the accommodation portion having wall surfaces, a second rigid wiring board accommodated in the accommodation portion and including a conductor electrically connected to the conductor of the first rigid wiring board, the second rigid wiring board having side surfaces, an insulation layer formed on the first rigid wiring board and the second rigid wiring board, and a metal film having a solid pattern formed directly on a boundary portion formed between the wall surfaces of the accommodation portion and the side surfaces of the second rigid wiring board.
    Type: Grant
    Filed: September 22, 2011
    Date of Patent: April 1, 2014
    Assignee: Ibiden Co., Ltd.
    Inventors: Masakazu Aoyama, Hidetoshi Noguchi
  • Publication number: 20140063770
    Abstract: A plug-in board replacement method includes preparing a board having a piece board, forming first conductive pattern on first surface of the board, forming second conductive pattern on second surface on the opposite side such that the second pattern is on the opposite side of the first pattern, irradiating laser upon the first and second surfaces along the first and second patterns such that the piece is cut out from the board, and fitting the piece into another board. The irradiating includes irradiating laser upon the first surface along the first pattern such that laser is irradiated along the border between edge portion of the first pattern and the first surface and laser upon the second surface along the second pattern such that laser is irradiated along the border between edge portion of the second pattern and the second surface such that the piece is cut out through the board.
    Type: Application
    Filed: August 30, 2013
    Publication date: March 6, 2014
    Applicant: IBIDEN CO., LTD.
    Inventors: Teruyuki ISHIHARA, Michimasa Takahashi
  • Patent number: 8654543
    Abstract: A circuit board assembly includes two external circuit boards, at least one electrical connector, at least one electronic component, and at least one hollow substrate. Each external circuit board includes an external electromagnetic shielding layer, a circuit layer and a dielectric layer. In each external circuit board, the dielectric layer is located between the external electromagnetic shielding layer and the circuit layer. The electrical connector is connected between the circuit layers located between the external electromagnetic shielding layers. The electronic component is disposed between the external circuit boards and connected with one of the circuit layers. The hollow substrate with plural openings is disposed between the external circuit boards. The electronic component and the electrical connector are located in the openings. Both a thickness of the electronic component and a height of the electrical connector are smaller than or equal to a thickness of the hollow substrate.
    Type: Grant
    Filed: April 18, 2011
    Date of Patent: February 18, 2014
    Assignee: Chunghwa Picture Tubes, Ltd.
    Inventors: Hsiang-Chao Lee, Yun-Chih Chen
  • Patent number: 8654541
    Abstract: Three-dimensional power electronics packages are disclosed. In one embodiment, a three-dimensional power electronics package includes a metalized substrate assembly, a first power electronics device, and a second power electronics device. The metalized substrate assembly includes an insulating dielectric substrate having a power via fully-extending through the insulating dielectric substrate, a first conductive layer on a first surface of the insulating dielectric substrate, and a second conductive layer on a second surface of the insulating dielectric substrate. The first conductive layer is electrically coupled to the second conductive layer by the power via. The first power electronics device is electrically coupled to the first conductive layer such that the first power electronics device is positioned in a first plane.
    Type: Grant
    Filed: March 24, 2011
    Date of Patent: February 18, 2014
    Assignee: Toyota Motor Engineering & Manufacturing North America, Inc.
    Inventors: Brian Joseph Robert, Ercan Mehmet Dede, Serdar Hakki Yonak
  • Patent number: 8638565
    Abstract: A method for producing an arrangement of optoelectronic components (10) is specified, comprising the following steps: producing at least two fixing regions (2) on a first connection carrier (1); introducing solder material (3) into the fixing regions (2); applying a second connection carrier (4) to the fixing regions (2); and soldering the second connection carrier (4) onto the first connection carrier (1) with the solder material (3) in the fixing regions (2).
    Type: Grant
    Filed: September 21, 2007
    Date of Patent: January 28, 2014
    Assignee: OSRAM Opto Semiconductors GmbH
    Inventors: Rainer Sewald, Markus Kirsch
  • Patent number: 8637778
    Abstract: The present subject matter relates to the field of fabricating microelectronic devices. In at least one embodiment, the present subject matter relates to forming an interconnect that has a portion thereof which becomes debonded from the microelectronic device during cooling after attachment to an external device. The debonded portion allows the interconnect to flex and absorb stress.
    Type: Grant
    Filed: April 8, 2010
    Date of Patent: January 28, 2014
    Assignee: Intel Corporation
    Inventors: Qing Ma, Jun He, Patrick Morrow, Paul B. Fischer, Sridhar Balakrishnan, Satish Radhakrishnan, Tatyana Tanya Andryushchenko, Guanghai Xu
  • Publication number: 20140022752
    Abstract: Disclosed herein is a circuit board system comprising a carrier circuit board which is essentially planar at least in sections, wherein the carrier circuit board has at least one rigid layer copper clad on one or both sides or provided with conductor tracks, wherein at least one essentially planar circuit board module aligned in parallel with the carrier circuit board is arranged with at least one rigid layer copper clad on one or both sides or provided with conductor tracks, in an associated recess in the carrier circuit board. In particular, the circuit board module is pressed into the recess in the carrier circuit board and the edge of the circuit board module is engaged in a friction-locked manner with the edge of the associated recess to form a press fit.
    Type: Application
    Filed: August 30, 2012
    Publication date: January 23, 2014
    Inventor: Markus Wille
  • Patent number: 8633395
    Abstract: A multilayer wiring board 100 comprises a first wiring region 101 where wirings 103a and insulating layers 104a and 104b are alternately laminated, and a second wiring region 102 where a thickness H2 of an insulating layer 104 is twice or more a thickness H1 of the insulating layer in the first wiring region 101 and a width W2 of a wiring 103b is twice or more a width W1 of the wiring in the first wiring region 101. The first wiring region 101 and the second wiring region 102 are integrally formed on the same board.
    Type: Grant
    Filed: May 22, 2009
    Date of Patent: January 21, 2014
    Assignees: National University Corporation Tohoku University, Foundation For Advancement of International Science
    Inventors: Tadahiro Ohmi, Shigetoshi Sugawa, Hiroshi Imai, Akinobu Teramoto
  • Patent number: 8634202
    Abstract: A power transforming circuit board includes a substrate and at least one power output structure. The substrate has at least one power transforming circuit and at least one pair of power input holes. The power output structure is disposed on the substrate. Each power output structure is electrically connected with one corresponding power transforming circuit. Each power output structure has at least one cable connecting hole. The normal direction of each power output structure is oriented at an angle with respect to the normal direction of the substrate.
    Type: Grant
    Filed: March 22, 2010
    Date of Patent: January 21, 2014
    Assignees: FSP Technology Inc., 3Y Power Technology (Taiwan), Inc.
    Inventor: Shao-Feng Lu
  • Patent number: 8633400
    Abstract: A multilayer printed wiring board including a first interlayer resin insulation layer, a first conductive circuit formed on the first interlayer resin insulation layer, a second interlayer resin insulation layer formed on the first interlayer resin insulation layer and the first conductive circuit and having an opening portion exposing a portion of the first conductive circuit, a second conductive circuit formed on the second interlayer resin insulation layer, a via conductor formed in the opening portion of the second interlayer resin insulation layer and connecting the first conductive circuit and the second conductive circuit, and a coating layer having a metal layer and a coating film and formed between the first conductive circuit and the second interlayer resin insulation layer. The metal layer is formed on the surface of the first conductive circuit and the coating film is formed on the metal layer.
    Type: Grant
    Filed: September 28, 2009
    Date of Patent: January 21, 2014
    Assignee: Ibiden Co., Ltd.
    Inventors: Sho Akai, Tatsuya Imai, Iku Tokihisa
  • Publication number: 20140016290
    Abstract: Disclosed herein is a touch panel including: a first transparent substrate partitioned into an active area and a bezel area provided in edges of the active area; a mark formed so as to protrude on the bezel area; and a second transparent substrate coupled to the first transparent substrate so that at least one corner thereof corresponds to the mark.
    Type: Application
    Filed: September 14, 2012
    Publication date: January 16, 2014
    Applicant: SAMSUNG ELECTRO-MECHANICS CO., LTD.
    Inventors: Seung Min LEE, Tae Hoon KIM, Ho Joon PARK, Wan Jae LEE
  • Patent number: 8625299
    Abstract: A circuit board includes an outer conductive layer, a number of inner conductive layers, at least one group of vias defined through the outer conductive layer and the inner conductive layers and electrically connected each conductive layers, at least one power supply element, and at least one electronic element. The at least one group of vias surrounds the at least one power supply element. When the least one power supply element outputs current to the at least one electronic element, a first portion of the output current flows to the inner conductive layers through the group of vias surrounding the at least one power supply element to be input to the at least one electronic element, and a second portion of the output current flows into the at least one electronic element through the outer conductive layer.
    Type: Grant
    Filed: August 30, 2011
    Date of Patent: January 7, 2014
    Assignee: Hon Hai Precision Industry Co., Ltd.
    Inventor: Tsung-Sheng Huang
  • Patent number: 8619432
    Abstract: Some embodiments of the inventive subject matter are directed to a first circuit board configured to include an electronic component. The electronic component includes a plurality of leads. The first circuit board includes first wires configured to connect to a first portion of the plurality of leads. The second circuit board is affixed to the first circuit board. The second circuit board includes second wires. The second circuit board is smaller in size than the first circuit board. A plurality of electrical connectors extend through a thickness of the first circuit board and are configured to connect a second portion of the plurality of leads to the second wires.
    Type: Grant
    Filed: September 30, 2010
    Date of Patent: December 31, 2013
    Assignee: International Business Machines Corporation
    Inventors: Douglas A. Baska, Daniel M. Dreps, Rohan U. Mandrekar, Roger D. Weekly
  • Patent number: 8611096
    Abstract: This invention is directed to a support plate for reinforcing a portion of a circuit board. The support plate may be coupled to a portion of the circuit board that is subject to forces (e.g., portions of the circuit board having switches) to prevent flexing of the board. The support plate may be coupled to the circuit board. This invention is also directed to a switch constructed from a button, a label plate, and a backer plate. The label plate and the backer plate may include apertures operative to receive a protrusion extending from the button, where the protrusion is welded to the backer plate. Labels may be printed or attached to the bottom surface of the label plate to protect the labels. In some embodiments, the protrusion may be welded to the backer plate. The protrusion may be operative to engage an electrical switch of an electronic device in which the switch is placed.
    Type: Grant
    Filed: May 11, 2011
    Date of Patent: December 17, 2013
    Assignee: Apple Inc.
    Inventors: Stephen Brian Lynch, Dinesh Mathew