Abstract: A method of manufacturing at least a portion of a printed circuit board. The method includes: applying a lamination adhesive on a first plural-layer substrate that includes a plurality of circuit layers with at least one first metal pad on a first side of the first plural-layer substrate; applying a protective film on the lamination adhesive; forming at least one via into the lamination adhesive to expose the at least one metal pad on the first side of the first plural-layer substrate; filling at least one conductive paste into the at least one via formed in the lamination adhesive; removing the protective film to expose the lamination adhesive on the first plural-layer substrate; and attaching the first plural-layer substrate with a second plural-layer substrate that includes a plurality of circuit layers with at least one second metal pad on a second side of the second plural-layer substrate.

Abstract: An encapsulant cavity integrated circuit package system including forming a first integrated circuit package with an inverted bottom terminal having an encapsulant cavity and an interposer, and attaching a component on the interposer in the encapsulant cavity.

Abstract: A circuit board includes a plurality of signal lines and a plurality of shielding walls. The shield walls are disposed between the signal lines. Each shield wall includes an upper surface, a lower surface, a rectangular groove, a first metal layer and a second metal layer. The lower surface is opposite to the upper surface. The rectangular groove extends from the upper surface to the lower surface. The first metal layer is disposed on the upper surface. The second metal layer is disposed in the rectangular groove and electrically connected to the first metal layer.

Abstract: This invention discloses a display device mother substrate, a display device substrate and a manufacture method of display device substrate thereof. The display device mother substrate includes a first substrate, a second substrate, a first active area circuit and a first transmission line, wherein a first cutting line is defined between the first substrate and the second substrate. The first active area circuit is disposed on the first substrate and is electrically connected to the first transmission line. The first transmission line includes a display line portion, an end line portion and a middle line portion, wherein the display line portion is electrically connected to the first active area circuit. The middle line portion is disposed on the second substrate, wherein two ends of the middle line portion are electrically connected to the display line portion and the end line portion respectively at the first cutting line.

Abstract: According to one embodiment, a multilayer printed circuit board having a plurality of wiring layers and an electronic component mounted thereon, includes a spiral wire including a path in a substantial spiral shape configured with a printed wire section of a substantial loop shape provided on each of at least two wiring layers of the plurality of wiring layers, and a plug provided on each wiring layer arranged between a top wiring layer which is a wiring layer on a top on which the printed wire section of a substantial loop shape is provided and a bottom wiring layer which is a wiring layer on a bottom on which the printed wire section of a substantial loop shape is provided.

Abstract: Improved noise isolation for high-speed digital systems on packages and printed circuit boards is provided by the use of mixed alternating impedance electromagnetic bandgap (AI-EBG) structures and a power island configured to provide ultimate noise isolation. A power island is surrounded by a plurality of mixed AI-EBG structures to provide a power distribution network. In this structure, the gap around the power island provides excellent isolation from DC to the first cavity resonant frequency which is determined by the size of the structure and dielectric material. One AI-EBG structure provides excellent isolation from the first cavity resonant frequency of around 1.5 GHz to 5 GHz. The other AI-EBG structure provides excellent noise isolation from 5 GHz to 10 GHz. Through use of this novel configuration of AI-EBG structures, a combination effect of the hybrid AI-EBG structure provides excellent isolation far in excess of 10 GHz.

Abstract: First sheet-like substrate is arranged at a region surrounded by first terminals of male connector and first circuit substrate, and second sheet-like substrate is arranged at a region surrounded by second terminals of female connector and second circuit substrate, and male connector and female connector are fitted together so that a first passive element of first sheet-like substrate and a second passive element of second sheet-like substrate configure a filter circuit.

Abstract: A method and system for fabricating a interconnect substrate for a multi-component package is disclosed. The multi-component package includes at least one die and a package substrate. The method and system include providing an insulating base and providing at least one conductive layer. The at least one conductive layer provides interconnects for at least one discrete component. The interconnect substrate is configured to be mounted on the at least one die and to have the at least one discrete component mounted on the interconnect substrate.

Abstract: A transceiver module including an adaptor and a PCB is provided. The PCB, connected with the adaptor, has a first signal layer, a second signal layer and a singular ground layer wherein the singular ground layer is set between the first signal layer and the second signal layer. The first signal layer includes a first transmitter circuit region and a first receiver circuit region. The second signal layer includes a second transmitter circuit region and a second receiver circuit region. The singular ground layer includes a ground portion of a third receiver circuit electrically connected with the ground signals of the first and the second receiver circuit region. Beside, the projection area of the singular ground layer onto the first signal layer substantially covers the first transmitter the first receiver circuit region. The ground portion of the third receiver circuit is electrically connected with a ground of the adaptor.

Abstract: Techniques pertaining to powering multiple platforms with a minimum impact on air passage in a predefined environment are disclosed. Instead of connecting each of the platforms in a chassis to a power supply therein, the present invention uses what is referred to as cascading powering to power all platforms within minimum cable delivery. According to one embodiment of the present invention, each platform is provided with a pair of power connectors. At least one of the platforms has a power connector located towards or near a power supply so that only a short cable is needed to power the platform. The power is serially provided to an adjacent platform via a pair of corresponding connectors, each located on one of the two adjacent platforms. Such configuration is extended to the remaining platforms. As a result, all platforms are powered by the same power supply without using individual cables directly to the power supply.

Abstract: A circuitized substrate assembly comprised of at least two circuitized substrates each including a thin dielectric layer and a conductive layer with a plurality of conductive members as part thereof, the conductive members of each substrate being electrically coupled to the conductive sites of a semiconductor chip. A dielectric layer is positioned between both substrates and the substrates are bonded together, such that the chips are internally located within the assembly and oriented in a stacked orientation. A method of making such an assembly is also provided, as is an electrical assembly utilizing same and an information handling system adapted for having such an electrical assembly as part thereof.

Abstract: A method and device for data security including a printed circuit board and an integrated circuit each having a conductive trace layer shielded by a electrical shield layer. Tampering with either side of the device causes disturbance of a current flowing through a conductive trace layer used as an electrical shield. This triggers a security circuit to erase the data stored in the integrated circuit and stop data flow between the printed circuit board and the integrated circuit.

Abstract: Modification of the connections between a die package and a system board is described. In one example a pattern redistribution module is used in a socket. The module has a first array of contacts on one side of the module. The contacts have a first configuration to connect to the socket. A second array of contacts is on another side of the module opposite the first array of contacts and has a second configuration to connect to a package containing a die. A board is between the first and the second array of contacts to interconnect contacts of the first array of contacts to contacts of the second array of contacts.

Abstract: A packaging chip formed with plural wafers. The packaging chip includes plural wafers stacked in order and plural interconnection electrodes directly connecting the plural wafers from an upper surface of an uppermost wafer of the plural wafers to the other wafers. At least one or more of the plural wafers mounts a predetermined circuit device thereon. Further, at least one or more wafers of the plural wafers have a cavity of a predetermined size. Meanwhile, the packaging chip further includes plural pads independently arranged on the upper surface of the uppermost wafer one another and electrically connected to the plural interconnection electrodes respectively. Accordingly, the present invention can enhance the performance and reliability of a packaging chip and improve fabrication yield.

Abstract: A multilayer printed wiring board includes a core substrate and a built-up wiring layer formed by alternately layering conductor circuits and insulating resin layers. The built-up wiring layer includes a first surface provided in contact with the core substrate and a second surface opposing the first surface and including a mounting area on which at least one semiconductor device is to be mounted. A first plurality of through-hole conductors is formed in a first portion of the core substrate which corresponds to the mounting area of the second surface, and a second plurality of through-hole conductors formed in a second portion of the core substrate which corresponds to another area of the second surface other than the mounting area. A pitch between the first plurality of through-hole conductors is smaller than a pitch between the second plurality of through-hole conductors.

Abstract: An apparatus, system, and method are disclosed for a modular blade. The blade has a first carrier card and a second carrier card. At least one of these cards connects into the backplane of a blade server and provides connectivity for the modular blade to the backplane. The carrier cards also provide connectivity between their respective attached devices. In order to increase the density available in a modular blade, the computing components on the first and second cards interleave with one another such that a maximum number of components fit in a minimal space. The modular blade also provides an airflow channel for air circulation necessary to provide cooling. The first carrier card and second carrier card may also be identical, with one of the identical pair rotated one-hundred and eighty degrees with respect to the other.

Abstract: A front end module includes a multilayered structure. The multilayered structure includes a transmitter, a receiver, and a duplex unit. The multilayered structure further includes a ground layer. The ground layer includes a ground pattern having at least one block on a surface of a substrate of the front end module.

Abstract: A multilayer printed wiring board includes: an insulating base including an indentation section formed thereon; a conductor pattern formed on the insulating base, the conductor pattern including a thick film section formed by embedding a conductor in the indentation section; and a via hole section formed in an upper layer of the insulating base, the via hole section including a bottom portion that is in contact with the thick film section.

Abstract: A circuit board is provided with a metal plate, having openings, as core material. The opening gradually increases from a lower surface side toward an upper surface side of the metal plate. On both surface sides of the metal plate there are provided wiring patterns, respectively, via insulating layers. The insulating layer on an upper region of the opening and the corresponding wiring pattern are provided have a recess on the upper surface. To electrically connect each wiring pattern, the circuit board includes a conductor that penetrates the metal plate via the opening and which connects the wiring patterns with each other. An LSI chip is directly coupled to the upper surface side of the metal plate via a solder ball.

Abstract: An electronic substrate is disclosed that includes: a substrate having a first face on which an active region is formed, and a second face on an opposite side to the first face and on which a passive element is formed. The substrate may further include: a penetrative conductive portion penetrating through the substrate; and an electrode formed on the first face, wherein the passive element is electrically connected to the electrode via a penetrative conductive portion.

Abstract: A semiconductor package, includes: element substrate having first surface, including: functional element on first surface, and extracting electrode on first surface and configured to output a signal of functional element, extracting electrode being disposed around functional element; rim substrate shaped into a frame, and configured to have first junction with element substrate to surround functional element, rim substrate including: first through hole through rim substrate, and connecting electrode which is: formed by packing first through hole with first conductor material, configured to seal signal extracting aperture of extracting electrode, and configured to electrically connect signal extracting aperture with takeout electrode; and cover substrate configured to have second junction with rim substrate to block aperture of rim substrate, cover substrate including: second through hole through cover substrate, and takeout electrode which is: formed by packing second through hole with second conductor materi

Abstract: A printed circuit board (PCB) having vias for reducing reflections of input signals includes a first signal layer, a second signal layer, one via, an input signal line arranged on the first signal layer, and an output signal line arranged on the second signal layer. The via further includes a drill hole, a first pad, and a second pad. The first pad is electrically connected with the input signal line, and the second pad is electrically connected with the output signal line. An outer diameter of the first pad is smaller than an outer diameter of the second pad.

Abstract: The present invention relates to computer hardware design, and in particular to a printed circuit board (card) comprising wiring dedicated to supply electric board components such as integrated circuits with at least three different reference planes. In particular at locations, where the pins of a card-to-card connector enter the layer structure of the card discontinuities brake the high frequency signal return path of a given signal wiring. In order to close the signal return path around a signal path from card to card including the connector, and thus to limit the signal coupling while concurrently keeping the card design as simple as possible, it is proposed to provide a) an additional capacitance for a given signal wiring in a discontinuity section, b) wherein the additional capacitance is formed by a voltage island placed within a signal layer located next to the given signal wiring.

Abstract: A device and a method for bonding elements are described. A first solder ball is produced on a main surface of a first element. A second solder ball is produced on a main surface of a second element. Contact is provided between the first solder ball and the second solder ball. The first and second elements are bonded by applying a reflow act whereby the solder balls melt and form a joined solder ball structure. Prior to the bonding, the first solder ball is laterally embedded in a first layer of non-conductive material and the second solder ball is laterally embedded in a second layer of non-conductive material, such that the upper part of the first solder ball and upper part of the second solder ball are not covered by the non-conductive material. A third solder volume is applied on one or both of the embedded first or second solder balls, prior to the bonding.

Abstract: A wired circuit board has a metal supporting board, an insulating layer formed on the metal supporting board, a conductive pattern formed on the insulating layer and having a pair of wires arranged in spaced-apart relation, and a semiconductive layer formed on the insulating layer and electrically connected to the metal supporting board and the conductive pattern. The conductive pattern has a first region in which a distance between the pair of wires is small and a second region in which the distance between the pair of wires is larger than that in the first region. The semiconductive layer is provided in the second region.

Abstract: A multilayer printed wiring board having a multilayered structure including multiple conductor circuit layers and multiple interlaminar insulative layers, the conductor layers having one or more conductor circuit portions, the interlaminar insulative resin layers including the outermost interlaminar insulative resin layer forming the outermost layer of the multilayered structure, a filled-viahole formed in the outermost interlaminar insulative resin layer and made of one or more metal plating filling and completely closing a hole formed through the outermost interlaminar insulative resin layer, the metal plating of the filled-viahole extending out of the hole and having a substantially flat surface, the filled-viahole electrically connected to the conductor circuit portion in the conductor circuit layers, and a solder bump formed on the substantially flat surface of the filled-viahole.

Abstract: A multi-layer substrate connecting to an external electric device includes: a plurality of resin films; and a plurality of conductive patterns. The resin films are stacked together with the conductive patterns. The conductive pattern includes an inner conductive pattern and a surface conductive pattern. The inner conductive pattern is disposed inside of the multi-layer substrate for providing an inner circuit. The surface conductive pattern is exposed on the multi-layer substrate for connecting to the external electric device. The surface conductive pattern has a thickness in a stacking direction, which is thicker than a thickness of the inner conductive pattern.

Abstract: An integrated circuit package comprising at least two printed circuit boards each comprising a substrate coated with metallic layers on both sides and having plated through-holes for electrical and thermal connection to the metallic layers, at least two of the printed circuit boards being diffusion-bonded at an interface between their respective metallic layers, the bonded metallic layers forming an hermetic seal between the opposed external surfaces of the integrated circuit package.

Abstract: According to one embodiment, an electrical interconnection system includes a pair of printed wiring boards formed of a printed wiring board material. Each printed wiring board has multiple surface pads formed on a surface of the printed wiring board adjacent its outer edge. The surface of each printed wiring board is operable to be placed adjacent to one another such that an electrical circuit coupled to one printed wiring board is electrically coupled to another electrical circuit of the other printed wiring board by contact of the surface pads of each printed wiring board with one another.

Abstract: A coreless thin substrate with embedded circuits in dielectric layers is provided. The substrate includes a plurality of first patterned dielectric layers with embedded circuits, and at least a second patterned dielectric layer with embedded conducting elements. The second patterned dielectric layer is disposed between the first patterned dielectric layers, such that the embedded conducting elements electrically conduct the circuits of the first patterned dielectric layers through thermal lamination. Thus, a conventional through-hole formation process after the thermal lamination is skipped, and the substrate has a thinner and flatter profile. In one embodiment, the first patterned dielectric layers are inkjet printed layers with negative images. Moreover, the embedded circuits are flush with and exposed from an upper surface and a lower surface of the corresponding first dielectric layers.

Abstract: An assembly structure of flexible board and rigid board includes a rigid board, a sub-board and a flexible board. The rigid board defines a locking gap having two side surfaces projecting toward each other to form two resisting portions. The sub-board has a standing portion inserted in the locking gap. Bilateral sides of the standing portion extend outward to form two preventing arms against a bottom surface of the rigid board. The flexible board has a base portion inserted in the locking gap of the rigid board. The base portion has a front surface and a back surface located to a front surface of the sub-board. The front surface of the base portion is against the resisting portions.

Abstract: A differential signal via structure for a printed circuit board having a pair of signal vias extending vertically from a surface of the board to an interior region of the board to contact signal conductors disposed horizontally within the interior region of the board and a pair of ground vias extending vertically from a surface of the circuit board to an interior region of the board to contact ground conductors disposed horizontally within the interior region of the board.

Abstract: A built-up printed circuit board includes stacked micro via-holes, each of which is provided for interconnection between layers in the printed circuit board, and in each of which a filling material, such as liquefied resin or conductive paste, is filled using a poly screen of a general screen printing machine.

Abstract: A MEMS package includes a first board, a second board and a laminate material. The first board includes a lower metallic trace, a metallic diaphragm and a through opening. The lower metallic trace is located on the lower surface of the first board, and the metallic diaphragm is disposed on the lower metallic trace. The second board includes an upper metallic trace and a metallic electrode. The upper metallic trace is located on the upper surface of the second board, the metallic electrode is disposed on the upper metallic trace, and the metallic electrode is corresponding to the metallic diaphragm. The laminate material is disposed between the lower and upper metallic traces, and includes a hollow portion for accommodating the metallic electrode and metallic diaphragm, wherein a sensing unit is formed by the metallic electrode, the hollow portion and the metallic diaphragm, and is corresponding to the through opening.

Abstract: A system is described that can assemble substrates over one another to form a stacked substrate. The various layers of the stacked substrate can be separated from each other by using Coulomb forces. In addition, a beam substrate can be used to increase the separation. In addition, a first substrate can be flipped around and connected to the edge of a second substrate. The instructions for assembly and a FSM (Finite State Machine) can be included in the stacked substrate to pave the way for a self-constructing 3-D automaton. The beam substrate can be used to carry heat, fluids, electrical power or signals between the various layers of the stacked cells besides providing a mechanical support. A stacked substrate can be assembled into 3-D structures. These structures can have applications in antennas and RF circuits, for example.

Abstract: A modular patch panel for interconnecting a data storage system controller to data storage enclosures is provided. The modular patch panel includes a chassis and modular interface circuitry. The chassis has a front end and a back end, the front end and the back end being horizontally opposed, the back end attaching to a panel portion of a rack system, the panel portion electrically connecting to the data storage enclosures over a set of point-to-point connections. The modular interface circuitry has (a) a data storage interface portion electrically connected to the set of point-to-point connections through the panel and (b) a controller interface portion electrically connecting to the data storage system controller through the front end. The modular interface circuitry is interchangeable through an opening in the front end.

Abstract: A joined structure of the present invention including a first substrate having a wiring thereon, any one of a second substrate and an electronic part, and an anisotropic conductive film containing conductive particles, wherein the first substrate and any one of the second substrate and the electronic part are electrically joined via the anisotropic conductive film, and wherein the conductive particles pressure-bonded to the wiring of the first substrate protrude from both edges of the wiring in a width direction, and an interval of the wiring is 3.5 times or more larger than an average particle diameter of the conductive particles which are not pressure-bonded to the wiring.

Abstract: The invention relates to an electrical device comprising a substrate carrying at least one component comprising at least one electrode, a first connecting line electrically connected to said electrode, wherein the first connecting line bridges a second connecting line by means of a crossover. The crossover is, at least at one side, bounded by an electrically insulating structure. The invention allows new testing methods and efficient lead-outs for an electrical device, such as electroluminescent display devices.

Abstract: An integrated circuit package system including providing a base substrate, attaching a base integrated circuit on the base substrate, attaching a core substrate over the base integrated circuit, attaching a substrate electrical connector between the core substrate and the base substrate, and applying an encapsulant having the core substrate partially exposed over the base integrated circuit.

Abstract: A composite electronic component includes a multilayer wiring block having a plurality of insulating layers and a wiring pattern, and a chip-type electronic component built-in multilayer block having a plurality of insulating payers and a wiring pattern and including a first chip-type electronic component. The multilayer wiring block and the chip-type electronic component built-in multilayer block are electrically interconnected and arranged on substantially the same plane.

Abstract: A signal line, a power supply pattern and a ground layer are formed within a board. An outer via and an inner via are formed within the board. The outer via is connected to the signal line. The inner via is connected to the ground layer. The outer via serves as a signal line. The inner via serves as a ground. The signal line within a printed wiring board is connected to the outer via without interruption by a ground. The signal lines can spread within the printed wiring board in a complicated pattern as compared with a conventional pattern. Moreover, the impedance matching can reliably be established.

Abstract: A circuitized substrate in which selected ones of the signal conductors are substantially surrounded by shielding members which shield the conductors during passage of high frequency signals, e.g., to reduce noise. The shielding members may form solid members which lie parallel and/or perpendicular to the signal conductors, and may also be substantially cylindrical in shape to surround a conductive thru-hole which also forms part of the substrate. An electrical assembly and an information handling system are also defined.

Abstract: In one aspect, the invention provides a semiconductor device that comprises a semiconductor device packaging substrate core. A first interconnect structure is located within a mold region and on a die side of the substrate core and has a first conductive metal density associated therewith. A second interconnect structure is located within the mold region and on a solder joint side of the substrate core and has a second conductive metal density associated therewith, wherein the second conductive metal density within the mold region is about equal to or less than the first conductive metal density within the mold region.

Abstract: A shielded circuit board includes a first metal layer with a first surface area, and first and second portions. A second metal layer includes first and second surface areas. At least one signal transmission line is arranged in a first dielectric material, the first dielectric material separating the first portion of the first metal layer and a first portion of the second metal layer. The first surface area of the first metal layer is arranged on the first portion facing the first surface area of the second metal layer and is arranged on the second portion facing the second surface area of the second metal layer. A method relates to shielding a circuit board.

Abstract: Electronic devices may be provided with one or more electrical components that may be coupled to one or more circuit boards by flexible circuits that can have reduced ground lengths. Each flexible circuit can include at least one ground conductor that may run along its length and that may have at least one portion exposed for coupling to a grounding element that may also be coupled to a ground plane.

Abstract: A printed circuit board and a method of manufacturing a printed circuit board are disclosed. Using a method of manufacturing a printed circuit board, which includes: forming a multilayer board by alternately stacking circuit pattern layers and insulation layers such that a predetermined thickness of a partial area has only insulation layers stacked therein; and removing insulation layers from the partial area of the multilayer board, a printed circuit board can be manufactured that is suitable for a slim module.

Abstract: A composite sandwich structure carrying an externally applied structural load and having embedded electronics, that in one embodiment includes two multilayered composite facesheet laminates, a central core, embedded electronic components within the central core region, embedded electrical conductors within the central core region, and two multilayer printed circuit laminates that are secondarily bonded or cured to the inner surface of the sandwich facesheet laminates. The electronic components and electrical conductors, which are located in the central core region of the sandwich element, are attached to one or both of the two circuit laminates.

Abstract: Provided is a multilayer printed wiring board in which power supply patterns are shortened to decrease an impedance and electromagnetic radiation noise. The multilayer printed wiring board includes: a power supply layer (1) having at least two power supply patterns (5) with different voltages formed thereon; and a conductor layer (2) overlaid on the power supply layer (1) via an insulator, and at least one of the power supply patterns (5) has a first pattern portion (10) and a second pattern portion (11) formed in a non-contact manner with each other, and the first pattern portion (10) and the second pattern portion (11) are electrically connected to each other via a relay portion (14) including a relay pattern (12) formed on the conductor layer (2) and through holes (13) for connecting the power supply layer (1) and the conductor layer (2) at both ends of the relay pattern (12).

Abstract: One example of an optical transceiver includes a housing and an optical transmitter and optical receiver disposed within the housing. A PCB is also disposed in the housing. The PCB has front and side edges, as well as circuitry in communication with the optical transmitter and the optical receiver. The PCB also includes a group of plated contact pads, each of which includes a front-most extremity that terminates short of the front edge. Finally, the PCB includes a group of traces, one of which leads from one of the side edges of the PCB to a via that is connected with the circuitry, and another of which leads from the via to one of the plated contact pads.

Abstract: According to the package board of the present invention, each soldering pad formed on the top surface of the package board, on which an IC chip is to be mounted, is small (133 to 170 ?m in diameter), so the metallic portion occupied by the soldering pads on the surface of the package board is also small. On the other hand, each soldering pad formed on the bottom surface of the package board, on which a mother board, etc. are to be mounted, is large (600 ?m in diameter), so the metallic portion occupied by the soldering pads on the surface of the package board is also large. Consequently, a dummy pattern 58M is formed between conductor circuits 58U and 58U for forming signal lines on the IC chip side surface of the package board thereby to increase the metallic portion on the surface and adjust the rate of the metallic portion between the IC chip side and the mother board side of the package board, protecting the package board from warping in the manufacturing processes, as well as during operation.