Abstract: A multiple-antenna system including a base station apparatus and a plurality of antenna apparatuses connected to the base station via optical cables is provided. The system comprises a first antenna apparatus and a second antenna apparatus connected to each other via an electric cable. Each of the first and second antenna apparatuses receives a reference pulse from the base station apparatus via the optical cables, and estimates a time difference between the received pulse and the reference pulse supplied from the counterpart antenna apparatus via the electric cable. At least one of the first and second antenna apparatuses adjusts signal transmission timing based on the time differences estimated by the first and second antenna apparatuses.

Abstract: A communications system includes a first oscillator for producing a first clock signal; a second oscillator for producing a second clock signal; and a secondary circuit coupled to the first oscillator and the second oscillator for determining a second oscillation frequency corresponding to a frequency of the second clock signal; the second oscillation signal being determined according to the first clock signal, the second clock signal, and a first oscillation frequency corresponding to a frequency of the first clock signal.

Abstract: [Object] A base station synchronization system, a synchronization controller, and a base station are provided which are capable of establishing precise synchronization among a plurality of base stations. [Solving Means] In a base station synchronization system including a plurality of base stations 13 and a base station concentrator 12, the base station concentrator 12 includes a control information generator 21 for generating synchronization control information, and each base station 13 includes a VCO 30 oscillating at a frequency corresponding to an input control voltage, and a corrector 33 for correcting the input control voltage to the VCO 30 according to the synchronization control information. This configuration makes it possible to establish synchronization among the master clocks of the plurality of base stations so as to suppress phase differences among the base stations and precisely synchronize the base stations with each other.

Abstract: A method of recovering timing information in a packet network is disclosed wherein a modulation scheme is used to transport additional information required for clock recovery between the sender and receiver across the network.

Abstract: System (10) comprising at least two units (1, 2) with clock functionality, the units being coupled to a common system clock line (SCLK), a common internal clock line (ICLK), and a logic bus (L-BUS), whereby one sole unit (1, 2) is being dedicated as a mater unit at a time. One source clock signal (CLK10, CLK20) of a unit is output on the internal clock line (ICLK) and all PLL devices of all units generates PLL output signals derived from the internal clock signal, the outputs of the PLL devices (CLKP1, CLKP2) being in phase with one another such that switchover from one PLL output signal to another is seamless.

Abstract: Systems and methods are described for distribution of synchronization in a packet switched local area network environment. A method for extracting network synchronization timing from a data transmission burst includes: recovering a clock during the data transmission burst; and then holding over the clock after the data transmission burst ceases. A method for inserting network synchronization timing into a data transmission burst includes encoding data using a time-base reference signal governed clock.

Abstract: In a radio network controller (RNC), a covariant matrix and a database are updated. The RNC then detects that a first base station's time-error-variance exceeds a predetermined threshold. In response, the RNC signals to a user-equipment (UE) to measure a time difference of arrival (TDOA) between signals transmitted from the first base station and a reference base station. The UE measures the requested TDOA between the designated base stations and reports the measurement results back to the RNC. The RNC then compares the measured TDOA with a TDOA value stored in the database. Based on the comparison, the RNC signals to the first base station to adjust its time base.

Abstract: A system for managing the operation of a plurality of radio modems integrated within the same wireless communication device. In at least one embodiment of the present invention, a control strategy may be employed to manage the operation of a plurality of radio modems and/or wireless mediums. A signal normally used to reactivate or “wake-up” system components in an inactive or sleep mode may also be employed to convey timing and/or control information to the system components of the wireless communication device.

Abstract: A method and system for synchronizing the operation of a plurality of electronic article surveillance (“EAS”) units that includes receiving a global positioning satellite reference signal, generating a synchronization master signal using the global positioning satellite reference signal and transmitting the master synchronization signal to the plurality of EAS units. The method and system can further include a secondary synchronization master, which is configurable to relay the master synchronization signal.

Abstract: A system and method of parameter measurement for a distributed computer system, the method including selecting a master unit; selecting slave units operably connected to the master unit on a bus, the slave units having a slave clock; determining slave unit latencies between the master unit and the slave units; generating slave unit synchronizing signals for the slave units, the slave unit synchronizing signals being adjusted for the slave unit latencies; synchronizing the slave clocks in response to the slave unit synchronizing signals; and measuring an operating parameter at the slave units at a synchronously determined time.

Abstract: One aspect of the present invention concerns a method for controlling the frequency of oscillation of a local clock signal comprising the steps of (A) generating the clock signal in response to a first control signal, (B) generating the first control signal in response to one of a plurality of adjustment signals selected in response to a second control signal and (C) generating the second control signal in response to a comparison between a local timestamp and an external timestamp.

Abstract: Disclosed is a method of distributing a number of reference clocks across a packet network. The packet network has a master node and one or more slave nodes, the master node and each slave node having basis clocks. A sender sends time-stamped synchronization packets to said one or more slave nodes, and a receiver at the slave nodes receives the time-stamped synchronization packets and synchronizes the basis clocks in the slave nodes with the basis clock in the master node. Multiple reference clocks are encoded with respect to the basis clock in the master node to generate numerical information describing the reference clock(s) in relation to the basis clock in the master node. The basis clock in each of the slave node is synchronized to the basis clock in the master node using time-stamped synchronization packets. The one or more reference clocks are recovered at the slave nodes using said numerical information describing the reference clock(s) in relation to the basis clock in the master node.

Abstract: A controller controls a time stamp providing unit to provide a periodic transfer packet with a time stamp showing the synchronous timing of periodic control designated by the control period timer using the global time indicated by a global timer. Devices are corrected to synchronize operation period timers with the periodic control, by using the time difference between the synchronous timing time of periodic control indicated by the time stamp of the transmitted periodic transfer packet and the global time indicated by global timers, at periodic operation timing of the operation period timers.

Abstract: A method of tracing processor data includes receiving a first trace stream from a first processor operating in response to a first clock and a second trace stream from a second processor operating in response to a second clock. The first trace stream is routed to a first dual-port synchronous memory in accordance with the first clock and the second trace stream is routed to a second dual-port synchronous memory in accordance with the second clock. The first trace stream and the second trace stream are delivered to a memory in accordance with a third clock.

Abstract: Systems and techniques are disclosed for establishing a reference corresponding to the timing of a received signal from the first source, determining the timing for each received signal from a plurality of second sources, adjusting the reference to the timing of the received signal from one of the second sources, the timing of the received signal used to adjust the reference being closest in time to the unadjusted reference, and synchronizing a signal to the reference for transmission.

Abstract: Apparatus for making legacy network elements transparent to IEEE 1588 Precision Time Protocol operation. Network elements are wrapped by device(s) capable of providing either transparent clock or boundary clock operation. In one embodiment, smart interface converters are used to provide transparent clock or boundary clock operation. The smart interface converters work cooperatively.

Abstract: A synchronous network having a multiplicity of nodes which can transmit data to one another in a predefined sequence for a predefined duration is described. The described network is distinguished by the fact that a plurality of nodes, or all the nodes, can output a synchronization signal which defines a reference time for the synchronization of the nodes.

Abstract: The present invention provides an improved clock synchronization algorithm for a distributed system intended for real time applications by performing at the same time an off-set correction and a clock read correction at each node of the distributed system. Expensive oscillators can be avoided and synchronization can be established faster and with higher precision.

Abstract: In a local positioning system, the land-based transmitters include free running oscillators or oscillators free of clock synchronization with any remote oscillator. A reference receiver receives the ranging signals from different transmitters and generates timing offset information, such as code phase measurements. The timing offset information is then communicated back to transmitters. The temporal offset information indicates relative timing or phasing of the different transmitted ranging signals to the reference receiver. The transmitters then transmit the temporal offset information with the ranging signals, such as modulating the transmitted code by the timing offset information. A mobile receiver is operable to receive the ranging signals and timing offset information in a same communications path, such as on a same carrier. Position is determined with the temporal offset information and the ranging signals.

Abstract: A drift-tolerant sync generation circuit and sync generation method for a sync pulse generator operable in a clock synchronizer that effectuates data transfer between first circuitry disposed in a first clock domain and second circuitry disposed in a second clock domain. The first clock domain is operable with a first clock signal and the second clock domain is operable with a second clock signal. A sync circuit portion, responsive to a valid edge signal indicative of coincident edges between the first and second clock signals, is operable to generate based upon the ratio a start sync signal substantially centered around the coincident edges. A first sync generator, responsive to the start sync signal, is operable to generate synchronization pulses in the first clock domain. A second sync generator, responsive to the start sync signal, is operable to generate synchronization pulses in the second clock domain.

Abstract: The present invention relates to a method for transmitting packets comprising a synchronization part (sync?) and a payload part (dat1, dat2), wherein the transmission format comprises a shortened synchronization part (syn?) and the payload part is split into a first data sequence (dat1), encoded in the first encoding, followed by the second data sequence (dat2), encoded in the second encoding, comprising the steps of encoding and sending the first data sequence (dat1) in the first encoding, encoding and sending the second data sequence (dat2) in the second encoding, on the sender side and receiving and decoding the first data sequence (dat1) in the first encoding, detecting the end of the first data sequence and adapting the receiver's decoder, receiving and decoding the second data sequence (dat2) in the second encoding on the receiver side. The invention further relates to a sender, a receiver, an optical network element, and a serialized packet format.

Abstract: Embodiments of the present invention can be used to select a training sequence used by a base station and a user terminal for communications. In one embodiment, selecting the training sequence to use includes first selecting a training sequence from a set of training sequences. Then, a shift indicator is received, the shift indicator indicating a number of symbols the training sequence is to be shifted. A shifted training sequence is generated by shifting the selected training sequence by the number indicated by the received shift indicator, and the shifted training sequence is used for communication with a first transceiver on a communications channel. In another embodiment, a shift indicator indicating a number of symbols a training sequence is to be shifted is first selected, and then used to generate a shifted training sequence by shifting the training sequence by the number of symbols indicated by the selected shift indicator.

Abstract: A method synchronizes a radio communication system divided into radio cells. Data is transmitted in the radio communication system by a multiple access method. Each radio cell thus has a base station for the radio feed of several mobile stations, allocated to the radio cell. A synchronization of the base station is carried out using the received signals from mobile stations in the same radio cell and also in adjacent radio cells. The base station determines at least one pilot signal and signals said pilot signal to the allocated mobile stations in a downwards direction. The allocated mobile stations transmit the signaled pilot signal in an upwards direction to the base station. The base station determines a synchronization value, from the received pilot signals from the radio cell thereof and also from the adjacent radio cells, fro a time synchronization and/or for a frequency synchronization on which the bas station is synchronized.

Abstract: A method of timing in a multi-cell system requiring synchronization of frames in transmission is provided. Transceivers of a wired data interface between a central controller and multiple base stations are synchronized to a frame timing clock up to a difference in propagation delays between the central controller and multiple base stations. The propagation delays are considered as constants, are measured, and are stored in each base station. A unique word is regularly inserted in the data transmitted by the central controller, at a fixed interval. When this unique word is detected by the base station within a fixed period of the frame timing clock, a frame signal delay is initiated at the next rising edge of each frame timing clock. This frame signal delay is equal to the period of the frame timing clock minus the propagation delay. At the end of the frame delay, the frame data is transmitted, and all frames are simultaneously transmitted from different base stations.

Abstract: A distributed cache management system that minimizes invalid cache notification events is provided. A cache management system in a sending device processes outgoing cache notification events by adding information about the source server's clock. A cache management system in the receiving device then uses this information to adjust event information once the event is received.

Abstract: Disclosed is a method and apparatus for aligning clock domains over an asynchronous network between a source controlled by a first clock and a destination controlled by a second clock. The predicted delay is estimated for transmitting packets between a source and destination over the network. The time-stamped synchronization packets are sent to the destination, each time-stamped synchronization packet carries timing information based on a master clock at the source. A set of synchronization packets are received at the destination to create a set of data points, and the set of data points is weighted so that synchronization packets exhibiting a delay further from the expected delay are accorded less weight than synchronization packets exhibiting a delay closer to the expected delay. The expected delay is updated to create a current delay estimate based on the set of data points taking into account the different weighting of the data points.

Abstract: A frequency down converter that maintains accuracy even if the frequency pass band is wide uses a reference frequency band within the frequency pass band, the reference frequency band being resistant to degradation by aging or temperature variation. The ideal characteristics of the reference frequency band are previously stored. The frequency down converter has a calibration signal source that inputs a calibration signal to the frequency down converter to measure the characteristics of the reference frequency band and to store differences from the ideal characteristics. The calibration signal is input to obtain the characteristic data of other frequency bands within the frequency pass band, and the characteristic data are revised by the above differences. Then compensation coefficients to compensate the revised characteristic data into the ideal characteristics are calculated.

Abstract: A master station includes a group of circuits for performing an optimization method. In such a system, the optimization is achieved by adjusting the pull-up resistance and by setting the best possible clock frequency to ensure that data/clock high and low voltage levels are within predetermined specifications. An optimization procedure is performed in a calibration phase invoked by a user or a system whenever a change is introduced to the system, such as addition or deletion of slave stations, a change of data/clock lines, or a change that may affect on the electrical and timing characteristics of the two-wire communication system.

Abstract: Provided is an apparatus for providing a system clock synchronized to a network universally. The apparatus includes a network synchronization reference signal generating unit that outputs a reference signal for network synchronization; a network synchronization controller that generates a first control voltage that allows a first clock pulse to be in synchronization with the reference signal for network synchronization; an OVCXO that generates the first clock pulse by application of the first control voltage; a system synchronization reference signal generator that generates reference signals for system synchronization; a system synchronization controller that generates a second control voltage that allows the system clock to be in synchronization with the reference signal for system synchronization; a VCO that generates a second clock pulse by application of the second control voltage; and a system clock generator that outputs the system clock.

Abstract: A system and method for distributing data in a system. The system comprises a control register logic circuits located at scattered locations in the system, where a location is defined as scattered if the propagation delay of data sent from the control register is more than approximately one clock period. The system also comprises one or more shift registers coupled to the control register and the logic circuits. A section of each shift register is placed in proximity to each logic circuit and data is shifted serially from the control register through the shift registers to the logic circuits. A synchronizer circuit is coupled to the shift registers to synchronize data arriving at each section of the shift registers with a shift control signal arriving at the same section of the shift register.

Abstract: Local Interconnect Network message budget calculation error is reduced by utilizing an eight bit time measurement of the sync byte in the message header. The method determines the header budget separately from the data budget, simplifying the required logic. The sync byte reference time is multiplied by the message data size to determine the data budget.

Abstract: Systems, methods, and other embodiments associated with a repeatable communication system are disclosed. One example system for receiving signals from an electronic component over a plurality of point-to-point communication links comprises a repeatability logic operably connected to each of the plurality of point-to-point communication links and configured to apply a delay offset to the signals received to compensate for frequency changes in signal transmissions over the plurality of point-to-point communication links.

Abstract: A positioning system includes a plurality of devices configured to exchange RF signals with one another. A first device periodically receives a message from each other device during time slots assigned them. The received message includes information representing a time of arrival at the other device of a respective message transmitted by the first device. A time of arrival of the message from each of the other devices is determined by the first device. The first device periodically transmits messages to the other devices, each transmitted message including information representing the determined time of arrival for at least one of the other devices. A range from the first device to each of a plurality of the other devices is determined as function of the determined time of arrival of the message from the other device and the time of arrival information in the message from the other device.

Abstract: Aspects of the invention provide a method end system for reducing signal distortion within an on-chip transceiver module. In response to receipt of a signal bearing at least one external clock frequency, at least one harmonic signal of the signal bearing the at least one external clock frequency may be generated. At least one synchronization clock frequency signal may be created from the generated at least one harmonic signal. The synchronization clock frequency signal may subsequently be supplied to at least one power source. Accordingly, the at least one power source may serve as an input power source to at least one on-chip system component of the transceiver module. In this regard, an output of the at least one power source may have at least a frequency attribute of the synchronization clock frequency signal. The synchronization clock frequency signal may reduce signal distortion produced by the at least one power source.

Abstract: Methods, systems and computer program products are provided for synchronizing clocks in a computer network. A first node clock is synchronized to a second node clock by establishing an initial value of a virtual second node clock at the first node. The initial value may be established based on the first node clock and a timing record received from the second node. A frequency bias adjustment factor is determined for the virtual second node clock based on a plurality of clock requests from the first node and a plurality of corresponding responses from the second node spaced apart in time. The responses from the second node include the timing record based on the second node clock. A time of the virtual second node clock is provided based on the frequency bias adjustment factor responsive to requests for the virtual second node clock at a time between requests.

Abstract: Method and apparatus for data recapture from a source synchronous interface. A data signal is obtained via the source synchronous interface. A timing signal is obtained via the source synchronous interface, where the data signal and the timing signal are provided in association with one another. The timing signal is frequency divided by frequency divider to provide an enable signal. Data of the data signal is captured responsive to the timing signal and the enable signal, where the data captured is in a time domain of the timing signal. A data valid signal is generated from the enable signal and an internal clock signal, where the data valid signal is internally timed without having to determine a system level delay. The data is recaptured responsive to the internal clock signal and the data valid signal, where the recaptured data is in a time domain of the internal clock signal.

Abstract: A transceiver for operating in a network wherein the transceiver is arranged to synchronize to a time reference common to the network having distinguishable instances, the transceiver containing a controller for effecting the reading or writing of a real time clock at an identified instance of the common time reference; a transmitter for transmitting an identification of the real time clock value of a first instance and an identification of the first instance, and a receiver for receiving a transmitted identification of a real time clock value and an identification of a first instance.

Abstract: The uplink transmission timing from a mobile communications device is defined with reference to the downlink reception timing of signals from a particular reference cell. When that reference cell is removed from the active set, there is defined a virtual reference cell, the timing of which is defined with reference to one or more of the cells remaining in the active set, such that the timing of this new virtual reference cell corresponds to the timing of the previous reference cell. The timing of the uplink transmission from the user equipment are then defined with reference to the new virtual reference cell, in the conventional way. This has the advantage that, following a soft handover, it is not necessary to adjust the timing of uplink transmissions from the user equipment.

Abstract: Provided is a time correction system which includes a means for performing time correction of time in an operational system device by obtaining standard time information from outside with the operational system device among the devices in the cluster to be a representative device and a means for performing time correction of time in a standby system device having the operational system device as a master and the standby system device as a slave, in which the standby system device obtains time information of the operational system device. The operating state of each device is synchronously controlled so as to set the operational system device as a representative device and also the operational system as a master and the standby system as a slave when there is a change recognized in the operating state, which enables to switch the processing corresponding to the setting.

Abstract: A method and communication system for exchanging data between at least two stations that are connected to one another via a distributed bus system, in which the data is contained in messages that are sent by the stations via the bus system. A common global time base, which at a predefinable instant is synchronized with an external reference time, and is provided for the stations of the bus system. To ensure reliable synchronization of the global time base with the external reference time, in particular without destroying the characteristics of the global time, (that is, without causing jumps in the global time base or a regressive global time), the stations of the communication system receive information regarding correction of the global time base, consent to a uniform correction value, and synchronously carry out external synchronization (that is, correction of the global time base).

Abstract: The invention relates to the distribution of a synchronization signal in an optical communication system which is inherently asynchronous. In order to accomplish a cost-efficient mechanism for transmitting a synchronization signal in such a system, the amplitude of a payload signal is modulated with the synchronization signal, whereby an amplitude-modulated payload signal is obtained. This amplitude-modulated payload signal is transmitted as an optical signal to the opposite end of an optical link, where the synchronization signal is separated from the payload signal.

Abstract: New version packet data devices support a backwards-compatible signal format. New version devices operate within a first frequency band while old version devices operate within a second frequency band. The first frequency band differs from but overlaps with the second frequency band. The new version devices may operate on a first carrier frequency (within the first frequency band) while old version devices may operate at a second carrier frequency (within the second frequency band). The new version devices and/or the old version devices may also support carrier-less modulations. Preamble, header, and trailer portions of a new version signal include a plurality of spectral copies of a baseband modulated signal. One or more of these spectral copies of the baseband modulated signal is/are indistinguishable from corresponding components of an old version signal. The payload of the new version signal may be formed in the same manner or may be formed in have a wider bandwidth, higher data rate format.

Abstract: A system receives input data frames that are configured according to a SONET or an SDH standard. The input data is converted to parallel data. The system provides groups of bits along parallel signal lines. In each group of bits, N contiguous bits in the group form a complete word of input data. The system identifies the boundary between complete words in the input data by comparing subsets of the bits to predefined framing patterns. The system then aligns the input data based on the location of each word using the boundary information. The output data of the system includes data that is word aligned. The system can also detect boundaries between the frames.

Abstract: A method for synchronizing a multi-mode base station using one clock, when the systems to be synchronized are a GSM-type telecommunications system, for instance a GSM or EDGE system, and a WCDMA-type telecommunications system. In the method, the clock of the WCDMA-type system or a multiple thereof is selected as the system clock of the multi-mode base station, the system clock of the GSM-type system is implemented using multiples of the frequency of the selected clock, and the frame structure of the GSM-type system is synchronized at intervals of thirteen frames or a multiple of thirteen frames.

Abstract: Systems and methods are described for carrier-frequency synchronization for improved AM and TV broadcast reception. A method includes synchronizing a carrier frequency of a broadcast signal with a remote reference frequency. An apparatus includes a reference signal receiver; a phase comparator coupled to the reference signal receiver; a voltage controlled oscillator coupled to the phase comparator; and a radio frequency output coupled to the voltage controlled oscillator.

Abstract: Enhanced reception of transmitted signals in a communication system is achieved by synchronously combining transmissions from a cluster of transmitters at a distant receiver. The transmitters coordinate transmissions such that each substantially simultaneously transmits the same signal on the same communication channel. As a consequence of the spatial diversity of the transmitters, the transmitted signals arrive at the receiver at different times. The receiver essentially treats the different transmitted signals as though they were different multipath signals from a single transmitter. A multipath equalizer or combiner is used to determine timing offsets among the received signals, and the received signals are time aligned by phase rotating the signals in accordance with the estimated timing offsets. The time-aligned signals are then coherently combined and detected.

Abstract: A method of determining the delay between two corresponding noise-like signals comprises determining events at which the level of a first of the signal crosses a predetermined threshold, using each event to sample a second signal, combining the samples to produce an output value and determining the delay from the output value. Preferably, each sample is weighted according to one or more characteristics of the event used to define the sample. The magnitude of the output value could be an indication of the delay, or there could be several output values each for a respective differently-delayed version of the second signal, in which case these could be evaluated to select which corresponds to the actual delay.

Abstract: A distributed wireless phase locked loop system for synchronizing the transmit carrier's modulating waveform, such as the transmitter pulse timing in a pulsed EAS system and the transmit sweeping function for swept RF synchronization, is provided. To remove the effect of phase noise on the power line signal, a phase locked loop is used to filter this signal. The filtered output is used as a reference to a second phase locked loop tied to a numerically controlled oscillator and the received signal to provide a distributed phase looked loop algorithm that is wireless, and automatically synchronizes adjacent EAS systems.

Abstract: A method and system for clock synchronization of semiconductor devices. The method uses a master-slave configuration to designate a semiconductor device with the lowest rate clock source as a master device and zero all clock sources inside the semiconductor device in order to output the zeroing lowest rate clock source to slave devices for clock synchronization of all clock sources respectively in the slave devices, and further implements a phase checker in each semiconductor device to ensure clock synchronization inside and between the semiconductor devices, so required clock signals are precisely provided to next internal circuits of the semiconductor devices.

Abstract: The invention relates to a method of phase controlling a data signal transmitted from a data source to a data sink using a counter clock approach, wherein the phase of a data sink clock is compared with the phase of a reference signal at the data sink and the phase of a counter clock is adjusted at the data sink in dependency to said phase comparing. It relates also to a counter clock circuit arrangement and interface device for performing the method according to the invention.