Associated With Semiconductor Wafer Handling Patents (Class 414/935)
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Patent number: 6790286Abstract: Substrate processing parts are stacked and arranged in a multistage manner around a transport robot arranged at the center of a processing area. Rotary application units are arranged on a second layer through an indexer and the transport robot. Rotary developing units are stacked above the rotary application units respectively on a fourth layer located above the second layer. Multistage thermal processing units and an edge exposure unit are horizontally arranged in line above the indexer. In place of the processing units, inspection units performing a macro defect inspection and pattern line width measurement may be arranged in the upside region of the indexer space.Type: GrantFiled: January 15, 2002Date of Patent: September 14, 2004Assignee: Dainippon Screen Mfg. Co. Ltd.Inventors: Joichi Nishimura, Masami Ohtani, Kenji Hashinoki, Masayoshi Shiga, Koji Hashimoto
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Patent number: 6786970Abstract: A semiconductor fabricating device and method that minimize the influence of a process deteriorating material that is generated during first processes on second processes, when the plurality of processes are continually performed step by step. Operational failures are prevented during the course of the semiconductor fabricating processes, by directing air flow from a location where the second processes are carried out to a location where the first processes are carried out, to carry the process deteriorating gas away from the second processes. This reduces the frequency of failures during processing.Type: GrantFiled: August 28, 2001Date of Patent: September 7, 2004Assignee: Samsung Electronics Co., Ltd.Inventors: Hyun-Don Oh, Tae-Sin Park
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Patent number: 6786974Abstract: Both of a first insulating film and a second insulating film are formed by a spin coating method. Accordingly, the formation of the first insulating film and the second insulating film can be performed in the same SOD processing system. Moreover, the aforesaid formation of both of the first insulating film and the second insulating film by the spin coating method can provide favorable low dielectric constant properties and good adhesion of the first insulating film and the second insulating film.Type: GrantFiled: March 17, 2003Date of Patent: September 7, 2004Assignee: Tokyo Electron LimitedInventors: Takayuki Komiya, Shinji Nagashima, Shigeyoshi Kojima
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Patent number: 6788996Abstract: To reduce the manufacturing time in a production line for a semiconductor integrated circuit device, plural wafers in a lot are divided into a number of groups according to a selected number of manufacturing devices to be used for further processing of the wafers. Each group of wafers is allocated to a respective one of plural manufacturing devices in a state in which each group is housed in a respective one of plural division carriers and one sheet processing is applied to the wafer groups in the plural manufacturing devices in parallel.Type: GrantFiled: March 7, 2002Date of Patent: September 7, 2004Assignee: Renesas Technology Corp.Inventor: Michiyuki Shimizu
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Patent number: 6781363Abstract: A method and apparatus performs testing, sorting, and packaging of partially defective semiconductor memory devices in order to construct usable memory chip or module packages that meet the specification of a fully or partially functional package.Type: GrantFiled: June 21, 2001Date of Patent: August 24, 2004Inventor: Han-ping Chen
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Patent number: 6781139Abstract: An apparatus in combination with a load lock of an ion implanter comprises a cover adjacent an isolation valve slot of the load lock. The cover defines an aperture generally conforming to the size and shape of the load, or wafer, within the load lock with sufficient clearance for a robot arm to pick the wafer from within the load lock and transfer the wafer to the implant chamber. The cover masks a portion of the slot so as to reduce the opening between the load lock and the implant chamber of the ion implanter. The smaller opening reduces the pressure burst from the load lock to the implant chamber when the isolation valve and slot is opened. By reducing the pressure burst, the cover can shorten the recovery time for the implant chamber to reach operating pressure.Type: GrantFiled: September 25, 2002Date of Patent: August 24, 2004Assignee: Varian Semiconductor Equipment Associates, Inc.Inventor: Morgan D. Evans
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Patent number: 6776567Abstract: In a first aspect, a valve/sensor assembly is provided that includes a door assembly. The door assembly has (1) a first position adapted to seal an opening of a chamber; (2) a second position adapted to allow at least a blade of a substrate handler to extend through the opening of the chamber; and (3) a mounting mechanism adapted to couple the door assembly to the chamber. The valve/sensor assembly also includes a sensor system having a transmitter and a receiver adapted to detect a presence of a substrate and to communicate through at least a portion of the door assembly. Systems, methods and computer program products are provided in accordance with this and other aspects.Type: GrantFiled: April 1, 2003Date of Patent: August 17, 2004Assignee: Applied Materials, Inc.Inventors: Brian Johnson, Edward Ng, Justin Mauck, Edward R. Dykes, Joseph Arthur Kraus
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Publication number: 20040154417Abstract: A process condition measuring device and a handling system may be highly integrated with a production environment where the dimensions of the process condition measuring device are close to those of a production substrate and the handling system is similar to a substrate carrier used for production substrates. Process conditions may be measured with little disturbance to the production environment. Data may be transferred from a process condition measuring device to a user with little or no human intervention.Type: ApplicationFiled: November 19, 2003Publication date: August 12, 2004Inventors: Wayne Glenn Renken, Earl Jensen, Roy Gordon
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Patent number: 6774056Abstract: A process system for processing a semiconductor wafer or other similar flat workpiece has a head including a workpiece holder. A motor in the head spins the workpiece. A head lifter lowers the head to move the workpiece into a bath of liquid in a bowl. Sonic energy is introduced into the liquid and travels through the liquid to the workpiece, to assist in processing. The head is lifted to bring the workpiece to a rinse position. The bath liquid is drained. The workpiece is rinsed via radial spray nozzles in the base. The head is lifted to a dry position. A reciprocating swing arm sprays a drying fluid onto the bottom surface of the spinning wafer, to dry the wafer.Type: GrantFiled: July 19, 2002Date of Patent: August 10, 2004Assignee: Semitool, Inc.Inventors: Jon Kuntz, Steven Peace, Ed Derks, Brian Aegerter
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Patent number: 6772029Abstract: The present invention provides a substrate transfer controlling apparatus which can easily maximize the throughput of a substrate processing apparatus such as a semiconductor fabrication apparatus, and can satisfy a demand for immediacy of actions of a transfer device. The substrate transfer controlling apparatus comprises an input device (12) for inputting times required for actions of transfer devices (1a through 1c) and times required to process substrates in processing devices (3a through 9d), and a schedule calculator (21) for calculating execution times of actions of the transfer devices (1a through 1c) for allowing the time when a final one of the substrates to be processed is fully processed and returned from the substrate processing apparatus to be earliest, based on a predetermined conditional formula including, as parameters, the inputted times.Type: GrantFiled: July 16, 2002Date of Patent: August 3, 2004Assignee: Ebara CorporationInventors: Yoichi Kobayashi, Yasumasa Hiroo, Tsuyoshi Ohashi
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Patent number: 6767176Abstract: A set of lift pins defines a storage location for a substrate in a substrate processing chamber. Each lift pin has an actuating mechanism including a translating mechanism that translates vertical actuation into horizontal motion. The actuating mechanism may include a base, a mechanism adapted to raise and lower the base, and a lever pivotally mounted on the base. The lift pin may be fixedly mounted on the lever. A stop may be adjacent the base and adapted to engage the lever to pivot the lever as the base is lowered.Type: GrantFiled: June 29, 2001Date of Patent: July 27, 2004Assignee: Applied Materials, Inc.Inventors: Joseph Yudovsky, Salvador P. Umotoy
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Patent number: 6767846Abstract: A method of securing a substrate in a semiconductor processing machine. The method includes moving latch bodies between latched and unlatched positions while permitting contact between a clamping member of each latch body and the substrate only if the latch bodies are substantially in the latched position. In the latched position, the clamping members apply a clamping force effective to secure the substrate. Generally, contact is prevented by engagement between a support member and an ramp that is inclined such that the clamping member descends toward the substrate as the latch body moves from the unlatched position to the latched position and only contacts the substrate as the latched position is established.Type: GrantFiled: June 27, 2003Date of Patent: July 27, 2004Assignee: Tokyo Electron LimitedInventors: Stanislaw Kopacz, John Lawson
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Patent number: 6761085Abstract: A vibration damper for a semiconductor wafer handling arm includes a spring and a mass coupled to the spring to form a mass spring system that is tuned to vibrate at a structural resonant frequency of the vibrating wafer handling arm. The spring has temperature insensitive spring characteristics and the mass and spring are constructed of materials that do not outgas or produce contaminants in a semiconductor processing environment. The mass spring system is preferably a cantilever beam spring connected to a high response point on the vibrating arm and oriented to vibrate in a plane perpendicular to the plane of the wafer. The mass is preferably slidably adjustable along the length of the cantilever beam spring to adjust the resonant frequency of the vibration damper. Vibration damping of the wafer handling arm is accomplished by the transfer of kinetic energy from the vibrating wafer handling arm to the mass spring system.Type: GrantFiled: February 6, 2002Date of Patent: July 13, 2004Assignee: Novellus Systems IncorporatedInventor: Mark Tan
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Patent number: 6758647Abstract: A system and method of manufacturing wafers are provided suitable for a semiconductor manufacturing system and a method thereof capable of shortening the processing period composed of a series of processes applied to objects to be processed, mainly carry out processes and conveyance peace by peace, and which can manufacture even various kings of products. The system is provided with a plurality of processing units each having therein a conveying mechanism, and is provided therein with a conveyer device for conveying the objects to be processed to the processing units.Type: GrantFiled: February 27, 2002Date of Patent: July 6, 2004Assignee: Hitachi High-Technologies CorporationInventors: Tetsunori Kaji, Yoichi Uchimaki, Yuko Egawa
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Patent number: 6759336Abstract: Methods for reducing contamination of semiconductor substrates after processing are provided. The methods include heating the processed substrate to remove absorbed chemical species from the substrate surface by thermal desorption. Thermal desorption can be performed either in-situ or ex-situ. The substrate can be heated by convection, conduction, and/or radiant heating. The substrate can also be heated by treating the surface of the processed substrate with an inert plasma during which treatment ions in the plasma bombard the substrate surface raising the temperature thereof. Thermal desorption can also be performed ex-situ by applying thermal energy to the substrate during transport of the substrate from the processing chamber and/or by transporting the substrate to a transport module (e.g., a load lock) or to a second processing chamber for heating. Thermal desorption during transport can be enhanced by purging an inert gas over the substrate surface.Type: GrantFiled: November 18, 2002Date of Patent: July 6, 2004Assignee: Lam Research CorporationInventors: Robert Chebi, David Hemker
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Publication number: 20040118659Abstract: The present invention relates to a method and a system for operating a semiconductor factory. The factory comprises equipment (8) for processing semiconductor wafers, and an automated material handling system (12). The invention comprises clamping a wafer carrier (16) while a wafer is processed by a particular tool (10), continuing clamping the wafer carrier (16) after processing, and unclamping the wafer carrier (16) when the automated material handling system (12) is ready for removing the wafer carrier (16) from the tool (10).Type: ApplicationFiled: December 20, 2002Publication date: June 24, 2004Inventors: Clinton Haris, Sven Hahn, Karli Hantzschmann, Andreas Wintergerst, Thomas Bauer, Dieter Schneider, Guy Davis, Martin Peiter
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Patent number: 6751882Abstract: A mechanism for positioning a substrate of an image sensor. The substrate has first to fourth edges. The mechanism includes a standard unit, a link unit, and a push-up needle unit. The standard unit has adjacent first and second standard planes, both of which define a positioning region for receiving the substrate. The first and second edges contact the first and second standard planes, respectively. The link unit includes a first link and a second link pivotally mounted to the first link at a pivotal portion for positioning the third edge of the substrate. The push-up needle unit positions the fourth edge. When the link unit operates, the push-up needle unit and the pivotal portion of the link unit are moved toward the fourth edge and the third edge of the substrate, respectively, to position the substrate.Type: GrantFiled: March 5, 2003Date of Patent: June 22, 2004Assignee: Kingpak Technology Inc.Inventors: Pang-Chieh Yen, Jen-Te Huang, Yves Huang, Tanja Liu
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Patent number: 6746195Abstract: A transfer apparatus has a transfer robot for transferring wafers between a process chamber and a pre-pressurizing chamber. The process chamber and pre-pressurizing chamber are arranged in a circle. The transfer robot has multiple arms, arranged hierarchically, for transferring the wafers. The arms are rotatable along the circle and vertically movable.Type: GrantFiled: November 30, 1999Date of Patent: June 8, 2004Assignee: Fujitsu, LimitedInventor: Hidenobu Shirai
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Patent number: 6746198Abstract: The present invention provides an apparatus and method for substrate transport. In systems according to the invention, at least a first and second chamber are provided. The first chamber may be a load lock and the second chamber a processing chamber. A substrate transfer shuttle is provided and is moveable along a linear path defined by guide rollers between one position in the first chamber and another position in the second chamber. In this way, the substrate may be transferred, in both a forward and a reverse direction, between the first chamber and the second chamber. The substrate transfer shuttle is structured so that a substrate may be removed therefrom by moving a support in one of the chambers from a lowered position to an intermediate position, after which the substrate transfer shuttle may be removed from the chamber.Type: GrantFiled: June 13, 2001Date of Patent: June 8, 2004Assignee: Applied Materials, Inc.Inventors: John M. White, Norman L. Turner, Robin L. Tiner, Ernst Keller, Shinichi Kurita, Wendell T. Blonigan, David E. Berkstresser
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Patent number: 6745637Abstract: A metrology device is described which is couplable to a load port of a semiconductor product handling and/or processing tool. The tool encloses a mini-environmental atmosphere and has a load port table for supporting devices to be coupled to the load port. The metrology device contains a housing preserving an inner atmosphere, a coupling region for connecting the inner atmosphere to the mini-environmental atmosphere and a measuring device for measuring a property of a semiconductor product. The metrology device further has a support which is movable by a transport device and which is dimensioned such that the metrology device is self-supporting in a position appropriate for coupling the coupling region to the load port. The metrology device is thereby couplable to the load port without being supported by the load port table.Type: GrantFiled: March 4, 2002Date of Patent: June 8, 2004Assignees: Infineon Technologies SC300 GmbH & Co. KG, Siemens AktiengesellschaftInventors: Volker Tegeder, Detlef Gerhard, Johannes Lechner, Eckhard Marx
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Patent number: 6746239Abstract: A substrate feed chamber that is equipped in a substrate processing apparatus is provided. The substrate feed chamber has a storage tray capable of storing simultaneously three or more substrate holding trays that hold substrates in a vertical or substantially vertical condition and a horizontal movement mechanism that moves horizontally the storage tray with respect to the substrate feed position in order to effect feeding-in or feeding-out movement of the substrate holding tray between any of the chambers of a group consisting of processing chambers and load lock chambers and, in addition, if required, has a rotary movement device that rotates the storage tray. Improvement in throughput in a substrate processing apparatus can thereby be achieved and increase in the ground-contacting area of the device as a whole can be prevented.Type: GrantFiled: September 24, 2002Date of Patent: June 8, 2004Assignee: Anelva CorporationInventor: Nobuyuki Takahashi
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Patent number: 6746972Abstract: An apparatus for and a method of heat-treating a wafer for use in producing a semiconductor device ensures a desired distribution of surface temperatures across the wafer. Spacers are used to space the wafer above a heat transfer plate. The spacers can be used to adjust the spacing and inclination of the wafer relative to the heat transfer plate by predetermined amounts determined in advance to produce the desired distribution of surface temperatures across the wafer during heat-treatment. With the present invention, wafers can be heat-treated during production using a plurality of bake units disposed in parallel because each of the bake units can be precisely adjusted using the spacers to produce surface temperature distributions similar to a standard surface temperature distribution. Accordingly, the productivity of the semiconductor manufacturing process can be markedly enhanced.Type: GrantFiled: June 28, 2000Date of Patent: June 8, 2004Assignee: Samsung Electronics Co., Ltd.Inventors: Choung Hyep Kim, Sung Il Jang, Kyung Seo Park, Ki Hyon Chyun, Hee Sun Chab
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Publication number: 20040105738Abstract: A substrate processing apparatus for processing substrates prevents the substrates from contaminating as they are transferred. The apparatus includes a container, like a FOUP, for containing substrates, at least one processing chamber where the substrates are processed, a substrate transferring module including a substrate transfer chamber and at least one load port for supporting a container, and a contamination controlling system for the substrate transfer chamber. The contamination controlling system includes a purge gas supply inlet connected to the substrate transfer chamber, and a gas circulating tube for recycling the purging gas to circulate through the chamber. The substrate transfer chamber is purged using the purging gas to remove moisture and contaminating materials from the substrate transfer chamber. The formation of particles on the substrate otherwise caused by a reaction between the moisture and contaminating materials while the substrate is standing by in the container can be prevented.Type: ApplicationFiled: October 15, 2003Publication date: June 3, 2004Inventors: Yo-Han Ahn, Ki-Doo Kim, Soo-Woong Lee, Jung-Sung Hwang, Hyeog-Ki Kim
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Patent number: 6743329Abstract: In a multi-chamber load-locking device which is placed between a loading station which places a wafer cassette which houses semiconductor wafers and a transfer chamber which conveys the semiconductor wafers and in which lock-loading device chamber space is divided into two by the vertical motion of a plate, a device which comprises: sealing means by which the chamber space is selectively divided into two by contacting the plate and a state of no airflow is caused; a cylindrical cam provided with the same axis as that of the chamber; and a rotary actuator dynamically connected with the cylindrical cam, wherein the turning moment of the rotary actuator is converted into the vertical thrust of the axis and the plate rises and descends.Type: GrantFiled: August 29, 2000Date of Patent: June 1, 2004Assignee: ASM Japan K.K.Inventors: Mitsusuke Kyogoku, Takayuki Yamagishi
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Patent number: 6742977Abstract: An unprocessed substrate is conveyed to a film-processing chamber at the same time a processed substrate is conveyed to a substrate preparation chamber, reducing the substrate processing cycle, thereby increasing the yield per unit time. The substrate preparation chamber has a two-tiered structure for receiving processed substrates and unprocessed substrates. A two-tiered transfer robot allows the substrates to be removed or placed into the preparation and process chambers at the same time, thus decreasing the cycle time for processing a substrate.Type: GrantFiled: February 15, 2000Date of Patent: June 1, 2004Assignee: Kokusai Electric Co., Ltd.Inventors: Satohiro Okayama, Motoichi Kanazawa, Takeshige Ishida, Tomohiko Takeda, Yukio Akita, Satoru Ichimura, Kazunori Suzuki, Teruo Yoshino, Tokunobu Akao, Yasunobu Nakayama
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Publication number: 20040101385Abstract: A semiconductor process apparatus and a SMIF pod used therein. The semiconductor process apparatus comprises a first support, a second support, and a SMIF pod. The first support includes a first pin and a first rotating device, and the first pin is rotated by the first rotating device in a first direction. The second support includes a second pin and a second rotating device, and the second pin is rotated by the second rotating device in a second direction opposite the first direction. The SMIF pod includes a base and a cover. The base includes a slot and an engaging member, and the cover defines a hole for the engaging member to be inserted into. The first pin is inserted into the slot when the SMIF pod is disposed on the first support, and the slot is rotated by the first pin in the first direction so that the engaging member is withdrawn from the hole.Type: ApplicationFiled: November 25, 2002Publication date: May 27, 2004Inventors: Ta-Kuang Chang, Chin-Lung Wu, Tsang-Jung Lin, Lee-Zen Chen, Chin-Tsung Chen
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Patent number: 6733592Abstract: The present invention has an object to obtain a small-size, high-temperature and high-pressure treatment device adapted to treat semiconductor wafers. The high-temperature and high-pressure device of the invention is intended to treat semiconductor wafers in an atmosphere of high-temperature and high-pressure gas, and comprises a pressure vessel having at a lower portion thereof an opening for putting the semiconductor wafers in and out, a lower lid disposed so as to be vertically movable for opening and closing the lower opening, wafer transfer means for stacking and unstacking the semiconductor wafers onto and from the lower lid, and a heater attached to the lower lid for heating the semiconductor wafers.Type: GrantFiled: May 13, 2002Date of Patent: May 11, 2004Assignee: Kobe Steel, Ltd.Inventors: Takao Fujikawa, Yoichi Inoue, Yutaka Narukawa, Takahiko Ishii, Tsuneharu Masuda, Makoto Kadoguchi, Yoshihiko Sakashita
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Patent number: 6723981Abstract: A self contained sensing apparatus includes a housing establishing an interior compartment, the housing having a maximum thickness which is less than the size of a gate opening of a semiconductor wafer processing chamber for inserting the housing into the semiconductor wafer processing chamber for sensing a parameter. The housing includes a window extending through a principal housing surface. A sensor is provided within the housing and generally aligned with the window for sensing at least one parameter. A transmitter is provided within the housing and coupled with the sensor for receiving signals representative of the sensed parameter and transmitting the signals out of the housing.Type: GrantFiled: January 23, 2003Date of Patent: April 20, 2004Assignee: Greene, Tweed of Delaware, Inc.Inventors: Christopher Corrado, George Rawa, Carmin Quartapella, Timothy Edwards
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Patent number: 6722834Abstract: A robot blade and a method of using the robot blade for transferring objects, namely substrates, through a process system, the robot blade comprising an upper platform having a first object supporting surface and a lower platform having a second object supporting surface. The robot blade is mounted onto a moveable member, and the assembly facilitates substrate transfers, such as removal of a processed substrate and insertion of an unprocessed substrate within a processing chamber through a single entry of the robot blade into the processing chamber.Type: GrantFiled: October 8, 1997Date of Patent: April 20, 2004Assignee: Applied Materials, Inc.Inventor: Avi Tepman
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Patent number: 6722798Abstract: A resist coating/developing system is equipped with a cassette station, a process station and an inspection station. The inspection station comprise a defect inspection unit, a dummy inspection unit, a bypass inspection unit and a main wafer transfer device. When sampling inspections on wafer W that have completed processing in the process station, if a failure has occurred in the defect inspection unit, the inspection wafer is placed in the bypass inspection unit and excluding the inspection wafer, the non-inspection wafers are placed in the dummy inspection unit in the order that they were transferred to the inspection station and the wafer W is transferred from the inspection station to the cassette station in the order transferred from the process station to the inspection station.Type: GrantFiled: January 8, 2003Date of Patent: April 20, 2004Assignee: Tokyo Electron LimitedInventors: Norio Senba, Akira Miyata
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Publication number: 20040069680Abstract: A cassette device for accepting substrates includes a frame, a plurality of slots protruding from opposing sides of the frame, and at least two supporting bars connected to at least two of the slots.Type: ApplicationFiled: September 30, 2003Publication date: April 15, 2004Applicant: LG.Phillips LCD Co., Ltd.Inventor: Si-Hyun Song
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Patent number: 6720274Abstract: A semiconductor device fabricating method includes the steps of loading one or more substrates into a boat disposed in a waiting room positioned next to a reaction furnace; vacuum-evacuating the waiting room to a vacuum state at a base pressure; loading the boat into the reaction furnace at a first ambient pressure; and recovering a temperature of the reaction furnace at a second ambient pressure. The first or the second ambient pressure is greater than the vacuum state but less than the atmospheric pressure. Further, the method includes the step of increasing the temperature of the one or more substrates at a third ambient pressure, and also the third ambient pressure is greater than the base pressure but less than the atmospheric pressure.Type: GrantFiled: November 12, 2002Date of Patent: April 13, 2004Assignee: Hitachi Kokusai Electric Inc.Inventors: Takashi Ozaki, Kenichi Suzaki, Norikazu Mizuno
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Publication number: 20040065258Abstract: An atomic layer deposition method includes positioning a plurality of semiconductor wafers into an atomic layer deposition chamber. Deposition precursor is emitted from individual gas inlets associated with individual of the wafers received within the chamber effective to form a respective monolayer onto said individual wafers received within the chamber. After forming the monolayer, purge gas is emitted from individual gas inlets associated with individual of the wafers received within the chamber. An atomic layer deposition tool includes a subatmospheric load chamber, a subatmospheric transfer chamber and a plurality of atomic layer deposition chambers. Other aspects and implementations are disclosed.Type: ApplicationFiled: October 8, 2002Publication date: April 8, 2004Inventors: Gurtej S. Sandhu, Trung Tri Doan
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Publication number: 20040062633Abstract: In a semiconductor fabrication facility, a conveyor transports substrate carriers. The substrate carriers are unloaded from the conveyor and loaded onto the conveyor without stopping the conveyor. A load and/or unload mechanism lifts the substrate carriers from the conveyor during unloading operations, while matching the horizontal speed of the conveyor. Similarly, during loading operations, the load/unload mechanism lowers a substrate carrier into engagement with the conveyor while matching the horizontal speed of the conveyor. Individual substrates, without carriers, may be similarly loaded and/or unloaded from a conveyor.Type: ApplicationFiled: August 28, 2003Publication date: April 1, 2004Applicant: APPLIED MATERIALS, INC.Inventors: Michael Robert Rice, Robert B. Lowrance, Martin R. Elliott, Jeffrey C. Hudgens, Eric A. Englhardt
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Patent number: 6714832Abstract: A method of operating a vacuum processing system including a plurality of processing units for processing wafers, a transferring unit for carrying the wafers and a control unit for controlling the processing units and the transferring unit. At least two of the plurality of processing units are connected to the transferring unit and wafers are processed using the processing units. The method includes the steps of judging whether each of the processing units is operable or inoperable, isolating inoperable ones of the processing units judged in the judging step from wafer processing, carrying wafers to operable ones of the processing units using the transferring unit and processing the wafers using only the operable processing units.Type: GrantFiled: March 27, 2000Date of Patent: March 30, 2004Assignee: Hitachi, Ltd.Inventors: Kouji Nishihata, Kazuhiro Joo, Shoji Ikuhara, Tetsuya Tahara, Shoji Okiguchi
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Patent number: 6709267Abstract: A substrate holder for processing a semiconductor substrate includes a deep, generally vertical annular groove configured to impede the radial flow of heat within the holder and reduce heat loss from the annular side edge of the holder. The holder includes one or more support elements, such as a flat contiguous surface or a plurality of protrusions defined by intersecting grooves. The one or more support elements are configured to support a substrate a particular size in a support plane defined by the one or more support elements. The groove is configured to surround an outer edge of the substrate when the substrate is supported on the one or more support elements. In a preferred embodiment, the groove has a depth of at least 25% of the thickness of the substrate holder.Type: GrantFiled: December 27, 2002Date of Patent: March 23, 2004Assignee: ASM America, Inc.Inventors: Mark Hawkins, Matthew G. Goodman, Loren Jacobs
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Patent number: 6709470Abstract: A benchtop processing system utilizing a wafer receptacle for wafer processing is provided. The wafer receptacle has a plurality of sloped projections capable of receiving a plurality of wafers having different diameter sizes. The wafer receptacle is transported to a processing chamber from a wafer reception module which can also be used as a cooling module. Advantageously, the benchtop processing system and method of the present invention allows for efficient and compact wafer processing.Type: GrantFiled: April 15, 2002Date of Patent: March 23, 2004Assignee: WaferMasters, Inc.Inventor: Woo Sik Yoo
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Patent number: 6709545Abstract: In order to alleviate the affect of particles generated during operation of an elevation mechanism of a substrate conveyer means on the substrate that is transported in a substrate processing apparatus, a partition wall having a slit-like hole is provided in a casing that forms the outer housing of the elevation mechanism, whereby the casing is divided into a first chamber and a second chamber. A conveyer main unit holding a wafer is fixed to a rod-like support member. The support member has its end supported by a guide shaft. The guide shaft and a driving mechanism to move the support member upwards and downwards are provided in the first chamber. The support member descends and ascends along the guide shaft. A fan is disposed in the second chamber. A discharge outlet is formed at the bottom plane of the second chamber.Type: GrantFiled: January 4, 2002Date of Patent: March 23, 2004Assignee: Tokyo Electron LimitedInventor: Naruaki Iida
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Patent number: 6709521Abstract: An LCD substrate transfer apparatus includes an articulated arm unit attached to a support base, to be rotatable and stretchable/retractable within a horizontal plane. The articulated arm unit has a distal end arm, which reciprocates in a transfer direction upon stretching/retracting operation of the articulated arm unit. A support member is arranged on the distal end arm to support an LCD substrate. The support member is attached to the distal end arm to be reciprocatable in the transfer direction. A pair of temporary shelves for supporting the LCD substrate are disposed to sandwich the support member when the articulated arm unit and support member retract. The LCD substrate is placed on the temporary shelves, and only the articulated arm unit is rotated to switch the transfer directions.Type: GrantFiled: September 5, 2000Date of Patent: March 23, 2004Assignee: Tokyo Electron LimitedInventor: Tsutomu Hiroki
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Patent number: 6709877Abstract: There is disclosed an apparatus for supporting singulated electronic devices during a testing operation, comprising: a main body and a support member, wherein said support member is made of non-conducting high-resistivity material and comprises a plurality of recesses, each said recess being adapted to receive an individual singulated device. There is also disclosed a method for testing such devices in which the devices are carried on support members through a testing process including one or more environmental control chambers.Type: GrantFiled: July 23, 2001Date of Patent: March 23, 2004Assignee: ASM Assembly Automation LimitedInventors: Ching Man Stanley Tsui, Eric Chow, Curito M. Bilan, Jr.
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Publication number: 20040052618Abstract: A semiconductor device producing apparatus comprises a carrier-holding stage at which a carrier is to be placed which accommodates a substrate or substrates; a processing chamber in which the substrate or the substrates are processed; a first stage which is to hold first and second boats one at a time which are respectively to hold the substrate or the substrates and which first stage is to move the first and second boats one at a time into and out from the processing chamber; a second stage which is to hold the first and second boats one at a time; a third stage which is to hold the first and second boats one at a time; a boat transfer mechanism which transfers the first and second boats between the first, second and third stages; a substrate transfer mechanism which transfers the substrate or substrates from the carrier placed at the carrier-holding stage to either one of the first and second boats which is held by the first stage; and a controller which controls the first stage; the boat transfer mechanismType: ApplicationFiled: February 6, 2003Publication date: March 18, 2004Applicant: HITACHI KOKUSAI ELECTRIC INC.Inventors: Tatsuhisa Matsunaga, Hidehiro Yanagawa, Masaki Matsushima
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Patent number: 6704998Abstract: An I/O minienvirornent including a port door within an I/O port, and a system for removing the port door and pod door coupled thereto, and setting down the pod and port doors at a convenient location within the I/O minienvironment. After wafer processing has been completed and the wafers have been transferred back through the I/O port to the SMEF pod, the system may retrieve the port and pod doors, and return the port door to their sealing positions within the I/O port and cassette, respectively. In a preferred embodiment, the system for gripping and transporting the port and pod doors may be located on the back end of the end effector of the wafer handling robot within the I/O minienvironment. The back end of the end effector is the end of the end effector opposite that used to transport the wafers and/or cassette.Type: GrantFiled: December 24, 1997Date of Patent: March 16, 2004Assignee: Asyst Technologies, Inc.Inventors: Anthony C. Bonora, William J. Fosnight, Raymond S. Martin
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Publication number: 20040047720Abstract: A semiconductor substrate centering mechanism includes a plurality of substrate support pins, each pin having a top surface. The top surfaces of the pins define a plane in which the substrate is supported. Each pin has a tab mounted eccentrically at the top surface of the pin. The tabs extend upwardly relative to the top surfaces of the pins. The centering mechanism further includes a pin rotation mechanism adapted to rotate each pin. The pin rotation mechanism rotates the pins between a first position in which the tabs define an envelope that is larger than a circumference of the substrate and a second position in which the tabs define a centered position for the substrate. A telescoping arrangement of nesting shield segments may also be provided for each pin to prevent processing fluid from reaching a shaft of the pin.Type: ApplicationFiled: July 31, 2003Publication date: March 11, 2004Inventor: Alexander Lerner
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Patent number: 6701972Abstract: A system is provided that includes a load lock apparatus having an interior configured to receive an object. At least one inlet valve may be flow coupled to the interior of the load lock apparatus, and at least one outlet valve may also be flow coupled to the interior of the load lock apparatus. A controller may be configured to selectively control opening and closing of the at least one inlet valve. The load lock apparatus may include an object receiving mechanism that is movable within the interior of the load lock apparatus to throttle the evacuation of the interior. Several methods of using the system and load lock apparatuses are also disclosed.Type: GrantFiled: January 11, 2002Date of Patent: March 9, 2004Assignee: The BOC Group, Inc.Inventors: Colin John Dickinson, Daimhin Paul Murphy
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Publication number: 20040038499Abstract: A wafer table for supporting a wafer during the sawing process without the use of wafer backing tape and providing for the support and independent elevation of individual chips separated by the sawing process is disclosed. Also disclosed are a series of semiconductor manufacturing assemblies utilizing such a wafer table and methods of using such wafer tables.Type: ApplicationFiled: August 12, 2003Publication date: February 26, 2004Inventors: Jae-Hong Kim, Heui-Seog Kim
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Publication number: 20040037692Abstract: The present invention provides a mobile holder for a wafer, which comprises a base element, a first fixing means and a second fixing means. The first fixing means is configured to allow a wafer to be fixed to the base element. The second fixing means is configured to fix the mobile holder to a support for said mobile holder.Type: ApplicationFiled: June 10, 2003Publication date: February 26, 2004Inventors: Christof Landesberger, Armin Klumpp, Martin Bleier
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Patent number: 6696367Abstract: A substrate fabrication system is provided which includes a buffer station located inline between a front docking port and a loadlock chamber, the buffer station being operatively joined with a front handling chamber. Preferred embodiments employ a buffer station having a rack with reduced pitch, or relative spacing between shelves. Additional embodiments provide variable pitch end effectors as part of the disclosed fabrication system. Methods of fabricating wafers by quickly transferring them to purgeable buffer stations upon wafers arriving at a docking port are also provided.Type: GrantFiled: September 27, 2002Date of Patent: February 24, 2004Assignee: ASM America, Inc.Inventors: Ravinder Aggarwal, Jim Kusbel, Jim Alexander
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Publication number: 20040033128Abstract: A first mounting unit (101) and a second mounting unit (102) capable of performing component holding, component recognition, and component placement for two boards (2a, 2b) independently of each other are provided. A first conveyance path for loading and unloading the first board (2a) and a second conveyance path for loading and unloading the second board (2b) are independently arranged.Type: ApplicationFiled: June 26, 2003Publication date: February 19, 2004Inventors: Akira Kabeshita, Naoto Mimura, Noriaki Yoshida, Yoshihiko Misawa, Takeyuki Kawase, Tetsutarou Hachimura, Toshiro Nishiwaki, Taira Ishii, Mitsuo Kawate, Hideaki Watanabe
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Patent number: 6692219Abstract: A wafer handling system and a method of retrofitting the system to an existing wafer handling apparatus are provided that make possible a method of handling wafers by contacting only a narrow area of not more than two millimeters wide adjacent the edge of the wafer, which is particularly useful for backside deposition where device side contact defines an area of exclusion that renders the wafer unusable in that area. The system provides a chuck on a wafer transfer arm that holds a wafer by gravity on a segmented, upwardly facing annular surface. A compatible annular surface is provided on an aligning station chuck so that wafers can be transferred by contact only with the exclusion area of the wafer surface. A load arm has two similarly compatible chucks further provided with pneumatically actuated grippers to allow the wafer to be loaded into a vertical processing apparatus.Type: GrantFiled: November 29, 2000Date of Patent: February 17, 2004Assignee: Tokyo Electron LimitedInventors: Stephen D. Coomer, Stanislaw Kopacz, Glyn Reynolds, Michael James Lombardi, Todd Michael Visconti
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Patent number: 6693402Abstract: An apparatus capable of high accuracy position and motion control utilizes one or more linear commutated motors to move a guideless stage in one long linear direction and small yaw rotation in a plane. A carrier/follower holding a single voice coil motor (VCM) is controlled to approximately follow the stage in the direction of the long linear motion. The VCM provides an electromagnetic force to move the stage for small displacements in the plane in a linear direction perpendicular to the direction of the long linear motion to ensure proper alignment. One element of the linear commutated motors is mounted on a freely suspended drive assembly frame which is moved by a reaction force to maintain the center of gravity of the apparatus. Where one linear motor is utilized, yaw correction can be achieved utilizing two VCMs.Type: GrantFiled: October 16, 2001Date of Patent: February 17, 2004Assignee: Nikon CorporationInventors: Akimitsu Ebihara, Thomas Novak