Including Device Responsive To Nonelectrical Signal Patents (Class 438/24)
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Publication number: 20090250706Abstract: The present invention provides an optically triggered switch and a method of forming the optically triggered switch. The optically triggered switch includes a silicon layer having at least one trench formed therein and at least one silicon diode formed in the silicon layer. The switch also includes a first thyristor formed in the silicon layer. The first thyristor is physically and electrically isolated from the silicon diode by the trench and the first thyristor is configured to turn on in response to electromagnetic radiation generated by the silicon diode.Type: ApplicationFiled: April 2, 2008Publication date: October 8, 2009Inventor: THOMAS J. KRUTSICK
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Patent number: 7595510Abstract: The present invention reduces the radiation noise and the degradation of the optical waveform appeared in the output of the laser module. The laser module of the present invention comprises the laser diode, the photodiode, and the resistor, which are mounted on the stem of the laser module. The stem includes four lead terminals, one of which is commonly connected to the laser diode ad the photodiode via the resistor. Therefore, the leak of the modulation current applied to the lead terminal, to which the laser diode and the photodiode are commonly connected, may be reduced.Type: GrantFiled: May 27, 2005Date of Patent: September 29, 2009Assignee: Sumitomo Electric Industries, Ltd.Inventor: Tomoyuki Funada
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Patent number: 7579200Abstract: A semiconductor light emitting apparatus is proposed, which has thyristor without increasing number of constituent semiconductor layers, with large degree of freedom of selection of ON voltage.Type: GrantFiled: July 18, 2007Date of Patent: August 25, 2009Assignee: Sony CorporationInventor: Yoshifumi Yabuki
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Publication number: 20090206348Abstract: A composite substrate (1) comprising a substrate body (2) and a utility layer (31) fixed on the substrate body (2). A planarization layer (4) is arranged between the utility layer (31) and the substrate body (2). A method for producing a composite substrate (1) applies a planarization layer (4) on a provided utility substrate (3). The utility substrate (3) is fixed on a substrate body (2) for the composite substrate (1). The utility substrate (3) is subsequently separated, wherein a utility layer (31) of the utility substrate (3) remains for the composite substrate (1) on the substrate body (2).Type: ApplicationFiled: April 20, 2007Publication date: August 20, 2009Applicant: Osram Opto Semiconductors GmbHInventors: Volker Hârle, Uwe Strauss, Georg Brüderl, Christoph Eichler, Adrian Avramescu
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Patent number: 7575944Abstract: Provided is a method of manufacturing a nitride-based semiconductor LED including sequentially forming an n-type nitride semiconductor layer, an active layer, and a p-type nitride semiconductor layer on a substrate; forming a Pd/Zn alloy layer on the p-type nitride semiconductor layer; heat-treating the p-type nitride semiconductor layer on which the Pd/Zn alloy layer is formed; removing the Pd/Zn alloy layer formed on the p-type nitride semiconductor layer; mesa-etching portions of the p-type nitride semiconductor layer, the active layer, and the n-type nitride semiconductor layer such that a portion of the upper surface of the n-type nitride semiconductor layer is exposed; and forming an n-electrode and a p-electrode on the exposed n-type nitride semiconductor layer and the p-type nitride semiconductor layer, respectively.Type: GrantFiled: August 13, 2007Date of Patent: August 18, 2009Assignee: Samsung Electro-Mechanics Co., Ltd.Inventors: Sun Woon Kim, Seong Ju Park, Ja Yeon Kim, Min Ki Kwon, Dong Ju Lee, Jae Ho Han
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Publication number: 20090186432Abstract: A multi-chip device includes LED sensors for sensing light separated by a predetermined interval in a wafer, LEDs for emitting light formed over the wafer respectively corresponding to the LED sensors, a driving circuit formed between the LEDs over the wafer, an insulating film over the wafer, and trenches in the insulating film exposing the LEDs.Type: ApplicationFiled: March 27, 2009Publication date: July 23, 2009Inventor: Hee Bok KANG
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Patent number: 7560296Abstract: A method of manufacturing a low defect density GaN material comprising at least two step of growing epitaxial layers of GaN with differences in growing conditions, (a.) a first step of growing an epitaxial layer GaN on an epitaxially compentent layer under first growing conditions selected to induce island features formation, followed by (b.) a second step of growing an epitaxial layer of GaN under second growing conditions selected to enhance lateral growth until coalescence.Type: GrantFiled: September 11, 2006Date of Patent: July 14, 2009Assignee: LumilogInventors: Eric Frayssinet, Bernard Beaumont, Jean-Pierre Faurie, Pierre Gibart
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Patent number: 7553683Abstract: A semiconductor light emitting device is provided with a separately fabricated wavelength converting element. The wavelength converting element, of e.g., phosphor and glass, is produced in a sheet that is separated into individual wavelength converting elements, which are bonded to light emitting devices. The wavelength converting elements may be grouped and stored according to their wavelength converting properties. The wavelength converting elements may be selectively matched with a semiconductor light emitting device, to produce a desired mixture of primary and secondary light.Type: GrantFiled: June 9, 2004Date of Patent: June 30, 2009Assignee: Philips Lumiled Lighting Co., LLCInventors: Paul S. Martin, Gerd O. Mueller, Regina B. Mueller-Mach, Helena Ticha, Ladislav Tichy
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Publication number: 20090154935Abstract: A transceiver for use in a bidirectional optical communication link over a multimode channel is provided. The transceiver includes a single transverse mode light source in a transmitter. A waveguide or fiber based bidirectional coupler projects the transmitter mode to the high modes of the multimode channel. A detector coupled to predominantly all the modes of the channel via the waveguide or fiber based bidirectional coupler.Type: ApplicationFiled: December 18, 2007Publication date: June 18, 2009Inventor: Shrenik Deliwala
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Patent number: 7544524Abstract: An alternating current light-emitting device and the fabrication method thereof is disclosed. The alternating current light-emitting device includes at least one alternating current micro-die light-emitting module formed on a substrate and composed of at least two micro-dies connected to one another. The micro-dies, each includes at least two active layers, are electrically connected by a conductive structure, such that the active layers of the micro-dies take turns emitting light during positive and negative half cycles of alternating current, thereby providing a full-scale light-emitting area for all-time light emission.Type: GrantFiled: May 12, 2006Date of Patent: June 9, 2009Assignee: Industrial Technology Research InstituteInventors: Ming-Te Lin, Hsi-Hsuan Yen, Wen-Yung Yeh, Ming-Yao Lin, Sheng-Pan Huang
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Patent number: 7534634Abstract: A surface-mountable light-emitting diode light source is described, in which the leadframe-bends toward the rear side of the package that are required for surface mounting lie within a transparent plastic molded body. Also described is a method of producing a mixed-light, preferably white-light source on the basis of a UV- or blue-emitting semiconductor LED. The LED is mounted on a leadframe, a transparent plastics molding composition is mixed with a conversion substance and possibly further fillers to form a molding composition. The leadframe is encapsulated, preferably by the injection-molding process, with the molding composition in such a way that the LED is surrounded on its light-exiting sides by the molding composition.Type: GrantFiled: July 10, 2006Date of Patent: May 19, 2009Assignee: Osram GmbHInventors: Harald Jäger, Klaus Höhn, Reinhold Brunner
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Publication number: 20090121943Abstract: Apparatus, system, and method are described for a complementary metal oxide semiconductor (CMOS) integrated circuit device having a first metal layer that includes a radiating element and a second metal layer that includes a first conductor coupled to the radiating element. The first conductor and the radiating element are mutually coupled to form an antenna to wirelessly communicate a signal.Type: ApplicationFiled: January 15, 2009Publication date: May 14, 2009Applicant: INTEL CORPORATIONInventors: Keith R. Tinsley, Seong-Youp Suh
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Patent number: 7531371Abstract: A multisurfaced microdevice system array is produced from a wafer formed of semiconductor substrate material. Sensing, controlling and actuating microdevices are fabricated at specific location on both sides of the wafer, and the wafer is diced. Each die thus created is then formed into a multisurfaced, multifaced structure having outer and inner faces. The multifaced structure and the microdevices form a standardized microdevice system, and cooperatively combined microdevice systems form a microdevice system array. Communication of energy and data to and between microdevices on each and other microdevice systems of the microdevice system array is provided by energy transferring devices including electric conductors for transferring electric energy, ultrasound emitters and receivers for transferring acoustic energy, and electromagnetic energy emitters and receivers for transferring electromagnetic energy.Type: GrantFiled: February 21, 2006Date of Patent: May 12, 2009Inventors: John D. G. Rather, Gregory W. Auner
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Publication number: 20090117676Abstract: A method of fabricating a semiconductor optical device is disclosed. This semiconductor optical device includes first and second optical semiconductor elements.Type: ApplicationFiled: September 25, 2007Publication date: May 7, 2009Inventor: Tomokazu Katsuyama
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Patent number: 7524687Abstract: A method for producing an integrated semiconductor component comprising a first semiconductor layer construction for emitting radiation and a second semiconductor layer construction for receiving radiation, wherein a substrate is first provided and a first semiconductor layer sequence containing a radiation-generating region is deposited epitaxially on the substrate. A second semiconductor layer sequence containing a radiation-absorbing region is subsequently deposited epitaxially on the first semiconductor layer sequence. The second semiconductor layer sequence is then patterned in order to uncover a first location and a second location. A first semiconductor layer construction is electrically insulated from a second semiconductor layer construction. Finally, a first contact layer is applied to a free surface of the substrate and a second contact layer is applied at least to the first and second locations for contact-connection.Type: GrantFiled: February 26, 2008Date of Patent: April 28, 2009Assignee: Osram Opto Semiconductors GmbHInventors: Glenn-Yves Plaine, Tony Albrecht, Peter Brick, Marc Philippens
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Publication number: 20090101915Abstract: A photo sensor includes a patterned shielding conductive layer disposed on a transparent substrate, and a buffer dielectric layer, a patterned semiconductor layer, and a dielectric layer disposed on the patterned shielding layer in order. The patterned semiconductor layer includes an intrinsic region, a first doped region, and a second doped region, wherein the first and second doped regions are positioned at two sides of the intrinsic region separately. A patterned transparent conductive layer is disposed on the dielectric layer and covers the boundary of the intrinsic region and the first doped region and the boundary of the intrinsic region and the second doped region. The patterned transparent conductive layer is electrically connected to the patterned shielding conductive layer.Type: ApplicationFiled: October 21, 2008Publication date: April 23, 2009Inventors: Chien-Sen Weng, Chih-Wei Chao, Chrong-Jung Lin, Ya-Chin King
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Publication number: 20090101197Abstract: Included are a semiconductor layer that is formed on a light receiving surface of a semiconductor substrate and is of a type opposite to that of said semiconductor substrate, an electrode of a semiconductor layer that is of the same type as that of the semiconductor layer of said light receiving surface and is formed on a rear surface opposite to said light receiving surface, an electrode that is of the same type as that of said semiconductor substrate and is electrically insulated from said electrode of the semiconductor layer of the same type as that of the semiconductor layer of said light receiving surface formed on said rear surface, and a semiconductor layer that is of the same type as that of the semiconductor layer of said light receiving surface and electrically connects between the semiconductor layer of said light receiving surface and said electrode of the semiconductor layer of the same type as that of the semiconductor layer of said light receiving surface formed on said rear surface.Type: ApplicationFiled: May 11, 2005Publication date: April 23, 2009Applicant: MITSUBISHI ELECTRIC CORPORATIONInventor: Hiroaki Morikawa
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Patent number: 7521280Abstract: A method according to one embodiment includes forming a photosensitive region on an substrate; forming at least one dielectric layer upon the photosensitive region; simultaneously forming and patterning a metal layer upon the photosensitive region; wherein a first portion of the metal layer is formed upon the photosensitive region and serves as an optical reflector; wherein a second portion of the metal layer is formed in a transfer gate region and serves as a metal gate electrode for a transfer gate transistor.Type: GrantFiled: July 31, 2008Date of Patent: April 21, 2009Assignee: International Business Machines CorporationInventors: Brent Alan Anderson, John Joseph Ellis-Monaghan, Edward J. Nowak
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Publication number: 20090093073Abstract: A method of making a circuitized substrate (e.g., PCB) including at least one and possibly several internal optical pathways as part thereof such that the resulting substrate will be capable of transmitting and/or receiving both electrical and optical signals. The method involves forming at least one opening between a side of the optical core and an adjacent upstanding member such that the opening is defined by at least one angular sidewall. Light passing through the optical core material (or into the core from above) is reflected off this angular sidewall. The medium (e.g., air) within the opening thus also serves as a reflecting medium due to its own reflective index in comparison to that of the adjacent optical core material. The method utilizes many processes used in conventional PCB manufacturing, thereby keeping costs to a minimum.Type: ApplicationFiled: October 9, 2007Publication date: April 9, 2009Applicant: Endicott Interconnect Technologies, Inc.Inventors: Benson Chan, How T. Lin, Roy H. Magnuson, Voya R. Markovich, Mark D. Poliks
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Publication number: 20090072248Abstract: A light emitting display device includes a light emitting diode and a thin film transistor on a substrate, the light emitting diode and thin film transistor being electrically coupled to each other, and a photo diode on the substrate, the photo diode including an N-type doping region, a P-type doping region, and an intrinsic region between the N-type doping region and the P-type doping region, the intrinsic region including amorphous silicon.Type: ApplicationFiled: July 18, 2008Publication date: March 19, 2009Inventors: Ki-Ju Im, Byoung-Deog Choi
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Publication number: 20090073107Abstract: A display device including a liquid crystal display (LCD) panel, a backlight module, and a photo-sensing device is provided. The backlight module is disposed below the LCD panel and is suitable for providing a light source. The photo-sensing device is built in the LCD panel and includes a plurality of photo-sensors having different illumination sensing capabilities. The backlight module modulates the output intensity of the light source according to the sensed result of one of the photo-sensors. Thereby, the display device can precisely modulate the intensity of the back light according to the intensity of ambient light so as to improve the contrast ratio and to reduce the power consumption.Type: ApplicationFiled: January 23, 2008Publication date: March 19, 2009Applicant: AU OPTRONICS CORPORATIONInventors: Chi-Wen Chen, Min-Feng Chiang, Ming-Sheng Lai
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Publication number: 20090074350Abstract: An optical interconnect is provided which may allow flexible high-bandwidth interconnection between chips, eliminate the need for optical alignment between the optoelectrical (OE) die and waveguide during assembly because the OE die is at least partially embedded inside the waveguide (lower cladding layer, upper cladding layer, and core layer), eliminate the need for handling the optical interconnect at OEM, and not impact current substrate and motherboard technologyType: ApplicationFiled: September 19, 2007Publication date: March 19, 2009Inventor: Daoqiang Lu
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Patent number: 7482189Abstract: A light emitting diode (LED) and a method are provided for fabricating the a LED with an improved structure for better light emitting efficiency and better light output performance.Type: GrantFiled: September 4, 2007Date of Patent: January 27, 2009Assignee: Samsung Electro-Mechanics Co., Ltd.Inventors: Jeong-wook Lee, Vassili Leniachine, Mi-jeong Song, Suk-ho Yoon, Hyun-soo Kim
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Publication number: 20080315216Abstract: The present invention improves the efficiency of conversion from a non-radiation two-dimensional electron plasmon wave into a radiation electromagnetic wave, and realizes a wide-band characteristic. A terahertz electromagnetic wave radiation element of the present invention comprises a semiinsulating semiconductor bulk layer, a two-dimensional electron layer formed directly above the semiconductor bulk layer by a semiconductor heterojunction structure, source and drain electrodes electrically connected to two opposed sides of the two-dimensional electron layer, a double gate electrode grating which is provided in the vicinity of and parallel to the upper surface of the two-dimensional electron layer and for which two different dc bias potentials can be alternately set, and a transparent metal mirror provided in contact with the lower surface of the semiconductor bulk layer, formed into a film shape, functioning as a reflecting mirror in the terahertz band, and being transparent in the light wave band.Type: ApplicationFiled: August 23, 2005Publication date: December 25, 2008Inventors: Taiichi Otsuji, Eiichi Sano
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Publication number: 20080308755Abstract: A mechanical joint having at least first and second joint elements arranged in contact with each other. A first surface of the first joint element abuts a second surface of the second joint element and is at least partially provided with at least one optically emitting module. The respective abutting second surface of the second element is provided, at least in part, with at least one optically receiving module.Type: ApplicationFiled: June 13, 2007Publication date: December 18, 2008Inventors: Kenichi Hashizume, Kaoru Tanaka
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Patent number: 7465592Abstract: The invention provides a reliable way to fabricate a new vertical structure compound semiconductor device with improved light output and a laser lift-off processes for mass production of GaN-based compound semiconductor devices. A theme of the invention is employing direct metal support substrate deposition prior to the LLO by an electro-plating method to form an n-side top vertical structure. In addition, an ITO DBR layer is employed right next to a p-contact layer to enhance the light output by higher reflectivity. A perforated metal wafer carrier is also used for wafer bonding for easy handling and de-bonding. A new fabrication process is more reliable compared to the conventional LLO-based vertical device fabrication. Light output of the new vertical device having n-side up structure is increased 2 or 3 times higher than that of the lateral device fabricated with same GaN/InGaN epitaxial films.Type: GrantFiled: April 27, 2005Date of Patent: December 16, 2008Assignee: Verticle, Inc.Inventor: Myung Cheol Yoo
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Patent number: 7465594Abstract: An active-matrix addressing substrate improves the degradation of initial alignment of liquid-crystal molecules caused by the steps or level differences due to the pixel electrodes and/or the common electrode. The pixel electrodes are formed on or over the first insulating layer and the common electrode is formed on the second or third insulating layer. The second insulating layer has steps or level differences due to the pixel electrodes in their vicinities. The second insulating layer is made of a dielectric material having fluidity prior to hardening, e.g., an acrylic resin. The steps of the second insulating layer are relaxed, resulting in the gently sloping steps. The steps of an overlying alignment layer due to the common electrode slope gently as well. The thickness of the pixel electrodes, the thickness and inclination angle of the second insulating layer, and the thicknesses of the pixel and common electrodes are defined.Type: GrantFiled: May 17, 2006Date of Patent: December 16, 2008Assignee: Nec LCD Technologies, Ltd.Inventor: Takayuki Konno
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Patent number: 7459726Abstract: A semiconductor device which has a high performance integrated circuit formed of an inexpensive glass substrate and capable of processing a large amount of information and operating at higher data rates. The semiconductor device includes semiconductor elements stacked by transferring a semiconductor element formed on a different substrate. A resin film is formed between the stacked semiconductor elements and a metal oxide film is partially formed between the stacked semiconductor elements as well. A first electric signal is converted to an optical signal in a light emitting element electrically connected to one of the stacked semiconductor elements. Meanwhile, the optical signal is converted to a second electric signal in a light receiving element electrically connected to another one of the stacked semiconductor elements.Type: GrantFiled: February 11, 2004Date of Patent: December 2, 2008Assignee: Semiconductor Energy Laboratory Co., Ltd.Inventors: Kiyoshi Kato, Toru Takayama, Junya Maruyama, Yuugo Goto, Yumiko Ohno
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Patent number: 7456434Abstract: A micro optical bench structure and a method of manufacturing a micro optical bench structure are provided. The micro optical bench structure includes: a lower substrate; an upper substrate which is bonded to the lower substrate, and has a through-hole for exposing the lower substrate; and a first optical device which is installed at the lower substrate, and units relating to the first optical device.Type: GrantFiled: January 13, 2005Date of Patent: November 25, 2008Assignee: Samsung Electronics Co., Ltd.Inventors: Yong-sung Kim, Seok-whan Chung, Jao-ho You, Hyung Choi, Woong-lin Hwang
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Publication number: 20080277885Abstract: A solar cell production system utilizes self-contained vacuum chucks that hold and cool solar cell wafers during transport on a conveyor between processing stations during a fabrication process. Each self-contained vacuum chuck includes its own local vacuum pump and a closed-loop cooling system. After each wafer is processed, it is removed from its vacuum chuck, and the vacuum chuck is returned to the start of the production line by a second conveyor belt. In one embodiment, each vacuum chuck includes an inductive power supply that is inductively coupled to an external source to drive that vacuum chuck's vacuum pump and cooling system. An optional battery is recharged by the inductive power supply, and is used to power the vacuum pump and cooling system during hand-off between adjacent processing stations.Type: ApplicationFiled: May 8, 2007Publication date: November 13, 2008Applicant: Palo Alto Research Center IncorporatedInventors: David G. Duff, Craig Eldershaw
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Patent number: 7429750Abstract: A solid-state element has: a semiconductor layer formed on a substrate, the semiconductor layer having a first layer that corresponds to an emission area of the solid-state element to and a second layer through which current is supplied to the first layer; a light discharge surface through which light emitted from the first layer is externally discharged, the light discharge surface being located on the side of the substrate; and an electrode having a plurality of regions that are of a conductive material and are in ohmic-contact with the second layer.Type: GrantFiled: March 22, 2005Date of Patent: September 30, 2008Assignee: Toyoda Gosei Co., Ltd.Inventors: Yoshinobu Suehiro, Seiji Yamaguchi
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Patent number: 7427753Abstract: A method of milling a cross section of a wafer and a milling device. The method includes a coarse scanning of at least two milling frames and a fine scanning of at least one milling frame. The milling device is adapted to cross-section milling of a wafer, said milling includes a coarse scanning of at least two milling frames and a fine scanning of at least one milling frame.Type: GrantFiled: June 16, 2005Date of Patent: September 23, 2008Assignee: Applied Materials, Israel, Ltd.Inventor: Asher Pearl
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Publication number: 20080226219Abstract: The present disclosure includes methods, devices, and systems having zinc oxide waveguides for optical signal interconnections. One optical signal interconnect system includes an oxide layer on a semiconductor substrate. A ZnO waveguide can be provided in the oxide layer and connected to a silicon detector to receive optical signals having a wavelength, for example, between 500 and 375 nanometers (nm).Type: ApplicationFiled: March 13, 2007Publication date: September 18, 2008Inventors: Leonard Forbes, Kie Y. Ahn
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Patent number: 7422919Abstract: An avalanche photodiode includes at least one crystal layer having a larger band-gap than that of an absorption layer formed by a composition or material different from that of the absorption layer formed on a junction interface between a compound semiconductor absorbing an optical signal and an Si multiplication layer, and the crystal layer may be intentionally doped with n or p type impurities to cancel electrical influences of the impurities containing oxides present on the junction interface of compound semiconductor and surface of Si.Type: GrantFiled: December 30, 2005Date of Patent: September 9, 2008Assignees: Hitachi, Ltd., Opnext Japan, Inc.Inventors: Shigehisa Tanaka, Sumiko Fujisaki, Yasunobu Matsuoka
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Patent number: 7420728Abstract: Methods for making MEMS devices such as interferometric modulators involve selectively removing a sacrificial portion of a material to form an internal cavity, leaving behind a remaining portion of the material to form a post structure. The material may be blanket deposited and selectively altered to define sacrificial portions that are selectively removable relative to the remaining portions. Alternatively, a material layer can be laterally recessed away from openings in a covering layer. These methods may be used to make unreleased and released interferometric modulators.Type: GrantFiled: March 25, 2005Date of Patent: September 2, 2008Assignee: IDC, LLCInventors: Ming-Hau Tung, Philip D. Floyd, Brian W. Arbuckle
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Patent number: 7419839Abstract: A device is provided with at least one light emitting device (LED) die mounted on a submount with an optical element subsequently thermally bonded to the LED die. The LED die is electrically coupled to the submount through contact bumps that have a higher temperature melting point than is used to thermally bond the optical element to the LED die. In one implementation, a single optical element is bonded to a plurality of LED dice that are mounted to the submount and the submount and the optical element have approximately the same coefficients of thermal expansion. Alternatively, a number of optical elements may be used. The optical element or LED die may be covered with a coating of wavelength converting material. In one implementation, the device is tested to determine the wavelengths produced and additional layers of the wavelength converting material are added until the desired wavelengths are produced.Type: GrantFiled: November 12, 2004Date of Patent: September 2, 2008Assignee: Philips Lumileds Lighting Company, LLCInventors: Michael D. Camras, William R. Imler, Frank S. Wall, Jr, Frank M. Steranka, Michael R. Krames, Helena Ticha, Ladislav Tichy
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Publication number: 20080190175Abstract: A method of producing a structure by three-dimensionally processing a flat member includes a preparing, a first forming and a second forming. In the preparing, a substrate is prepared. In the first forming, an etching mask is formed on the substrate. The etching mask has at least two openings, and areas of the two openings are different from each other. In the second forming, at least a part of a three-dimension surface shape of the structure is formed on a surface of the substrate by a dry-etching on the substrate in accordance with the area of the opening of the etching mask.Type: ApplicationFiled: July 10, 2007Publication date: August 14, 2008Applicant: DENSO CORPORATIONInventors: Hiroyuki Wado, Kazuhiko Kanoh
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Publication number: 20080181267Abstract: An optical device, including: a surface emitting semiconductor laser; and a photodetection device for detecting part of laser light emitted from the surface emitting semiconductor laser; the photodetection device including a light absorbing layer and a first contact layer; and the first contact layer being formed with a semiconductor having an absorption edge wavelength smaller than an oscillation wavelength of the surface emitting semiconductor laser.Type: ApplicationFiled: January 28, 2008Publication date: July 31, 2008Applicant: SEIKO EPSON CORPORATIONInventors: Yasutaka IMAI, Masamitsu MOCHIZUKI
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Publication number: 20080173879Abstract: A galvanic optocoupler of the type monolithically integrated on a silicon substrate and having at least one luminous source and a photodetector interfaced by means of a galvanic insulation layer. The photodetector can be a phototransistor realized in the silicon substrate, and the galvanic insulation layer (40) is a passivation layer of this phototransistor. The luminous source, above the galvanic insulation layer includes an integrated LED having a first and second polysilicon layer with function of cathode and anode, respectively, these first and second layers enclosing at least one light emitter layer, in particular a silicon oxide layer enriched with silicon (SRO). An integration process of a galvanic optocoupler thus made, in particular in BCD3s technology is provided.Type: ApplicationFiled: January 24, 2008Publication date: July 24, 2008Applicant: STMicroelectronics S.r.l.Inventors: Mariantonietta Monaco, Massimiliano Fiorito, Gianpiero Montalbano, Salvatore Coffa
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Patent number: 7399651Abstract: An LED package structure includes a lower substrate, an upper substrate disposed on the lower substrate and having a though hole exposing a portion of the upper surface of the lower substrate; an individual LED unit disposed within the through hole in the upper substrate, a conductive pattern layer disposed on the upper substrate, a conducting wire interconnecting electrically the LED unit and the conductive pattern layer, and an encapsulating body disposed on the conductive pattern layer in such a manner that the encapsulating body hermetically encloses the LED unit, the through hole in the upper substrate and an inner peripheral portion of the conductive pattern layer surrounding the through hole. The lower and upper substrates are separately formed.Type: GrantFiled: December 23, 2005Date of Patent: July 15, 2008Assignee: Lustrous Technology Ltd.Inventors: Chia-Chi Liu, Pao-Chi Chi
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Publication number: 20080157099Abstract: An organic light emitting display and a fabricating method thereof in which an alignment mark is formed in the non-display region. The organic light emitting display includes a substrate having a display region and a non-display region; a buffer layer formed the overall substrate; a gate insulating layer; a gate electrode formed on the gate insulating layer corresponding to the active layer; an interlayer dielectric layer formed on the gate insulating layer; a source/drain electrode formed on the interlayer dielectric layer and electrically coupled to the active layer; an insulating layer formed on the source/drain electrode; and an organic light emitting diode formed on the insulating layer and electrically coupled to the source/drain electrode. Further, the organic light emitting display includes an alignment mark formed on one of the substrate and the buffer layer.Type: ApplicationFiled: December 20, 2007Publication date: July 3, 2008Applicant: Samsung SDI Co., Ltd.Inventors: Taehoon Yang, Jinwook Seo, Byoungkeon Park, Kiyong Lee, Seihwan Jung
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Publication number: 20080158864Abstract: A monolithic photo-chip with a solar device and a light-emitting device that can be manufactured by utilizing a method of selective area growth (SAG) is provided, which has the advantages of simple structure, compactness and cost-effectiveness. Moreover, a solar-powered illuminator including the monolithic photo-chip and a rechargeable battery is provided, which has the advantages of small size, compactness, simple integration, easy installation and cost-effectiveness. Accordingly, the solar-powered illuminator is very suitable for versatile application fields, such as the LD application field including a laser pointer, a laser sight, a laser aiming device, a laser level and a laser measuring tool, etc; or the LED application field including a decoration lamp, a courtyard lamp, a garden lamp and a advertisement lamp, a streetlamp, a warning sign and a indication sign for the road application, etc.Type: ApplicationFiled: December 28, 2006Publication date: July 3, 2008Applicants: HIGHER WAY ELECTRONIC CO., LTD., Millennium Communication Co., LtdInventors: Li-Hung Lai, Kun-Fang Huang, Wen-Sheng Hsieh, Li-Wen Lai
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Patent number: 7393707Abstract: An object of the present invention is to provide an EL display device having high operation performance and reliability. A third passivation film 45 is disposed under the EL element 203 comprising a pixel electrode (anode) 46, an EL layer 47 and a cathode 48, and diffusion of alkali metals from the EL element 203 formed by ink jet method into TFTs is prevented. Further, the third passivation film 45 prevents penetration of moisture and oxygen from the TFTs, and suppress degradation of the EL element 203 by dispersing the heat generated by the EL element 203.Type: GrantFiled: March 22, 2005Date of Patent: July 1, 2008Assignee: Semiconductor Energy Laboratory Co., Ltd.Inventors: Shunpei Yamazaki, Jun Koyama, Kunitaka Yamamoto, Toshimitsu Konuma
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Publication number: 20080153189Abstract: A method for producing an integrated semiconductor component comprising a first semiconductor layer construction for emitting radiation and a second semiconductor layer construction for receiving radiation, wherein a substrate is first provided and a first semiconductor layer sequence containing a radiation-generating region is deposited epitaxially on the substrate. A second semiconductor layer sequence containing a radiation-absorbing region is subsequently deposited epitaxially on the first semiconductor layer sequence. The second semiconductor layer sequence is then patterned in order to uncover a first location and a second location. A first semiconductor layer construction is electrically insulated from a second semiconductor layer construction. Finally, a first contact layer is applied to a free surface of the substrate and a second contact layer is applied at least to the first and second locations for contact-connection.Type: ApplicationFiled: February 26, 2008Publication date: June 26, 2008Inventors: Glenn-Yves Plaine, Tony Albrecht, Peter Brick, Marc Philippens
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Publication number: 20080151162Abstract: A liquid crystal display device comprises a liquid crystal panel including first and second substrates bonded to each other with a liquid crystal layer positioned therebetween, and the photosensor, formed on the second substrate, for sensing an external light from the surroundings, wherein the photosensor includes a semiconductor layer formed on the second substrate and provided with n+-type ion implantation region, ion non-implantation region and lightly doped region; an insulation film, formed on the second substrate, for covering the semiconductor layer; a passivation film, formed on the second substrate, for covering the insulation film; a first contact hole passing through the insulation film and the passivation film, to expose source and drain regions of the semiconductor layer; source and drain electrodes connected with the source and drain regions of the semiconductor layer through the first contact hole; an ion implanting prevention film formed on the insulation film and overlapped with the ion non-iType: ApplicationFiled: December 19, 2007Publication date: June 26, 2008Inventors: Kyung Eon Lee, Myoung Kee Baek, Han Wook Hwang
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Patent number: 7387904Abstract: A light-emitting element has a layer including an organic material between a first electrode and a second electrode, and further has a layer including a metal oxide between the second electrode and the layer including the organic material, where these electrodes and layers are laminated so that the second electrode is formed later than the first electrode. The light-emitting element is suppressed damage caused to a layer including an organic material during deposition by sputtering and a phenomenon such as short circuit between electrodes.Type: GrantFiled: September 29, 2004Date of Patent: June 17, 2008Assignee: Semiconductor Energy Laboratory Co., Ltd.Inventors: Keiko Saito, Hisao Ikeda
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Publication number: 20080131984Abstract: An optical memory cell having a material layer associated with a pixel capable of emitting and receiving light. The material layer has phosphorescent material formed therein for storing data as light received from and emitted to the pixel.Type: ApplicationFiled: February 7, 2008Publication date: June 5, 2008Inventor: Terry L. Gilton
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Publication number: 20080116463Abstract: Provided is a light-emitting apparatus which can prevent a shadow mask from contacting a light-emitting medium to suppress damage of the medium, by using a conductive layer formed on a device isolation layer as a pressing member for the shadow mask, and can attain more secure conduction between a second electrode and an auxiliary electrode.Type: ApplicationFiled: November 14, 2007Publication date: May 22, 2008Applicant: CANON KABUSHIKI KAISHAInventor: Naoyuki Ito
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Patent number: 7374958Abstract: A light emitting semiconductor bonding structure includes a structure formed by bonding a substrate onto a light emitting semiconductor. The substrate is a structure containing electric circuits. The ohmic contact N electrode layer and P electrode layer are formed on the N-type contact layer and the P-type contact layer of the light emitting semiconductor respectively. A first metallic layer and a second metallic layer are formed on the surface of the substrate by means of immersion plating or deposition. The metallic layers are connected electrically to the corresponding electric signal input/output nodes of the electric circuit of the substrate. The first metallic layer and the second metallic layer are bonded onto the N electrode layer and the P electrode layer respectively through supersonic welding, and as such the light emitting semiconductor is bonded onto the substrate, and thus realizing the electric connection in-between.Type: GrantFiled: April 26, 2006Date of Patent: May 20, 2008Assignee: Formosa Epitaxy IncorporationInventors: Shyi-Ming Pan, Fen-Ren Chien
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Patent number: 7351598Abstract: A solid-state image pickup device includes an element isolation insulating film electrically isolating pixels on the surface of a well region; a first isolation diffusion layer electrically isolating the pixels under the element isolation insulating film; and a second isolation diffusion layer electrically isolating the pixels under the first isolation diffusion layer, wherein a charge accumulation region is disposed in the well region surrounded by the first and second isolation diffusion layers, the inner peripheral part of the first isolation diffusion layer forms a projecting region, an impurity having a conductivity type of the first isolation diffusion layer and an impurity having a conductivity type of the charge accumulation region are mixed in the projecting region, and a part of the charge accumulation region between the charge accumulation region and the second isolation diffusion layer is abutted or close to the second isolation diffusion layer under the projecting region.Type: GrantFiled: November 27, 2006Date of Patent: April 1, 2008Assignee: Sony CorporationInventors: Keiji Tatani, Hideshi Abe, Masanori Ohashi, Atsushi Masagaki, Atsuhiko Yamamoto, Masakazu Furukawa