Abstract: A method of forming a laterally-varying charge profile in a silicon carbide substrate includes the steps of forming a silicon nitride layer on a polysilicon layer formed on the silicon carbide substrate, and patterning the silicon nitride layer to provide a plurality of silicon nitrite layer segments which are spaced apart in the lateral direction and which are provided with openings therebetween which are of varying widths. The polysilicon layer is oxidized using the layer segments as an oxidation mask to form a silicon dioxide layer of varying thickness from the polysilicon layer and to form a polysilicon layer portion therebeneath of varying thickness. The silicon dioxide layer and silicon nitride layer segments are removed, and a dopant is ion implanted into the silicon carbide substrate using the polysilicon layer portion of varying thickness as an implantation mask to form a laterally-varying charge profile in the silicon carbide substrate.

Abstract: A method for making compound semiconductor devices including the use of a p-type dopant is disclosed wherein the dopant is co-implanted with an n-type donor species at the time the n-channel is formed and a single anneal at moderate temperature is then performed. Also disclosed are devices manufactured using the method. In the preferred embodiment n-MESFETs and other similar field effect transistor devices are manufactured using C ions co-implanted with Si atoms in GaAs to form an n-channel. C exhibits a unique characteristic in the context of the invention in that it exhibits a low activation efficiency (typically, 50% or less) as a p-type dopant, and consequently, it acts to sharpen the Si n-channel by compensating Si donors in the region of the Si-channel tail, but does not contribute substantially to the acceptor concentration in the buried p region. As a result, the invention provides for improved field effect semiconductor and related devices with enhancement of both DC and high-frequency performance.

Abstract: A method of improving contact resistance in a multi-layer heterostructure comprising the steps of providing a substrate, growing a crystalline material on the substrate, and doping close to an interface of the substrate and the crystalline material with n-silicon to provide continuity at the interface.

Abstract: A semiconductor component and a method for processing said component, which comprises a pn junction, where both the p-conducting (3) and the n-conducting layers (2) of the pn junction constitute doped silicon carbide layers and where the edge of the higher doped conducting layer of the pn junction exhibits a charge profile with a stepwise or uniformly decreasing total charge or effective surface charge density from the initial value at the main pn junction to a zero or almost zero total charge or charge density at the outermost edge of the junction following a radial direction from the central part of the junction towards the outermost edge.

Abstract: A method for providing an epitaxial layer of a first material over a substrate comprising a second material having a lattice constant different from that of the first material. In the method of the present invention, a first layer of the first material is grown on the substrate. A portion of the first layer is treated to render that portion amorphous. The amorphous portion is then annealed at a temperature above the recrystallization point of the amorphous portion, but below the melting point of the crystallized portion of the first layer thereby recrystallizing the amorphous portion of the first layer. The first layer may rendered amorphous by ion implantation. The method may be used to generate GaN layers on sapphire having fewer dislocations than GaN layers generated by conventional deposition techniques.

Abstract: A semiconductor sensor having a thin-film structure body, in which thin-film structure is prevented from bending due to the internal stress distribution in the thickness direction, is disclosed. A silicon-oxide film is formed as a sacrificial layer on a silicon substrate, and a polycrystalline-silicon thin film is formed on the silicon-oxide film. Thereafter, phosphorus (P) is ion-implanted in the surface of the polycrystalline-silicon thin film, and thereby the surface state of the polycrystalline-silicon thin film is modified. A portion of distribution of stress existing in the thickness direction of the polycrystalline-silicon thin film is changed by this modification, and stress distribution is adjusted. By removal of the silicon-oxide film, a movable member of the polycrystalline-silicon thin film is disposed above the silicon substrate with a gap interposed therebetween.

Abstract: A semiconductor device includes a buffer layer of AlGaAs that contains oxygen with a concentration level in the approximate range of 8.times.10.sup.17 cm.sup.-3 to 6.times.10.sup.19 cm.sup.-3, and carbon with a concentration level in the approximate range of 2.times.10.sup.16 cm.sup.-3 to 2.times.10.sup.17 cm.sup.-3. A lattice constant of the AlGaAs buffer layer is larger than a lattice constant of the GaAs substrate so a lattice misfit of the AlGaAs layer with respect to the GaAs substrate is equal to or varies by no more than 2.times.10.sup.5 from a corresponding lattice misfit between an undoped AlGaAs crystal with respect to the GaAs substrate. Oxygen atoms occupy an interstitial site, creating a deep impurity level that suppresses side gate effect.

Abstract: A P-type substrate for infrared photo diodes can be produced by the present invention. A CdZnTe substrate is utilized. A first layer of HgCdTe is formed by liquid phase epitaxy on the substrate. A CdTe passivation layer is formed over the HgCdTe. A ZnS layer is formed over the CdTe layer. A noble metal is introduced into either the CdTe or ZnS layers. During a subsequent baking of the composite, the noble metal diffuses throughout the composite and into the HgCdTe layer.

Abstract: Active acceptor concentrations of p-doped II-VI and III-V semiconductor compound layer provided by chemical vapor deposition are increased by photo-assisted annealing.

Abstract: A method of producing a semiconductor device includes preparing a semiconductor ingot having a (100) surface orientation and an orientation flat in a ?011! direction; cutting the semiconductor ingot in a plane which is obtained by tilting the (100) surface by an angle .theta. about an axis of the tilting, obtained by rotating the ?011! direction by an angle .phi. with the center of the (100) surface as an axis of the rotation, thereby producing a semiconductor wafer having a surface; producing a channel region in the semiconductor wafer; producing a refractory metal gate on the surface of the semiconductor wafer; and using the refractory metal gate as a mask, implanting dopant impurity ions into the semiconductor wafer in a direction perpendicular to the surface of the semiconductor wafer, thereby producing impurity-implanted regions in the semiconductor wafer. Channeling is prevented and the short-channel effect is suppressed.