Abstract: A semiconductor device manufacturing method, includes a step of forming a first alumina film (underlying insulating film) 37 on a semiconductor substrate 20, a step of forming a first conductive film 41, a ferroelectric film 42, and a second conductive film 43 in sequence on the first alumina film 37, a step of forming a mask material film 45 on the second conductive film 43, a step of shaping the mask material film 45 into an auxiliary mask 45a, a step of shaping the second conductive film 43 into an upper electrode 43a by an etching using the auxiliary mask 45a and a first resist pattern 46 as a mask, a step of shaping the ferroelectric film 42 into a capacitor dielectric film 42a by patterning, and a step of shaping the first conductive film 41 into a lower electrode 41a by patterning, whereby a capacitor Q is constructed by the lower electrode 41, the capacitor dielectric film 42a, and the upper electrode 43a.

Abstract: A method for selectively etching an ultra high aspect ratio feature dielectric layer through a carbon based mask in an etch chamber is provided. A flow of an etch gas is provided, comprising a fluorocarbon containing molecule and an oxygen containing molecule to the etch chamber. A pulsed bias RF signal is provided. An energizing RF signal is provided to transform the etch gas to a plasma.

Abstract: A process of etching openings in a dielectric layer includes supporting a semiconductor substrate in a plasma etch reactor, the substrate having a dielectric layer and a patterned photoresist and/or hardmask layer above the dielectric layer; supplying to the plasma etch reactor an etchant gas comprising (a) a fluorocarbon gas (CxFyHz, where x?1, y?1, and z?0), (b) a silane-containing gas, hydrogen or a hydrocarbon gas (CxHy, where x?1 and y?4), (c) an optional oxygen-containing gas, and (d) an optional inert gas, wherein the flow rate ratio of the silane-containing gas to fluorocarbon gas is less than or equal to 0.1, or the flow rate ratio of the hydrogen or hydrocarbon gas to fluorocarbon gas is less than or equal to 0.5; energizing the etchant gas into a plasma; and plasma etching openings in the dielectric layer with enhanced photoresist/hardmask to dielectric layer selectivity and/or minimal photoresist distortion or striation.

Abstract: A method of removing a metal silicide layer on a gate electrode in a semiconductor manufacturing process is disclosed, in which the gate electrode, a metal silicide layer, a spacer, a silicon nitride cap layer, and a dielectric layer have been formed. The method includes performing a chemical mechanical polishing process to polish the dielectric layer using the silicon nitride cap layer as a polishing stop layer to expose the silicon nitride cap layer over the gate electrode; removing the exposed silicon nitride cap layer to expose the metal silicide layer; and performing a first etching process to remove the metal silicide layer on the gate electrode.

Abstract: A magnetic recording medium is provided in which a magnetic recording layer 5 is provided in a predetermined concavo-convex pattern on a substrate 1A, a concave portion in a concavo-convex pattern is filled with a non-magnetic material, and a non-magnetic layer 16 formed of the non-magnetic material positioned at the bottom surface of the concave portion in the non-magnetic materials is formed on a convex portion of the concavo-convex pattern while surface of the convex portion and the concave portion is substantially flattened, and a thickness of the non-magnetic layer 16 is 1 nm or less.

Abstract: A dry-etching method using an apparatus where a wafer is placed on either of a pair of opposed electrodes provided in an etching chamber, and high-frequency power is supplied to both the opposed electrodes to effect a plasma etching. The plasma etching uses a gas containing at least Cl2 and HBr. Trenches 104a, 104b are formed, as shown in FIG. 1B, in a silicon wafer 101 shown in FIG. 1A through a mask layer such as a nitride silicon layer 103. While adjusting the high-frequency power supplied to the opposed electrode where the wafer is placed, the shape of the sidewalls 105a, 105b of the trenches 104a, 104b is controlled. Thus, the trenches can have desired shapes even if the widths of the trenches are different.

Abstract: During etching of a contact hole, not only the energy of ion irradiation but also the gas composition are altered to change the etching from a high-rate etching to a low-rate etching, thereby reducing the damage. In the low-rate etching where the gas composition is also altered, a firm fluorocarbon film is formed on the bottom of the contact hole, and the etching can be carried out while protecting the silicon surface. Consequently, inactivation of the impurities doped in the silicon surface can be prevented.

Abstract: In one example, a method of epitaxially forming a silicon-containing material on a substrate surface is presented which includes positioning a substrate into a process chamber. The substrate has a monocrystalline surface and at least a second surface, such as an amorphous surface and/or a polycrystalline surface. The substrate is exposed to a deposition gas to deposit an epitaxial layer on the monocrystalline surface and a polycrystalline layer on the second surface. The deposition gas preferably contains a silicon source and at least a second elemental source, such as a germanium source, a carbon source and/or combinations thereof. Thereafter, the method further provides exposing the substrate to an etchant gas to etch the polycrystalline layer and the epitaxial layer in a manner such that the polycrystalline layer is etched at a faster rate than the epitaxial layer.

Abstract: A plasma reactor chamber is characterized by performing the following steps: (a) for each one of the chamber parameters, ramping the level of the one chamber parameter while sampling RF electrical parameters at an RF bias power input to the wafer support pedestal and computing from each sample of the RF electrical parameters the values of the plasma parameters, and storing the values with the corresponding levels of the one chamber parameter as corresponding chamber parameter data; (b) for each one of the chamber parameters, deducing, from the corresponding chamber parameter data, a single variable function for each of the plasma parameters having the one chamber parameter as an independent variable.

Abstract: A method in a plasma processing system for etching a feature through a dielectric layer of a dual damascene stack on a semiconductor substrate is disclosed. The method includes placing the substrate in a plasma processing chamber of the plasma processing system. The method further includes flowing an etchant gas mixture into the plasma processing chamber, the etchant gas mixture being configured to etch the dielectric layer. The method additionally includes striking a plasma from the etchant source gas. The method also includes etching the feature through the dielectric layer while applying a bias RF signal to the substrate, the bias RF signal having a bias RF frequency of between about 27 MHz and about 90 MHz. The bias RF signal further has a bias RF power component that is configured to cause the feature to be etched in accordance to predefined etch rate parameters and etch profile parameters at the bias RF frequency.

Abstract: A method of reducing foreign material concentrations in an etch chamber having inner chamber walls is described. The method includes the step of etching a work piece in the etch chamber such that reaction products from the work piece having one or more elements form a first layer of reaction products that partially adhere to the inner chamber walls. A species is introduced into the etch chamber that increases the adhesion of the first layer of reaction products to the inner chamber walls.

Abstract: An interlevel dielectric layer, such as a silicon oxide layer, is selectively etched using a plasma etch chemistry including a silicon species and a halide species and also preferably a carbon species and an oxygen species. The silicon species can be generated from a silicon compound, such as SixMyHz, where “Si” is silicon, “M” is one or more halogens, “H” is hydrogen and x?1, y?0 and z?0. The carbon species can be generated from a carbon compound, such as C?M?H?, where “C” is carbon, “M” is one or more halogens, “H” is hydrogen, and ??1, ??0 and ??0. The oxygen species can be generated from an oxygen compound, such as O2, which can react with carbon to form a volatile compound.

Abstract: A method in a plasma processing system for etching a feature through a given layer on a semiconductor substrate. The method includes placing the substrate in a plasma processing chamber of the plasma processing system. The method also includes flowing an etchant gas mixture into the plasma processing chamber, the etchant gas mixture being configured to etch the given layer. The method additionally includes striking a plasma from the etchant source gas. Furthermore, the method includes etching the feature at least partially through the given layer while applying a bias RF signal to the substrate, the bias RF signal having a bias RF frequency of between about 45 MHz and about 75 MHz. The bias RF signal further has a bias RF power component that is configured to cause the etch feature to be etched with an etch selectivity to a second layer of the substrate that is higher than a predefined selectivity threshold.

Abstract: A method for controlling a plasma in a semiconductor substrate processing chamber is provided. The method includes the steps of supplying a first RF signal to a first electrode within the processing chamber at a first frequency selected to cause plasma sheath oscillation at the first frequency; and supplying a second RF signal from the source to the first electrode at a second frequency selected to cause plasma sheath oscillation at the second frequency, wherein the second frequency is different from the first frequency by a differential equal to a desired frequency selected to cause plasma sheath oscillation at the desired frequency.

Abstract: A method for manufacturing a silicon carbide (SiC) semiconductor device is disclosed that uses dry etching with the use of high-density inductive coupled plasma (ICP). The method employs a first dry etching and a sequential second dry etching under conditions that differ from those used in the first dry etching. The dry etch process allows a trench to be deeply etched to a depth of more than 3 ?m in a SiC laminated semiconductor substrate and allows the bottom of the trench to be flat without forming a convexo-concave shape having an acute angle which has an influence on characteristics of a breakdown voltage due to electric field concentration being caused in the bottom.

Abstract: A method for controlling striations and CD loss in a plasma etching method is disclosed. During the etching process, the substrate of semiconductor material to be etched is exposed first to plasma under a low power strike and subsequently to a conventional high power strike. CD loss has been found to be reduced by about 400 Angstroms and striations formed in the contact holes are reduced.

Abstract: A system and a process for plasma etching a semiconductor device. The technique comprises periodically applying a heightened voltage bias during the plasma etching process so as to reduce accumulated charge on the surface of the semiconductor device during plasma etching of the device. In one embodiment, a heightened positive voltage and heightened negative voltage is applied to the semiconductor device while plasma etching is occurring to thereby induce charge to be removed from the semiconductor device.

Abstract: An object to be process has a structure having an SiC film 61 and an organic Si-low dielectric constant film 62 formed on the SiC film 61. The SiC film 61 is etched using a plasma produced from an etching gas and using the organic Si low-dielectric constant film 62 as a mask. The etching gas contains CH2F2 or CH3F.

Abstract: A system and method is disclosed for providing contact etch selectivity for the etching of a plurality of contact etch holes through a dielectric layer of an integrated circuit. The method comprises the steps of obtaining a value of the reactive ion etch (RIE) lag for the dielectric layer, and selecting different values for the diameters of the contact etch holes based upon the desired depths of the contact etch holes and on the value of the RIE lag for the dielectric layer. The invention also comprises a contact diameter application processor that is capable of using RIE lag data to calculate contact diameters for contact etch holes for a mask design layout of an integrated circuit.

Abstract: A method for structuring of silicon substrates for microsystem technological device elements, wherein the silicon substrate is covered with an etching mask and wherein the structures are furnished with a predetermined etching profile in the micrometer region with side walls and an etching depth At. For the generation of a predetermined positive etching profile, the side walls of the structures are furnished with the defined slope angle ? of from 60 degrees to 88 degrees relative to the etching bottom and the structures are generated with an etching depth At in the micrometer region. Initially an isotropic etching is performed such that a mask under etching u is generated, wherein the mask under etching u is formed approximately equal to the etching depth At.

Abstract: A plasma processing apparatus includes a chamber having a support for a substrate, and at least one gas inlet into the chamber. The apparatus is configured to alternately introduce an etch gas and a deposition gas into the chamber through the at least on gas inlet, and to strike a plasma into the etch gas and the deposition gas alternately introduced into the chamber. The apparatus is further equipped with an attenuation device for reducing and/or homogenizing the ion flux from the plasma substantially without affecting the neutral radical number density.

Abstract: In a vacuum processing chamber, an etching is performed on an object to be processed having at least a mask layer formed in a predetermined pattern and a Ti layer, as a layer to be etched, formed under the mask layer. During the etching, a first plasma processing is carried out to etch the Ti layer by using a plasma of an etching gas containing a fluorine compound at an inner pressure of the chamber of 4 Pa or less. Subsequently, a second plasma processing for dry cleaning is performed by using a plasma of a cleaning gas after the first plasma processing is completed. At this time, a deposit containing a Ti compound produced during the plasma processing is removed.

Abstract: A plasma etching method plasma-etches an etching target film by using a photoresist film as a mask. The plasma etching method includes loading a target object to be processed into a processing chamber where an upper and a lower electrode are provided to face each other, the target object having the etching target film and the photoresist film in which an opening is formed; introducing into the processing chamber a processing gas containing CF4 gas, CH2F2 gas and CxFy gas, wherein x/y?0.5; and generating a plasma of the processing gas by applying a high frequency power to at least one of the upper and the lower electrode. The method further includes, by the plasma, etching the etching target film introduced through the opening formed in the photoresist film while reducing the opening size the opening.

Abstract: Disclosed are embodiments relating to a method of manufacturing a semiconductor device that may improve the yield rate of the semiconductor device. In embodiments, the method may include preparing a substrate including a plurality of conductive patterns, forming first and second insulating layers on the substrate, forming a plurality of via holes by selectively etching the first and second insulating layers, forming a plurality of trenches by selectively etching the second insulating layer in such a manner that the trenches are communicated with the trenches, and forming metal interconnections in the via holes and the trenches. The width ratio of the trench to the insulating layer positioned between adjacent trenches may be in a range of 0.45 to 0.55.

Abstract: A method for etching a barrier material on a semiconductor substrate is disclosed. The method includes placing the substrate in a plasma processing chamber of the plasma processing system, wherein the substrate includes the barrier material and a low-k material, and wherein the barrier material and a low-k material are configured to be exposed to a plasma. The method also includes flowing an etchant gas mixture, including CH3F from about 4% to about 8% of a plasma gas flow, into the plasma processing chamber, wherein the etchant gas mixture is configured to etch the barrier material at a first etch rate, the etchant gas mixture is configured to etch the low-k material at a second etch rate, wherein the first etch rate is substantially greater than the second etch rate. The method further includes striking a plasma from the etchant source gas; and etching the barrier layer and the low-k layer.

Abstract: A method of electrostatically chucking a wafer while removing heat from the wafer in a plasma reactor includes providing a polished generally continuous surface on a puck, placing the wafer on the polished surface of the puck and cooling the puck. A chucking voltage is applied to an electrode within the puck to electrostatically pull the wafer onto the surface of the puck with sufficient force to attain a selected heat transfer coefficient between contacting surfaces of the puck and wafer.

Abstract: A main etching step is effected in a state shown in FIG. 1A under a first pressure using a gas containing at least HBr, e.g., a mixture gas of HBr and Cl2 as an etching gas. The main etching is ended before a silicon oxide film 102, as shown in FIG. 1B, is exposed. An over-etching process is effected under a second pressure higher than the first pressure using a gas containing at least HBr, e.g., an HBr single gas so as to completely expose the silicon oxide film 102 as shown in FIG. 1C. In such a way, the selectivity of a silicon-containing conductive layer with respect to the silicon oxide film is improved compared to conventional methods. Without etching the silicon oxide film layer, which is an underlying layer, and without marring the shape of the silicon-containing conductive film layer formed by etching, only the desired silicon-containing conductive film layer is removed by etching reliably.

Abstract: A method for forming, by dry etch, an opening of a given shape in a silica glass layer, the layer having a doping profile similar to the shape and the etch plasma being a non-carbonated fluorinated plasma causing a non-directional etching.

Abstract: A plasma processing method using plasma includes steps of applying current to a coil and introducing gas into a processing chamber, applying a bias power that does not generate plasma, applying a source power to generate plasma so that a plasma density distribution is high above an outer circumference of a semiconductor wafer and low above a center of the semiconductor wafer, and forming a shape of a sheath layer having a positive ion space charge directly above the semiconductor wafer so as to be convex in an upper direction from the semiconductor wafer, thereby eliminating foreign particles trapped in a boundary of the sheath layer having a positive ion space charge directly above the semiconductor wafer, generating plasma for processing the semiconductor wafer under a condition different from the conditions of the previous steps.

Abstract: Processes, etchants, and apparatus useful for etching an insulating oxide layer of a substrate without damaging underlying nitride features or field oxide regions. The processes exhibit good selectivity to both nitrides and field oxides. Integrated circuits produced utilizing etching processes of the present invention are much less likely to be defective due to photoresist mask misalignment. Etchants used in processes of the present invention comprise a carrier gas, one or more C2+F gases, CH2F2, and a gas selected from the group consisting of CHF3, CF4, and mixtures thereof. The processes can be performed at power levels lower than what is currently utilized in the prior art.

Abstract: A method for controlling striations and CD loss in a plasma etching method is disclosed. During the etching process, the substrate of semiconductor material to be etched is exposed first to plasma under a low power strike and subsequently to a conventional high power strike. CD loss has been found to be reduced by about 400 Angstroms and striations formed in the contact holes are reduced.

Abstract: A plasma reactor chamber is characterized by performing two steps for each one of plural selected chamber parameters. The first step consists of ramping the level of the one chamber parameter while sampling RF electrical parameters at an RF bias power input to said wafer support pedestal and computing from each sample of said RF electrical parameters the values of the plasma parameters. The second step consists of deducing, from the corresponding chamber parameter data generated in the first step, a single variable function for each of the plural plasma parameters having said one chamber parameter as an independent variable, and constructing combinations of these functions that are three variable functions having each of the chamber parameters as a variable.

Abstract: In certain implementations, methods and apparatus include an antenna assembly having at least two overlapping and movable surface microwave plasma antennas. The antennas have respective pluralities of microwave transmissive openings formed therethrough. At least some of the openings of the respective antennas overlap with at least some of the openings of another antenna, and form an effective plurality of microwave transmissive openings through the antenna assembly. Microwave energy is passed through the effective plurality of openings of the antenna assembly and to a flowing gas effective to form a surface microwave plasma onto a substrate received within the processing chamber. At least one of the antennas is moved relative to another of the antennas to change at least one of size and shape of the effective plurality of openings through the antenna assembly effective to modify microwave energy passed through the antenna assembly to the substrate.

Abstract: A two-step nitrogen plasma method is used for stripping a photoresist layer from over a substrate. A first step within the two-step nitrogen plasma method uses a nitrogen plasma with ion activation to form from the photoresist layer over the substrate a treated photoresist layer over the substrate. A second step within the two-step nitrogen plasma method uses a second nitrogen plasma without ion activation to remove the treated photoresist layer from over the substrate. The method is particularly useful for stripping a patterned photoresist layer that is used for forming a gate electrode from a gate electrode material layer.

Abstract: A dry etching apparatus that performs etching on a substrate 1 placed on a tray 13 inside a chamber 18 by covering the substrate 1 with a plate 14 provided with opening portions 15, in which a distance D between the surface opposing the substrate 1 and the substrate 1 in the peripheral portion of the plate 14 is set shorter than the distance D between the surface opposing the substrate 1 and the substrate 1 in the central portion of the plate 14. Textures can be thus formed homogeneously on the surface of the substrate.

Abstract: A method for manufacturing a semiconductor device in which a first hole and a second hole having a lower aspect ratio than the first hole are formed in an insulating film formed on a semiconductor substrate is provided. The method includes: performing a first etching process configured to etch the insulating film; and performing a second etching process configured to etch the insulating film. The second etching process is performed under a condition that deposition rate of a deposited layer formed on a surface of the insulating film is lower than that in the first etching process.

Abstract: A method for controlling an etch process comprises providing a wafer having at least a first layer and a second layer formed over the first layer. The thickness of the second layer is measured. An etch selectivity parameter is determined based on the measured thickness of the second layer. An operating recipe of an etch tool is modified based on the etch selectivity parameter. A processing line includes an etch tool, a first metrology tool, and a process controller. The etch tool is adapted to etch a plurality of wafers based on an operating recipe, each wafer having at least a first layer and a second layer formed over the first layer. The first metrology tool is adapted to measure a pre-etch thickness of the second layer. The process controller is adapted to determine an etch selectivity parameter based on the measured pre-etch thickness of the second layer and modify the operating recipe of the etch tool based on the etch selectivity parameter.

Abstract: At a surface of a semiconductor wafer W as a processing object, a SiOC layer, a SiC layer and a Cu layer are formed in the order from an upper side. In the SiOC layer, a first opening for forming a via is formed. Using the SiOC layer as a mask, a plasma etching of the SiC layer is selectively carried out by using an etching gas containing a gas mixture of NF3/He/Ar, thereby a second opening continuously following from the first opening being formed. Therefore, it is possible to carry out the etching of the SiC layer with a high selectivity with respect to the SiOC layer.

Abstract: A method of removing a silicon-containing hard polymeric material from an opening leading to a recessed feature during the plasma etching of said recessed feature into a carbon-containing layer in a semiconductor substrate. The method comprises the intermittent use of a cleaning step within a continuous etching process, where at least one fluorine-containing cleaning agent species is added to already present etchant species of said continuous etching process for a limited time period, wherein the length of time of each cleaning step ranges from about 5% to about 100% of the time length of an etch step which either precedes or follows said cleaning step.

Abstract: The invention involves a method of characterizing a plasma reactor chamber through the behavior of many selected plasma parameters as functions of many selected chamber parameters. The plasma parameters may be selected from a group including ion density, wafer voltage, etch rate and wafer current or other plasma parameters. The chamber parameters are selected from a group including source power, bias power, chamber pressure, magnetic coil current in different magnetic coils, gas flow rates in different gas injection zones and species composition of the gas in different gas injection zones.

Abstract: A method of pre-treating a mask layer prior to etching an underlying thin film is described. A thin film, such as a dielectric film, is etched using plasma that is enhanced with a ballistic electron beam. In order to reduce the loss of pattern definition, such as line edge roughness effects, the mask layer is treated with a hydrocarbon chemistry or hydrofluorocarbon chemistry or fluorocarbon chemistry or combination of two or more thereof prior to proceeding with the etching process.

Abstract: A method for improving a polysilicon gate electrode profile to avoid preferential RIE etching in a polysilicon gate electrode etching process including carrying out a multi-step etching process wherein at least one of a lower RF source power and RF bias power are reduced to complete a polysilicon etching process and an in-situ plasma treatment with an inert gas plasma is carried out prior to neutralize an electrical charge imbalance prior to carrying out an overetch step.

Abstract: A method for etching on a semiconductors at the back end of line using reactive ion etching. The method comprises reduced pressure atmosphere and a mixture of gases at a specific flow rate ratio during plasma generation and etching. Plasma generation is induced by a source radio frequency and anisotropic etch performance is induced by a second bias radio frequency.

Abstract: An etching technique capable of applying etching at high selectivity to a transition metal element-containing electrode material layer which is formed on or above a dielectric material layer made of a high-dielectric-constant or “high-k” insulator is provided. To this end, place a workpiece on a lower electrode located within a vacuum processing vessel. The workpiece has a multilayer structure of an electrode material layer which contains therein a transition metal element and a dielectric material layer made of high-k insulator. Then, while introducing a processing gas into the vacuum processing vessel, high-frequency power is applied to inside of the vacuum processing vessel, thereby performing plasma conversion of the introduced processing gas so that the workpiece is etched at its surface. When etching the electrode material layer, an HCl gas is supplied as the processing gas.

Abstract: A treatment method for a surface of a photoresist layer is provided. After forming a patterned photoresist layer over a wafer, a surface treatment step is performed to the photoresist layer by using at least one reaction gas comprising hydrogen bromide or hydrogen iodide to form a hardened layer over the surface of the photoresist layer. Wherein, the surface treatment step and the etching step are in-situ performed.

Abstract: The invention provides a plasma processing method and plasma processing device for manufacturing semiconductor devices in which the number of foreign particles being adhered to the wafer is reduced greatly and the yield is improved. In a plasma processing device having a plasma source capable of controlling plasma distribution, the shape of a sheath/bulk boundary above the wafer is controlled to a convexed shape when the plasma is turned on and off. By adding a step of applying a low source power and wafer bias power when the plasma is turned on and off in order to realize an out-high plasma distribution, it is possible to form a sheath that is thicker near the center of the wafer and thinner at the outer circumference portion thereof.

Abstract: A method and apparatus for generating and controlling a plasma in a semiconductor substrate processing chamber using a dual frequency RF source is provided. The method includes the steps of supplying a first RF signal from the source to an electrode within the processing chamber at a first frequency and supplying a second RF signal from the source to the electrode within the processing chamber at a second frequency. The second frequency is different from the first frequency by an amount equal to a desired frequency. Characteristics of a plasma formed in the chamber establish a sheath modulation at the desired frequency.

Abstract: An object to be processed has a structure having an SiC film and an organic Si-low dielectric constant film formed on the SiC film. The SiC film is etched using a plasma produced from an etching gas and using the organic Si low-dielectric constant film as a mask. The etching gas contains CH2F2 or CH3F.

Abstract: An improved solution for producing nitride-based heterostructure(s), heterostructure device(s), integrated circuit(s) and/or Micro-Electro-Mechanical System(s) is provided. A nitride-based etch stop layer that includes Indium (In) is included in a heterostructure. An adjacent layer of the heterostructure is selectively etched to expose at least a portion of the etch stop layer. The etch stop layer also can be selectively etched. In one embodiment, the adjacent layer can be etched using reactive ion etching (RIE) and the etch stop layer is selectively etched using a wet chemical etch. In any event, the selectively etched area can be used to generate a contact or the like for a device.

Abstract: Broadly speaking, methods and an apparatus are provided for removing an inorganic material from a substrate. More specifically, the methods provide for removing the inorganic material from the substrate through exposure to a high density plasma generated using an inductively coupled etching apparatus. The high density plasma is set and controlled to isotropically contact particular regions of the inorganic material to allow for trimming and control of a critical dimension associated with the inorganic material.