Abstract: Disclosed is a substrate processing method configured to prevent the occurrence of a bowing shape to form a hole of a vertical processing shape on a mask layer, and to secure a remaining layer quantity as the mask layer. The substrate processing method receives a wafer W in which a mask layer and an intermediate layer are stacked on a target layer to be processed in a chamber, generates plasma of processing gas in the chamber, performs an etching process on wafer W using the plasma, thereby forming a pattern shape on the target layer to be processed through the intermediate layer and the mask layer. The etching process etches the mask layer by applying excitation power of 500 W for generating plasma, maintaining processing pressure at 5 mTorr (9.31×10?1 Pa) or less, and maintain temperature of wafer W in the range of ?10° C. to ?20° C.

Abstract: A surface treatment method includes: removing a fluorocarbon-containing reaction product from a surface of a workpiece by oxygen gas plasma processing. The workpiece includes a plurality of layers. The fluorocarbon-containing reaction product is deposited by successively etching the layers of the workpiece. The method further includes after removing the reaction product, removing an oxide-containing reaction product from the surface of the workpiece using hydrogen fluoride gas.

Abstract: A plasma etch method includes simultaneously illuminating an array of plural locations on front surface of the workpiece through the backside of the workpiece with light of a wavelength range for which the workpiece is transparent, while viewing light reflected from the array of plural locations to the backside of the workpiece. The method further includes determining plural etch depths at the array of locations from the light reflected from the array of locations on the front side of the workpiece, and deducing from the plural etch depths a spatial distribution of etch rate across the array of locations. The method also includes changing the etch rate distribution by adjusting a tunable element of the reactor.

Abstract: A method of processing a wafer in a plasma, in which target values of two different plasma process parameters are simultaneously realized under predetermined process conditions by setting respective power levels of VHF and HF power simultaneously coupled to the wafer to respective optimum levels.

Abstract: A multichamber-type processing apparatus and processing method using same, in which a substrate is reliably neutralized without being damaged, thereby ensuring excellent accuracy and throughput. The processing apparatus includes a transfer chamber, etching chambers selectively communicating with the transfer chamber and providing a space to etch a first substrate therein, and ashing chambers selectively communicating with the transfer chamber and providing a space to ash a second substrate therein. A transfer mechanism is installed in the transfer chamber to sequentially transfer the substrate from the transfer chamber into the etching and ashing chambers. The substrate is electrostatically adsorbed to electrostatic chucks in the etching and ashing chambers. An monatomic nitrogen atom supply unit supplies dissociated monatomic nitrogen atoms into the etching and ashing chambers.

Abstract: An etching method that uses an etch reactant retained within at least a semi-solid media (120, 220, 224, 230). The etch reactant media is applied to selectively etch a surface layer (106, 218, 222). The etch reactant media may be applied to remove metal shorts (222), smearing and eaves resulting from CMP or in failure analysis for uniform removal of a metal layer (218) without damaging the vias, contact, or underlying structures.

Abstract: According to one embodiment, a process gas containing a fluorocarbon-based gas being an etch gas having a deposition property and SF6 gas as an additional gas are introduced into a process chamber, a plasma is generated in the process chamber, and an etching is performed on a silicon-containing oxide film formed on a substrate by using a resist pattern as a mask through the plasma. At this time, based on a relationship between an etch rate and a resist selectivity that is changed with respect to a change in a flow rate of the additional gas, the flow rate of the additional gas is set to a range of the flow rate in which changes in the etch rate and the resist selectivity accompanying an increase in the flow rate of the additional gas tend to increase.

Abstract: A semiconductor device manufacturing method includes a plasma etching step for etching an etching target film formed on a substrate accommodated in a processing chamber. In the plasma etching step, a processing gas including a gaseous mixture containing predetermined gases is supplied into the processing chamber, and a cycle including a first step in which a flow rate of at least one of the predetermined gases is set to a first value during a first time period and a second step in which the flow rate thereof is set to a second value that is different from the first value during a second time period is repeated consecutively at least three times without removing a plasma. The first time period and the second time period are set to about 1 to 15 seconds.

Abstract: Method for operating a processing system and refurbishing a ceramic substrate holder within a process chamber of the processing system are described. The method includes plasma processing one or more substrates on the ceramic substrate holder, where the processing causes erosion of a nitride material of the ceramic substrate holder. The method further includes refurbishing the ceramic substrate holder in-situ without a substrate residing on the ceramic substrate holder, where the refurbishing includes exposing the ceramic substrate holder to a plasma-excited nitrogen-containing gas in the process chamber to at least partially reverse the erosion of the nitride material.

Abstract: An organic/inorganic hybrid film represented by SiCxHyOz (x>0, y?0, z>0) is plasma-etched with an etching gas containing fluorine, carbon and nitrogen. During the etching, a carbon component is eliminated from the surface portion of the organic/inorganic hybrid film due to the existence of the nitrogen in the etching gas, to thereby reform the surface portion. The reformed surface portion is nicely plasma-etched with the etching gas containing fluorine and carbon.

Abstract: A method for forming high density emission elements and field emission displays formed according to the method. Oxygen and a silicon etchant are introduced into a plasma etching chamber containing a silicon substrate. The oxygen reacts with the silicon surface to form regions of silicon dioxide, while the silicon etchant etches the silicon to form the emission elements. The silicon dioxide regions mask the underlying silicon during the silicon etch process. High density and high aspect ratio emission elements are formed without using photolithographic processes. The emission elements formed according to the present invention provide a more uniform emission of electrons. Further, a display incorporating emission elements formed according to the present invention provides increased brightness. The reliability of the display is increased due to the use of a plurality of emission elements to supply electrons for stimulating the phosphor substrate material to produce the image.

Abstract: Disclosed is a semiconductor manufacturing process, in which a fluorine radical-containing plasma is used to etch a hard mask and a layer therebeneath; and a treatment is carried out using a gas reactive to fluorine radicals for reacting with residual fluorine radicals to form a fluorine-containing compound and remove it. Thus, precipitates formed by the reaction of fluorine radicals and titanium components existing in the hard mask to cause a process defect can be avoided.

Abstract: The present invention in one embodiment provides an etch method that includes providing a structure including a tungsten (W) portion and a titanium nitride (TiN) portion; applying a first etch feed gas of sulfur hexafluoride (SF6) and oxygen (O2), in which the ratio of sulfur hexafluoride (SF6) to oxygen (O2) ranges from 1:3.5 to 1:4.5; and applying a second etch feed gas of nitrogen trifluoride (NF3), helium (He) and chlorine (Cl2), in which the ratio of nitrogen trifluoride (NF3) to chlorine (Cl2) ranges from 1:5 to 2:5 and the ratio of helium (He) to nitrogen trifluoride (NF3) and chlorine (Cl2) ranges from 1:3 to 1:1.

Abstract: A method for processing a workpiece in a plasma reactor chamber includes coupling RF power at a first VHF frequency f1 to a plasma via one of the electrodes of the chamber, and providing a center ground return path for RF current passing directly between the ceiling electrode and the workpiece support electrode for the frequency f1. The method further includes providing a variable height edge ground annular element and providing a ground return path through the edge ground annular element for the frequency f1. The method controls the uniformity of plasma ion density distribution by controlling the distance between the variable height edge ground annular element and one of: (a) height of ceiling electrode or (b) height of workpiece support electrode.

Abstract: Improved methods for stripping photoresist and removing ion implant related residues from a work piece surface are provided. According to various embodiments, plasma is generated using elemental hydrogen, a fluorine-containing gas and a protectant gas. The plasma-activated gases reacts with the high-dose implant resist, removing both the crust and bulk resist layers, while simultaneously protecting exposed portions of the work piece surface. The work piece surface is substantially residue free with low silicon loss.

Abstract: A method for fabricating a semiconductor device includes forming a target etch layer over a substrate, a first auxiliary layer over the target etch layer, an isolation layer over the first auxiliary layer, and a second auxiliary layer over the isolation layer. A first exposure process is performed, where the first auxiliary layer is in focus and the second auxiliary layer is out of focus. A second exposure process is performed, where the second auxiliary layer in focus and the first auxiliary layer is out of focus. The second auxiliary layer is developed to form first mask patterns. The isolation layer and the first auxiliary layer are etched by using the first mask patterns to form second mask patterns. The second mask patterns are developed to form third mask patterns that are used to facilitate subsequent etching of the target etch layer.

Abstract: A plasma reactor includes a vacuum enclosure including a side wall and a ceiling defining a vacuum chamber, and a workpiece support within the chamber and facing the ceiling for supporting a planar workpiece, the workpiece support and the ceiling together defining a processing region between the workpiece support and the ceiling. Process gas inlets furnish a process gas into the chamber. A plasma source power electrode is connected to an RF power generator for capacitively coupling plasma source power into the chamber for maintaining a plasma within the chamber. The reactor further includes at least a first overhead solenoidal electromagnet adjacent the ceiling, the overhead solenoidal electromagnet, the ceiling, the side wall and the workpiece support being located along a common axis of symmetry.

Abstract: A plasma etching method for plasma-etching an anti-reflective coating formed on a target object includes the step of placing the target object into a processing chamber having a first electrode and a second electrode provided while facing each other, the target object including an etching target film, the anti-reflective coating and a patterned photoresist film sequentially formed in that order on a substrate. The plasma etching method further includes the steps of introducing a processing gas into the processing chamber; generating a plasma by applying a high frequency power to one of the first electrode and the second electrode; and applying a DC voltage to one of the first electrode and the second electrode.

Abstract: The invention can provide a method of processing a substrate using S-O processing sequences and evaluation libraries that can include one or more optimized spacer creation and evaluation procedures.

Abstract: A method for manufacturing a silicon structure according to the present invention includes, in a so-called dry-etching process wherein gas-switching is employed, the steps of: etching a portion in the silicon region at a highest etching rate under a high-rate etching condition such that the portion does not reach the etch stop layer; subsequently etching under a transition etching condition in which an etching rate is decreased with time from the highest etching rate in the high-rate etching condition; and thereafter, etching the silicon region under a low-rate etching condition of a lowest etching rate in the transition etching condition.

Abstract: A rework method of a gate insulating layer of a thin film transistor includes the following steps. First, a substrate including a silicon nitride layer, which serves as a gate insulating layer, disposed thereon. Subsequently, a first film removal process is performed to remove the silicon nitride layer. The first film removal process includes an inductively coupled plasma (ICP) etching process. The ICP etching process is carried out by introducing gases including sulfur hexafluoride and oxygen. The ICP etching process has an etching selectivity ratio of the silicon nitride layer to the substrate, which is substantially between 18 and 30.

Abstract: In a metal film production apparatus, a copper plate member is etched with a Cl2 gas plasma within a chamber to form a precursor comprising a Cu component and a Cl2 gas; and the temperatures of the copper plate member and a substrate and a difference between their temperatures are controlled as predetermined, to deposit the Cu component of the precursor on the substrate, thereby forming a film of Cu. In this apparatus, Cl* is formed in an excitation chamber of a passage communicating with the interior of the chamber to flow a Cl2 gas, and the Cl* is supplied into the chamber to withdraw a Cl2 gas from the precursor adsorbed onto the substrate, thereby promoting a Cu film formation reaction. The apparatus has a high film formation speed, can use an inexpensive starting material, and can minimize impurities remaining in the film.

Abstract: A direct current pulse voltage is applied on a treatment gas to generate a discharge plasma. The duty ratio of the direct current pulse voltage is controlled within the range of 0.0001% or more and 8.0% or less. The rise time of the direct current pulse voltage is controlled in the range of not lower than 0.1 V/nsec and not higher than 10000 V/nsec. Alternatively, a positive pulse and a negative pulse are applied from a single power source for performing the discharge plasma and the impurity implantation.

Abstract: A method for fabricating a semiconductor device includes forming an interlayer dielectric layer having a plurality of contact holes over a substrate, forming a conductive layer by filling the contact holes to cover the interlayer dielectric layer, performing a first main etch process to partially etch the conductive layer to form a first conductive layer, performing a second main etch process to etch the first conductive layer using an etch gas having a slower etch rate with respect to the first conductive layer than an etch gas used in the first main etch process until an upper surface of the interlayer dielectric layer is exposed to form a second conductive layer, and performing an over-etch process to etch a certain portion of the second conductive layer, and at the same time, to etch a certain portion of the interlayer dielectric layer to form a landing plug.

Abstract: Methods for etching, such as for fabricating a CMOS logic gate are provided herein. In some embodiments, a method of etching includes (a) providing a substrate having a first stack and a second stack disposed thereupon, the first stack comprising a high-k dielectric layer, a metal layer formed over the high-k dielectric layer, and a first polysilicon layer formed over the metal layer, the second stack comprising a second polysilicon layer, wherein the first and second stacks are substantially equal in thickness; (b) simultaneously etching a first feature in the first polysilicon layer and a second feature in the second polysilicon layer until the metal layer in the first stack is exposed; (c) simultaneously etching the metal layer and second polysilicon layer to extend the respective first and second features into the first and second stacks; and (d) etching the high-k dielectric layer.

Abstract: A method for etching features into an etch layer disposed below a photoresist mask without an intermediate hardmask is provided. A plurality of etch cycles are provided. Each etch cycle comprises providing a deposition etch phase that etches features into the etch layer and deposits polymer on sidewalls of the features and over the photoresist and providing a cleaning phase that removes polymer deposited on the sidewalls.

Abstract: A semiconductor device manufacturing method includes: depositing a first insulating film and a second insulating film on a substrate sequentially and forming a pattern on the second insulating film; forming a silicon film on the pattern; forming a sidewall made of the silicon film by processing the silicon film until a part of the second insulating film is exposed by use of etch-back; removing the second insulating film; and performing dry etching by use of a fluorocarbon-based gas, to process the first insulating film by using the sidewall as a mask. The processing of the first insulating film includes applying on the substrate a self-bias voltage Vdc that satisfies a relational expression of Vdc<46x?890, where a film thickness of the silicon film that constitutes the sidewall is x nm (19.5?x?22.1).

Abstract: The invention concerns a method of processing a wafer in a plasma reactor chamber by controlling plural chamber parameters in accordance with desired values of plural plasma parameters. The method includes concurrently translating a set of M desired values for M plasma parameters to a set of N values for respective N chamber parameters. The M plasma parameters are selected from a group including wafer voltage, ion density, etch rate, wafer current, etch selectivity, ion energy and ion mass. The N chamber parameters are selected from a group including source power, bias power, chamber pressure, inner magnet coil current, outer magnet coil current, inner zone gas flow rate, outer zone gas flow rate, inner zone gas composition, outer zone gas composition. The method further includes setting the N chamber parameters to the set of N values.

Abstract: A semiconductor process is provided. The semiconductor process includes providing a substrate. Then, a surface treatment is performed to the substrate to form a buffer layer on the substrate. Next, a first pre-amorphous implantation is performed to the substrate.

Abstract: A method for forming fine patterns of a semiconductor device includes forming an etching film on a substrate having first and second areas, forming first mask patterns on the substrate to have a first pattern density in the first area and a second pattern density in the second area, forming first capping patterns between the first mask patterns, forming second capping patterns between the first mask patterns, such that recess areas are formed between second capping patterns, and such that a first etching pattern is defined to include the first and second capping patterns, forming second mask patterns in the recess areas to include the first and second mask patterns, removing one of the first and second etching patterns, such that a single etching pattern is remaining on the substrate, and etching the etching film using the remaining etching pattern as an etch mask to form etching film patterns.

Abstract: A method of pattern etching a Si-containing anti-reflective coating (ARC) layer is described. The method comprises etching a feature pattern into the silicon-containing ARC layer using plasma formed from a process gas containing SF6 and a hydrocarbon gas. The method further comprises adjusting a flow rate of the hydrocarbon gas relative to a flow rate of the SF6 to reduce a CD bias between a final CD for nested structures in the feature pattern and a final CD for isolated structures in the feature pattern.

Abstract: A method of manufacturing a semiconductor device has forming a first silicon film over the first insulating film, forming a second silicon film over the first silicon film, a first etching the second silicon film in a depth, which the first silicon film is not exposed, in first condition, a second etching a remaining portion of the second silicon film and the first silicon film in a depth, which the first insulating film is not exposed, in second condition which gives a higher vertical etching component ratio than the first condition; and a third etching a remaining portion of the first silicon film in third condition which an etching rate for the first silicon film is larger than an etching rate for the first insulating film as compared to the second condition, wherein an impurity concentration of a first conductivity type of the first silicon film is higher than an impurity concentration of first conductivity type of the second silicon film.

Abstract: A semiconductor wafer includes a substrate, a conductive layer, a dielectric layer having a via, a hard mask defined a trench pattern, and a sacrificial layer. Then a sequential of etching processes is performed upon the semiconductor wafer in a chamber to form a trench and expose the conductive layer. By operating all procedures within one chamber, manufacturing time is efficiently shortened and yield is thus increased.

Abstract: In a plasma reactor chamber a ceiling electrode and a workpiece support electrode, respective RF power sources of respective VHF frequencies f1 and f2 are coupled to either respective ones of the electrodes or to a common one of the electrodes, where f1 is sufficiently high to produce a center-high non-uniform plasma ion distribution and f2 is sufficiently low to produce a center-low non-uniform plasma ion distribution. Respective center ground return paths are provided for RF current passing directly between the ceiling electrode and the workpiece support electrode for the frequencies f1 and f2, and an edge ground return path is provided for each of the frequencies f1 and f2. The impedance of at least one of the ground return paths is adjusted so as to control the uniformity of the plasma ion density distribution.

Abstract: A method is provided for processing a workpiece in a plasma reactor chamber having electrodes including at least a ceiling electrode and a workpiece support electrode. The method includes coupling respective RF power sources of respective VHF frequencies f1 and f2 to either (a) respective ones of the electrodes or (b) a common one of the electrodes, where f1 is sufficiently high to produce a center-high non-uniform plasma ion distribution and f2 is sufficiently low to produce a center-low non-uniform plasma ion distribution. The method further includes adjusting a ratio of an RF parameter at the f1 frequency to the RF parameter at the f2 frequency so as to control plasma ion density distribution, the RF parameter being any one of RF power, RF voltage or RF current.

Abstract: Etch selectivity enhancement during electron beam activated chemical etch (EBACE) is disclosed. A target or portion thereof may be exposed to a gas composition of a type that etches the target when the gas composition and/or target are exposed to an electron beam. By directing an electron beam toward the target in the vicinity of the gas composition, an interaction between the electron beam and the gas composition etches a portion of the target exposed to both the gas composition and the electron beam. Selectivity of etching of the target due to interaction between the electron beam and gas composition may be enhanced in a number of ways.

Abstract: A method for etching a thin film and fabricating a semiconductor device includes etching the thin film on a substrate, while monitoring the removal of an endpoint detection layer remotely located from the substrate, such that precise control of the thin film etching is provided by monitoring the removal of the endpoint detection layer. The endpoint detection layer is formed on a surface of an etching apparatus that is exposed to the same etching conditions as the thin film to be etched. The etching of the thin film is stopped when a predetermined amount of the endpoint detection layer has removed from the surface of the etching apparatus.

Abstract: An apparatus for etching a dielectric layer contained by a substrate is provided. An etch reactor comprises a top electrode and a bottom electrode. An etch gas source supplies an etch gas into the etch reactor. A first Radio Frequency (RF) source generates a first RF power with a first frequency and supplies the first RF power into the etch reactor, whereas the first frequency is between 100 kilo Hertz (kHz) and 600 kHz. A second RF source generates a second RF power with a second frequency and supplies the second RF power into the etch reactor, whereas the second frequency is at least 10 mega Hertz (MHz).

Abstract: A method for treating a substrate with plasma over a wide pressure range is described. The method comprises exposing the substrate to a low pressure plasma in a process chamber. Further, the method comprises exposing the substrate to a high pressure plasma in the process chamber.

Abstract: Showerhead electrode assemblies are disclosed, which include a showerhead electrode adapted to be mounted in an interior of a vacuum chamber; an optional backing plate attached to the showerhead electrode; a thermal control plate attached to the backing plate or to the showerhead electrode at multiple contact points across the backing plate; and at least one thermally and electrically conductive gasket separating the backing plate and the thermal control plate, or the backing plate and showerhead electrode, at the contact points. Methods of processing semiconductor substrates using the showerhead electrode assemblies are also disclosed.

Abstract: It is intended to provide a plasma processing method and apparatus capable of increasing the uniformity of amorphyzation processing. A prescribed gas is introduced into a vacuum container 1 from a gas supply apparatus 2 through a gas inlet 11 while being exhausted by a turbomolecular pump 3 as an exhaust apparatus through an exhaust hole 12. The pressure in the vacuum container 1 is kept at a prescribed value by a pressure regulating valve 4. High-frequency electric power of 13.56 MHz is supplied from a high-frequency power source 5 to a coil 8 disposed close to a dielectric window 7 which is opposed to a sample electrode 6, whereby induction-coupled plasma is generated in the vacuum container 1. A high-frequency power source 10 for supplying high-frequency electric power to the sample electrode 6 is provided and functions as a voltage source for controlling the potential of the sample electrode 6.

Abstract: A method and a plasma system are provided for anisotropically etching structures into a substrate positioned in an etching chamber, e.g., structures defined using an etching mask in a silicon substrate, using a plasma. For this purpose, the etching chamber is supplied at least intermittently with an etching gas and at least intermittently with a passivation gas, the passivation gas being supplied to the etching chamber in cycles having a time period between 0.05 second and 1 second. In the plasma system, in addition to a plasma source, via which the plasma acting on the substrate may be produced, an arrangement is provided for at least temporary supply of the etching gas and at least temporary supply of the passivation gas to the etching chamber, which arrangement is designed in such a way that the passivation gas may be supplied to the etching chamber in cycles having a time period between 0.05 second and 1 second.

Abstract: A substrate plasma processing apparatus includes a chamber of which an interior is evacuated under a predetermined vacuum condition; an RF electrode which is disposed in the chamber and configured so as to hold a substrate to be processed on a main surface thereof; an opposing electrode which is disposed opposite to the RF electrode in the chamber; an RF voltage applying device for applying an RF voltage with a predetermined frequency to the RF electrode; and a pulsed voltage applying device for applying a pulsed voltage to the RF electrode so as to be superimposed with the RF voltage.

Abstract: In a plasma processing system having a plasma processing chamber, at least one powered electrode and an ignition electrode, a method for igniting a plasma is disclosed. The method includes introducing a substrate into the plasma processing chamber. The method also includes flowing a gas mixture into the plasma processing chamber; energizing the ignition electrode at a strike frequency; and striking a plasma from the gas mixture with the ignition electrode. The method further includes energizing the at least one powered electrode with a target frequency, wherein the strike frequency is greater than the target frequency; and de-energizing the ignition electrode while processing the substrate in the plasma processing chamber.

Abstract: High aspect ratio contact openings are etched while preventing bowing or bending of the etch profile by forming a highly conductive thin film on the side wall of each contact opening. The conductivity of the thin film on the side wall is enhanced by ion bombardment carried out periodically during the etch process.

Abstract: A manufacturing method of a semiconductor device using a semiconductor manufacturing unit comprising a reaction chamber, a substrate mounting stage, and a high frequency power supply coupled to the substrate mounting stage, a blocking capacitor interposed between the substrate mounting stage and the high-frequency power supply to continuously perform a plurality of dry etching processing with respect to the same substrate in the same reaction chamber, the method includes: disposing a substrate on a substrate mounting stage, and applying high-frequency powers to the substrate mounting stage while introducing a fluorocarbon-based first gas to perform a first dry etching processing with respect to the substrate, the substrate including an organic material film and a silicon compound film sequentially deposited on a surface thereof and a resist film patterned on the silicon compound film, the first dry etching processing including processing the silicon compound film with the resist film being used as a mask; and

Abstract: A method of etching high dielectric constant materials using a halogen gas, a reducing gas and an etch rate control gas chemistry.

Abstract: Methods to etch an opening in a substrate layer with reduced critical dimensions are described. A multi-layered mask including a lithographically patterned photoresist and an unpatterned organic antireflective coating (BARC) is formed over a substrate layer to be etched. The BARC layer is etched with a significant negative etch bias to reduce the critical dimension of the opening in the multi-layer mask below the lithographically define dimension in the photoresist. The significant negative etch bias of the BARC etch is then utilized to etch an opening having a reduced critical dimension into the substrate layer. To plasma etch an opening in the BARC with a significant negative etch bias, a polymerizing chemistry, such as CHF3 is employed. In a further embodiment, the polymerizing chemistry provide at low pressure is energized at a relatively low power with a high frequency capacitively coupled source.

Abstract: A method and system for adjusting and controlling the plasma uniformity in a plasma processing system is described. The plasma processing system includes an electron source electrode to which direct current (DC) power is coupled in order to generate a ballistic electron beam during the etching of the substrate. A ring electrode, provided about a periphery of the substrate and opposite the electron source electrode, is utilized to create a ring hollow cathode plasma to affect changes in the distribution of plasma density.

Abstract: A method of fault detection for use in a plasma processing chamber is provided. The method comprises monitoring plasma parameters within a plasma chamber with a single planar ion flux (PIF) probe, analyzing the resulting information, measuring the plasma parameters as a function of time and analyzing the resulting data. The data can be observed, characterized, compared with reference data, digitized, processed, or analyzed to reveal a specific fault. The PIF probe is preferably positioned at a grounded surface within the reactor. Chamber faults that can be detected include a build-up of process by-products in the process chamber, a helium leak, a match re-tuning event, a poor stabilization rate, and a loss of plasma confinement.