By Reaction With Substrate Patents (Class 438/765)
  • Patent number: 7851381
    Abstract: A surface treatment method for a nitride crystal is a surface treatment method of chemically and mechanically polishing a surface of the nitride crystal. Oxide abrasive grains are used. The abrasive grains have a standard free energy of formation of at least ?850 kJ/mol as a converted value per 1 mole of oxygen molecules and have a Mohs hardness of at least 4. The surface treatment method efficiently provides, for efficiently obtaining a nitride crystal substrate that can be used for a semiconductor device, the nitride crystal having the smooth and high-quality surface formed thereon.
    Type: Grant
    Filed: May 31, 2007
    Date of Patent: December 14, 2010
    Assignee: Sumitomo Electric Industries, Ltd.
    Inventors: Keiji Ishibashi, Takayuki Nishiura, Masato Irikura, Seiji Nakahata
  • Publication number: 20100301494
    Abstract: Silicon oxide based low-k dielectric materials may be provided with a hydrophobic low-k surface area, even after exposure to a reactive process ambient, by performing a surface treatment on the basis of hexamethylcyclotrisilazane and/or octamethylcyclotetrasilazane. In addition to the surface treatment, a polymerization may be initiated on the basis of a hydrophobic surface nature of the silicon-based dielectric material, thereby increasing the chemical stability during the further processing.
    Type: Application
    Filed: May 24, 2010
    Publication date: December 2, 2010
    Inventors: Matthias Schaller, Thomas Oszinda, Susanne Leppack, Daniel Fischer
  • Patent number: 7829351
    Abstract: Methods and systems for depositing nanomaterials onto a receiving substrate and optionally for depositing those materials in a desired orientation, that comprise providing nanomaterials on a transfer substrate and contacting the nanomaterials with an adherent material disposed upon a surface or portions of a surface of a receiving substrate. Orientation is optionally provided by moving the transfer and receiving substrates relative to each other during the transfer process.
    Type: Grant
    Filed: August 21, 2006
    Date of Patent: November 9, 2010
    Assignee: Nanosys, Inc.
    Inventors: Robert S. Dubrow, Linda T. Romano, David P. Stumbo
  • Publication number: 20100267247
    Abstract: Methods and apparatus for forming an oxide layer on a semiconductor substrate are disclosed. A two frequency plasma source is used to form a plasma in a plasma reactor. In various embodiments, different quantities of power are supplied to a power source operating at the first frequency and a power source operating at the second frequency over time.
    Type: Application
    Filed: April 19, 2010
    Publication date: October 21, 2010
    Applicant: Applied Materials, Inc.
    Inventors: Kai Ma, Yoshitaka Yokota, Christopher S. Olsen
  • Patent number: 7811896
    Abstract: In various embodiments, semiconductor structures and methods to manufacture these structures are disclosed. In one embodiment, a method to manufacture a semiconductor structure includes forming a cavity in a substrate. A portion of the substrate is doped, or a doped material is deposited over a portion of the substrate. At least a portion of the doped substrate or at least a portion of the doped material is converted to a dielectric material to enclose the cavity. The forming of the cavity may occur before or after the doping of the substrate or the depositing of the doped material. Other embodiments are described and claimed.
    Type: Grant
    Filed: December 8, 2008
    Date of Patent: October 12, 2010
    Assignee: HVVi Semiconductors, Inc.
    Inventor: Bishnu Prasanna Gogoi
  • Publication number: 20100240224
    Abstract: A semiconductor furnace suitable for chemical vapor deposition processing of wafers. The furnace includes a thermal reaction chamber having a top, a bottom, a sidewall, and an internal cavity for removably holding a batch of vertically stacked wafers. A heating system is provided that includes a plurality of heaters arranged and operative to heat the chamber. The heating system includes at least one top heater; at least one bottom heater, and a plurality of sidewall heaters spaced along the height of the reaction chamber to control temperature variations within in the chamber and promote uniform film deposit thickness on the wafers.
    Type: Application
    Filed: March 20, 2009
    Publication date: September 23, 2010
    Applicant: Taiwan Semiconductor Manufactruing Co., Ltd.
    Inventors: Hsin-Hsien Wu, Chun-Lin Chang, Chi-Ming Yang
  • Patent number: 7799703
    Abstract: A processing method includes a gas having a Si—CH3 bond supplied into a processing chamber after a target substrate to be processed is loaded into the processing chamber; and a silylation process performed on the target substrate. The internal pressure of the chamber by the supply of the gas having the Si—CH3 bond and the gas supply time are set to be within ranges where the silylation process can be performed while the internal pressure of the chamber is decreased to reach an eligible pressure level where the wafer can be unloaded after the internal pressure of the chamber is increased up to a preset pressure by the supply of the gas.
    Type: Grant
    Filed: February 4, 2008
    Date of Patent: September 21, 2010
    Assignee: Tokyo Electron Limited
    Inventors: Kazuhiro Kubota, Naotsugu Hoshi, Yuki Chiba, Ryuichi Asako
  • Patent number: 7790627
    Abstract: A method of manufacturing a metal compound thin film is disclosed. The method may include forming a first metal compound layer on a substrate by atomic layer deposition, performing annealing on the first metal compound layer in an atmosphere containing a nitrogen compound gas, thereby diffusing nitrogen into the first metal compound layer, and forming a second metal compound layer on the first metal compound layer by atomic layer deposition.
    Type: Grant
    Filed: December 11, 2007
    Date of Patent: September 7, 2010
    Assignee: Rohm Co., Ltd.
    Inventors: Kunihiko Iwamoto, Toshihide Nabatame, Koji Tominaga, Tetsuji Yasuda
  • Patent number: 7785919
    Abstract: An image sensor and a method for manufacturing the same are provided. The image sensor can comprise a substrate, a metal pad, and a sulfur layer. The substrate can include a pixel region and a pad region. The metal pad can be formed of a material containing sulfur and can be disposed in the pad region of the substrate. The sulfur layer can be formed from the sulfur of the metal pad and provided on a top surface of the metal pad.
    Type: Grant
    Filed: June 24, 2008
    Date of Patent: August 31, 2010
    Assignee: Dongbu Hitek Co., Ltd.
    Inventor: Kyung Min Park
  • Patent number: 7763317
    Abstract: Surface preparation of a compound semiconductor surface, such as indium antimonide (InSb), with a triflating agent, such as triflic anhydride or a trifluoroacetylating agent, such as trifluoroacetic anhydride is described. In one embodiment, the triflating or trifluoroacetylating passivates the compound semiconductor surface by terminating the surface with triflate trifluoroacetate groups. In a further embodiment, a triflating agent or trifluoroacetylating agent is employed to first convert a thin native oxide present on a compound semiconductor surface to a soluble species. In another embodiment, the passivated compound semiconductor surface is activated in an ALD chamber by reacting the triflate or trifluoroacetate protecting groups with a protic source, such as water (H2O). Metalorganic precursors are then introduced in the ALD chamber to form a good quality interfacial layer, such as aluminum oxide (Al2O3), on the compound semiconductor surface.
    Type: Grant
    Filed: March 30, 2007
    Date of Patent: July 27, 2010
    Assignee: Intel Corporation
    Inventors: James M. Blackwell, Willy Rachmady, Gregory J. Kearns, Darryl J. Morrison
  • Patent number: 7763550
    Abstract: A layer is formed on a semiconductor wafer in an apparatus having a processing chamber, a transferring chamber, and a wafer boat. The boat having the semiconductor wafer thereon is rotated in the transferring chamber. While the boat is rotated, the boat is transferred between the transferring chamber and the processing chamber and a reaction gas is provided to the processing chamber to form the layer on the wafer.
    Type: Grant
    Filed: February 18, 2005
    Date of Patent: July 27, 2010
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Ji-Sang Yahng, Young-Wook Park, Jae-Jong Han, Jum-Soo Chang
  • Patent number: 7749917
    Abstract: A method and apparatus for cleaning layers of solar cell substrates is disclosed. The substrate is exposed to a reactive gas that may comprise neutral radicals comprising nitrogen and fluorine, or that may comprise anhydrous HF and water, alcohol, or a mixture of water and alcohol. The reactive gas may further comprise a carrier gas. The reactive gas etches the solar cell substrate surface, removing oxygen and other impurities. When exposed to the neutral radicals, the substrate grows a thin film containing ammonium hexafluorosilicate, which is subsequently removed by heat treatment.
    Type: Grant
    Filed: March 13, 2009
    Date of Patent: July 6, 2010
    Assignee: Applied Materials, Inc.
    Inventors: Virendra V S Rana, Michael P. Stewart
  • Patent number: 7749778
    Abstract: A method of monitoring and testing electro-migration and time dependent dielectric breakdown includes forming an addressable wiring test array, which includes a plurality or horizontally disposed metal wiring and a plurality of segmented, vertically disposed probing wiring, performing a single row continuity/resistance check to determine which row of said metal wiring is open, performing a full serpentine continuity/resistance check, and determining a position of short defects.
    Type: Grant
    Filed: January 3, 2007
    Date of Patent: July 6, 2010
    Assignee: International Business Machines Corporation
    Inventors: Kaushik Chanda, Lawrence Clevenger, Timothy J. Dalton, Louis L. C. Hsu, Chih-Chao Yang
  • Publication number: 20100159618
    Abstract: In some embodiments of the invention, encapsulated semiconducting nanomaterials are described. In certain embodiments the nanostructures described are semiconducting nanomaterials encapsulated with ordered carbon shells. In some aspects a method for producing encapsulated semiconducting nanomaterials is disclosed. In some embodiments applications of encapsulated semiconducting nanomaterials are described.
    Type: Application
    Filed: February 16, 2010
    Publication date: June 24, 2010
    Applicant: Brookhaven Science Associates, LLC
    Inventors: Eli Anguelova Sutter, Peter Werner Sutter
  • Patent number: 7737047
    Abstract: Some embodiments include methods of forming dielectric materials associated with semiconductor constructions. A semiconductor substrate surface having two different compositions may be exposed to a first silanol, then to organoaluminum to form a monolayer, and finally to a second silanol to form a dielectric material containing aluminum from the organoaluminum together with silicon and oxygen from the second silanol. Alternatively, or additionally, an organoaluminum monolayer may be formed across a semiconductor substrate, and then exposed to silanol within a deposition chamber, with the silanol being provided in two doses. Initially, a first dose of the silanol is injected the chamber, and then the first dose is flushed from the chamber to remove substantially all unreacted silanol from within the chamber. Subsequently, the second dose of silanol is injected into the chamber. Some embodiments include semiconductor constructions.
    Type: Grant
    Filed: August 25, 2006
    Date of Patent: June 15, 2010
    Assignee: Micron Technology, Inc.
    Inventor: Christopher W. Hill
  • Patent number: 7727904
    Abstract: Methods of forming an oxide layer on silicon carbide include thermally growing an oxide layer on a layer of silicon carbide, and annealing the oxide layer in an environment containing NO at a temperature greater than 1175° C. The oxide layer may be annealed in NO in a silicon carbide tube that may be coated with silicon carbide. To form the oxide layer, a preliminary oxide layer may be thermally grown on a silicon carbide layer in dry O2, and the preliminary oxide layer may be re-oxidized in wet O2.
    Type: Grant
    Filed: July 14, 2006
    Date of Patent: June 1, 2010
    Assignee: Cree, Inc.
    Inventors: Mrinal K. Das, Brett Hull, Sumi Krishnaswami
  • Patent number: 7713883
    Abstract: An object of this invention is to make it possible to suppress early-stage oxidation of a substrate surface prior to oxidation processing, and to remove a natural oxidation film. For this reason, a method is provided comprising the steps of loading a substrate into a processing chamber, supplying a hydrogen-containing gas and an oxygen-containing gas into the processing chamber, and subjecting a surface of the substrate to oxidation processing, and unloading the substrate subjected to oxidation processing from the processing chamber. In the oxidation processing step, the hydrogen-containing gas is introduced in advance into the processing chamber, with the pressure inside the processing chamber set at a pressure that is less than atmospheric pressure, and the oxygen-containing gas is then introduced in the state in which the introduction of the hydrogen-containing gas is continued.
    Type: Grant
    Filed: March 8, 2006
    Date of Patent: May 11, 2010
    Assignee: Hitachi Kokusai Electric Inc.
    Inventors: Kazuhiro Yuasa, Yasuhiro Megawa
  • Publication number: 20100099270
    Abstract: A method and apparatus for atomic layer deposition (ALD) is described. The apparatus comprises a deposition chamber and a wafer support. The deposition chamber is divided into two or more deposition regions that are integrally connected one to another. The wafer support is movable between the two or more interconnected deposition regions within the deposition chamber.
    Type: Application
    Filed: December 23, 2009
    Publication date: April 22, 2010
    Inventors: Barry L. Chin, Alfred W. Mak, Lawrence Chung-Lai Lei, Ming Xi, Hua Chung, Ken Kaung Lai, Jeong Soo Byun
  • Publication number: 20100099269
    Abstract: Provided are a semiconductor device and a method of forming the same. The method may include forming a gate dielectric layer including a plurality of elements on a substrate; supplying a specific element to the gate dielectric layer; forming a product though reacting the specific element with at least one of the plurality of elements; and removing the product.
    Type: Application
    Filed: September 14, 2009
    Publication date: April 22, 2010
    Inventors: Sangjin Hyun, Yugyun Shin, Hagju Cho, Hyung-seok Hong
  • Publication number: 20100093184
    Abstract: A method for making a metal oxide layer includes: (a) exposing a substrate having oxygen-containing reaction sites to an environment of a first precursor of an organometallic compound, which contains a metal atom and ligand groups, so as to form a chemisorption layer of the first precursor on the substrate; (b) exposing the chemisorption layer on the substrate to a non-free radical environment of a second precursor after step (a) so as to remove the ligand groups of the chemisorption layer that are unreacted in step (a) and so as to convert the chemisorption layer into a metal oxide layer; and (c) after step (b), exposing the metal oxide layer on the substrate to a free radical-containing gas containing free radicals so as to remove the ligand groups of the chemisorption layer that are left unreacted in step (b).
    Type: Application
    Filed: October 14, 2009
    Publication date: April 15, 2010
    Applicant: NATIONAL TSING HUA UNIVERSITY
    Inventors: Tai-Bor Wu, Cheng-Hao Hou
  • Patent number: 7696107
    Abstract: The nitride film forming method comprises the first step of loading a semiconductor substrate 12 into a reaction furnace, and decompressing the inside of the reaction furnace 14 to remove oxygen and water from the inside of the reaction furnace 14 and the semiconductor substrate 12, the second step of heating the reaction furnace 14 to further remove the oxygen and the water from the reaction furnace 14 and the semiconductor substrate 12, and the third step of purifying nitrogen gas to have the oxygen concentration to be 1 ppb or below, and performing thermal processing with the purified nitrogen gas being fed into the reaction furnace to form a nitride film 56 over the semiconductor substrate 12. The thermal nitriding is performed using an ultrahigh-purity nitrogen gas of an oxygen concentration of 1 ppb or below, whereby nitrogen film of very good quality can be formed without setting the thermal processing temperature very high.
    Type: Grant
    Filed: June 13, 2005
    Date of Patent: April 13, 2010
    Assignee: Fujitsu Microelectronics Limited
    Inventors: Toshiharu Yamauchi, Tunenori Yamauchi, Kumiko Toyota
  • Patent number: 7695981
    Abstract: A seed layer is formed on a substrate using a first biological agent. The seed layer may comprise densified nanoparticles which are bound to the biological agent. The seed layer is then used for a deposition of a metal layer, such as a barrier layer, an interconnect layer, a cap layer and/or a bus line for a solid state device.
    Type: Grant
    Filed: May 15, 2006
    Date of Patent: April 13, 2010
    Assignee: Siluria Technologies, Inc.
    Inventors: Haixia Dai, Khashayar Pakbaz, Michael Spaid, Theo Nikiforov
  • Patent number: 7682987
    Abstract: Provided is a substrate processing apparatus and a method of manufacturing a semiconductor device, which are hard to cause a defect in processing a substrate owing to that a pressure inside a process chamber is not kept constant, and which enable a better processing of a substrate.
    Type: Grant
    Filed: June 22, 2007
    Date of Patent: March 23, 2010
    Assignee: Hitachi Kokusai Electric Inc.
    Inventors: Kazuhiro Yuasa, Kazuhiro Kimura, Yasuhiro Megawa
  • Publication number: 20100065895
    Abstract: A method for producing at least one porous layer on a substrate, whereby a suspension, which contains particles from a layer-forming material or molecular precursors of the layer-forming material, as well as at least one organic component, is applied to the substrate, the precursors of the layer-forming material are subsequently reacted to produce the layer-forming material following application to the substrate, in a next step, the particles from the layer-forming material are sintered, and the at least one organic component is subsequently removed. Also, a field-effect transistor having at least one gate electrode, the gate electrode having an electrically conductive, porous coating which was applied in accordance with the method.
    Type: Application
    Filed: October 10, 2007
    Publication date: March 18, 2010
    Inventors: Richard Fix, Oliver Wolst, Markus Widenmeyer, Alexander Martin
  • Patent number: 7674680
    Abstract: The invention is directed to a device for regulating the flow of electric current with high dielectric constant gate insulating layer and a source and/or drain forming a Schottky contact or Schottky-like region with a substrate and its fabrication method. In one aspect, the gate insulating layer has a dielectric constant greater than the dielectric constant of silicon. In another aspect, the current regulating device may be a MOSFET device, optionally a planar P-type or N-type MOSFET, having any orientation. In another aspect, the source and/or drain may consist partially or fully of a silicide.
    Type: Grant
    Filed: October 5, 2004
    Date of Patent: March 9, 2010
    Assignee: Avolare 2, LLC
    Inventors: John P. Snyder, John P. Larson
  • Patent number: 7670399
    Abstract: Provided are an exhaust pipe having turbulence wings, and an exhaust system. The exhaust pipe includes an outer pipe and an inner pipe. The exhaust pipe is connected to a scrubber of the exhaust system. The outer pipe has a gas inlet port. The inner pipe is installed in the outer pipe. A gap exists between the outer pipe and the inner pipe. The inner pipe includes a plurality of turbulence wings and gas discharge ports. The gas discharge ports are in communication with the gas inlet port via the gap. The turbulence wings project inward from the inner pipe and are disposed adjacent to the gas discharge ports. The inner pipe has an exhaust gas passage formed therein. When a gas is flowed through the gas discharge ports and over the turbulence wings, a jet layer is formed adjacent to an interior sidewall of the inner pipe. The jet layer forms a buffer between the exhaust gas passage and the inner pipe sidewalls.
    Type: Grant
    Filed: January 15, 2007
    Date of Patent: March 2, 2010
    Assignee: Samsung Electronics Co., Ltd.
    Inventor: Tea-Jin Park
  • Publication number: 20100035440
    Abstract: A substrate processing apparatus includes: a reaction tube configured to process a plurality of substrates; a heater configured to heat the inside of the reaction tube; a holder configured to arrange and hold the plurality of substrates within the reaction tube; a first nozzle disposed in an area corresponding to a substrate arrangement area where the plurality of substrates are arranged, and configured to supply hydrogen-containing gas from a plurality of locations of the area into the reaction tube; a second nozzle disposed in the area corresponding to the substrate arrangement area, and configured to supply oxygen-containing gas from a plurality of locations of the area into the reaction tube; an exhaust outlet configured to exhaust the inside of the reaction tube; and a pressure controller configured to control pressure inside the reaction tube to be lower than atmospheric pressure, wherein the first nozzle is provided with a plurality of first gas ejection holes, and the second nozzle is provided with as
    Type: Application
    Filed: August 5, 2009
    Publication date: February 11, 2010
    Inventors: Masanao Fukuda, Takafumi Sasaki, Kazuhiro Yuasa
  • Patent number: 7655575
    Abstract: The present invention is a photosensitized electrode which absorbs sunlight to obtain electron-hole pair. The photosensitized electrode is fabricated with simple procedure and has low cost. The electrode has excellent chemical resist to be applied in a solar cell device with enhanced sun-light absorbing ability. The present invention can be applied in an optoelectronic device or a hydrogen generator device too.
    Type: Grant
    Filed: October 25, 2006
    Date of Patent: February 2, 2010
    Assignee: Atomic Energy Council - Institute of Nuclear Energy Research
    Inventors: Ming-Chang Lin, Yen-Chang Tzeng, Shan-Ming Lan, Chi-Shen Lee, Tsun-Neng Yang, Tsong-Yang Wei, Jyh-Perng Chiu, Li-Fu Lin, Der-Jhy Shieh, Ming-Chao Kuo
  • Publication number: 20090325356
    Abstract: Provided are methods of forming a low temperature deposition layer and methods of manufacturing a semiconductor device using the same. The method of manufacturing a semiconductor device comprises forming a mask layer exposing a gate pattern on a substrate on which the gate pattern is formed, forming a sacrifice layer on the mask layer and on a substrate not covered by the mask layer using a plasma ion immersion implantation and deposition (PIIID), and doping a substrate adjacent to both sidewalls of the gate pattern with an impurity.
    Type: Application
    Filed: April 29, 2009
    Publication date: December 31, 2009
    Inventors: Dong-Woon SHIN, Si-Young Choi, Tai-Su Park, Jong-Ryeol Yoo, Jong-Hoon Kang
  • Patent number: 7635654
    Abstract: Methods and apparatus are provided for magnetic tunnel junction (MTJ) devices and arrays, comprising metal-insulator-metal (M-I-M) structures with opposed first and second ferro-magnetic electrodes with alterable relative magnetization direction. The insulator is formed by depositing an oxidizable material (e.g., Al) on the first electrode, naturally oxidizing it, e.g., at about 0.03 to 10 milli-Torr for up to a few thousand seconds at temperatures below about 35° C., then further rapidly (e.g., plasma) oxidizing at a rate much larger than that of the initial natural oxidation. The second electrode of the M-I-M structure is formed on this oxide. More uniform tunneling properties result. A second oxidizable material layer is optionally provided after the initial natural oxidation and before the rapid oxidation step during which it is substantially entirely converted to insulating oxide. A second natural oxidation cycle may be optionally provided before the second layer is rapidly oxidized.
    Type: Grant
    Filed: January 27, 2006
    Date of Patent: December 22, 2009
    Assignee: Everspin Technologies, Inc.
    Inventors: JiJun Sun, John T. Martin, Jon M. Slaughter
  • Publication number: 20090311876
    Abstract: A manufacturing method of a semiconductor device, including the steps of: loading into a processing chamber a substrate having a high dielectric gate insulating film and a metal electrode, with a side wall exposed by etching; applying oxidation processing to the substrate by supplying thereto hydrogen-containing gas and oxygen-containing gas excited by plasma, with the substrate heated to a temperature not allowing the high dielectric gate insulating film to be crystallized, in the processing chamber; and unloading the substrate after processing from the processing chamber.
    Type: Application
    Filed: June 12, 2009
    Publication date: December 17, 2009
    Applicant: HITACHI KOKUSAI ELECTRIC INC.
    Inventor: Tadashi Terasaki
  • Publication number: 20090311875
    Abstract: A method of selectively attaching a capping agent to an H-passivated Si or Ge surface is disclosed. The method includes providing the H-passivated Si or Ge surface, the H-passivated Si or Ge surface including a set of covalently bonded Si or Ge atoms and a set of surface substitutional atoms, wherein the set of surface substitutional atoms includes at least one of boron atoms, aluminum atoms, gallium atoms, indium atoms, tin atoms, lead atoms, phosphorus atoms, arsenic atoms, sulfur atoms, and bismuth atoms. The method also includes exposing the set of surface functional atoms to a set of capping agents, each capping agent of the set of capping agents having a set of functional groups bonded to a pair of carbon atoms, wherein the pair of carbon atoms includes at least one pi orbital bond, and further wherein a covalent bond is formed between at least some surface substitutional atoms of the set of surface substitutional atoms and at least some capping agents of the set of capping agents.
    Type: Application
    Filed: June 17, 2008
    Publication date: December 17, 2009
    Inventor: Elena Rogojina
  • Publication number: 20090291556
    Abstract: A method for depositing one or more materials on a substrate, such as for example, a semiconductor substrate that includes providing the substrate; applying a polymer film to at least a portion of a surface of the substrate; and exposing the semiconductor substrate to a supercritical fluid containing at least one reactant for a time sufficient for the supercritical fluid to swell the polymer and for the at least one reactant to penetrate the polymer film. The reactant is reacted to cause the deposition of the material on at least a portion of the substrate. The substrate is removed from the supercritical fluid, and the polymer film is removed. The process permits the precise deposition of materials without the need for removal of excess material using chemical, physical, or a combination of chemical and physical removal techniques.
    Type: Application
    Filed: July 31, 2009
    Publication date: November 26, 2009
    Applicant: MICRON TECHNOLOGY, INC.
    Inventors: Chien M. Wai, Hiroyuki Ohde, Steve Kramer
  • Patent number: 7622397
    Abstract: The present invention is a photosensitized electrode which absorbs sun light to obtain pairs of separated electron and hole. The photosensitized electrode is fabricated with simple procedure and has low cost. The electrode has excellent chemical resistance and is fitted to be applied in a solar cell device with enhanced sun-light absorbing ability. The present invention can be applied in an optoelectronic device or a hydrogen generator device too.
    Type: Grant
    Filed: July 28, 2006
    Date of Patent: November 24, 2009
    Assignee: Atomic Energy Council - Institute of Nuclear Energy Research
    Inventors: Ming-Chang Lin, Yen-Chang Tzeng, Shan-Ming Lan, Yuan-Pern Lee, Wei-Guang Diau, Tsong-Yang Wei, Jyh-Perng Chiu, Li-Fu Lin, Der-Jhy Shieh, Ming-Chao Kuo
  • Publication number: 20090280653
    Abstract: A method for forming a semiconductor device is provided. In one embodiment, the method includes providing a semiconductor substrate with a surface region. The surface region includes one or more layers overlying the semiconductor substrate. In addition, the method includes depositing a dielectric layer overlying the surface region. The dielectric layer is formed by a CVD process. Furthermore, the method includes forming a diffusion barrier layer overlying the dielectric layer. In addition, the method includes forming a conductive layer overlying the diffusion barrier layer. Additionally, the method includes reducing the thickness of the conductive layer using a chemical-mechanical polishing process. The CVD process utilizes fluorine as a reactant to form the dielectric layer. In addition, the dielectric layer is associated with a dielectric constant equal or less than 3.3.
    Type: Application
    Filed: July 17, 2009
    Publication date: November 12, 2009
    Applicant: Semiconductor Manufacturing International (Shanghai) Corporation
    Inventor: TING CHEONG ANG
  • Publication number: 20090280652
    Abstract: Disclosed is a producing method of a semiconductor device comprising a first step of supplying a first reactant to a substrate to cause a ligand-exchange reaction between a ligand of the first reactant and a ligand as a reactive site existing on a surface of the substrate, a second step of removing a surplus of the first reactant, a third step of supplying a second reactant to the substrate to cause a ligand-exchange reaction to change the ligand after the exchange in the first step into a reactive site, a fourth step of removing a surplus of the second reactant, and a fifth step of supplying a plasma-excited third reactant to the substrate to cause a ligand-exchange reaction to exchange a ligand which has not been exchange-reacted into the reactive site in the third step into the reactive site, wherein the first to fifth steps are repeated predetermined times.
    Type: Application
    Filed: March 31, 2009
    Publication date: November 12, 2009
    Inventors: Hironobu Miya, Kazuyuki Toyoda, Norikazu Mizuno, Taketoshi Sato, Masanori Sakai, Masayuki Asai, Kazuyuki Okuda, Hideki Horita
  • Publication number: 20090263716
    Abstract: The present invention relates to methods for producing anode materials for use in nonaqueous electrolyte secondary batteries. In the present invention, a metal-semiconductor alloy layer is formed on an anode material by contacting a portion of the anode material with a solution containing metals ions and a dissolution component. When the anode material is contacted with the solution, the dissolution component dissolves a part of the semiconductor material in the anode material and deposit the metal on the anode material. After deposition, the anode material and metal are annealed to form a uniform metal-semiconductor alloy layer. The anode material of the present invention can be in a monolithic form or a particle form. When the anode material is in a particle form, the particulate anode material can be further shaped and sintered to agglomerate the particulate anode material.
    Type: Application
    Filed: April 17, 2009
    Publication date: October 22, 2009
    Inventors: Murali Ramasubramanian, Robert M. Spotnitz
  • Publication number: 20090263977
    Abstract: A method of selectively attaching a capping agent to a Group IV semiconductor surface is disclosed. The method includes providing the Group IV semiconductor surface, the Group IV semiconductor surface including a set of covalently bonded Group IV semiconductor atoms and a set of surface boron atoms. The method also includes exposing the set of boron atoms to a set of capping agents, each capping agent of the set of capping agents having a central atom and a set of functional groups, wherein the central atom includes at least a lone pair of electrons; wherein a complex is formed between at least some surface boron atoms of the set of surface boron atoms and the central atom of at least some capping agents of the set of capping agents.
    Type: Application
    Filed: April 16, 2008
    Publication date: October 22, 2009
    Inventors: Elena V. Rogojina, Maxim Kelman, Anthony Young Kim
  • Publication number: 20090258506
    Abstract: Substrate contamination from tungsten is prevented. A substrate processing method comprises a main treatment process for oxidizing a substrate containing tungsten with a gas containing oxygen, and a cleaning process for removing tungsten oxides with a gas containing hydrogen. The main treatment process includes a step of loading the substrate containing metal into the processing chamber; a step of supplying gas containing oxygen into the processing chamber; and a step of supplying electric power to a high-frequency electric power supply after supplying the gas to generate plasma containing oxygen elements in order to process the substrate, a step of stopping the supply of electric power to the high-frequency electric power supply, and a step of unloading the substrate from the processing chamber.
    Type: Application
    Filed: December 15, 2006
    Publication date: October 15, 2009
    Applicant: HITACHI KOKUSAI ELECTRIC INC.
    Inventor: Akito Hirano
  • Publication number: 20090246934
    Abstract: A method for manufacturing an SOI substrate in which crystal defects of a single crystal semiconductor layer are reduced is provided. An oxide film containing halogen is formed on each of surfaces of a single crystal semiconductor substrate and of a semiconductor substrate provided with a single crystal semiconductor layer separated from the single crystal semiconductor substrate, whereby impurities that exist on the surfaces of and inside the substrates are decreased. In addition, the single crystal semiconductor layer provided over the semiconductor substrate is irradiated with a laser beam, whereby crystallinity of the single crystal semiconductor layer is improved and planarity is improved.
    Type: Application
    Filed: March 25, 2009
    Publication date: October 1, 2009
    Applicant: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Shunpei YAMAZAKI, Eriko NISHIDA, Takashi SHIMAZU
  • Publication number: 20090236609
    Abstract: In a method of making a functionalized graphitic structure, a portion of a multi-layered graphene surface extending from a silicon carbide substrate is exposed to an acidic environment so as to separate graphene layers in a portion of the multi-layered graphene surface. The portion of the multi-layered graphene surface is exposed to a functionalizing material that binds to carbon atoms in the graphene sheets so that the functionalizing material remains between the graphene sheets, thereby generating a functionalized graphitic structure. The functionalized graphitic structure is dried in an inert environment.
    Type: Application
    Filed: September 30, 2008
    Publication date: September 24, 2009
    Applicant: GEORGIA TECH RESEARCH CORPORATION
    Inventors: Walt A. de Heer, Xiaosong Wu, Michael Sprinkle, Claire Berger
  • Publication number: 20090233452
    Abstract: Disclosed is a producing method of a semiconductor device produced by transferring a plurality of substrates into a processing chamber, supplying oxygen-containing gas and hydrogen-containing gas into the processing chamber to process the plurality of substrates by oxidation, and transferring the plurality of the oxidation-processed substrates out from the processing chamber, wherein in the oxidation-processing, the hydrogen-containing gas is supplied from a plurality of locations of a region which is in proximity to the inner wall of the processing chamber and which corresponds to a substrate arrangement region in which the plurality of substrates are arranged in the processing chamber.
    Type: Application
    Filed: March 13, 2009
    Publication date: September 17, 2009
    Inventors: Takashi Ozaki, Kazuhiro Yuasa, Kiyohiko Maeda
  • Publication number: 20090209081
    Abstract: Methods are provided for depositing silicon dioxide containing thin films on a substrate by atomic layer deposition ALD. By using disilane compounds as the silicon source, good deposition rates and uniformity are obtained.
    Type: Application
    Filed: December 19, 2008
    Publication date: August 20, 2009
    Applicant: ASM International N.V.
    Inventors: Raija H. MATERO, Suvi P. Haukka
  • Patent number: 7576015
    Abstract: A method for manufacturing an alignment layer is provided, which includes the following steps. First, a substrate is provided. Next, an auxiliary layer is formed on the substrate. Then, an alignment solution is sprayed on the auxiliary layer through an inkjet printing process. The alignment solution includes an alignment material and a first solvent, and the auxiliary layer has the same polarity as the first solvent. Then, by performing a curing process, the alignment solution is cured to form an alignment layer. As mentioned above, the method for manufacturing an alignment layer may be applied to manufacture an alignment layer with preferred smoothness.
    Type: Grant
    Filed: September 20, 2006
    Date of Patent: August 18, 2009
    Assignee: AU Optronics Corp.
    Inventors: Yuan-Hung Tung, Chih-Jui Pan
  • Publication number: 20090203220
    Abstract: In order to reduce an unevenness of a surface of a body, a sacrificial layer is applied to the surface, a chemical-mechanical polishing of the sacrificial layer and material of said body is performed to reduce the unevenness of the surface, and a remainder of the sacrificial layer, if any, may be removed.
    Type: Application
    Filed: February 11, 2008
    Publication date: August 13, 2009
    Inventors: Joern Plagmann, Holger Poehle
  • Patent number: 7572741
    Abstract: Methods of forming oxide layers on silicon carbide layers are disclosed, including placing a silicon carbide layer in a chamber such as an oxidation furnace tube that is substantially free of metallic impurities, heating an atmosphere of the chamber to a temperature of about 500 ° C. to about 1300 ° C., introducing atomic oxygen in the chamber, and flowing the atomic oxygen over a surface of the silicon carbide layer to thereby form an oxide layer on the silicon carbide layer. In some embodiments, introducing atomic includes oxygen providing a source oxide in the chamber and flowing a mixture of nitrogen and oxygen gas over the source oxide. The source oxide may comprise aluminum oxide or another oxide such as manganese oxide. Some methods include forming an oxide layer on a silicon carbide layer and annealing the oxide layer in an atmosphere including atomic oxygen.
    Type: Grant
    Filed: September 16, 2005
    Date of Patent: August 11, 2009
    Assignee: Cree, Inc.
    Inventors: Mrinal K. Das, Anant K. Agarwal, John W. Palmour, Dave Grider
  • Patent number: 7566481
    Abstract: A method is provided for making a coated article including an anti-etch layer(s) that is resistant to attacks by at least some fluoride-based etchant(s) for at least a period of time. In certain example embodiments, an anti-etch layer(s) is provided on a glass substrate in order to protect the glass substrate from attacks by fluoride-based etchant(s). In certain example embodiments, the anti-etch layer(s) is formed using at least one ion beam (possibly in combination with at least one sputtering target). In certain embodiments, a diamond-like carbon (DLC) inclusive layer(s) may be provided over and/or under the anti-etch layer.
    Type: Grant
    Filed: May 3, 2005
    Date of Patent: July 28, 2009
    Assignee: Guardian Industries Corp.
    Inventor: Vijayen S. Veerasamy
  • Patent number: 7560352
    Abstract: A method for epitaxially forming a silicon-containing material on a substrate surface utilizes a halogen containing gas as both an etching gas as well as a carrier gas through adjustments of the process chamber temperature and pressure. It is beneficial to utilize HCl as the halogen containing gas because converting HCl from a carrier gas to an etching gas can easily be performed by adjusting the chamber pressure.
    Type: Grant
    Filed: March 17, 2006
    Date of Patent: July 14, 2009
    Assignee: Applied Materials, Inc.
    Inventors: David K. Carlson, Satheesh Kuppurao, Errol Antonio C. Sanchez, Howard Beckford, Yihwan Kim
  • Patent number: 7560393
    Abstract: A method of forming (and apparatus for forming) refractory metal nitride layers (including silicon nitride layers), such as a tantalum (silicon) nitride barrier layer, on a substrate by using a vapor deposition process with a refractory metal precursor compound, a disilazane, and an optional silicon precursor compound.
    Type: Grant
    Filed: February 28, 2007
    Date of Patent: July 14, 2009
    Assignee: Micron Technology, Inc.
    Inventor: Brian A. Vaartstra
  • Publication number: 20090170339
    Abstract: By performing a heat treatment on the basis of a hydrogen ambient, exposed silicon-containing surface portions may be reorganized prior to the formation of gate dielectric materials. Hence, the interface quality and the material characteristics of the gate dielectrics may be improved, thereby reducing negative bias temperature instability effects in highly scaled P-channel transistors.
    Type: Application
    Filed: May 22, 2008
    Publication date: July 2, 2009
    Inventors: Martin Trentzsch, Thorsten Kammler, Rolf Stephan