Of Memory Patents (Class 714/6.1)
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Patent number: 8473791Abstract: A method comprises detecting a defective area in a Dynamic Random Access Memory (DRAM). The method further comprises establishing a redundant memory buffer at a per-memory module level. The method still further comprises loading the redundant memory buffer with a copy of data from the defective area. The method additionally comprises substituting data from the redundant memory buffer for data stored in the defective area upon a memory access to the defective area.Type: GrantFiled: April 30, 2007Date of Patent: June 25, 2013Assignee: Hewlett-Packard Development Company, L.P.Inventors: Mark Shaw, Larry Thayer, Chris Petersen, Lidia Warnes, Dheemanth Nagaraj
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Patent number: 8473784Abstract: A storage apparatus includes a backup processing unit that stores data stored in a first memory into a second memory as backup data upon occurrence of a power failure, a restore processing unit that upon recovery from the power failure restores the backup data backed up in the second memory to the first memory and erases the backup data, and an erasure processing termination unit that terminates the erasure processing upon a power failure occurring during erasure processing for erasing the backup data stored in the second memory, and a re-backup processing unit that re-backs up data in the first memory corresponding to the backup data erased from the second memory before the erasure processing is terminated by the erasure processing termination unit to a location in the second memory subsequent to a last location that contains the backup data which has not been erased.Type: GrantFiled: May 19, 2010Date of Patent: June 25, 2013Assignee: Fujitsu LimitedInventors: Yuji Hanaoka, Terumasa Haneda, Atsushi Uchida, Yoko Kawano, Emi Narita
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Publication number: 20130159765Abstract: When a double failure occurs in a storage device storing a mutual conversion table such as a track management information table in thin provisioning, the storage address of the track within the storage subsystem cannot be specified and user data is lost. In order to solve the problem, the present invention provides a storage subsystem capable of recovering data by referring to a track address stored in an accessible track management information table or a user data section, renewing the damaged track management information table to restore the corresponding relationship between track management information tables, and enabling the user data to be accessed again.Type: ApplicationFiled: December 14, 2011Publication date: June 20, 2013Applicant: HITACHI, LTD.Inventors: Shinichi Hiramatsu, Kazue Jindo
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Method and apparatus for dealing with write errors when writing information data into memory devices
Patent number: 8468384Abstract: For writing, flash memory devices are physically accessed in a page-oriented mode, but such devices are not error-free in operation. According to the invention, when writing information data in a bus write cycle in a sequential manner into flash memory devices assigned to a common data bus, at least one of said flash memory devices is not fed for storage with a current section of said information data. In case an error is occurring while writing a current information data section into a page of a current one of said flash memory devices, said current information data section is written into a non-flash memory. During the following bus write cycle, while the flash memory device containing that defective page is normally idle, that idle time period is used for copying the corresponding stored section of said information data from said non-flash memory to a non-defect page of that flash memory device.Type: GrantFiled: November 8, 2012Date of Patent: June 18, 2013Assignee: Thomson LicensingInventors: Thomas Brune, Michael Drexler, Dieter Haupt -
Patent number: 8468312Abstract: A disk drive receives a request to write at least one block of a first block size, wherein the disk drive is configured to store blocks of a second block size that is larger in size than the first block size. The disk drive stores a plurality of emulated blocks of the first block size in each block of the second block size. The disk drive generates a read error, in response to reading a selected block of the second block size in which the at least block of the first block size is to be written via an emulation. The disk drive performs a destructive write of selected emulated blocks of the first block size that caused the read error to be generated. The disk drive writes the at least one block of the first block size in the selected block of the second block size.Type: GrantFiled: April 24, 2012Date of Patent: June 18, 2013Assignee: International Business Machines CorporationInventors: Michael T. Benhase, Andrew B. McNeill, Jr.
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Patent number: 8464132Abstract: A method for accessing a flash memory includes: writing a data stream into at least a page of at least one data block of the flash memory, where each page of the data block includes an identity code; reading at least one identity code of the page; and determining a specific page according to at least the identity code, where the specific page is a last page that the data stream is written to before the flash memory is disconnected from a power source.Type: GrantFiled: May 3, 2010Date of Patent: June 11, 2013Assignee: Silicon Motion Inc.Inventors: Po-Syuan Chen, Chi-Hsiang Hung
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Patent number: 8464100Abstract: A system for checking a program memory) of a processing unit includes a check module, and the processing unit is made up of an instruction counter connected to the check module. The check module has a register connected to a first changeover switch that sets the register content. In a system that allows for the instruction addresses of the entire program memory to be checked, the instruction counter contains an ancillary counter, which runs through the instruction address space of the program memory independently of the program code during normal operation and which is connected to the register.Type: GrantFiled: November 27, 2008Date of Patent: June 11, 2013Assignee: Robert Bosch GmbHInventors: Jo Pletinckx, Hongyu Wang, Axel Wenzler, Markus Brockmann
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Patent number: 8464094Abstract: A disk array system, upon detecting a failure in any data disk from among a plurality of data disks providing one or more RAID groups, conducting a correction copy to any spare disk, using one or more other data disks belonging to the same RAID group as the data disk causing the failure. When the data disk causing the failure has been replaced with a new data disk, the disk array system alters the management so that the data disk can be managed as a spare disk, and the spare disk can be managed as a data disk.Type: GrantFiled: April 10, 2012Date of Patent: June 11, 2013Assignee: Hitachi, Ltd.Inventors: Atsushi Ishikawa, Kenji Onabe
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Patent number: 8458398Abstract: A computer-readable medium storing a data management program makes a computer manage data redundantly stored in storage devices having storage areas split into slices for data management. The data management program realizes the following functions in the computer. A first function receives irregularity information indicating that each of one or more of the storage devices may be possibly faulty, and stores the irregularity information in a storage; and a second function determines, by reference to the irregularity information, whether or not a first storage device containing a slice to be accessed is possibly faulty, on receipt of access information indicating occurrence of a request to access the slice. When yes is determined, the second function instructs an external device to recover data stored in the slice, where the external device controls a second storage device storing redundant data identical to the data stored in the slice.Type: GrantFiled: September 14, 2009Date of Patent: June 4, 2013Assignee: Fujitsu LimitedInventors: Yasuo Noguchi, Kazutaka Ogihara, Masahisa Tamura, Yoshihiro Tsuchiya, Tetsutaro Maruyama, Takashi Watanabe, Tatsuo Kumano, Kazuichi Oe
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Patent number: 8458513Abstract: A method is provided for efficiently recovering information in a distributed storage system where a list of values that should be stored on a storage device is maintained. A first convergence round is scheduled to be performed on the list of values to bring each value to an At Maximum Redundancy (AMR) state. A second convergence round is scheduled to be performed on the list by selecting a wait time interval from a predefined range of wait time intervals between starts of convergence rounds.Type: GrantFiled: July 30, 2010Date of Patent: June 4, 2013Assignee: Hewlett-Packard Development Company, L.P.Inventors: John J. Wylie, Joseph A. Tucek, Eric A. Anderson, Xiaozhou Li, Mustafa Uysal
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Patent number: 8458510Abstract: Various embodiments for automated error recovery in a computing storage environment by a processor device are provided. In one embodiment, pursuant to performing one of creating a new and rebuilding an existing logical partition (LPAR) operable in the computing storage environment by a hardware management console (HMC) in communication with the LPAR, at least one failure scenario is evaluated by identifying error code. If a failure is caused by an operation of the HMC and a malfunction of a current network connection, a cleanup operation is performed on at least a portion of a current HMC configuration, an alternative network connection to the current network connection is made, and a retry operation is performed.Type: GrantFiled: August 12, 2010Date of Patent: June 4, 2013Assignee: International Business Machines CorporationInventors: Xu Han, Edward Hsiu-Wei Lin, Yang Liu
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Patent number: 8458526Abstract: A data storage device (DSD) tester for testing a DSD is disclosed. The DSD tester comprises control circuitry operable to receive a DSD log from the DSD, wherein the DSD log comprises at least one entry identifying at least one error condition. A sequence of commands associated with the error condition is executed in order to determine whether the DSD is defective.Type: GrantFiled: March 29, 2010Date of Patent: June 4, 2013Assignee: Western Digital Technologies, Inc.Inventors: Lawrence J. Dalphy, Curtis E. Stevens, Daniel K. Blackburn
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Patent number: 8458512Abstract: In order to enable a rewrite of stored data to be omitted and to reduce a processing time of error concealment even if an error is detected in a process for sequentially storing variable-length data in a memory and the rewrite of the stored data is necessary, variable-length data from which an error is not detected is sequentially stored at and after a predetermined position in the memory, and error information that includes a restoration address that corresponds to an area in which variable-length data from which an error is detected is to be stored and that specifies variable-length data stored earliest in the memory from among data to be replaced with error concealment data is stored at a position preceding the predetermined position, when the error is detected.Type: GrantFiled: March 24, 2010Date of Patent: June 4, 2013Assignee: Fujitsu LimitedInventors: Hirofumi Nagaoka, Yasuhiro Watanabe, Taro Hagiya
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Patent number: 8453009Abstract: A storage apparatus connected to a storage device includes a storage module, a memory for storing data to be copied to the storage device, buffers for temporarily saving the data, redundantly, the saved data stored in one of the buffers being recoverable by the data stored in the rest of the buffers, and a control module for executing, storing the data of write request to the storage module and the memory, copying the data to the storage device, saving the data to the buffer when an using rate of the memory is greater than a predetermined rate, writing the saved data stored in the buffer to the memory when an using rate of the memory is not greater than the predetermined rate, detecting a failure of the buffers, and rebuilding the saved data stored in the one of the buffers based on an using state of the buffers.Type: GrantFiled: October 12, 2010Date of Patent: May 28, 2013Assignee: Fujitsu LimitedInventor: Yoshinari Shinozaki
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Patent number: 8448016Abstract: A computing core application access method begins by a processing module detecting selection of an application. The method continues with at least one of a memory controller and the processing module addressing a distributed application memory to retrieve a plurality of error coded program data slices and a plurality of error coded configuration data slices. The method continues with the at least one of a memory controller and the processing module reconstructing a data segment of a program from the plurality of error coded program data slices using an error coding dispersal function. The method continues with the at least one of a memory controller and the processing module reconstructing a data segment of a configuration information from the plurality of error coded configuration data slices using a second error coding dispersal function.Type: GrantFiled: April 6, 2010Date of Patent: May 21, 2013Assignee: Cleversafe, Inc.Inventors: Gary W. Grube, Timothy W. Markison
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Patent number: 8448020Abstract: A method begins when a dispersed storage (DS) processing unit of a DS unit has at least one of DS unit operational data and DS unit operating system algorithm to store. The method continues with the DS processing unit encoding at least a portion of the at least one of DS unit operational data and DS unit operating system algorithm in accordance with an error coding dispersal storage function to produce a plurality of data slices. The method continues with the DS processing unit storing at least some of the plurality of data slices in memory devices of the DS unit in accordance with the error coding dispersal storage function.Type: GrantFiled: June 15, 2012Date of Patent: May 21, 2013Assignee: Cleversafe, Inc.Inventors: Steven Mark Hoffman, Jason K. Resch, Gary W. Grube, Timothy W. Markison
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Patent number: 8448017Abstract: A memory apparatus includes a memory having a main memory area and a replacement area, and a memory controller having a function of issuing instructions corresponding to commands to carry out transmission and reception of data and reading of status information of the memory.Type: GrantFiled: June 23, 2010Date of Patent: May 21, 2013Assignee: Sony CorporationInventors: Kenichi Nakanishi, Keiichi Tsutsui, Junichi Koshiyama
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Patent number: 8448019Abstract: A processor includes an accumulator, a storage that outputs data to the accumulator, an error detector that outputs a first error detection signal upon detecting an error in the data, an error identifier that outputs an error identification signal indicating that an error occurs in the storage, an error identification signal holder that outputs the error identification signal as a second error detection signal, an error detection signal holder that holds the first error detection signal and outputs a cancellation signal to stop the accumulation processing of the accumulator, a first calculator that starts making a first calculation based on the second error detection signal and the cancellation signal, and outputs a correction start signal after a lapse of a calculation period, and an error corrector that corrects the error of the data upon receiving the correction start signal.Type: GrantFiled: December 17, 2010Date of Patent: May 21, 2013Assignee: Fujitsu LimitedInventors: Yoshiteru Ohnuki, Norihito Gomyo
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Patent number: 8448042Abstract: A data processing device and a method for error detection and error correction. The data processing device includes an error detection arrangement and an error correction arrangement. The error detection arrangement is able to detect correctable error and uncorrectable error in the data stored in a memory cell of the memory. The error detection arrangement then determines the neighboring memory cells or memory cells that are physically adjacent to the memory cell for which the correctable error was detected and generates a signal indicating a fault depending on the correctable errors detected in the neighboring physically adjacent memory cells. If a signal indicating a fault is not generated, then an error correction arrangement is used to correct the correctable error detected by the error detection arrangement.Type: GrantFiled: April 30, 2010Date of Patent: May 21, 2013Assignee: Robert Bosch GmbHInventor: Manfred Spraul
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Publication number: 20130124914Abstract: Embodiments of the present invention disclose a method and a device for detecting data reliability, which belong to the field of computer technologies. The method includes: dividing source data into multiple source data blocks; establishing a corresponding duplicate data block for each source data block, where the duplicate data block and the source data block are stored in different physical memory blocks respectively; establishing a corresponding reliability maintenance data structure for the source data block; and registering the reliability maintenance data structure with a first reliability maintenance thread of a central processing unit, the source data block corresponding to the reliability maintenance data structure registered with the first reliability maintenance thread, comparing a reliability check value of the source data block with a reliability check value recorded in the reliability maintenance data structure, and replacing the source data block having the error with the duplicate data block.Type: ApplicationFiled: December 31, 2012Publication date: May 16, 2013Applicant: HUAWEI TECHNOLOGIES CO., LTD.Inventor: HUAWEI TECHNOLOGIES CO., LTD.
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Patent number: 8443229Abstract: An asymmetric data mirroring method with a local storage device and a remote storage device being separated by large distances is disclosed. A server determines a predetermined time period associated with a round trip latency between the server and a remote storage device. The server submits a request to a local storage device, a remote storage device and a memory device disposed between the server and the remote storage device. The server submits additional requests to the local and remote storage devices during the predetermined time period. The server stores a copy of each request submitted by the server to the remote storage device in a memory disposed between the server and the remote storage device while the server waits for whether an acknowledgement associated with the request has been received from the remote storage device during the predetermined time period. The server resubmits the request and the additional requests to the remote storage device if the acknowledgement is not received.Type: GrantFiled: March 31, 2011Date of Patent: May 14, 2013Assignee: AT&T Intellectual Property I, L.P.Inventors: James A. Gardner, Darrell G. Freeman
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Patent number: 8443235Abstract: Proposed are a highly reliable storage system capable of inhibiting the problematic operation or change of state in the storage system, and a known problem information management method capable of improving the reliability of the storage system. The storage system is provided with a storage apparatus including a storage medium for storing data, and a management apparatus for managing the storage apparatus.Type: GrantFiled: October 9, 2009Date of Patent: May 14, 2013Assignee: Hitachi, Ltd.Inventors: Shinichiro Kanno, Toshimichi Kishimoto
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Patent number: 8438420Abstract: A method, article of manufacture, and apparatus for preserving changes made to data during a recovery process. In some embodiments, this includes recovering a backup data to a remote location, using an I/O intercept to access the recovered data, modifying the recovered data a first time, completing the modification of the recovered data, preserving the I/O intercept, and storing the modified data in the remote location.Type: GrantFiled: June 30, 2010Date of Patent: May 7, 2013Assignee: EMC CorporationInventors: Michael John Dutch, Christopher Hercules Claudatos, Mandavilli Navneeth Rao
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Patent number: 8433949Abstract: The invention provides a disk array apparatus and a physical disk restoration method for managing a used area and an unused area of a faulty physical disk and shortening the time required for the physical disk to become usable by an external unit. The disk array apparatus includes: a unit for determining whether block areas of the physical disk are used areas or unused areas; a unit for recovering data in relation to block areas determined to be used areas and writing the recovered data to block areas of a spare disk corresponding to the used areas; a unit for transmitting a notification that the physical disk is usable to a host apparatus when data recovery is completed; and a unit for writing zero data to block areas of the spare disk corresponding to block areas determined to be unused areas after transmitting the notification.Type: GrantFiled: July 21, 2010Date of Patent: April 30, 2013Assignee: NEC CorporationInventor: Masaya Suenaga
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Patent number: 8433869Abstract: In one aspect, a method includes forming a virtualized grid consistency group to replicate a logical unit, running a first grid copy on a first data protection appliance (DPA) replicating a first portion of the logical unit, running a second grid copy on a second DPA replicating a second portion of the logical unit, sending IOs to the first DPA if the IOs are to a first set of offsets and sending IOs to the second DPA if the IOs are to a second set of offsets.Type: GrantFiled: September 27, 2010Date of Patent: April 30, 2013Assignee: EMC International CompanyInventors: Assaf Natanzon, Yuval Aharoni
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Patent number: 8433871Abstract: Multiple copy sets of data are maintained on one or more storage devices. Each copy set includes at least some of the same data units as other sets. Different sets optionally have data units stored in different orders on the storage device(s). A particular one of the sets of data is selected as the set to be accessed in response to detecting a particular scenario.Type: GrantFiled: March 6, 2012Date of Patent: April 30, 2013Assignee: Microsoft CorporationInventors: Michael R. Fortin, Cenk Ergan, Mehmet Iyigun, Yevgeniy Bak, Benjamin A. Mickle, Alexander Kirshenbaum
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Patent number: 8429446Abstract: A storage system is configured to create and manage virtual ports on physical ports. The storage system can transfer associations between virtual ports and physical ports when a failure occurs in a physical port or a link connected to the physical port so that a host can access volumes under the virtual ports through another physical port. The storage system can also change associations between virtual ports and physical ports by taking into account the relative loads on the physical ports. When a virtual machine is migrated from one host computer to another, the loads on the physical ports in the storage system can be used to determine whether load balancing should take place. Additionally, the storage system can transfer virtual ports to a remote storage system that will take over the virtual ports, so that a virtual machine can be migrated to remote location.Type: GrantFiled: September 16, 2011Date of Patent: April 23, 2013Assignee: Hitachi, Ltd.Inventors: Junichi Hara, Yoshiki Kano
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Patent number: 8429497Abstract: A method of dynamic data storage for error correction in a memory device is disclosed. Data for storage is received, and the received data is then encoded and associated error correction code (ECC) is generated. The encoded data is stored in a portion of a data partition of the memory device, wherein percentage of the stored data in the data partition is determined according to an amount of corrected errors associated with the data partition or is predetermined.Type: GrantFiled: August 26, 2009Date of Patent: April 23, 2013Assignee: Skymedi CorporationInventors: Chih-Cheng Tu, Yan-Wun Huang, Han-Lung Huang, Ming-Hung Chou, Chien-Fu Huang, Chih-Hwa Chang
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Patent number: 8429362Abstract: A system, program product, and computer implemented method for data replication, comprising enabling a virtual service layer to consume a storage medium of a site and map the storage medium of the site as one or more virtual storage volumes, enabling the virtual service layer to present the one or more virtual storage volumes for consumption by a host, enabling a splitter of the site to intercept I/O written to the one or more virtual storage volumes, splitting intercepted I/O to a journal based replication appliance, and enabling the journal based replication appliance to create a continuous data protection image of the data written to one or more virtual storage volumes.Type: GrantFiled: March 31, 2011Date of Patent: April 23, 2013Assignee: EMC CorporationInventors: Assaf Natanzon, Steven R. Bromling, Saar Cohen, Jehuda Shemer, Alex Solan
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Patent number: 8429392Abstract: A disclosed function expansion apparatus for expanding a function of an information processing apparatus by connecting the information processing apparatus to an external storage apparatus via a first interface includes a first storage unit that stores first setup information used for connecting the information processing apparatus to the external storage apparatus, a connection module unit that is operated based on the first setup information and connects the information processing apparatus to the external storage apparatus via the first interface, a control unit that is connected to the first storage unit, and the connection module unit or a second storage unit, and stores second setup information stored in the second storage unit into the first storage unit, wherein the second storage unit is exchangeable with the connection module unit and stores the second setup information in connecting to the connection module unit.Type: GrantFiled: January 24, 2011Date of Patent: April 23, 2013Assignee: Fujitsu LimitedInventor: Keiji Miyauchi
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Patent number: 8423732Abstract: A technique enables creation and use of a writable, read-only snapshot of an active file system operating on a storage system, such as a multi-protocol storage appliance. The writable, read-only snapshot comprises a read-only “image” (file) residing in a snapshot and a writable virtual disk (vdisk) residing in the active file system. The writable vdisk is a “shadow” image of the snapshot file image and, as such, includes an attribute that specifies the snapshot file as a backing store.Type: GrantFiled: November 24, 2008Date of Patent: April 16, 2013Assignee: NetApp, Inc.Inventor: Vijayan Rajan
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Patent number: 8423830Abstract: A debug method for computer system is disclosed. The method includes the following steps. Firstly, a first index is increased. Next, a first debug data to a jth debug data are received via a debug port of controller. Then, the first debug data to the jth debug data are sequentially stored to a first memory block of a storage unit of the controller according to the second index of controller. Afterwards, the (i+1)th debug data to the jth debug data are copied to the second memory block from the first memory block according to the increased first index before a controller's power supply is removed or the computer system enters a sleep state. Lastly, an application is implemented so that the second memory block is read according to the first index; wherein, i and j are integers.Type: GrantFiled: November 19, 2010Date of Patent: April 16, 2013Assignee: Quanta Computer Inc.Inventors: Chun-Jie Yu, Chun-Yi Lu, Yu-Hui Chen, Chih-Hung Kuo
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Patent number: 8423819Abstract: The invention provides a data storage device. In one embodiment, the data storage device is coupled to a host, and comprises a downgrade memory and a controller. The downgrade memory comprises a plurality of blocks, wherein each of the blocks comprises a plurality of pages, each of the pages comprises a plurality of sectors, and some of the sectors are defect sectors. The controller generates a defect table for recording a plurality of defect addresses of the defect sectors in the blocks, receives a plurality of data sectors to be written to the downgrade memory from the host, determines a plurality of first physical sector addresses for storing the data sectors according to the defect table, and sends write commands to the downgrade memory to direct the downgrade memory to write the data sectors to the downgrade memory according to the first physical sector addresses.Type: GrantFiled: March 4, 2010Date of Patent: April 16, 2013Assignee: Silicon Motion, Inc.Inventors: Kuo-Liang Yeh, Ken-Fu Hsu
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Patent number: 8423825Abstract: The storage system is coupled to a computer and includes a plurality of physical storages being used to configure a first logical storage and a second logical storage, a control unit receiving a read request and a write request from the computer; and a cache memory storing data which is sent to the computer. The control unit determines whether a request from the computer is a write request or a read request. If it is a read request, the control unit reads data from the cache memory or at least one of the plurality of physical storages based on the read request. If it is a write request, the control unit determines whether destination of the write request is the first logical storage.Type: GrantFiled: May 25, 2011Date of Patent: April 16, 2013Assignee: Hitachi, Ltd.Inventors: Yoshiaki Eguchi, Kazuhiko Mogi, Yasutomo Yamamoto, Takashi Oeda, Kouji Arai
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Patent number: 8423841Abstract: The present invention provides a method and system for improving memory testing efficiency, raising the speed of memory testing, detecting memory failures occurring at the memory operating frequency, and reducing data reported for redundancy repair analysis. The memory testing system includes a first memory tester extracting failed memory location information from the memory at a higher memory operating frequency, an external memory tester receiving failed memory location information at a lower memory tester frequency, and an interface between the first memory tester and the external memory tester. The memory testing method uses data strobes at the memory tester frequency to clock out failed memory location information obtained at the higher memory operating frequency. In addition, the inventive method reports only enough information to the external memory tester for it to determine row, column and single bit failures repairable with the available redundant resources.Type: GrantFiled: May 31, 2011Date of Patent: April 16, 2013Assignee: Marvell International Ltd.Inventors: Winston Lee, Albert Wu, Chorng-Lii Liou
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Patent number: 8417988Abstract: Memory systems and related defective block management methods are provided. Methods for managing a defective block in a memory device include allocating a defective block when a memory block satisfies a defective block condition. The allocated defective block is cancelled when the allocated defective block satisfies a defective block cancellation condition.Type: GrantFiled: May 21, 2010Date of Patent: April 9, 2013Assignee: Samsung Electronics Co., Ltd.Inventors: Yong-June Kim, Junjin Kong, Jaehong Kim, Han Woong Yoo
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Patent number: 8417987Abstract: Embodiments of the present invention provide novel, reliable and efficient technique for tracking, tolerating and correcting unrecoverable errors (i.e., errors that cannot be recovered by the existing RAID protection schemes) in a RAID array by reducing the need to perform drastic recovery actions, such as a file system consistency check, which typically disrupts client access to the storage system. Advantageously, ability to tolerate and correct errors in the RAID array beyond the fault tolerance level of the underlying RAID technique increases resiliency and availability of the storage system.Type: GrantFiled: December 1, 2009Date of Patent: April 9, 2013Assignee: NetApp, Inc.Inventors: Atul Goel, Sunitha Sankar
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Patent number: 8411537Abstract: Various embodiments of the present invention provide systems and methods for data regeneration. For example, a system for regenerating data is disclosed. The system includes a media defect detector that is operable to identify a potential media defect associated with a medium from which an input signal is derived, an attenuation amplitude detector that generates an attenuation factor, and a data detector. The data detector includes a first data path and a second data path. The first data path includes a bank of two or more selectable noise prediction filters and the second data path includes a fixed noise prediction filter and the attenuation factor. The data detector processes a derivative of the input signal using the second data path when the potential media defect is indicated, and processes the derivative of the input signal using the first data path when a media defect is not indicated.Type: GrantFiled: March 6, 2009Date of Patent: April 2, 2013Assignee: Agere Systems Inc.Inventors: Weijun Tan, Kelly Fitzpatrick, Shaohua Yang
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Patent number: 8412978Abstract: An apparatus, system, and method are disclosed for managing data storage. The method includes determining that an error correcting code (ECC) block comprises uncorrectable errors. The ECC block is stored across a plurality of memory devices. The method includes iteratively substituting replacement data, within data of the ECC block, for individual memory devices of the plurality of memory devices to form substitute ECC blocks until one of the substitute ECC blocks is correctable using the error correcting code for the ECC block. The method includes providing corrected data from the correctable one of the substitute ECC blocks.Type: GrantFiled: May 8, 2012Date of Patent: April 2, 2013Assignee: Fusion-io, Inc.Inventors: David Flynn, Jonathan Thatcher, Joshua Aune, Jeremy Fillingim, Bill Inskeep, John Strasser, Kevin Vigor
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Patent number: 8412977Abstract: A method, apparatus, article of manufacture, and system are presented for establishing redundant computer resources. According to one embodiment, in a system including a plurality of processor devices and a plurality of storage devices, the processor devices, the storage devices and the management server being connected via a network, the method comprises storing device information relating to the processor devices and the storage devices and topology information relating to topology of the network, identifying at least one primary computer resource, selecting at least one secondary computer resource suitable to serve as a redundant resource corresponding to the at least one primary computer resource based on the device information and the topology information, and assigning the at least one secondary computer resource as a redundant resource corresponding to the at least one primary computer resource.Type: GrantFiled: January 10, 2012Date of Patent: April 2, 2013Assignee: Hitachi, Ltd.Inventor: Akira Fujibayashi
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Publication number: 20130080829Abstract: A method for maintaining reliable communication on a link between an expander and a storage device is provided. The method includes detecting, by a processor coupled to the link, an error corresponding to the link, and maintaining a count of detected errors for the link, by the processor. The method also includes determining, by the processor, if the count of detected errors is above a first error threshold. If the count of detected errors is not above the first error threshold, then the method repeats the detecting, maintaining, and determining steps. If the count of detected errors is above the first error threshold, then the method provides the processor placing the storage device into a segregated zone.Type: ApplicationFiled: September 23, 2011Publication date: March 28, 2013Applicant: DOT HILL SYSTEMS CORPORATIONInventor: Phillip Raymond Colline
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Publication number: 20130080828Abstract: Methods and apparatus for improved building of a hot spare storage device in a RAID storage system while avoiding reading of stale data from a failed storage device. In the recovery mode of the failed device, all data is write protected on the failed device. A RAID storage controller may copy as much readable data as possible from the failed device to the hot spare storage device. Unreadable data may be rebuilt using redundant information of the logical volume. Write requests directed to the failed device cause the addressed logical block address (LBA) to be marked as storing stale data. When a read request is directed to such a marked LBA, the read request returns an error status from the failed device to indicate that the data is stale. The RAID controller then rebuilds the now stale data for that LBA from redundant information of the logical volume.Type: ApplicationFiled: September 23, 2011Publication date: March 28, 2013Applicant: LSI CORPORATIONInventor: Robert L. Sheffield
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Patent number: 8402259Abstract: A method for accelerating a wake-up time of a system is disclosed. The method includes scrubbing and making available for allocation a minimum amount of memory, executing a boot-up operation of an operating system stored on the system, and scrubbing and making available for allocation an additional amount of memory in parallel with and subsequent to the boot-up operation of the operating system. The system may include one or more nodes, each of the nodes having a minimum node resource configuration associated therewith that corresponds to a minimum number of processors included in a node that are required to be activated in order to activate the node. The system may further include one or more partitions, where each partition encompasses at least one node. Each partition may be assigned a priority in relation to other partitions, and the partitions may be successively activated based on the assigned priorities.Type: GrantFiled: November 30, 2009Date of Patent: March 19, 2013Assignee: International Business Machines CorporationInventor: Venkatesh Sainath
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Publication number: 20130067270Abstract: Aspects of the subject matter described herein relate to querying and repairing data. In aspects, a component may detect that data on storage has become corrupted. In response, the component may request data from one or more redundant copies of the data and may determine which of the redundant copies, if any, are not corrupted. If a non-corrupted copy is found, the component may send a request that the corrupted data be repaired and may identify the non-corrupted copy to use to repair the corrupted data.Type: ApplicationFiled: November 23, 2011Publication date: March 14, 2013Applicant: Microsoft CorporationInventors: Chesong Lee, Thomas J. Miller, Neal R. Christiansen, Matthew S. Garson
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Patent number: 8397102Abstract: A SAN manager acquires configuration information from devices constituting a SAN and produces a corresponding relationship between a host computer and a virtual volume (virtual volume mapping) and a corresponding relationship between the host computer and a real volume (real volume mapping). Based on those pieces of mapping information, the SAN manager outputs a corresponding relationship between virtual and real volumes. Meanwhile, the failure notification messages received from the in-SAN devices are construed to detect and output an influence of the failure upon the access to a real or virtual volume. Furthermore, when receiving a plurality of failure notifications from the devices connected to the SAN, the plurality of failure notifications are outputted with an association based on the corresponding relationship between real and virtual volumes.Type: GrantFiled: March 28, 2011Date of Patent: March 12, 2013Assignee: Hitachi, Ltd.Inventors: Masayuki Yamamoto, Takashi Oeda
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Patent number: 8397022Abstract: A spilt backup agent model where a component on a host and a component on the block storage device function together logically to provide a backup agent. In certain embodiments, the mechanism provides a split backup agent model using a NDMP protocol. The NDMP protocol is an industry standard protocol that allows for backup of hosts with a single backup agent that is compatible with multiple independent software vendor (ISV) backup software. Thus with the present invention, proprietary backup software dependent host agents are not required. The NDMP protocol provides for separation of control and data connections where the control path runs between the data server on the host that needs to be backed up and backup software (e.g., a Data Management Application (DMA)) and between the backup device and the backup software. The data path runs between the host and the backup device.Type: GrantFiled: September 24, 2010Date of Patent: March 12, 2013Assignee: Dell Products L.P.Inventor: Jacob Cherian
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Patent number: 8397101Abstract: Method and apparatus for ensuring a most recent version of data is retrieved from a memory, such as a non-volatile flash memory array. In accordance with various embodiments, a controller is adapted to sequentially store different versions of an addressable data block having a selected logical address in different locations within a memory. The controller assigns a revision indication value to each said version, with at least two of said stored versions concurrently sharing the same revision indication value. In some embodiments, the revision indication value constitutes a repeating cyclical sequence count that is appended to each block, or logically combined with a code value and stored with each block. The total number of counts in the sequence is less than the total number of versions resident in the memory.Type: GrantFiled: June 3, 2010Date of Patent: March 12, 2013Assignee: Seagate Technology LLCInventors: Ryan James Goss, Mark Allen Gaertner
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Patent number: 8397100Abstract: Systems and methods to manage memory refreshes at a memory controller are disclosed. A method includes determining, at a memory controller device, that a number of transmission errors between a memory controller port and a memory redrive device exceeds an error threshold. The method may include initiating a first link retraining process between the memory controller port and the memory redrive device. The method may further include placing one or more dynamic random access memory modules associated with the memory redrive device in a self-refresh mode. The method may also include removing the one or more dynamic random access memory modules from the self-refresh mode after the link retraining process has completed. The method may further include enabling overlapping refreshes of the one or more dynamic random access memory modules.Type: GrantFiled: March 15, 2010Date of Patent: March 12, 2013Assignee: International Business Machines CorporationInventors: H. Lee Blackmon, Ronald E. Freking, Ryan S. Haraden, Joseph A. Kirscht, Elizabeth A. McGlone
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Publication number: 20130061088Abstract: An information storage device includes a semiconductor memory divided into storage regions and a management unit. The management unit manages the storage regions so that any storage region which caused read or write errors a predetermined threshold number of times, which may be two or more, is made unavailable for storing data.Type: ApplicationFiled: August 31, 2012Publication date: March 7, 2013Applicant: KABUSHIKI KAISHA TOSHIBAInventor: Katsuyuki Nomura
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Patent number: 8386836Abstract: Embodiments are described for managing memory faults. An example system can include a memory controller module to manage memory cells and report memory faults. An error buffer module can store memory fault information received from the memory controller. A notification module can be in communication with the error buffer module. The notification module may generate a notification of a memory fault in a memory access operation. A system software module can provide services and manage executing programs on a processor. In addition, the system software module can receive the notifications of the memory fault for the memory access operation. A notification handler may be activated by an interrupt when the notification of the memory fault in the memory access operation is received.Type: GrantFiled: May 7, 2012Date of Patent: February 26, 2013Assignee: Microsoft CorporationInventors: Doug Burger, James Larus, Karin Strauss, Jeremy Condit