Maximum Likelihood Patents (Class 714/794)
  • Patent number: 7586991
    Abstract: A likelihood metric calculation method including: estimating a channel of a received signal and generating a channel estimate; compensating a channel of the received signal according to the channel estimate; calculating a region variable according to the channel estimate; and comparing the region variable and a magnitude of the compensated received signal and calculating a likelihood metric of the received signal according to a result of the comparison.
    Type: Grant
    Filed: March 16, 2006
    Date of Patent: September 8, 2009
    Assignee: Posdata Co., Ltd.
    Inventor: Joonsang Choi
  • Patent number: 7584389
    Abstract: This invention relates to a turbo decoding apparatus and method for a communication system. A high-rate memory buffer operating at the same frequency as a turbo decoder is arranged between a memory buffer of a receiver and the turbo decoder. The decoding apparatus reads data bits stored in the memory buffer of the receiver via the high-rate memory buffer, delays the read data bits for a time required in the turbo decoder, and then applies the delayed data bits to a Soft-In Soft-Out (SISO) decoder of the turbo decoder. The memory buffer of the receiver outputs data bits at an operating frequency or clock of the turbo decoder.
    Type: Grant
    Filed: August 6, 2003
    Date of Patent: September 1, 2009
    Assignee: Samsung Electronics Co., Ltd
    Inventors: Sung-Jin Park, Min-Goo Kim, Soon-Jae Choi
  • Patent number: 7584407
    Abstract: A turbo decoder and a decoding method are disclosed, which use a Maximum A Posteriori (MAP) algorithm in order to perform iterative decoding. The method has the steps of sequentially receiving input data in a memory having a predetermined window size and performing a forward metric calculation for the input data so that the input data has a four window size, performing a first backward metric calculation for the input data and outputting first valid data when the data are input to the memory by twice the window size, and performing a second backward metric calculation for the input data and outputting second valid data when the data are input to the memory by three times the window size.
    Type: Grant
    Filed: January 21, 2005
    Date of Patent: September 1, 2009
    Assignee: Samsung Electronics Co., Ltd.
    Inventor: Seok-Chan Kim
  • Patent number: 7583747
    Abstract: Space-time code, and methods for constructing space-time codes are provided.
    Type: Grant
    Filed: March 31, 2005
    Date of Patent: September 1, 2009
    Assignees: University of Alberta, The Ohio State University
    Inventors: Mohamed O. Damen, Norman C. Beaulieu, Hesham El Gamal
  • Patent number: 7577187
    Abstract: A method of noise factor computation for a chip equalizer in a spread spectrum receiver, the method including the steps of: computing channel and noise variance estimates for multiple resolvable fading paths of chip signals received at the spread spectrum receiver; computing the sum of power of the channel estimates; estimating the chip energy of the chip signals; and computing the noise factor from the chip energy estimate, channel and noise variance estimates, sum of power of the channel estimates, and spreading factor of the pilot signal.
    Type: Grant
    Filed: July 19, 2005
    Date of Patent: August 18, 2009
    Assignee: NEC Corporation
    Inventor: Thanh Ngoc Bui
  • Patent number: 7576935
    Abstract: In an apparatus for recording and regenerating data, a pass metric is calculated based on a likelihood converted from a previous calculation result iteratively until all pass metrics of the same data recorded many times on a recording medium are calculated, and then data recorded on the recording medium is decoded.
    Type: Grant
    Filed: April 28, 2005
    Date of Patent: August 18, 2009
    Assignee: Fujitsu Limited
    Inventors: Masakazu Taguchi, Akihiro Itakura, Akiyoshi Uchida
  • Patent number: 7574645
    Abstract: A wireless communication method and apparatus for detecting and decoding enhanced dedicated channel (E-DCH) hybrid automatic repeat request (H-ARQ) indicator channel (E-HICH) transmissions are disclosed. A wireless transmit/receive unit (WTRU) receives E-HICH transmissions and detects an H-ARQ indicator transmitted via the E-HICH by performing a binary hypothesis test. The WTRU then generates an acknowledgement (ACK) message or a non-acknowledgement (NACK) message based on the detected H-ARQ indicator. A reliability test may be further performed to improve performance, whereby the binary hypothesis test may be performed only if the reliability test is passed.
    Type: Grant
    Filed: June 29, 2006
    Date of Patent: August 11, 2009
    Assignee: InterDigital Technology Corporation
    Inventors: Jung-Lin Pan, Rui Yang, Stephen E. Terry
  • Patent number: 7573794
    Abstract: A defect detection device, apparatus, and method for detecting a defect of data recorded on a recording medium. The defect detection device includes a waveform state detection part generating information representing a state of a waveform of a reproduced signal from the recording medium based on soft decision results obtained in a process of reproducing the data in accordance with a maximum likelihood decoding algorithm corresponding to a partial response. The defect detection device includes a defect determination part determining the defect of the recorded data based on the information generated in the waveform state detection part.
    Type: Grant
    Filed: April 12, 2007
    Date of Patent: August 11, 2009
    Assignee: Fujitsu Limited
    Inventors: Toru Fujiwara, Masakazu Taguchi
  • Publication number: 20090199062
    Abstract: Virtual limited buffer modification for rate matching. A reduced-size memory module is employed within a communication device to assist in storage of log-likelihood ratios (LLRs) employed in accordance with turbo decoding. This architecture is also applicable to other types of error correction code (ECC) besides turbo code as well. The memory size is selected to match the number of coded bits (e.g., including information bits and redundancy/parity bits) that is included within a transmission. The received signals may be various transmissions made in accordance with hybrid automatic repeat request (HARQ) transmissions. When the LLRs calculated from a first HARQ transmission is insufficient to decode, those LLRs are selectively stored in the memory module. When LLRs corresponding to a second HARQ transmission is received, LLRs corresponding to both the first HARQ transmission and the second HARQ transmission are passed from the memory module for joint use in decoding.
    Type: Application
    Filed: January 30, 2009
    Publication date: August 6, 2009
    Applicant: BROADCOM CORPORATION
    Inventors: Ba-Zhong Shen, Sirikiat Lek Ariyavisitakul, Tak K. Lee
  • Patent number: 7571369
    Abstract: A reconfigurable turbo decoder comprising N processing units. Each of the N processing units receives soft input data samples and decodes the received soft input data samples. The N processing units operate independently such that a first processing unit may be selected to decode the received soft input data samples while a second processing unit may be disabled. The number of processing units selected to decode the soft input data samples is determined by a data rate of the received soft input data samples. The reconfigurable turbo decoder also comprises N input data memories that store the received soft input data samples and N extrinsic information memories that store extrinsic information generated by the N processing units. Each of the N processing units is capable of reading from and writing to each of the N input data memories and each of the N extrinsic information memories.
    Type: Grant
    Filed: September 13, 2005
    Date of Patent: August 4, 2009
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Yan Wang, Eran Pisek, Jasmin Oz
  • Patent number: 7571376
    Abstract: A Viterbi decoder for executing a trace-back work in parallel and a decoding method.
    Type: Grant
    Filed: January 27, 2006
    Date of Patent: August 4, 2009
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Yeon-gon Cho, Jun-haeng Cho, Dong-won Kwak
  • Patent number: 7565594
    Abstract: The need for separate CRC bits is eliminated by taking advantage of what has been determined to be an embedded error detection capability in a turbo code itself to perform error detection following turbo decoding. Specifically, since the two constituent encoders of a turbo encoder that are used to encode a data packet produce two systematic codes that share the same systematic bits one code, one is used to serve as the parity check for the other. The sign of the log likelihood ratio (LLR) of each systematic bit in a block of decoded data calculated at the end of a turbo decoding cycle is compared with the sign of the LLR of each corresponding bit that was calculated at a previous turbo decoding cycle. If the signs of the LLRs for each comparison do not agree, then a packet error is determined to have occurred; otherwise no packet error is detected.
    Type: Grant
    Filed: August 26, 2004
    Date of Patent: July 21, 2009
    Assignee: Alcatel-Lucent USA Inc.
    Inventors: Francis Dominique, Hongwei Kong, Walid E Nabhane
  • Patent number: 7561642
    Abstract: The recording condition setting device according to the present invention includes (i) a specific pattern detection circuit for detecting, as a specific pattern, one or more patterns having been set by recording information, from one or more decoded bit sequences generated from a reproduction signal received from an optical disc, (ii) a path metric difference classification circuit for classifying one or more specific path metric differences into one or more by-recording-information path metric differences corresponding to one or more by-recording-information patterns, said specific path metric differences being obtained by extracting one or more path metric differences corresponding to the detected specific patterns from path metric differences generated from the reproduction signal, and (iii) a recording condition setting circuit for setting the recording condition based on the classified by-recording-information path metric differences.
    Type: Grant
    Filed: February 24, 2006
    Date of Patent: July 14, 2009
    Assignee: Sharp Kabushiki Kaisha
    Inventor: Yoshihisa Adachi
  • Patent number: 7555071
    Abstract: Methods and apparatus are provided for non-linear scaling of log likelihood ratio (LLR) values in a decoder. A decoder according to the present invention processes a received signal by generating a plurality of log-likelihood ratios having a first resolution; applying a non-linear function to the plurality of log-likelihood ratios to generate a plurality of log-likelihood ratios having a lower resolution; and applying the plurality of log-likelihood ratios having a lower resolution to a decoder. The non-linear function can distribute the log-likelihood ratios, for example, such that the frequency of each LLR value is more uniform than a linear scaling.
    Type: Grant
    Filed: September 29, 2005
    Date of Patent: June 30, 2009
    Assignee: Agere Systems Inc.
    Inventor: Uwe Sontowski
  • Patent number: 7552379
    Abstract: A method performs iterative decoding of information coded by an error correction code. The method includes: defining a transcendent first function representing a quantity to be evaluated for the decoding method; defining a quantized second function approximating the first function; computing first values of the second function obtained based on first arguments; the first values being not null and the first arguments being variable in a limited range having a maximum limit; computing second values of the second function obtained on the basis of second arguments, the second values being null; and generating a look-up table representing the first function and containing the first and second values associated to indexes correlated to said first arguments and to an expected maximum limit.
    Type: Grant
    Filed: December 29, 2005
    Date of Patent: June 23, 2009
    Assignee: STMicroelectronics S.r.l.
    Inventors: Andrea Concil, Andrea Giorgi, Stefano Valle
  • Patent number: 7549113
    Abstract: A turbo decoding method is capable of realizing high-speed and highly accurate decoding operations by improving initialization of path metric values for parallel decoding processing. Turbo encoded code data is divided into a first to an N-th sub-code blocks and parallel decoding processing on these sub-code blocks is performed. “A priori initialization processing unit” s are provided which employ a final calculated value in a preceding sub-code block as an initial value for calculation of a path metric value of each sub-code block excluding the first sub-code block in a forward direction and a final calculated value in a following sub-code block as an initial value for calculation of a path metric value of each sub-code block excluding the N-th sub-code block in a backward direction. After the a priori initialization processing of path metric values, parallel decoding processing on each sub-code block is performed.
    Type: Grant
    Filed: January 21, 2005
    Date of Patent: June 16, 2009
    Assignee: NEC Corporation
    Inventor: Hua Lin
  • Patent number: 7539273
    Abstract: A method is disclosed for processing all types of received, interfering radio frequency signals corrupted by noise to extract the individual signals without having any a priori knowledge about them. Received signals are converted for eigenspace processing and are subjected to repeated non-linear time domain and fast Fourier transform frequency domain processing that calculates eigenstream beam forming weights U. By performing calculations in eigenspace, the number of independent weights U that must be calculated is generally reduced, minimizing calculating time. Once the weights U have been calculated in eigenspace they are transformed into antenna beam forming weights W that are used to extract the individual signals and to determine the angle of arrival of each of the individual signals. Further time is saved because the weights W do not have to be updated for every time slice of the received signals.
    Type: Grant
    Filed: July 23, 2003
    Date of Patent: May 26, 2009
    Assignee: BAE Systems Information and Electronic Systems Integration Inc.
    Inventor: Keith A. Struckman
  • Patent number: 7536630
    Abstract: A reconfigurable decoder is capable of performing both Viterbi decoding and turbo decoding. The reconfigurable decoder may be repeatedly reconfigured to work with any of a number of different convolutional or turbo coding schemes. In at least one embodiment, the reconfigurable decoder is capable of automatically reconfiguring itself based on a present signal environment about a communication device carrying the decoder.
    Type: Grant
    Filed: September 8, 2004
    Date of Patent: May 19, 2009
    Assignee: Intel Corporation
    Inventors: Anthony L. Chun, Inching Chen, Vicki W. Tsai
  • Publication number: 20090125793
    Abstract: The invention is embodied for solving a problem of occurrence of degradation of the reception characteristic caused by the interference signal component if a symbol making a determination error is contained or if an error factor caused by a propagation channel estimation error or a hardware error (carrier frequency error, sampling frequency error) is contained at the interference canceling time in a wireless communication apparatus for iteratively decoding and receiving a spatial multiplex signal. A wireless communication apparatus 100 according to the invention has an error estimator 13 for estimating an error of a replica signal at the interference canceling time and a weighter 14 for weighting likelihood information for a spatial multiplex signal separated and combined after interference is canceled based on output of the error estimator 13, whereby if an error of the replica signal at the interference canceling time is contained, a good reception characteristic can be provided.
    Type: Application
    Filed: May 17, 2007
    Publication date: May 14, 2009
    Applicant: PANASONIC CORPORATION
    Inventors: Takaaki Kishigami, Hirohito Mukai, Shutai Okamura
  • Patent number: 7530011
    Abstract: Disclosed are a turbo decoding apparatus and method for decoding a turbo-encoded signal by repeating element decoding. The apparatus includes a plurality of element decoders for applying element decoding, e.g., MAP decoding, in parallel to respective ones of a plurality of divided signals to be decoded, and an interleaver/deinterleaver for interleaving or deinterleaving a plurality of results of element decoding collectively. Each element decoder applies element decoding to a respective one of the divided signals, and the interleaver/deinterleaver alternately interleaves and deinterleaves a plurality of results of element decoding collectively. Turbo decoding is carried out by repeating these operations a prescribed number of times.
    Type: Grant
    Filed: May 22, 2003
    Date of Patent: May 5, 2009
    Assignee: Fujitsu Limited
    Inventors: Kazuhisa Obuchii, Tetsuya Yano
  • Patent number: 7530010
    Abstract: A hybrid trace back apparatus and a high-speed Viterbi decoding system having the same are disclosed. The hybrid trace back apparatus includes: a register exchanging unit for receiving survivor values of each states from a path metric calculator, and obtaining a block survival value through a register exchange operation as much as a bit length for a block trace back operation; a first storing unit for the register exchange operation; a second storing unit for storing the block survival value obtained through the register exchange operation until the block survival value is written in a block trace back memory; and a block trace back unit for outputting decoded data by performing a block trace back operation while writing a value of the second storing unit.
    Type: Grant
    Filed: October 31, 2005
    Date of Patent: May 5, 2009
    Assignee: Electronics and Telecommunications Research Institute
    Inventors: In-San Jeon, Hyuk Kim, Kyung-Soo Kim, Ik-Soo Eo, Hee-Bum Jung
  • Patent number: 7529323
    Abstract: A receiver generates log-likelihood-ratio-based soft bit metrics of precoded quaternary continuous phase modulation signals using four state-constrained trellises and a streamlined maximum likelihood sequence estimation Viterbi algorithm requiring no survivor state storage elements for a preferred error correction-coded quaternary Gaussian minimum shift keying communication system employing reduced-complexity pulse-amplitude modulation matched-filtering and soft-decision decoding.
    Type: Grant
    Filed: June 6, 2005
    Date of Patent: May 5, 2009
    Assignee: The Aerospace Corporation
    Inventors: Gee L. Lui, Kuang Tsai
  • Patent number: 7526037
    Abstract: A reduced-complexity maximum-likelihood detector is disclosed that provides a high degree of signal detection accuracy while maintaining high processing speeds. The detector processes the received symbols to obtain initial estimates of the transmitted symbols and then uses the initial estimates to generate a plurality of reduced search sets. The reduced search sets are then used to generate decisions for detecting the transmitted symbols.
    Type: Grant
    Filed: December 31, 2004
    Date of Patent: April 28, 2009
    Assignee: Broadcom Corporation
    Inventor: Min Chuin Hoo
  • Patent number: 7522680
    Abstract: An apparatus, system, and method are disclosed for asymmetric maximum likelihood detection. An initialization module initializes a plurality of branch metrics and a plurality of path memories. A coefficient module calculates a plurality of coefficients. A computation module calculates a first and second specified likelihood function. A selection module calculates a third specified branch metric as the maximum of the first and second specified likelihood functions. A path metrics module calculates a third specified path memory from a first and second specified path memory. A results module identifies a data output value from one or more path memories.
    Type: Grant
    Filed: February 9, 2005
    Date of Patent: April 21, 2009
    Assignee: International Business Machines Corporation
    Inventors: David Berman, Evangelos S. Eleftherion, Robert Allen Hutchins, Glen Alan Jaquette, Constantin M. Melas, Sedat Oelcer
  • Patent number: 7519895
    Abstract: A channel encoding apparatus using a parallel concatenated low density parity check (LDPC) code. A first LDPC encoder generates a first component LDPC code according to information bits received. An interleaver interleaves the information bits according to a predetermined interleaving rule. A second LDPC encoder generates a second component LDPC code according to the interleaved information bits. A controller performs a control operation such that the information bits, the first component LDPC code which is first parity bits corresponding to the information bits, and the second component LDPC code which is second parity bits corresponding to the information bits are combined according to a predetermined code rate.
    Type: Grant
    Filed: November 15, 2004
    Date of Patent: April 14, 2009
    Assignee: Samsung Electronics Co., LTD
    Inventors: Gyu-Bum Kyung, Hong-Sil Jeong, Jae-Yoel Kim
  • Patent number: 7519897
    Abstract: To provide a decoder and decoding method capable of reducing the number of times received data is decoded. A decoder according to the present invention includes: a Viterbi decoder decoding received data; a decode data length storage area storing a decode data length; a decoded data temporary storage area storing temporary storage data as decoded data up to a decode data length; a maximum data storage memory storing maximum decoded data as decoded data up to a maximum data length; a maximum-likelihood detection circuit selecting a decode data length based on likelihood information; and a decoded data reconstruction circuit replacing a part of maximum decoded data with temporary decoded data.
    Type: Grant
    Filed: September 28, 2005
    Date of Patent: April 14, 2009
    Assignee: NEC Electronics Corporation
    Inventor: Takeshi Hashimoto
  • Patent number: 7512868
    Abstract: The invention concerns a method for processing a signal using an approximate MAP (maximum a posteriori) algorithm for determining a likelihood ratio ?kX of a set of states X of a lattice at a time k, with each of said states being associated at least one intermediate variable belonging to a group comprising a so-called forward variable and a so-called backward variable, propagated by said MAP algorithm and recursively calculated respectively in a direct orientation and in an indirect orientation at said time k relative to said lattice. The invention is characterized in that said process comprises a step which consists in reducing the number of selected states by said MAP algorithm so as to calculate said likelihood ratio, and, for at least some unselected states, in assigning to said forward variable and/or said backward variable at least one specific value, to calculate an approximate likelihood ratio.
    Type: Grant
    Filed: March 3, 2003
    Date of Patent: March 31, 2009
    Assignee: Wavecom
    Inventor: Alexandre Rouxel
  • Patent number: 7508805
    Abstract: The present invention relates to an apparatus and method for detecting a data rate in a turbo decoder for a mobile communication system. When a rate selector selects one data rate among a plurality of data rates, a turbo decoder repeatedly decodes an input data frame within a predetermined repetition limit number using the selected data rate and outputs the decoded data. A CRC detector performs CRC check on the decoded data and outputs the CRC check result, and a decoding state measurer measures decoding quality depending on the decoded data and outputs decoding state information. A controller then sets the repetition limit number to a predetermined minimum value, controls the repetition limit number according to the decoding state information, controls the rate selector and determines a data rate of the input data depending on the CRC check result.
    Type: Grant
    Filed: October 5, 2001
    Date of Patent: March 24, 2009
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Soon-Jae Choi, Min-Goo Kim, Beong-Jo Kim, Young-Hwan Lee, Nam-Yul Yu, Sang-Hyuck Ha
  • Patent number: 7505465
    Abstract: In a packet transmission system, an importance level is assigned by a transmitter to transmitted packets. The transmitted packets contain one or more importance levels of those packets transmitted previously, so that a receiver can recover the importance level associated with a lost packet from a received packet. The receiver decides whether to send a retransmission request relating to the lost packet based on the importance level of the lost packet.
    Type: Grant
    Filed: June 26, 2002
    Date of Patent: March 17, 2009
    Assignee: Koninklijke Philips Electronics N.V.
    Inventor: Jean-Marc Reme
  • Patent number: 7502987
    Abstract: An apparatus and method for coding a block Low Density Parity Check (LDPC) code having a variable coding rate. The apparatus receives an information word and encodes the information word into a block LDPC code based on one of a first parity check matrix and a second parity check matrix, depending on a coding rate to be applied when generating the information word into the block LDPC code.
    Type: Grant
    Filed: May 12, 2005
    Date of Patent: March 10, 2009
    Assignees: Samsung Electronics Co., Ltd, Postech Academy Industry Foundation
    Inventors: Gyu-Bum Kyung, Hyun-Koo Yang, Se-Ho Myung, Hong-Sil Jeong, Kyeong-Cheol Yang, Dong-Seek Park, Jae-Yoel Kim
  • Patent number: 7496159
    Abstract: An apparatus for survivor path decoding in a Viterbi decoder with a constraint length of K. The apparatus of the invention includes a best survivor unit, a a register-exchange network, and a trace-back unit. The best survivor unit receives path metrics of 2K?2 local winner states from which a best state is selected every L iterations. Meanwhile, the register-exchange network generates decision vectors of survivor paths leading to 2K?1 states at instant i according to decision bits of all states from instant i?L to instant i. Every L iterations the register-exchange network outputs L-bit decision vectors for all states at instant i. Then the trace-back unit stores the decision vectors and finds a global survivor path sequence by following the decision vectors back from the best state at instant i?L. In this manner, L decoded bits can be output from the trace-back unit every L iterations.
    Type: Grant
    Filed: December 1, 2003
    Date of Patent: February 24, 2009
    Assignee: Mediatek Inc.
    Inventors: Kuo-Ming Wu, Shih-Chung Yin
  • Publication number: 20090044084
    Abstract: A method of double detection in a perpendicular magnetic read channel is disclosed. The method generally includes the steps of (A) generating an intermediate signal by performing a first detection on an input signal of the perpendicular read channel, the first detection having a first error rate, (B) generating a statistics signal based on the intermediate signal, the statistics signal conveying noise statistics that depend on data in the input signal and (C) generating an output signal by performing a second detection on the input signal using the noise statistics to reduce a second error rate of the second detection compared with the first error rate, wherein the first detection is independent of the second detection.
    Type: Application
    Filed: August 8, 2007
    Publication date: February 12, 2009
    Inventors: Jongseung Park, Andrei E. Vityaev, Li Du
  • Patent number: 7489744
    Abstract: In a communication system 10, a method and apparatus provide for decoding a sequence of turbo encoded data symbols. The channel nodes Rx, Ry and Rz are updated based on a received channel output, and the outgoing messages from symbol nodes (701, 707, 708) are initialized. The symbol nodes symbol nodes (701, 707, 708) are in communication with the channel nodes Rx, Ry and Rz. Updates of computational nodes C (704) and D (706) at different time instances are performed in accordance with a triggering schedule.
    Type: Grant
    Filed: September 25, 2001
    Date of Patent: February 10, 2009
    Assignee: Qualcomm Incorporated
    Inventors: Nagabhushana T. Sindhushayana, Jack K. Wolf
  • Patent number: 7484158
    Abstract: A method for decoding a noisy codeword (y) received from a communication channel as the result of a LDPC codeword (b) having a number (N) of codeword bits is disclosed. Each codeword bit consists of k information bits and M parity check bits. The product of the LDPC codeword b and a predetermined (M×N) parity check matrix H is zero (H*bT=0) wherein the parity check matrix H represents a bipartite graph comprising N variable nodes (V) connected to M check nodes (C) via edges according to matrix elements hij of the parity check matrix H.—The method comprises receiving the noisy LDPC codeword (y) via said communication channel and calculating for each codeword bit (V) of said transmitted LDPC codeword (b) an a-priori estimate (Qv) that the codeword bit has a predetermined value. The method also comprises calculating iteratively messages on all edges of said bipartite graph according to a serial schedule and a message passing computation rule.
    Type: Grant
    Filed: December 3, 2004
    Date of Patent: January 27, 2009
    Assignee: Infineon Technologies AG
    Inventors: Eran Sharon, Simon Litsyn
  • Patent number: 7480342
    Abstract: A sub-optimal method is disclosed for calculating the reliability values (soft values) for the bits of a multilevel signal. The log-likelihood values are approximated using only the dominant terms, so called max-log approximation, that is for each bit position only the two closest signal symbols of opposite bit value (S8, S6) are considered in the sum. The used modulation scheme is 16-QAM together with Gray-labelling. Two versions of approximation are proposed: one version consists of using the two distances between the received value and the two closest symbols of opposite bit value (?1 ?2 ). In order to simplify and speed up the calculation, the second version consists of using the distance between the two closest symbols (?3 ) to approximate the distance between the second closest symbol and the received value. Furthermore, precalculated results are stored in look-up tables to speed up the calculation.
    Type: Grant
    Filed: February 26, 2003
    Date of Patent: January 20, 2009
    Assignee: Telefonaktiebolaget L M Ericsson (Publ)
    Inventors: Leif Wilhelmsson, Peter Malm
  • Patent number: 7480852
    Abstract: Techniques are provided herein to improve the decoding efficiency in a wireless receiver to obtain a correctly decoded data string. A state metric matrix from a received codeword is used to generate active state metric matrices for time instances of the received codeword, and then a differential metric matrix is generated from information in the active state metric matrices. Based on the differential metric matrix a maximum likelihood path and one or more alternative paths are identified. A first decoded data string corresponding to the maximum likelihood path and a plurality of second decoded data strings corresponding to the one or more alternative paths are derived. Integrity of the respective decoded data strings is examined to obtain the correct decoded data string based on the first and second decoded data strings.
    Type: Grant
    Filed: June 20, 2007
    Date of Patent: January 20, 2009
    Assignee: Cisco Technology, Inc.
    Inventors: Ahmadreza Hedayat, Hanqing Lou, Hang Jin
  • Patent number: 7478313
    Abstract: An encoding and decoding apparatus and method thereof includes first and second soft encoders, a transmission channel, and first and second soft decoders. The first soft encoder performs a first soft encoding of input data to correct errors in the input data and outputting first soft-encoded data. The second soft encoder receives the first soft-encoded data, performs a second soft encoding to determine a success or failure of the encoding of the first soft-encoded data, and outputs second soft-encoded data. The first soft decoder soft-decodes data input through a transmission channel and corresponds to the second soft encoding, and outputs first soft-decoded data. The second soft decoder receives the first soft-decoded data, soft-decodes the first soft-decoded data corresponding to the first soft encoding, and outputs second soft-decoded data and additional information indicating the success or failure of the decoding of the first soft-decoded data.
    Type: Grant
    Filed: November 21, 2003
    Date of Patent: January 13, 2009
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Ki-hyun Kim, In-sik Park, Jae-seong Shim, Sung-hyu Han
  • Patent number: 7478314
    Abstract: Methods, software, circuits and systems involving a low complexity, tailbiting decoder. In various embodiments, the method relates to concatenating an initial and/or terminal subblock of the serial data block and outputting decoded data from an internal block of the modified data block. The circuitry generally includes a buffer, logic configured to concatenate an initial and/or terminal subblock to the serial data block, and a decoder configured to decode the data block, estimate starting and ending states for the data block, and output an internal portion of the serial data block and the one or more sequences as decoded data. The invention advantageously reduces the complexity of a suboptimal convolutional decoder, ensures smooth transitions at the beginning and end of the serial data block during decoding, and increases the reliability of the starting and ending states, without adding overhead to the transmitted data block.
    Type: Grant
    Filed: February 4, 2005
    Date of Patent: January 13, 2009
    Assignee: Marvell International Ltd.
    Inventors: Kok-Wui Cheong, Dimitrios-Alexandros Toumpakaris, Hui-Ling Lou
  • Publication number: 20090013233
    Abstract: Apparatus and methods store error recovery data in different dimensions of a memory array. For example, in one dimension, block error correction codes (ECC) are used, and in another dimension, supplemental error correction codes, such as convolutional codes, are used. By using separate dimensions, the likelihood that a defect affects both error recovery techniques is lessened, thereby increasing the probability that error recovery can be performed successfully. In one example, block error correction codes are used for data stored along rows, and this data is stored in one level of multiple-level cells of the array. Supplemental error correction codes are used for data stored along columns, such as along the cells of a string, and the supplemental error correction codes are stored in a different level than the error correction codes.
    Type: Application
    Filed: July 6, 2007
    Publication date: January 8, 2009
    Applicant: MICRON TECHNOLOGY, INC.
    Inventor: William H. Radke
  • Patent number: 7472335
    Abstract: Symbol by symbol variable code rate capable communication device. A communication device is operable to perform processing of a variable code rate signal whose code rate varies on a symbol by symbol basis. This may involve performing encoding of input to generate the variable code rate signal; alternatively, this may involve performing decoding of a variable code rate signal. In doing so, this approach may involve using a single encoder and/or decoder (depending on the application). In some instances, a single device is operable to encode a first variable code rate signal (for transmission to another device) and to decode a second variable code rate signal (that has been received from another device). In addition, a method of coding (including one or both of encoding and decoding) may also operate of a variable code rate signal whose code rate varies on a symbol by symbol basis.
    Type: Grant
    Filed: January 8, 2003
    Date of Patent: December 30, 2008
    Assignee: Broadcom Corporation
    Inventors: Kelly Brian Cameron, Ba-Zhong Shen, Hau Thien Tran
  • Patent number: 7464316
    Abstract: A turbo decoder that calculates alpha, beta and gamma (branch metric) values does not normalize the branch metric but instead applies the normalization factor to the newly calculated extrinsic values before writing them to interleaving memory, resulting in use of less memory than in prior turbo decoders. A compensating factor is applied when the extrinsics are read from interleaving memory. The absence of normalization in the gamma calculation not only conserves memory but also enhances decoder sensitivity.
    Type: Grant
    Filed: August 26, 2005
    Date of Patent: December 9, 2008
    Assignee: Agere Systems Inc.
    Inventors: Mark Andrew Bickerstaff, Benjamin John Widdup
  • Patent number: 7461328
    Abstract: Embodiments of a method and apparatus for decoding signals are disclosed. The method includes receiving modulated signals, generating bits representing the signals, and associated reliability of each bit. The method further includes executing a first stage of decoding the bits using a first component code, and simultaneously executing the first stage of decoding again using a second component code, and executing a second stage of decoding using the first component code. The first and second stages of decoding are used to generate the bit stream.
    Type: Grant
    Filed: March 25, 2005
    Date of Patent: December 2, 2008
    Assignee: Teranetics, Inc.
    Inventors: Dariush Dabiri, Nitin Barot
  • Patent number: 7457377
    Abstract: A system and method is provided for estimating a sequence of N bits ({circumflex over (x)}0{circumflex over (x)}1 . . . {circumflex over (x)}N?1) corresponding to a received sequence of M digital data (r0r1 . . . rM?1). The method includes determining candidate sequences of MRS digital data from a reduced reference sequence space comprising 2NRS reduced reference sequences of MRS reference digital data (s0s1 . . . sMRS?1), MRS being less than M, and 2NRS being less than or equal to 2N. The method further includes making up each candidate sequence with remaining reference symbols to obtain at least one complete candidate sequence of M digital data, and determining the sequence of N bits ({circumflex over (x)}0{circumflex over (x)}1 . . . {circumflex over (x)}N?1) from the complete candidate sequences.
    Type: Grant
    Filed: February 14, 2005
    Date of Patent: November 25, 2008
    Assignee: STMicroelectronics N.V.
    Inventors: Armin Wellig, Julien Zory
  • Patent number: 7447280
    Abstract: This invention provides an iterative process to maximum a posteriori (MAP) decoding. The iterative process uses an auxiliary function which is defined in terms of a complete data probability distribution. The auxiliary function is derived based on an expectation maximization (EM) algorithm. For a special case of trellis coded modulators, the auxiliary function may be iteratively evaluated by a combination of forward-backward and Viterbi algorithms. The iterative process converges monotonically and thus improves the performance of any decoding algorithm. The MAP decoding minimizes a probability of error. A direct approach to achieve this minimization results in complexity which grows exponentially with T, where T is the size of the input. The iterative process avoids this complexity by converging on the MAP solution through repeated maximization of the auxiliary function.
    Type: Grant
    Filed: February 28, 2004
    Date of Patent: November 4, 2008
    Assignee: AT&T Corp.
    Inventor: William Turin
  • Patent number: 7447983
    Abstract: Systems and methods for improving the performance of decoders of forward error correcting codes use the information contained in late packet arrivals to update (or recompute) the state of the decoder. These systems and methods are generally applicable to decoders that maintain state information in decoding successive bits or information frames so as to improve the performance (i.e., the bit error rate) of the decoder since the recomputed state is exactly the state that the decoder would have had if the information contained in the late packet had originally arrived on time and been decoded in a usual manner. In effect, the updating of the decoder state following a late packet arrival terminates the propagation in time of the effect of the late packet erasure on the state of the decoder.
    Type: Grant
    Filed: May 13, 2005
    Date of Patent: November 4, 2008
    Assignee: Verizon Services Corp.
    Inventor: Adrian Evans Conway
  • Publication number: 20080259758
    Abstract: A partial response maximum likelihood decoder, such as a Viterbi decoder, implements a set of combined states where each combined state can represent at least two states from a plurality of complementary sets of states. For each data symbol and each combined state, a Viterbi processor (703) determines a path metric and a substate indication for each path to the combined state. A path selection processor (709) of the Viterbi processor (703) selects a selected path and a selected sub state indication for the path which corresponds to a highest likelihood path metric. The substate indication is an indication of which of the complementary set of states the combined state represents for the data symbol. The invention allows a substantial complexity reduction and/or reduced computational burden as the Viterbi algorithm can be applied to a reduced number of combined states.
    Type: Application
    Filed: October 11, 2006
    Publication date: October 23, 2008
    Applicant: KONINKLIJKE PHILIPS ELECTRONICS, N.V.
    Inventor: Alexander Padiy
  • Publication number: 20080263430
    Abstract: A data readout device generates decoded data based on a decided data bit decided by performing a hard-decision on likelihood data, wherein the likelihood data is generated in accordance with an iterative decoding method corresponding to a turbo-coding process. The iterative decoding process is performed on a sampled value obtained by sampling a signal read out from a magneto-optical disk at a predetermined sampling period. The data readout device is made up of a reliability determination part and an error correcting decoder. The reliability determination part detects whether each obtained data bit was obtained from likelihood data within a predetermined range defined with respect to a histogram of log likelihood ratios. When it is detected that a data bit was obtained by a hard-decision on likelihood data within the predetermined range, the data bit is regarded as being obtained by a hard-decision whose reliability is not sufficient.
    Type: Application
    Filed: September 13, 2007
    Publication date: October 23, 2008
    Applicant: Fujitsu Limited
    Inventors: Masakazu Taguchi, Akihiro Itakura
  • Patent number: 7440523
    Abstract: An apparatus and method are described for mapping a plurality of multimedia streams (e.g., received from a set of satellite transponders) across a lesser plurality of decoders. In one embodiment, arbitration logic allocates the multimedia streams to divide the decoding load equally among the group of decoders (or at least as equally as possible). Allocation may occur statically, when the system is initialized, or dynamically, as the streams are being processed. In addition, in one embodiment, the arbitration logic monitors the amount of multimedia data for each stream stored in a buffer and causes streams to be serviced by the decoders which have relatively more stored multimedia data.
    Type: Grant
    Filed: April 24, 2006
    Date of Patent: October 21, 2008
    Assignee: Digeo, Inc.
    Inventors: Eric Lais, Mark Greenberg, Manish Shah
  • Patent number: 7441174
    Abstract: A method, an embedded state metric storage, is used for MAP (Maximum A Posterior)-based decoder of turbo codes to reduce the memory requirement of state metric storage. For MAP decoder, this method comprises selecting any state metric from the updated state metrics for each recursion direction, forward and reverse, and dividing the state metrics by the selected state metric; the selected state metric value becomes a constant, namely, one. The constant one state metric is embedded into the resulted state metrics. For log-MAP decoder, this method comprises selecting any state metric from the updated state metrics in each direction, forward and reverse, and subtracting the state metrics from the selected state metric; the selected state metric value becomes a constant, zero. The constant zero state metric is embedded into the resulted state metrics.
    Type: Grant
    Filed: September 7, 2005
    Date of Patent: October 21, 2008
    Assignee: The University of Hong Kong
    Inventors: Victor On-Kwok Li, Jianhao Hu, Alfred K. K. Wong
  • Patent number: 7437656
    Abstract: A method for recoding an input sequence of words, including assigning a respective bit-grade to at least one of the bits in a first word in the input sequence, deriving candidate words from the first word in response to the respective bit-grade, and inserting one of the candidate words into each of a plurality of candidate sequences, so that each of the candidate sequences contains one of the candidate words. The method further includes adding subsequent words to the candidate sequences, the subsequent words consisting of a further candidate word derived from a further word in the input sequence, computing respective sequence parameters for the candidate sequences, based on a relation between the candidate words and the subsequent words in the candidate sequences, selecting one of the candidate sequences in response to the sequence parameters, and outputting one of the candidate words contained in the selected candidate sequence.
    Type: Grant
    Filed: December 17, 2002
    Date of Patent: October 14, 2008
    Assignee: Mysticom Ltd.
    Inventors: Eyran Lida, Boaz Shahar