Abstract: Disclosed herein is a decoding method of performing maximum a posteriori probability (MAP) decoding of selecting one decoded word from one or more decoded word candidates obtained by subjecting a linear code to iterative decoding by comparison of distances between a reception word and each decoded word candidate. A decoded word candidate in which a known value in a part of a transmission word has been changed to another value is excluded from the one or more decoded word candidates.

Abstract: Sliding block traceback decoding of block codes. Block by block basis decoding is performed in which a single block, and its corresponding overlap portion, are processed during a given time. The traceback saves a record of decision (e.g., among possible trellis branches between various trellis stages) and constructs only the surviving paths through each individual block. Since only one block (by also employing its corresponding overlap portion) is decoded per time, the traceback through the coded block signal is short. One block of the coded block signal is decoded at a time, and certain resulting information (e.g., bit estimates and/or states) of a first decoded block can be leveraged when decoding a second/adjacent block.

Abstract: Methods and apparatus are provided for reduced complexity Soft-Output Viterbi detection. A Soft-Output Viterbi algorithm processes a signal by determining branch metrics using a branch metrics unit; determining survivor paths for sequence detection using a first add-compare select unit; and determining survivor paths for generating one or more bit reliability values using a second add-compare select unit, wherein the first and second add-compare select units process the branch metrics determined by the branch metrics unit. The first and second add-compare select units can optionally process branch metrics having a different number of bits.

Abstract: Systems and methods are disclosed for detecting temporary high level impairments, such as noise or interference, for example, in a communications channel, and subsequently, mitigating the deleterious effects of the dynamic impairments. In one embodiment, the method not only performs dynamic characterization of channel fidelity against impairments, but also uses this dynamic characterization of the channel fidelity to adapt the receiver processing and to affect an improvement in the performance of the receiver. For example, in this embodiment, the method increases the accuracy of the estimation of the transmitted information, or similarly, increases the probability of making the correct estimates of the transmitted information, even in the presence of temporary severe levels of impairment. The channel fidelity history may also be stored and catalogued for use in, for example, future optimization of the transmit waveform.

Abstract: A modified classical Viterbi decoder which can take extrinsic information and output hard decisions. A modified Viterbi decoder is provided comprising a branch metric unit, the unit having a calculator; and a processor adapted to compute a revised branch metric by combining the initial branch metric and an additional weight parameter. The modified classical Viterbi decoder computes a branch metric by summing an initial branch metric and the additional weight parameter.

Abstract: A low-complexity optimal soft MIMO detector is provided for a general spatial multiplexing (SM) systems with two transmit and NR receive antennas. The computational complexity of the proposed scheme is independent from the operating signal-to-noise ratio (SNR) and grows linearly with the constellation order. It provides the optimal maximum likelihood (ML) solution through the introduction of an efficient Log-likelihood ratio (LLR) calculation method, avoiding the exhaustive search over all possible nodes. The intrinsic parallelism makes it an appropriate option for implementation on DSPs, FPGAs, or ASICs. In specific, this MIMO detection architecture is very suitable to be applied in WiMax receivers based on IEEE 802.16e/m in both downlink (subscriber station) and uplink (base station).

Abstract: At a transmitting end, information data, which is data to be transmitted, is copied via a number of wireless transmission paths and then encoded. Each piece of data is then subjected to a respective different pattern of puncturing process and transmitted to a receiving end via a respective wireless transmission path. At the receiving end, dummy data is embedded into the punctured data and decoded. The puncture patterns at the transmitting end for the respective different wireless transmission paths are prepared such that they are different from each other. In particular, the bits to be removed are preferably different from each other between the different puncture patters. At the receiving end, if the decoding of the data for any wireless transmission path has failed, the data obtained from other wireless transmission paths are combined and decoded. In this way, the probability of a decoding failure occurring can be lowered.

Abstract: According to one embodiment, a data reproducing apparatus includes a reader, Viterbi decoder, metric difference calculator, an error correction decoder, and a detector. The reader reads data. The Viterbi decoder decodes the data read by the reader. The metric difference calculator calculates a metric difference between a maximum likelihood path and a competitive path, based on an output from the Viterbi decoder. The error correction decoder executes an error correction decoding for the output of the Viterbi decoder. The detector detects that an error detected by the error correction decoder is uncorrectable, and the metric difference detected by the metric difference calculator is larger than a predetermined value.

Abstract: A method for communication includes receiving a spatially-multiplexed signal using multiple receivers to produce multiple respective received signals. The spatially-multiplexed signal includes multiple simultaneously-transmitted symbols, which are selected from respective sets of constellation symbols, each constellation symbol representing a respective set of values of a group of data bits. Combinations of the constellation symbols are traversed iteratively. Each combination includes one constellation symbol from each of the sets of the constellation symbols and represents N data bits. The traversed combinations are searched for a combination that matches the received signals. During traversal of the combinations, at least 2N measures of likelihood regarding the values of the data bits represented by each traversed combination are accumulated. The accumulated measures of likelihood are processed to produce soft bit metrics.

Abstract: A Viterbi decoder includes an early decision generator that generates an early decision output. An error detector detects errors in the early decision output and generates a signal when the early decision output errors are detected.

Abstract: Systems and methods for processing and decoding TCM/BCM-coded signal vectors. A multi-dimensional signal vector is received by, for example, a TCM or BCM decoder. The TCM/BCM decoder identifies the closest signal points in the signal constellation set, or “nearest neighbors,” for each dimension of the received signal vector. The TCM/BCM decoder then forms a test set that includes a plurality of multi-dimensional test vectors, where each dimension of each test vector is based on an identified nearest neighbor. In particular, each test point in the test set is based on a different combination of the nearest neighbors. The TCM/BCM decoder can compute branch metrics based on only the test points in the test set, and can make detection decisions using the computed branch metrics.

Abstract: An ECC decoder outputs, to a likelihood substituting unit, information on data in data blocks that is corrected to be valid. Based on the information, the likelihood substituting unit substitutes likelihood corresponding to the data corrected to be valid by the maximum value, and outputs it to an LDPC decoder. The LDPC decoder decodes user data with likelihoods partly substituted by the maximum value using LDPC parity, and calculates likelihood of data that constitutes the user data. The LDPC decoder outputs the calculated likelihood to a channel APP decoder as external data.

Abstract: A maximum likelihood detection (MLD) method is disclosed. Received data is processed to obtain preliminary parameters. An initial radius r is determined. r2 is multiplied by a corresponding scaling factor according to a partial Euclidean distance (PED) constraint function to determine the upper limit values of PED for each layer. It is examined whether a sub-lattice exceeds a search scope according to the upper limit values of PED for each layer to search a better solution by utilizing the preliminary parameters.

Abstract: The present invention relates to a method of calculating a log-likelihood ratio and a method of detecting a transmission signal. According to the present invention, when a transmission symbol candidate vector is detected on the basis of a received signal, a threshold value and an ML metric of each transmission symbol candidate vector are calculated and the ML metric that is larger than the threshold value is updated by the threshold value. Further, a log-likelihood ratio of the transmission signal bit is calculated using the updated ML metric and the threshold value, and a transmission signal is detected using the log-likelihood ratio.

Abstract: A system includes an encoder that manipulates postcoded data and produces parity bits, and a parity bit encoder that produces encoded parity bits by inserting into the parity bits one or more flags with polarities, or states, that are selected to produce, after precoding, precoded parity bits that meet predetermined modulation constraints.

Abstract: A method for implementation of error correction decoding of quadrature layered modulation QLM communications. A bound on communications capacity derived using ideal QLM is approximated with QLM communications links which support data rates independent of the Shannon bound. Trellis symbol and bit demodulation algorithms recover QLM data symbols and bit algorithms offer computational efficiency at a cost of decisioning errors. Correlated bit decisioning error correction decoding and re-encoding can be implemented in a bit demodulation algorithm. Trellis demodulation and trellis decoding algorithms support parallel implementations, and concatenated implementations wherein the error correction decoding is implemented after the QLM demodulation. Concatenated implementation supports turbo decoding, MAP decoding, convolutional decoding, and block decoding by using the decisioning metrics available from QLM demodulation in place of generating the decisioning metrics directly from the detected symbol measurements.

Abstract: A method and a circuit for decoding a coded signal including a first decoding system capable of receiving the coded signal and of providing a first signal comprising portions considered correct and a second decoding system capable of providing a second signal from the coded signal and from portions considered correct of the first signal.

Abstract: Code designs for channel coding with side information (CCSI) based on combined source-channel coding are disclosed. These code designs combine trellis-coded quantization (TCQ) with irregular repeat accumulate (IRA) codes. The EXIT chart technique is used for IRA channel code design (and especially for capacity-approaching IRA channel code design). We emphasize the role of strong source coding and endeavor to achieve as much granular gain as possible by using TCQ. These code designs synergistically combine TCQ with IRA codes. By bringing together TCQ and EXIT chart-based IRA code designs, we are able to approach the theoretical limit of dirty-paper coding.

Abstract: Embodiments of the present invention provide methods and systems for decoding information in a communications system with an improved bit error rate. Correlated groups of bits are grouped, and joint information of the correlated bit groups is made available to the decoder. The decoder takes advantage of the joint information to improve the error rate.

Abstract: A method and apparatus are provided for error correction of a communication signal. A multiple fixed threshold scheme for iteratively decoding a received codeword includes making a comparison with a threshold to generate a reconstructed version of the received codeword. The threshold has at least two different values that at used during different iterations. The values of the threshold are fixed having been determined prior to decoding. In an embodiment, the fixed thresholds may be based on values for channel parameters and may be selected by a decoder that receives information regarding the channel parameter from a channel estimation unit monitoring the communication channel. Embodiments include decoding methods and apparatus using a threshold having two of more fixed values during the iterative decoding.

Abstract: Methods and apparatus are provided for soft decision decoding using reliability values based on a log base two function. A signal is processed to determine one or more reliability values for a soft decision decoder by computing one or more log-likelihood ratio (LLR) values using a log base two function. The soft decision decoder may employ, for example, a belief propagation algorithm. The soft decision decoder can decode, for example, Low-Density Parity Check codes or turbo codes.

Abstract: A coding device including a coding unit generating a systematic bit, a first redundant bit corresponding to the systematic bit, and a second redundant bit corresponding to the systematic bit, has a generating unit generating, from the two pieces of systematic bits, the two pieces of first parity bits corresponding to the systematic bits and the two pieces of second redundant bits corresponding to the systematic bits, a tuple of one systematic bit and the first redundant bit corresponding to one systematic bit, a tuple of the other systematic bit and the first redundant bit corresponding to the other redundant bit, and a tuple of the second redundant bit corresponding to one systematic bit and the second redundant bit corresponding to the other systematic bit.

Abstract: A method is provided for performing a MAP probability decoding of a sequence R(n) including N bits of encoded data. The method includes the steps of: (a) generating a sequence rn of sot-values by processing the sequence R(n); (b) performing a forward recursion by computing alpha values ?S,SG utilizing the soft-decision values; (c) performing a backward recursion by computing beta values ?S,SG utilizing the soft-decision values; and (d) performing an extrinsic computation by computing probability values p?k. The alpha values ?S,SG are relative log-likelihoods of an encoding process arriving at various states. The beta values ?S,SG are relative log-likelihoods of the encoding process arriving at various states. The probability values p?k represent a set of probabilities indicating that each data bit of an input sequence dK had a value equal to zero or one. The sequence R(n) represents an encoded form of the input sequence dK.

Abstract: A transmitter includes a plurality of encoders configured to receive source bit streams from m information sources, each of the plurality encoders including identical (n,k) low-density parity check (LDPC) codes of code rate r=k/n, where k is a number of information bits and n is codeword length. An interleaver is configured to collect m row-wise codewords from the plurality of encoders, and a mapper is configured to receive m bits at a time column-wise from the interleaver and to determine an M-ary signal constellation point. A modulator is configured to modulate a light source in accordance with the output of the mapper at a transmission rate Rs/r (Rs—the symbol rate, r—-the code rate). A receiver and transmission and receiving methods are also disclosed.

Abstract: Methods and apparatus for determining the starting points of redundancy version transmissions in a circular rate matching operation. At least one block of information bits to be transmitted are encoded to generate a plurality of coded bits, which are then segmented into a plurality of sub-blocks of coded bits. Each of the sub-blocks of coded bits is interleaved by using a certain interleaver. The interleaved coded bits of the plurality of sub-blocks are collected and filled into a circular buffer having a plurality of redundancy versions in the circular buffer, with each redundancy version corresponding to a starting bit index in the circular buffer. For each transmission, a subset of bits are selected from the circular buffer by selecting a redundancy version from among the plurality of redundancy version. The selected subset of bits are modulated by using a certain modulation scheme, and are transmitted via at least one antenna.

Abstract: A method for increasing decoder throughput is provided that includes dividing a data block into a plurality of segments. For each of the segments, the segment is decoded by performing a plurality of processes for the segment. At least one process for a current segment is performed while at least one process for a preceding segment is performed. Also, at least one process for the current segment is performed while at least one process for a subsequent segment is performed.

Abstract: A method and apparatus for determining the reliability of decoded data in a communication system. The method includes calculating a total sum of absolute values corresponding to Log Likelihood Ratio (LLR) values of received data, generating a first value obtained by multiplying the total sum of the absolute values by a predetermined threshold value, performing iterative decoding with respect to the LLR values of the received data, generating a survived path metric value having a maximum value among all path metric values as a decoded result and generating decoded data, comparing the first value with the survived path metric value, and determining whether the decoded data has suitable reliability according to the compared result.

Abstract: A receiver system, which generates a soft decision signal from a hard decision signal, includes a hard output receiver for determining a received bit to generate a hard decision signal. A hard input soft output receiver determines an estimated probability of symbol data corresponding to the received bit based on the hard decision signal and generates a soft decision signal represented by a log-likelihood ratio from the estimated probability.

Abstract: A method of transmitting a spread spectrum signal in a single communication session between a transmitter and a receiver, stores a series of N unique waveform designs and a hopping sequence in a transmitter memory. A signal is transmitted to a receiver according to the hopping sequence using the plurality of N unique waveform designs. Preferably, each waveform design is characterized by a unique composite spreading code that is formed by at least some of a plurality of constituent code segments. Alternatively or additionally, the waveform designs may differ by any one or more of code length, symbol or chip timing or phase, frame or burst structure, chip offset, modulation, error control coding, encryption scheme, or scrambling code. A transmitter and receiver are also disclosed, as is the concept of appending chips between symbols to expand the universe of unique spreading codes without incurring an increase in processing gain.

Abstract: A method for operating a contention-free interleaver for channel coding is provided that includes generating a sub-table based on a data block size, N, and an offset vector, v, of length x and generating an interleave table based on the sub-table. For a particular embodiment, the interleave table is generated based on the sub-table by generating a plurality of multiplets that together form the interleave table. In addition, the sub-table may be generated based on the data block size and the offset vector by (i) rounding the data block size up to a nearest multiple of the length, x, of the offset vector to generate a modified block size, N?, and (ii) generating the sub-table of a size equal to N?/x.

Abstract: In one embodiment, a (hard-drive) read channel has a phase detector used in a timing recovery loop. The phase detector utilizes the sign bit and confidence value from a received log-likelihood ratio (LLR) signal to generate a mean value. The mean value is convolved with a partial response target to generate an estimated timing error signal. When implemented in a hard-drive read channel, the phase detector allows for timing recovery with lower loss-of-lock rates.

Abstract: Data in non-volatile storage is decoded using iterative probabilistic decoding. An error correcting code such as a low density parity check code may be used. In one approach, initial reliability metrics, such as logarithmic likelihood ratios, are used in decoding sensed states of a set of non-volatile storage elements. The decoding attempts to converge by adjusting the reliability metrics for bits in code words which represent the sensed state. Simulated annealing using an adjustable temperature parameter based on a level of error in the data can be performed to. The simulated annealing can introduce randomness, as noise for example, into the decoding process. Moreover, knowledge of the device characteristics can be used to guide the simulated annealing process rather than introducing absolute randomness. The introduction of a degree of randomness adds flexibility that permits possible faster convergence times and convergence in situations where data may otherwise be uncorrectable.

Abstract: Data in non-volatile storage is decoded using iterative probabilistic decoding. An error correcting code such as a low density parity check code may be used. In one approach, initial reliability metrics, such as logarithmic likelihood ratios, are used in decoding sensed states of a set of non-volatile storage elements. The decoding attempts to converge by adjusting the reliability metrics for bits in code words which represent the sensed state. Simulated annealing using an adjustable temperature parameter based on a level of error in the data can be performed. The simulated annealing can introduce randomness, as noise for example, into the decoding process. Moreover, knowledge of the device characteristics can be used to guide the simulated annealing process rather than introducing absolute randomness. The introduction of a degree of randomness adds flexibility that permits possible faster convergence times and convergence in situations where data may otherwise be uncorrectable.

Abstract: To provide a receiving apparatus which is capable of demodulating information data from a multi-level modulated signal, which is generated by using a Y-00 protocol, without using high-performance component parts. In the receiving apparatus, the soft decision section 211 performs soft decision on the multi-level signal 22, in which a fixed decision level is used. A converted data identification section 214 performs logical decision on a value of the converted information data 25 in accordance with a highest-order bit of a multi-level code sequence 23 and a decision result 24 of the soft decision. A data reproduction section 215 performs an XOR operation between the converted information data 25 and a lowest-order bit of the multi-level code sequence 23, and outputs a resultant thereof as information data 23.

Abstract: An input memory of an LDPC decoder is loaded with data corresponding to an LDPC frame to be decoded and including N LLRs, of which K are information LLRs and N?K are parity LLRs. At least one stream is formed of binary words of a first type, each corresponding to multiple information LLRS, with the aid of a serial/parallel conversion module, and at least one stream is formed of binary words of a second type, each corresponding to multiple parity LLRs, with the aid of a row/column interlacing device comprising a two-dimensional first-in first-out ring buffer. The first memory accesses are made in page mode in order to write the binary words of the first type to a first zone of the input memory, and the second memory accesses are made in page mode in order to write the binary words of the second type to a second zone.

Abstract: System and methods for reducing the complexity or area of a non-linear Viterbi detector. In some embodiments, a Viterbi detector calculates branch metrics for a subset of the branches in a trellis diagram. This subset may be selected based on comparing an equalized signal with a signal level table of all the possible branches. These branch metrics may be calculated using high performance branch metric calculation techniques. The remaining branch metrics may be calculated based on the computed branch metrics using a technique that consumes fewer resources. The Viterbi detectors in the present invention may also be used in an iterative decoding scheme, where multiple detectors are cascaded. In these embodiments, a Viterbi detector may select a subset of the branches based on detection results from other Viterbi detectors.

Abstract: A maximum a posteriori detector includes a single state metric engine that performs forward and backward processing to produce forward and backward state metrics. The state metric engine includes a plurality of processes that each perform both the forward and the backward processing operations. The system further includes memory that stores the forward and backward state metrics that are produced by the engine in appropriate orders for the forward and backward processing. A number of multiplexers provide the appropriate branch metrics and apriori values to adder strings in each of the processors in accordance with an associate decoding trellis.

Abstract: A method and system decode a sequence of symbols received via a channel to a codeword of an error-correcting code. Log-likelihood ratios are determined from a sequence of symbols received via a channel. A set of constraints is initialized according to the log-likelihood ratios. An adaptive linear programming decoder is applied to the set of constraints and the log- likelihood ratios according to an error-correcting code to produce an estimate of the codeword and an updated set of constraints. If the estimate of the codeword is a non-integer pseudo codeword, further update the set of updated constraints with a set of integer constraints if the estimate of the codeword is the non-integer pseudo codeword, and proceeding with the applying step, and otherwise producing the estimate of the codeword as the final codeword.

Abstract: According to one embodiment, a maximum likelihood decoder includes a branch metric calculator, a processor configured to perform addition, comparison, and selection of an output from the branch metric calculator and a path metric memory, and outputs a selection signal for identifying a selection result, a path memory configured to store a time variation of the selection signal, and a path detection module configured to detect a decoding signal based on the time variation of the stored selection signal. A decoding method includes selecting operation modes of at least one of the branch metric calculator, the processor, and the path memory between a first operation mode in which an operation is performed at a channel rate frequency and a second operation mode in which an operation is performed at a specific frequency lower than the channel rate frequency.

Abstract: A Viterbi decoding system interprets bits in received QAM constellations as many-valued parameters rather than binary valued parameters. It performs the Viterbi algorithm using these many-valued parameters to provide results superior to hard decision decoding. Rather than applying a hard 0-1 function to the QAM data, the system uses a non-stepped linear or curved transfer function to assign values to the bits. In another aspect, a system differentiates between data bits based on their estimated reliability, giving more emphasis to decoding reliable bits than unreliable bits using any of a variety of techniques. By differentiating between good and bad bits and de-emphasizing or ignoring unreliable bits, the system can provide a significant reduction in uncorrectable errors and packet loss.

Abstract: Described herein are one or more implementations of a high-throughput and memory-efficient “windowed” bidirectional Soft Output Viterbi Algorithm (BI-SOVA) decoder. The described BI-SOVA decoder uses the “window” technique to concurrently decode several different non-overlapping portions of a subject signal in parallel.

Abstract: Apparatus and method for decoding a Space-Time Block Coded (STBC) signal. The decoding apparatus includes a channel estimator for estimating a real equivalent channel based on a coded signal; a channel converter for decomposing the real equivalent channel to a unit matrix and a subchannel; a receive signal converter for converting the coded signal to a real equivalent receive signal and converting the real equivalent receive signal to a converted receive signal based on the unit matrix; and a detector for detecting an estimate of a transmit signal by performing a maximum likelihood decoding using the converted receive signal and the subchannel. Since the transmit signal candidates are independent of each other, the complexity of the maximum likelihood decoding can be decreased. With the lowered complexity of the receiver, the power consumption for the decoding can be reduced and the high-speed data can be transmitted more easily in the actual mobile communication environment.

Abstract: A signal detector comprises a filter that equalizes data in an input signal to a primary target. A detector is matched to the primary target and generates a most likely path corresponding to the data in the input signal. A post-processor is matched to one of the primary target and a secondary target, determines at least one most likely error event in the most likely path, and generates revised paths based on the at least one most likely error event. A processor is matched to the secondary target, computes path metrics corresponding to each of the revised paths as a function of a non-linear noise model and selects one of the revised paths based on the path metrics.

Abstract: Systems and modules for use in trellis-based decoding of encoded sets of data bits. A memory system has multiple arrays for storing an index for each one of multiple states. With each array element being associated with a state through which a decoding path may pass through, the contents of each array element is an index which points to an immediately preceding state. This immediately preceding state is represented by another array element in another array. Each array is populated with array element entries as encoded data set are received by a separate decoder which generates the indices. For every given number of arrays in a group, a trace-back process traces back the path followed by an encoding procedure for encoding the encoded set. By tracing back this path through the various arrays, the original unencoded set of data bits can be found.

Abstract: Provided are an apparatus and method for efficiently computing a log likelihood ratio (LLR) using the maximum a posteriori (MAP) algorithm known as block combining. The method includes the steps of: calculating alpha values, beta values and gamma values of at least two time sections; calculating transition probabilities of respective states in the at least two time sections; performing a comparison operation for some of the transition probabilities to determine the highest value, selecting one of the other transition probabilities according to the determined high value, comparing the determined value with the selected value to select the higher value, and thereby obtaining the highest of the transition probabilities; and determining an operation to apply according to the highest transition probability and calculating an LLR.

Abstract: A method and a system for reducing computational complexity in a maximum-likelihood MIMO decoder, while maintaining its high performance. A factorization operation is applied on the channel Matrix H. The decomposition creates two matrixes: an upper triangular with only real-numbers on the diagonal and a unitary matrix. The decomposition simplifies the representation of the distance calculation needed for constellation points search. An exhaustive search for all the points in the constellation for two spatial streams t(1), t(2) is performed, searching all possible transmit points of (t2), wherein each point generates a SISO slicing problem in terms of transmit points of (t1); Then, decomposing x,y components of t(1), thus turning a two-dimensional problem into two one-dimensional problems. Finally searching the remaining points of t(1) and using Gray coding in the constellation points arrangement and the symmetry deriving from it to further reduce the number of constellation points that have to be searched.

Abstract: An arithmetic circuit includes a NOR circuit for outputting 1-bit inverted logical OR sf from all of a first bit group x(6) to x(10) containing 0 or more high-order bit of a path metric value composed of a plurality of bits, an inverter for inverting each bit of a second bit group x(2) to x(5) and outputting a third bit group rs(0) to rs(3), an AND circuit for outputting a fourth bit group ns(0) to ns(3) that contain results of calculating a logical AND of sf and rs(0) to rs(3), and a CF output section for outputting a correction factor CF based on ns(0) to ns(3).

Abstract: A method and apparatus for the implementation of reduced state sequence estimation is disclosed, with an increased throughput using precomputation (look-ahead), with only a linear increase in hardware complexity with respect to the look-ahead depth. The present invention limits the increase in hardware complexity by taking advantage of past decisions (or survivor symbols). The critical path of a conventional RSSE implementation is broken up into at least two smaller critical paths using pipeline registers. Various reduced state sequence estimation implementations are disclosed that employ one-step or multiple-step look-ahead techniques to process a signal received from a dispersive channel having a channel memory.

Abstract: The sliding window approach to pipeline maximum a posteriori (MAP) decoder architecture is modified to decrease processing time. Once the forward metrics have been calculated for the first sliding window of the decoder, the reverse metrics for each window are calculated while the forward metrics for the next window are calculated. As each new forward metric is calculated and stored into memory, the forward metric from the previous window is read from memory for use with reverse metric being calculated in calculating extrinsic value. Each forward metric for use in calculating an extrinsic value is written to the same memory location. The calculations can be reversed, reverse metrics being calculated first, followed by reverse metric calculations. Although this architecture as developed for a turbo decoder, all convolution codes can use the MAP algorithm of the present invention.

Abstract: Data stored in non-volatile storage is decoded using iterative probabilistic decoding and multiple read operations to achieve greater reliability. An error correcting code such as a low density parity check code may be used. In one approach, initial reliability metrics, such as logarithmic likelihood ratios, are used in decoding read data of a set of non-volatile storage element. The decoding attempts to converge by adjusting the reliability metrics for bits in code words which represent the sensed state. If convergence does not occur, e.g., within a set time period, the state of the non-volatile storage element is sensed again, current values of the reliability metrics in the decoder are adjusted, and the decoding again attempts to converge. In another approach, the initial reliability metrics are based on multiple reads. Tables which store the reliability metrics and adjustments based on the sensed states can be prepared before decoding occurs.