Abstract: Systems and methods for increasing audio SNR in a NICAM digital sound decoder are provided. One method according to the invention includes receiving a scale factor that indicates a number of bits of a Near Instantaneous Companded Audio Multiplex (NICAM) signal that have been truncated from the signal. The method also includes receiving the NICAM signal itself. The NICAM signal may include a predetermined number of zero bits in place of the predetermined number of truncated bits. The method may also require appending a bit pattern to the NICAM signal that approximates a rounding of the NICAM signal. The bit pattern preferably includes at least one non-zero bit. Another method according to the invention may include selecting a bit pattern from a collection of bit patterns. The collection of bit patterns may include at least non-zero bit.

Abstract: A method for adjusting a phase of a sampling frequency of ADC is disclosed. The method includes converting an analog signal into a first digital signal according to a first phase of the sampling frequency during a first time interval; calculating a first value according to the first digital signal; converting the analog signal into a second digital signal according to a second phase of the sampling frequency during a second time interval; calculating a second value according to the second digital signal; and adjusting the phase of the sampling frequency according to the first value and the second value.

Abstract: A direct sampling tuner includes a low noise amplifier and an optional dynamically configurable band pass filter coupled to the low noise amplifier. The optional filter is configured to pass a selected band of channels. The tuner further includes a relatively high accuracy, multi-bit analog-to-digital converter (“ADC”) coupled to the LNA or to the optional dynamically configurable band pass filter. The ADC operates at greater than about twice a frequency of a sampled signal. The ADC directly samples the spectrum of the selected channels at the Nyquist frequency, thus avoiding image problems presented by conventional tuners.

Abstract: A method and apparatus for digitizing a data signal, the method comprising the steps of receiving an input analog data signal, splitting the received input analog data signal into a plurality of split signals, and mixing at least one of the split signals with a predetermined periodic function with a predetermined frequency. The split signals are then digitized and combined mathematically to form a single output data stream that is a substantially correct representation of the original input signal.

Abstract: A method for converting data includes matching dynamic elements by repeatedly selecting a portion of unit elements among N unit elements according to data and a circulation direction. An existence of a tone generation possibility is determined by comparing a present pointer position with a previous pointer position and by comparing present data with previous data. At least one of the present pointer position and the circulation direction is changed based on the existence of the tone generation possibility. The present pointer position and the present data are stored or the changed pointer position and the present data are stored. Unit elements are sequentially selected by the present data from the stored pointer position in the circulation direction or the changed circulation direction. The present pointer position is moved by the present data in the circulation direction or the changed circulation direction.

Abstract: A system and method, including computer software, for storing digital information uses multiple NAND flash memory cells. Each memory cell is adapted to receive charge during a write operation to an analog voltage that corresponds to a data value having a binary representation of more than 4 bits. An analog-to-digital converter converts the analog voltage from each memory cell into a digital representation of the analog voltage during a read operation of each cell.

Abstract: A method for increasing the resolution of analog to digital conversion made by a microcontroller. A resistive-capacitive network is connected between an input/output port of the microcontroller and a sense voltage to be converted. The sense voltage is measured (i.e. converted) using the port in input mode to obtain a nominal voltage. The port is then switched to output mode and driven high (or alternatively low) for a period of time to modify the sense voltage by an amount equal to a desired fractional resolution step size. The port is switched back to input mode and the modified voltage is measured. The steps of driving the port in output mode and measuring the modified voltage can be repeated with the modification to the sense voltage increasing in successively larger multiples of the desired fractional resolution step size. In one embodiment of the method, the successive measurements can be summed to give the converted original sense voltage expressed in fractional resolution step size.

Abstract: An energy dispersal circuit, which generates a PRBS (Pseudo Random Binary Sequence) and executes an XOR (exclusive-OR) operation with respect to a data signal and the PRBS based on a bit, includes a register value calculator for calculating a register value of a shift register based on inputted data and a packet number. The register value calculator has a bit divider for dividing the packet number from LSB to MSB, packet shift operators for bit-shifting an initial value of the shift register from 20 bits to 2N?1 bits, and selectors for selecting inputs and outputs thereof.

Abstract: A gain circuit includes an analog section with variable gain and a digital section with variable gain. The gain steps for the digital section have a higher resolution than the gain steps for the analog section. In some implementations, gain steps can be achieved much finer than 0.1 db or less without sensitivity to device tolerances.

Abstract: A first control circuit portion carries out input/output control in cooperation with a microprocessor, a program memory, and a RAM memory. A second control circuit portion is in cooperation with the communication control circuit portion and the data memory to carry out serial communication with the first control circuit portion. A switch signal input to the second control circuit portion is stored in a first report packet, a digital conversion value for an analog signal input is stored in a second report packet, and the first and second packets are alternately periodically transmitted to the first control circuit portion. A multi-channel AD converter included in an analog signal input circuit starts to carry out AD conversion a prescribed time period after a first report packet is transmitted and finishes conversion before a second report packet is transmitted, so that up-to-date AD conversion data is transmitted.

Abstract: A method for converting data includes matching dynamic elements by repeatedly selecting a portion of unit elements among N unit elements according to data and a circulation direction. An existence of a tone generation possibility is determined by comparing a present pointer position with a previous pointer position and by comparing present data with previous data. At least one of the present pointer position and the circulation direction is changed based on the existence of the tone generation possibility. The present pointer position and the present data are stored or the changed pointer position and the present data are stored. Unit elements are sequentially selected by the present data from the stored pointer position in the circulation direction or the changed circulation direction. The present pointer position is moved by the present data in the circulation direction or the changed circulation direction.

Abstract: A sensing apparatus includes a microprocessor having an A/D converting function of digital-converting an analog electric quantity supplied to an A/D conversion port and taking in a conversion result, and a plurality of electrical elements that are connected with the microprocessor and generate analog electric quantities. The plurality of electrical elements are respectively connected with a plurality of switch ports in the microprocessor that can be selectively grounded by internal switches of the microprocessor. Analog electric quantities generated in the electrical elements can be selectively taken into the A/D converting function of the microprocessor by selectively switching the internal switches.

Abstract: A per column one-bit analog-to-digital converter for an image sensor. The analog-to-digital converter utilizes the difference between a reference signal current and a pixel signal current to obtain a digital output representative of the analog pixel signal in an efficient and simple manner. The output of the one-bit analog-to-digital converter is fed to a counter to give a representation of the brightness of the light-to-charge conversion in the associated pixel. The analog-to-digital converter does not use a reference voltage and precision elements and thus, does not suffer from power supply, noise and precision variations.

Abstract: Switching circuitry comprising a bank of actuatable switches connected in parallel between a supply terminal and a decoding terminal, each switch being connected in series with a component which, when the switch is actuated, applies to the second terminal an analog signal having a value unique to that switch.

Abstract: An integrated circuit device having at least one bond pad is coupled to a selectable plurality of input-output functionalities, e.g., an oscillator input, an analog input, an analog output, a digital input and a digital output. These analog, digital and oscillator functionalities may selectably share the same integrated circuit package external connection.

Abstract: A method may include receiving untrusted digital media; converting the untrusted digital media into an analog signal; converting the analog signal into trusted digital media; and storing the trusted digital media.

Abstract: A novel testing mechanism operative to test large capacitor arrays such as those used in a digitally controlled crystal oscillator (DCXO). The invention is adapted for use in DCXO circuits that employ dynamic element matching in their array decoding circuits. The invention combines the use of DEM during regular operation of the DCXO with a testing technique that greatly reduces the number of tests required. The invention tests the capacitors in the array on a row by row, wherein all the capacitors in a row are tested lumped together and treated as a single entity, which results in significantly reduced testing time. This permits the measurement of significantly higher frequency deviations due to the larger capacitances associated with an entire row of capacitors being tested.

Abstract: A wireless local area network (WLAN) transceiving integrated circuit services voice communications in a WLAN with at least one other WLAN device and includes a WLAN interface, a transcoder, and a switch box. The WLAN interface wirelessly communicates with at least one WLAN device to receive inbound packetized audio data from the at least one WLAN device and to transmit outbound packetized audio data to the at least one WLAN device. The transcoder receives the inbound packetized audio data and converts the inbound packetized audio data to inbound Pulse Code Modulated (PCM) WLAN audio data. The WLAN interface also receives outbound PCM WLAN audio data and converts the outbound PCM WLAN audio data to the outbound packetized audio data. The switch box operably couples between the transcoder and a PCM bus, to which an audio COder/DECoder (CODEC) couples. A speaker and a microphone coupled to the audio CODEC.

Abstract: Provided a media connect device which serves as a medium between a media player and an audio device, controls the media player in response to a user's manipulation of the audio device, performs USB-packet processing on an audio signal reproduced by the media player, and provide the audio signal packets to the audio device such that sound can be outputted from the audio device. Through the media connect device, an audio device having a USB host interface can be connected to an existing media player without the exterior being modified. Further, even in a case of DRM contents, a user can enjoy songs, which have been previously purchased, without a separate software being supported or repurchased.

Abstract: Staggered consecutive Nyquist regions associated with differing DAC synthesizer clock rates (FCLK) avoids spectrum lost through disjoint guard bands at the end of or between adjacent Nyquist regions. The staggered consecutive Nyquist regions overlap by an amount at least as much as is consumed by the guard bands. Selectable reconstruction filters associated with each Nyquist region and its DAC clock rate are used to enforce the staggered Nyquist regions and their various guard bands.

Abstract: A method for improving bandwidth of an oscilloscope involves, in preferred embodiments, the use of frequency up-conversion and down-conversion techniques. In an illustrative embodiment the technique involves separating an input signal into a high frequency content and a low frequency content, down-converting the high frequency content in the analog domain so that it may be processed by the oscilloscope's analog front end, digitizing the low frequency content and the down-converted high frequency content, and forming a digital representation of the received analog signal from the digitized low frequency content and high frequency content.

Abstract: An implementation of the present invention for 4800 bits per second comprises a voice encoder and decoder method and system that uses voice excitation, eliminating the voice/unvoiced pitch tracking, and the first formant up to 2400 Hertz, does not use pulse code modulation encoding, but uses the zero crossings only of the first formant, dividing by two and sampling at 2400 Hertz. The resulting combination uses half of the bit rate for excitation and the remainder for short term spectrum analysis. The spectrum is updated each 20.8 milliseconds using 50 bits per frame. The decoder extracts the excitation, multiplies it by two and uses a Hanning modified sawtooth and spectral flattening to excite the spectrum generator. This waveform produces both even and odd harmonics for both periodic (voiced) and aperiodic (unvoiced) frequencies and gives naturalness to all languages and speakers.

Abstract: A method for converting data includes matching dynamic elements by repeatedly selecting a portion of unit elements among N unit elements according to data and a circulation direction. An existence of a tone generation possibility is determined by comparing a present pointer position with a previous pointer position and by comparing present data with previous data. At least one of the present pointer position and the circulation direction is changed based on the existence of the tone generation possibility. The present pointer position and the present data are stored or the changed pointer position and the present data are stored. Unit elements are sequentially selected by the present data from the stored pointer position in the circulation direction or the changed circulation direction. The present pointer position is moved by the present data in the circulation direction or the changed circulation direction.

Abstract: A radio frequency integrated circuit (RFIC) includes a low noise amplifier that amplifies an inbound radio frequency (RF) signal to produce an amplified RF signal. A down conversion module converts the amplified RF signal to a down converted signal based on a local oscillation. An analog to digital conversion (ADC) module coupled to convert the down converted signal into a digital signal. A baseband processing module converts the digital signal into inbound data, wherein at least one function of the baseband processing module is clocked by a plurality of baseband clock signals A clock module produces the plurality of baseband clock signals, wherein the clock module detects an interference condition when frequency dependent noise components associated with at least one of the plurality of baseband clock signals are inside a frequency band associated with the inbound RF signal, and spreads the spectrum of the at least one of the plurality of baseband clock signals when the interference condition is detected.

Abstract: A method of transmitting data from a sensor (1) to a receiver (4) in which each original data word is split in positional fashion into at least two separate short data words (MSN, LSN). The separate short data words (MSN, LSN) are each converted by digital-to-analog conversion (15) into an analog pseudosignal and transmitted in a multiplex mode via an output of the sensor and a transmission path (3) to the receiver (4). In the receiver, the analog pseudosignals are converted back into short data words (MSN, LSM) and joined together in correct bit sequence by means of an analog-to-digital converter (15), so that the resulting data word corresponds to the original word.

Abstract: Testing a device under test—DUT—includes providing a test signal from the DUT to a test probe, taking from the test signal being present at the test probe analog samples at a first sampling rate, taking from the test signal being present at the test probe digital samples at a second sampling rate, providing a control signal indicative of sampling times of the analog samples, and performing an analysis of the digital samples in conjunction with the control signal.

Abstract: A variable resolution analog-to-digital converter includes a sample-and-hold circuit including a plurality of sample-and-hold units which are connected in parallel and selectively activated corresponding to a required resolution to sample and hold an analog input signal, a plurality of conversion stages connected in cascade to an output of the sample-and-hold circuit to convert an output signal of the sample-and-hold circuit to a plurality of bit signals, and a synthesis circuit to synthesize the bit signals, to generate a digital output signal.

Abstract: Method and system on an aircraft for converting plural data inputs and plural data outputs from a parallel format to a serial format is provided. The system includes an integrated software module that accepts plural variable number of inputs and generates a plural variable number of outputs; an analog input processing module that receives plural analog inputs, converts the analog inputs to digital data and sends the digital data to the integrated software module; a digital input processing module that receives discrete digital inputs and transfers the digital inputs to the integrated software module; a digital output module that receives data from the integrated software module; and an analog output module that receives digital data from the integrated software module and converts the digital data into analog data by using a digital to analog converter.

Abstract: A sensing apparatus includes a microprocessor having an A/D converting function of digital-converting an analog electric quantity supplied to an A/D conversion port and taking in a conversion result, and a plurality of electrical elements that are connected with the microprocessor and generate analog electric quantities. The plurality of electrical elements are respectively connected with a plurality of switch ports in the microprocessor that can be selectively grounded by internal switches of the microprocessor. Analog electric quantities generated in the electrical elements can be selectively taken into the A/D converting function of the microprocessor by selectively switching the internal switches.

Abstract: A sigma-delta modulation method with low complexity is provided. To this end, in the present invention, an input signal is forwarded and an output signal is fed back to thus reduce the range of the noise transfer function of the sigma-delta modulator and to lower the frequency offset and the phase noise at low frequencies. A sigma-delta modulator for a frequency synthesizer may include one or more modulation units which are connected in series and perform a sigma-delta modulation to an input signal and a provided accumulated signal using a signal which is weighted with a feedback coefficient; and an output adder which adds an output signal from a terminal section of the modulation units and the input signal, and outputs the added signal for feedback to the modulation units.

Abstract: Disclosed are an apparatus and a method for performing dithering in a communication system using an orthogonal frequency division multiplexing scheme. A method for adding dithering noise in a communication system employing an orthogonal frequency division multiplexing scheme includes receiving a signal, and generating dithering periodic noise and adding the dithering noise to the received signal.

Abstract: A direct sequence spread spectrum (DSSS) receiver (100) consistent with certain embodiments has a frequency generator (112) that generates a local oscillator signal without use of a piezoelectric crystal. A frequency converter (108) receives the local oscillator signal and mixes the local oscillator signal with a received DSSS signal to produce a down-converted signal. The received DSSS signal is encoded using a first set of DSSS code. A differential chip detector (116) receives the down-converted signal and converts the down-converted signal to a differentially detected signal. A correlator (120) receives the differentially detected signal and correlates the detected signal with a set of DSSS codes that are time-shifted from the first set of DSSS codes. This abstract is not to be considered limiting, since other embodiments may deviate from the features described in this abstract.

Abstract: A tri-state pulse density modulator includes a first switch device coupled to a high voltage, and a second switch device coupled to a low voltage. An adder receives a pulse density modulation (PDM) input signal and a latched input signal to generate an output sum signal and a carry signal. A latch module coupled with the adder latches the output sum signal with a clock signal to generate the latched input signal. A control circuit module responsive to the carry signal for selectively turns off the first and second switch devices to generate the PDM output signal at a tri-state voltage between the first and second voltages, or turns on the first or second switch device to generate the PDM output signal at the first or second voltage, respectively. Thus, the PDM output signal only switches between the tri-state voltage and either the first voltage or the second voltage.

Abstract: Signal processors that incorporate two or more domains in the design are provided. In certain embodiments, nonlinear processing is combined with linear processing. For example, in some embodiments, the signal processors may include a preprocessor, a plurality of analog filters and an adder. In other embodiments, digital bit waveforms are directly filtered by analog filters. For example, in some embodiments, the signal processors may include a digital signal processor or an analog-to-digital converter, a plurality of analog filters and a binary weighted adder.

Abstract: An interface component (10) for a universal in-/output module with connection points (X0, M) for field devices includes an analog-to-digital converter (ADC), a digital-to-analog converter (DCA), a power source (25) and a combinational circuit, through which, as required, the analog-to-digital converter (ADC), the digital-to-analog converter (DAC) or the power source (25) are each able to be automatically connected to connection points of the interface component (10). The interface component (10) is able to be connected via a microcomputer to a digital data bus of a control and/or regulation device. A connection point (X0, M) for a field device includes a terminal (X0) able to be configured via the interface component (10) for the field device as an input and/or as an output for bidirectional signals.

Abstract: A device for performing predetermined processing on an input signal that may have a signal amplitude of more than one bit. The input signal is obtained by subjecting one-bit serial signals to predetermined signal processing, wherein the signal amplitude of more than one bit is converted to a one-bit serial signal by accumulating the signal amplitudes that exceed one bit, delaying the accumulated signal on the basis of the input signal, and outputting the accumulated signal.

Abstract: An acquisition apparatus for a test and measurement instrument includes an input to receive an input signal, a digitizer to digitize a selected signal, a bypass path to selectively couple the input to the digitizer, a frequency shift path to frequency shift the input signal and selectively couple the frequency-shifted input signal to the digitizer, the frequency shift path including a means for frequency shifting, an input switch to switch the input signal to one of the bypass path and the frequency shift path, and an output switch to provide the selected signal to the digitizer by selectively coupling an output of one of the frequency shift path and the bypass path to the digitizer.

Abstract: A compact and highly accurate A/D converter includes series-connected computation cells, the number of which is equal to the number for bits in an output signal. The first computation cell includes a first comparison unit for subtracting a reference current from a first input current to generate a first current, and a second comparison unit for subtracting a second input current from the reference current to generate a second current. The second computation cell includes first and second comparison units having the same configurations as those in the first computation cell. The computation cells of latter stages have the same configurations as the second computation cell. Current mirror circuits included in the first and second comparison units of each computation cell generate the first and second currents. Each computation cell outputs a current having an absolute value in accordance with one of the first and second currents.

Abstract: The present invention provides an noise suppression circuit comprises an internal circuit which has a high and a low level terminals. The low level terminal is connected to a low level power supply (GND) line. The noise suppression circuit further comprises a first transistor in which one main electrode is connected to the high level terminal of the circuit, a bypass capacitor connected between the other main electrode of the first transistor and the low level power supply line, and a second transistor connected between the other main electrode of the first transistor and a high level power supply (VDD) line. The first transistor is conductive when the internal circuit is active, and is not conductive when the internal circuit is inactive. The second transistor is not conductive when the internal circuit is active, and is conductive when the internal circuit is inactive.

Abstract: Disclosed is a single flux quantum circuit that uses a flux quantum as an information carrier, which generates a SFQ clock signal with little clock jitter and supplies the SFQ clock signal to a SFQ function circuit of the SFQ circuit, the SFQ function circuit is configured to include a current steering type single flux quantum circuit that is capable of concurrently achieving both a conversion function of converting a current signal into a SFQ signal and a comparator function of outputting a SFQ data signal in response to the amount of a to-be-compared current. At the same time, a SFQ clock signal oscillation circuit for generating a SFQ clock signal in response to the amount of DC voltage is formed.

Abstract: A method and apparatus for digitizing a signal. The method comprises the steps of receiving an input analog signal, splitting the received input analog signal into a plurality of signals and frequency converting at least one of the signals in accordance with a predetermined periodic function having a predetermined frequency. The signals are then digitized and combined mathematically to form a single output stream that is a substantially correct representation of the original input analog signal.

Abstract: A method for improving bandwidth of an oscilloscope involves, in preferred embodiments, the use of frequency up-conversion and down-conversion techniques. In an illustrative embodiment the technique involves separating an input signal into a high frequency content and a low frequency content, down-converting the high frequency content in the analog domain so that it may be processed by the oscilloscope's analog front end, digitizing the low frequency content and the down-converted high frequency content, and forming a digital representation of the received analog signal from the digitized low frequency content and high frequency content.

Abstract: The scale and complexity of an apparatus is reduced by omitting a clock extraction section. The apparatus includes: a sampling pulse train generation device which generates an optical or electrical sampling pulse train, independently of an input optical or electrical data signal with a bit rate f0(bit/s), and which has a repetition frequency f1(Hz); a data signal sampling device which samples the data signal in accordance with the sampling pulse train to obtain a sampled signal; a voltage retaining device which converts the sampled signal, and stores pieces of electrical digital data; an electrical signal processing device which reads the digital data at once or sequentially to obtain a signal eye-diagram and evaluates optical data signal quality parameters; and a trigger signal generation device which applies triggers indicating the start/finish of data acquisition and data read to the voltage retaining device and the electrical signal processing device, respectively.

Abstract: Devices, systems and methods for restricting use of digital content are provided. Among those embodiments which may be construed as providing a method for restricting use of digital data, a preferred method includes the steps of: enabling a user to receive digital data; and preventing the user from copying the digital data to a digital data recording medium if: (a) copy information corresponding to the digital data indicates that such copying is not to be permitted; or (b) the digital data recording medium is not an authorized digital data recording medium.

Abstract: Method and apparatus for playing analog audio in an electronic audio system having multiple audio codecs, only one of which has a direct hardware connection to the analog audio source. First analog audio data is received from the analog audio source at a first audio codec, and converted to digital audio data using the first audio codec. The digital audio data is stored in a memory, and read back from the memory, transferred to a second audio codec. The digital audio data is then converted to second analog audio data using the second audio codec, and output from the second audio codec. An audio controller may be used to store the digital audio data in a loopback buffer within the memory, read the digital audio data from the loopback buffer, and may further be programmed to operate in a prepare loopback state, a loopback running state, and a recording state.

Abstract: Method and system on an aircraft for converting plural data inputs and plural data outputs from a parallel format to a serial format is provided. The system includes an integrated software module that accepts plural variable number of inputs and generates a plural variable number of outputs; an analog input processing module that receives plural analog inputs, converts the analog inputs to digital data and sends the digital data to the integrated software module; a digital input processing module that receives discrete digital inputs and transfers the digital inputs to the integrated software module; a digital output module that receives data from the integrated software module; and an analog output module that receives digital data from the integrated software module and converts the digital data into analog data by using a digital to analog converter.

Abstract: An A/D converter for converting an analog input into a binary-encoded word includes a bit-weight memory storing bit weights that include maximum, mimimum, and medium weights. During a conversion step, first and second registers store lower and upper weights, and a D/A converter converts one of the upper and lower weights into an analog bit-weighting signal. A comparison device provides a comparison result indicative of a comparison between the analog input and the analog bit-weighting signal and stores the result in a third register. A multiplexer selects the upper weight when the analog input exceeds the analog bit-weighting signal and the lower weight otherwise. A subtractor subtracts, from the bit weight of a preceding conversion step, a smaller weight that is smaller than, but closest, to the previous bit weight. An adder adds the new lower weight to the smaller weight to get a new upper bit weight.

Abstract: A method of equalizer adaptation involves comparing equalizer output values with a center threshold, and with at least one of a pair of outer thresholds, and adapting the equalizer in order to increase the degree of eye opening. The values of the outer thresholds are adapted such that a fixed proportion of equalizer output values lie between the outer thresholds, and the equalizer coefficients are adapted such the separation of the outer thresholds is increased. The equalizer coefficients are adapted on the basis of equalizer output values which lie between the pair of outer thresholds.

Abstract: A calibration unit and technique for calibrating A/D systems (e.g., data acquisition devices) using a pulse-width modulation (PWM) circuit to reduce nonlinearity. The calibration unit may be coupled to an analog-to-digital module (ADM) of the A/D system. The PWM circuit may generate a calibration signal with intentional ripple, which may exercise a region of a transfer curve of the ADM to reduce local nonlinearities in measurements associated with the calibration of the system. Pulse trains of varying frequency and duty cycle may be generated to sweep the PWM circuit through an ADM range and to calculate an ADM linearity correction function, which may be used to perform gain and offset correction with respect to a best-fit line through an ADM transfer curve to reduce large signal nonlinearities. The PWM circuit may include a resistor divider circuit including a plurality of taps to calibrate small input ranges.

Abstract: A method and apparatus for determining quantization error in data is disclosed. The method comprises gathering a plurality of data points, identifying a range of the data points, separating the data points into a plurality of segments, and estimating the quantization error by calculating the ratio between the data range and the quantity of segments. The apparatus comprises means for gathering a plurality of data points, means for identifying a range of the data points, means for separating the data points into a plurality of segments, and means estimating the quantization error by calculating the ratio between the range and the quantity of the segments.