Manufacturing method of semiconductor device
A semiconductor device ensuring an isolation of elements by a trench is provided. A method of manufacturing the semiconductor device includes the step of forming a silicon nitride film having an aperture, the step of selectively removing a part of a silicon substrate along aperture to form a recess defined by a side surface and a bottom surface in silicon substrate, the step of oxidizing the side surface and the bottom surface of the recess to form a thermal oxide film having a side portion and a bottom portion, and the step of selectively removing bottom portion of thermal oxide film and a part of silicon substrate by using silicon nitride film as a mask to form a trench.
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Field of the Invention
The present invention relates to a semiconductor device and a manufacturing method thereof. More particularly, the present invention relates to a semiconductor device having a trench for isolation of elements and a manufacturing method thereof.
In a conventional semiconductor device, it is known to use a trench isolation to isolate semiconductor elements formed on a semiconductor substrate.
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A problem caused by the conventional manufacturing method will be described below.
An object of the present invention is to solve the above-mentioned problem and to provide a highly reliable semiconductor device.
A method of manufacturing a semiconductor device according to the present invention includes the step of forming a mask layer having a first aperture on a main surface of a semiconductor substrate including silicon, the step of selectively removing a part of the semiconductor substrate along the first aperture by using the mask layer as a mask to form a recess defined by a side surface and a bottom surface in the semiconductor substrate, the step of oxidizing the side surface and the bottom surface of the recess to form a first silicon oxide film having a side portion and a bottom portion, the step of selectively removing the bottom portion of the first silicon oxide film and a part of the semiconductor substrate by using the mask layer as a mask to form a trench, and the step of oxidizing a surface of the trench.
According to the method of manufacturing a semiconductor device including such steps, a trench is formed after the side surface and the bottom surface of the recess are oxidized to form a silicon oxide film having a side portion and a bottom portion, and then a surface of the trench is oxidized. Therefore, the side portion of the recess is oxidized in two steps, that is, the step of forming the first silicon oxide film and the following step of oxidizing a surface of the trench, while the most part of the trench surface is oxidized once. With this, a corner portion of the trench will be oxidized in a larger amount because the portion is oxidized twice. This can avoid an electric field concentration at the corner portion of the trench. Furthermore, as the other portions of the trench surface are oxidized only once, an aperture diameter of the trench will not be too small. As a result, filling of the trench with insulating film in the following step will be easier, so that a highly reliable semiconductor device can be provided.
Preferably, the method of manufacturing a semiconductor device further includes the step of forming a second silicon oxide film on a main surface of the semiconductor substrate prior to the step of forming the mask layer. The step of forming the recess includes the step of removing a part of the second silicon oxide film to form a second aperture continuing from the first aperture in the second silicon oxide film, and the step of removing a part of the semiconductor substrate to form the recess continuing from the second aperture. Since the silicon oxide film is formed between the mask layer and the semiconductor substrate, the mask layer can be prevented from applying stress or the like to the semiconductor substrate. Preferably, the step of forming the first silicon oxide film includes the step of forming the first silicon oxide film such that it continues from the portion of the second silicon oxide film that defines the second aperture. Preferably, the method of manufacturing a semiconductor device further includes the step of forming a polysilicon layer between the second silicon oxide film and the mask layer. The step of forming the recess includes the step of removing a part of the polysilicon layer to form a third aperture continuing from the first aperture in the polysilicon layer and the step of forming a second aperture and the recess continuing from the third aperture. The step of forming the first silicon oxide film includes the step of oxidizing the portion of the polysilicon layer that defines the third aperture to form the first silicon oxide film. This can thicken the silicon oxide film because the polysilicon layer is also oxidized to form the first silicon oxide film. Therefore, the electric field concentration at corner portion of the trench can further be mitigated. Preferably, the step of forming the polysilicon layer includes the step of forming a belt-shaped conductive layer to be a floating gate electrode. The method further includes the step of patterning the belt-shaped conductive layer to form a floating gate electrode after forming the trench. Since a side wall portion of the belt-shaped conductive layer is oxidized, the silicon oxide film at this portion will become thicker. Then, when the belt-shaped conductive layer is patterned to form the floating gate electrode, a silicon oxide film extending from the floating gate electrode to the trench is formed. As a result, the corner portion of the trench can be rounded, and a non-volatile semiconductor memory device which can mitigate the electric field concentration can be provided. Preferably, the step of forming the trench includes the step of removing the bottom portion and leaving the side portion of the first silicon oxide film. Since the side portion of the first silicon oxide film remains, the silicon oxide film at this portion will become thicker and the electric field concentration at the corner portion of the trench can be mitigated.
The foregoing and other objects, features, aspects and advantages of the present invention will become more apparent from the following detailed description of the present invention when taken in conjunction with the accompanying drawings.
Embodiments of the present invention will now be described with reference to the drawings.
First EmbodimentReferring to
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In the method of manufacturing a semiconductor device according to the present invention as described above, corner portion 107c of trench 107 is oxidized twice in steps shown in
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Such semiconductor device has an effect similar to that of the semiconductor device according to the first embodiment. Furthermore, as the portion of doped polysilicon film 111 that defines aperture 111h is also oxidized, the thermal oxide film will become especially thick at corner portion 107c of trench 107. As a result, the electric field concentration at corner portion 107c of trench 107 can be mitigated more than in the first embodiment.
Third EmbodimentIn a third embodiment, a non-volatile semiconductor memory device is manufactured as a semiconductor device. Firstly, a belt-shaped conductive film is used as doped polysilicon film 111 shown in
A resist pattern having a pattern of a control gate electrode is formed on the polysilicon film, and the polysilicon film, the dielectric film and the belt-shaped conductive film are etched in accordance with the resist pattern. This results in a non-volatile semiconductor memory device including a floating gate electrode 151, a dielectric film 152 and a control gate electrode 153 as shown in FIG. 15. Floating gate electrode 151 is obtained by etching of doped polysilicon film 111 as a belt-shaped conductive film.
The semiconductor device of the present invention, manufactured through the method including such steps, has an effect similar to that of the semiconductor device in accordance with the second embodiment. Furthermore, as the step of forming the belt-shaped conductive film to be the floating gate electrode can be followed immediately by the etching step of forming trench 107, the non-volatile semiconductor memory device can be provided without increasing the number of manufacturing steps.
Though embodiments of the present invention have been described, the embodiments shown can be modified to various forms. The semiconductor device having such shallow trench isolation can be used in a region isolating memory elements such as that of a dynamic random access memory (DRAM) or a static random access memory (SRAM). Furthermore, it can also be used for an element isolation in a logic region.
A semiconductor device ensuring an isolation of elements by a trench can be provided according to the present invention.
Although the present invention has been described and illustrated in detail, it is clearly understood that the same is by way of illustration and example only and is not to be taken by way of limitation, the spirit and scope of the present invention being limited only by the terms of the appended claims.
Claims
1. A method of manufacturing a semiconductor device, comprising the steps of:
- forming a mask layer having a first aperture on a main surface of a semiconductor substrate including silicon;
- selectively removing a part of said semiconductor substrate along said first aperture by using said mask layer as a mask to form a recess defined by a side surface and a bottom surface in said semiconductor substrate;
- oxidizing the side surface and the and the bottom surface of said recess to form a first silicon oxide film having a side portion and a bottom portion;
- selectively removing the bottom portion of said first silicon oxide film and a part of said semiconductor substrate by using said mask layer as a mask to form a trench; and
- thermal oxidizing a surface of said trench, the method further comprising the steps of:
- forming a second silicon oxide film on a main surface of said semiconductor substrate prior to the step of forming said mask layer, wherein
- the step of forming said recess includes the step of removing a cart of said second silicon oxide film to form a second aperture continuing from said first aperture in said second silicon oxide film and the step of removing a part of said semiconductor substrate to form said recess continuing from said second aperture; and
- forming a polysilicon layer between said second silicon oxide film and said mask layer, wherein
- the step of forming said recess includes the step of removing a part of said polysilicon layer to form a third aperture continuing from said first aperture in said polysilicon layer and the step of forming a second aperture and said recess continuing from said third aperture, and wherein the step of forming said first silicon oxide film includes the step of oxidizing the portion of said polysilicon layer that defines said third aperture to form said first silicon oxide film.
2. The method according to claim 1, wherein
- the step of forming a first silicon oxide film includes the step of forming said first silicon oxide film such that it continues from the portion of said second silicon oxide film that defines said second aperture.
3. The method according to claim 1, wherein the step of forming said polysilicon layer includes the step of forming a belt-shaped conductive layer to be a floating gate electrode,
- said method further comprising the step of patterning said belt-shaped conductive layer to form a floating gate electrode after forming said trench.
4. The method according to claim 1, wherein
- the step of forming said trench includes the step of removing the bottom portion and leaving the side portion of said first silicon oxide film.
5. The method according to claim 1, wherein
- the step of forming said mask layer includes the step of forming said mask layer including a silicon nitride film.
5310692 | May 10, 1994 | Chan et al. |
5721174 | February 24, 1998 | Peidous |
5834360 | November 10, 1998 | Tesauro et al. |
5972776 | October 26, 1999 | Bryant |
6017800 | January 25, 2000 | Sayama et al. |
6350655 | February 26, 2002 | Mizuo |
6372606 | April 16, 2002 | Oh |
11-26572 | January 1999 | JP |
Type: Grant
Filed: Jun 4, 2002
Date of Patent: Jan 25, 2005
Patent Publication Number: 20030100167
Assignee: Renesas Technology Corp. (Tokyo)
Inventor: Shu Shimizu (Hyogo)
Primary Examiner: John F. Niebling
Assistant Examiner: Stanetta Isaac
Attorney: McDermott, Will & Emery
Application Number: 10/160,052