Ultraviolet light emitting diode

- Cree, Inc.

A light emitting diode is disclosed. The diode includes a silicon carbide substrate having a first conductivity type, a first gallium nitride layer above the SiC substrate having the same conductivity type as the substrate, a superlattice on the GaN layer formed of a plurality of repeating sets of alternating layers selected from among GaN, InGaN, and AlInGaN, a second GaN layer on the superlattice having the same conductivity type as the first GaN layer, a multiple quantum well on the second GaN layer, a third GaN layer on the multiple quantum well, a contact structure on the third GaN layer having the opposite conductivity type from the substrate and the first GaN layer, an ohmic contact to the SiC substrate, and an ohmic contact to the contact structure.

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Description
CROSS-REFERENCE TO RELATED APPLICATION

This application is a divisional of copending U.S. application Ser. No. 10/170,577, filed Jun. 12, 2002 now U.S. Pat. No. 6,664,560.

FIELD OF THE INVENTION

This application claims priority from provisional application Serial No. 60/298,835 filed Jun. 15, 2001, for “Ultraviolet Light Emitting Diode.” The present invention relates to light emitting diodes (LEDs) and in particular relates to a light emitting diode formed from Group III nitrides that emit in the ultraviolet (UV) portion of the electromagnetic spectrum. This application is related to the following copending applications, each of which is incorporated entirely herein by reference: Serial No. 60/294,445 filed May 30, 2001, for “Multi-Quantum Well Light Emitting Diode Structure,” Serial No. 60/294,308 filed May 30, 2001, for “Light Emitting Diode Structure with Multi-Quantum Well and Superlattice Structure,” and Ser. No. 09/706,057 filed Nov. 3, 2000, for “Group III Nitride Light Emitting Devices with Gallium-Free Layers.”

BACKGROUND OF THE INVENTION

The present invention relates to light emitting diodes. As well understood by those of ordinary skill in this art, in its most basic form a light emitting diode is formed of one or more semiconductor materials that includes at least one p-n junction (the diode) and which emits light (photons) of a particular color when current passes (is injected) through the device.

Because light emitting diodes are formed from semiconductor materials, they represent one group of “solid state” devices; i.e., those electrical or electronic devices formed in solid compositions, and that operate without the use of flow of electrons through a gas or a vacuum that characterized a much earlier generation of electronic equipment such as vacuum tubes. In an increasingly large number of electronic applications, solid state devices are overwhelmingly preferred because of their relatively low cost, high reliability, small size, light weight, and the derivative advantages that these provide.

In particular, light emitting diodes have become almost ubiquitous in their appearance in devices of all types. In recent years, the availability of light emitting diodes that will emit in the blue portion of the visible spectrum has expanded yet again the available applications for light emitting diodes. In addition to providing blue light per se, blue LEDs with the appropriate wavelengths (about 455-492 nanometers), can be incorporated with LEDs of the other primary colors (red and green, both of which have generally been more widely available than blue) to form multiple combinations of visible colors for many purposes. Indeed, the availability of all three primary colors in light emitting diodes has opened the possibility for solid state production of white light (i.e., the combination of all the primary colors), and such devices are increasingly available in the consumer marketplace as well as other areas of commerce.

As is further understood by those of skill in this art, the color that an LED produces is based on a number of factors, but primarily depends upon the bandgap of the semiconductor material being used, often combined with various doping schemes, including compensated doping schemes. The material being used is the fundamental factor, however, because the material's full bandgap represents the limiting factor in the energy transitions that can produce a photon. Thus, materials with smaller bandgaps cannot produce photons having sufficient energy (and corresponding wavelength and frequency) to fall into the higher energy (blue and violet) portion of the visible spectrum. In particular, in order to produce a blue photon, a material must have a band gap of at least 2.5 eV (e.g. for a 492 nm photon), and only a relatively few semiconductor materials meet this criteria. Among these are the Group III nitrides, silicon carbide (SiC), and diamond.

Although much interest and success in blue LEDs has focused upon silicon carbide based devices, Group III nitrides have raised more recent and greater interest because of their characteristics as direct rather than indirect emitters. In somewhat simplistic terms, a direct emitter produces a photon that incorporates all of the energy of the bandgap transition, while an indirect emitter emits some of the transition energy as a photon and some as vibrational energy (a phonon). Thus, a direct transition is more efficient than an indirect one in an LED. Additionally, the bandgap of Group III nitride materials can be tailored somewhat by the atomic composition of the nitride. Thus, blue light emitting diodes are generally formed in combinations of gallium nitride, aluminum nitride, indium nitride, and various ternary and tertiary versions of these materials. In particular, indium gallium nitride is an attractive candidate because its bandgap can be tuned by adjusting the amount of indium present.

Although the blue LED has expanded the universe of LED applications, its use can be to some extent limited in producing white light for other, more mundane reasons. For example, in order to produce white light from the red-green-blue combination, a lamp or pixel must incorporate a red LED, a blue LED and a green LED. Additionally, producing the necessary circuitry and physical arrangements to house and operate three LEDs is more complex than for single-color LEDs when they are incorporated into devices.

Accordingly, recent interest has focused upon the use of single color LEDs in combination with fluorescent and phosphorescent materials to produce desired colors from single LEDs. Although many materials respond in fluorescent or phosphorescent fashion to light in the visible spectrum, and thus will respond to visible LEDs, more tend to respond to the higher-energy photons in the ultraviolet portion of the spectrum. Furthermore, certain visible LED-phosphor combinations raise particular disadvantages. For example, a relatively high energy photon from a blue LED will produce phosphorescence in a number of materials, including phosphorescence of white light. Because the blue LED is stimulating the phosphorescence, however, the light always tends to have a blue component in it that may be undesired in a given application.

Accordingly, the use of ultraviolet (UV) LEDs as the excitation source for fluorescent or phosphorescent lighting has become of greater interest. In theory, a single UV LED that produces an appropriate wavelength and frequency emission can produce a suitable white light emission from a complementary phosphor. Stated differently, by incorporating the phosphor, the single UV LED can produce the same white light that would otherwise require the use of separate red, green and blue LEDs. Present examples include potential back-lighting for liquid crystal display devices such as cell phone displays. Furthermore, the production of white light from single LEDs offers advantages in any number of applications including room and outdoor lighting. Therefore, producing and improving light emitting diodes that can emit in an efficient and satisfactory manner in the UV portion of the spectrum remains a desirable goal.

OBJECT AND SUMMARY OF THE INVENTION

Therefore, it is an object of the present invention to provide a light emitting diode that can produce frequencies in the ultraviolet portion of the electromagnetic spectrum and that can be incorporated into related devices and equipment, including devices that use phosphors in combination with the LED to produce white light.

The invention meets this object with a light emitting diode that emits in the UV portion of the electromagnetic spectrum.

In another aspect, the invention is the combination of the LED with an appropriate phosphor to produce a device that emits white light.

In yet another aspect, the invention is a method of producing the UV light emitting diode.

The foregoing and other objects and advantages of the invention and the manner in which the same are accomplished will become clear based on the followed detailed description taken in conjunction with the accompanying drawings in which:

BRIEF DESCRIPTION OF THE DRAWINGS

FIG. 1 is a schematic diagram of a light-emitting diode in its basic form as exemplified by the prior art;

FIG. 2 is a schematic cross-sectional view of the light-emitting diode of the present invention;

FIG. 3 is an expanded cross-sectional view of the superlattice portion of the device illustrated in FIG. 2;

FIG. 4 is an enlarged schematic cross-sectional view of the multiple quantum well portion of the device illustrated in FIG. 2;

FIG. 5 is an abbreviated bandgap diagram illustrating the function of the multiple quantum well;

FIG. 6 is a schematic plot of the relationship between the emission wavelength of a diode according to the present invention and the percentage of indium in an indium gallium nitride quantum well of fixed thickness;

FIG. 7 is a schematic plot of the emission wavelength in relation to the thickness of the quantum well for a fixed percentage of indium in the indium gallium nitride quantum well; and

FIG. 8 is a more complete bandgap diagram of illustrative portions of the light-emitting diode according to the present invention.

 DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS

FIG. 1 is a schematic cross sectional diagram of a simple conventional LED in the prior art. The LED 10 is formed of a substrate 11, and then respective n and p-type epitaxial layers 12 and 13 that form the p-n junction. Ohmic contacts 14 and 15 complete the device in situations where the substrate 11 is conductive. An exemplary blue LED formed in silicon carbide having a generally similar structure is set forth in U.S. Pat. Nos. 4,918,497 and 5,027,168 which are commonly assigned with the present invention. In a device using silicon carbide, the substrate 11 is typically n-type as is the first epitaxial layer 12. The top epitaxial layer 13 is p-type. As set forth in the above patents and numerous others, one of the advantages of silicon carbide as a substrate is its capability of being conductively doped to thus permit the vertical orientation of the device illustrated in FIG. 1. As used in this art, the term “vertical” indicates that the ohmic contacts 14 and 15 are placed at opposite ends of the device so that current can flow through the device in end-to-end fashion rather than laterally, as in LED's that incorporate non-conductive substrates such as sapphire. In its simplest operation, when current is passed through the LED 10, holes and electrons from the layers 12 and 13 combine and give off energy in the form of photons. When the bandgaps or other aspects of the device (such as compensated doping) define the proper energy separations, the photons will be in the visible portion of electromagnetic spectrum and thus form visible light. In the same manner, of course, smaller-energy transitions can produce lower-energy photons that fall into the infrared portion of the spectrum, and larger-energy transitions can—as in the present invention—produce higher-energy photons that fall into the blue, violet, and ultraviolet portions of the spectrum.

FIG. 2 schematically illustrates the present invention in cross sectional fashion and generally designated at 20. In a broad overview, the device 20 is formed on a silicon carbide substrate 21. In preferred embodiments, the substrate 21 is formed from the 6H or 4H polytypes of SiC, with 4H being most preferred for its better electrical proprieties and transparency to UV wavelengths. By comparison, the 6H polytype tends to absorb in the UV region of the spectrum.

The substrate 21 carries an aluminum gallium nitride (AlGaN) buffer layer 22 that provides a crystal and electronic transition between the silicon carbide substrate 21 and its lattice parameters and those of the remainder of the device. As used herein, the formula AlGaN represents the more complete designation AlxGa1-xN in which 1≧X≧0. Exemplary buffer structures and compositions are set forth in U.S. Pat. Nos. 5,393,993 and 5,523,589, the contents of which are incorporated entirely herein by reference. Table 1 presents preferred thickness ranges for the buffer layer 22 and the remaining layers shown in FIG. 2. Although the buffer layer 22 forms an element of a preferred embodiment of the invention, it is an optional element.

FIG. 2 also illustrates that the buffer layer 22 also includes a plurality of gallium nitride dots 23 on the surface of the silicon carbide substrate, with the dots 23 in turn being covered with AlGaN caps 24. Thus, the buffer layer 22 can also be described as being on the dots 23 and their caps 24. Similarly, the gallium nitride dots 23 and the AlGaN caps 24 are not required elements but form elements of a preferred embodiment of the invention.

The next layer is a gallium nitride (GaN) layer 25 which is doped with silicon to be n-type, thus matching the preferred n-type silicon carbide substrate, and permitting the overall vertical orientation of the device 20. The gallium nitride layer 25 also includes a discontinuous layer of silicon nitride (Si3N4) which is illustrated in schematic fashion by the rectangles 26. It will be understood that the rectangles are a schematic representation and that the layer is discontinuous and not limited to specific geometric shapes. Thus, the GaN layer 25 can also be described as being on both the buffer 22 and the discontinuous Si3N4 layer 26.

Although FIG. 2 illustrates the silicon nitride layer 26 as being on the top surface of the AlGaN buffer layer 22, this position is preferred and exemplary rather than limiting of the invention. In a broader sense, the silicon nitride layer 26 should be below the active layer, should be capped with a AlGaN layer or GaN layer to complete its defect reduction purpose.

The silicon nitride layer 26 functions to reduce the propagation of dislocations in the crystal that tend to originate in the SiC substrate 21. Such dislocations tend to propagate through Group III nitride layers, but not through the Si3N4 portions (epitaxial lateral overgrowth) in a manner that prevents the dislocations from reproducing. In practice, the Si3N4 layer 26 can reduce the defect density. Thus, although the silicon nitride layer is not a required element of the invention, it does form an element of the preferred embodiment.

The next portions of the device are the superlattice broadly designated at 27 in FIG. 2 (and that will be discussed in more detail with respect to FIG. 3) and the n-type doped gallium nitride layer 30 on the superlattice 27. This layer provides an appropriate transition to the multiple quantum well (“MQW”) 31 (FIG. 4). In preferred embodiments, the layer 30 includes both a doped and undoped portion. The doped portion is n-type and about 250 Å thick (see Table 1) and is immediately adjacent the superlattice 27. The undoped portion is about 35 Å thick and preferably borders the MQW 31. Avoiding doping this portion of layer 30 helps protect the InGaN portion of the first period of the MQW from undesired doping.

The multiple quantum well 31 is capped by another gallium nitride layer 32 which in preferred embodiments is undoped but can be p-doped with magnesium or n-doped with silicon. The next layer is a similarly undoped aluminum gallium nitride layer 33, followed by the p-type aluminum gallium nitride (AlxGa1-xN, where 1≧x≧0) layer 34 and p-type GaN contact layer 35. Ohmic contacts 36 to the p-type contact layer 35 and 37 to the substrate 21 respectively, complete the device. The contact layer 35 is preferably formed of GaN because it provides a better ohmic contact than AlGaN, but is less difficult to form than InGaN, which has the best theoretical properties for the p-contact layer 35. The preferred GaN contact does not limit the contact to GaN, a suitable InGaN or superlattice layers are also possible contact layers.

FIG. 3 is an enlarged view of the superlattice structure 27. In preferred embodiments, the superlattice 27 is formed of a plurality of repeating sets (“periods”) of alternating layers of indium gallium nitride (InGaN) 40 and gallium nitride 41, respectively. In other embodiments, the alternating layers can both be InGaN, with different mole fraction combinations of indium and gallium. In yet another embodiment, the alternating layers can be AlGaInN with different mole fractions of aluminum, gallium and indium. FIG. 3 illustrates three periods of the superlattice 27 and in preferred embodiments, the device can include up to 50 such periods. In the preferred embodiments, the InGaN layers 40 are about 10 Å thick and the gallium nitride layers are about 20 Å thick. Both of the layers are doped n type with silicon.

To some extent, the advantages provided by the superlattice 27 are empirically observed rather than theoretically understood. Thus, Applicants do not wish to be bound by any particular theory about the superlattice, but have determined that the resulting light emitting diode demonstrates improved performance, particularly brightness, when the superlattice 27 is included. It is recognized that in at least one sense, the superlattice provides strain relief and helps bridge the lattice constant gap between the gallium nitride portions of the device and the indium gallium nitride layers in the multiple quantum well 31. The superlattice 27 also increases the effective carrier concentration and reduces the voltage required for the device, thus improving both its optical quality and the efficiency.

FIG. 4 is an enlarged and more detailed schematic cross-sectional view of the multiple quantum well 31 illustrated in FIG. 2. As in the case of the superlattice 27, the multiple quantum well includes a number of repetitions of a basic structure formed of a layer of undoped indium gallium nitride, which in FIG. 4 are each respectfully illustrated at 42, and layers of gallium nitride each illustrated at 43. The indium gallium nitride portions 42 are undoped and, having the smallest bandgap of all of the materials in the device, form the quantum well in which the carrier density is highest. Although the inventors do not wish to be bound by any particular theory, it appears that undoped InGaN tends—all other factors being equal—to be of higher quality than doped InGaN. Thus undoped InGaN represents the presently preferred embodiment of the invention, but is not an absolute limitation.

Furthermore, although the periods formed of GaN and InGaN represent the preferred and illustrated embodiment, it will be understood that in a broader sense the alternating layers can be expressed as InxGa1-xN alternating with InyGa1-yN where 1≧X≧0 and 1≧Y≧0 or alternatively a quartenary AlxInyGa1-x-yN where X+Y<1. In such cases, the values of X and Y are selected to make sure that the quantum wells 42 have smaller bandgaps than the layers 43.

In preferred embodiments, each of the gallium nitride layers 43 is formed of three respective portions. A first portion, 43A, is not intentionally doped. A second portion, 43B, is n-type doped with silicon. A third portion, 43C, is not intentionally doped. The purpose of layers 43A and 43C is to provide an undoped region immediately adjacent the undoped indium gallium nitride well layer 42. Although the structure and purpose of multiple quantum wells is generally well understood in this art, the purpose of including the quantum well is to some extent illustrated by the partial bandgap diagram of FIG. 5. In FIG. 5, a series of arrows is shown to indicate the flow of carriers (holes in FIG. 5) through the quantum wells. As the carriers reach each well, a portion of the number that is injected will be collected in each well, but a portion will not be. Thus the initial number of carriers is illustrated by the largest arrow 44 in FIG. 5, progressing through the first quantum well formed by the indium gallium nitride layer 42. The carriers that are not collected in the first quantum well 42, are indicated by the somewhat smaller arrow 45 (moving from right to left in the orientation of FIG. 5). Once again, fewer carriers remain after the next quantum well and this smaller number is indicated by the arrow 46. Finally, the fewest number of carriers after the last quantum well are illustrated by the arrow 47.

In some cases, a single quantum well is advantageous and can form the active layer of the present invention, i.e, where the light is produced. The use of a plurality of quantum wells 42, however, rather than a single quantum well, helps collect and in effect use, as many available carriers as possible thus increasing the efficiency of the device in comparison to a single layer structure of the same material. At some point, however, after most of the carriers have been collected, additional wells will no longer provide a proportional increase in efficiency. Additionally, indium gallium nitride is a strained crystal structure relative to gallium nitride and even though the layers are relatively thin, the strain in the multiple quantum well becomes cumulative. Thus the number of quantum wells is generally selected as sufficient to increase the efficiency while less than the number at which the strain would become troublesome, and the gain in efficiency would likewise become minimal or nonexistent. Presently, successful devices have been formed using a three-period well, a five-period well and a seven-period well, and those of skill in the art will be able to select other numbers of periods without departing from the scope of the invention or the claims.

FIGS. 6 and 7 are schematic diagrams that illustrate the relationship between the emission wavelength of the quantum well and (1) the percentage of indium in the well (FIG. 6) or (2) the well thickness (FIG. 7). As known to those familiar with indium gallium nitride, the bandgap of this ternary material can be adjusted by changing the amount of indium in the crystal. In this regard, and as also well-understood in this art, the formula for indium gallium nitride is best expressed as InXGaX-1N, where 1>X>0.

As FIG. 6 illustrates, for a fixed thickness well, an increasing amount of indium (as mole percentage) tends to increase the wavelength and thus lower the frequency of the photons emitted by the device. Lesser fractions of indium cause the device to emit a shorter wavelength, higher frequency photon in the desired UV range. Accordingly, in preferred embodiments of the invention, X is equal to about 0.15; i.e., In0.15Ga0.85N.

FIG. 7 illustrates that, for a fixed amount of indium, the well thickness affects the wavelength. Table 2 presents the preferred ranges of well thickness and in preferred embodiments, the well is about 25 angstroms thick.

Thus, in order to produce a UV emission, the percentage (mole fraction) of indium in the InGaN quantum wells 42 is preferably no more than 30% and most preferably about 15%. Similarly, the thickness of the wells is preferably no more than about 50 angstroms, and most preferably about 25 angstroms.

The resulting LEDs have been produced with wavelengths between 370 nm and 420 nm depending upon the design parameters set forth herein.

FIG. 8 is a schematic band gap diagram of the relevant portions of the light emitting diode of the present invention. The upper border of the diagram represents the conduction band and the lower portion represents the valence band.

Method Aspects of the Invention

There are a number of distinct steps in producing the light emitting diode of the present invention. As those of skill in this art are aware, the growth of epitaxial layers of materials such as Group III nitrides is a relatively sophisticated task. To some extent, the particular growth conditions and techniques are dependent upon factors such as the particular reactors (and related facilities and equipment) being used. Thus, the description herein provides the information necessary for those of skill in this art to carry out the disclosed and claimed techniques under individual or different circumstances, yet without undue experimentation.

The substrate 21 is generally formed in the manner set forth in U.S. Pat. No. 4,866,005 and its reissue No. RE 34,861, for which the present assignee is the exclusive licensee. The growth of the remainder of the device in an exemplary and preferred embodiment is set forth in Table 1.

TABLE 1 Thickness Layer (A unless noted) Temperature (° C.) Al % In % # Description range preferred range preferred Conductivity range preferred range preferred 35 p-GaN 0.1-0.3 um 0.18 um  900-1020 980 p 0-10 0 34 p-AlCraN 0-300 85  850-1020 900 p 0-40 22 33 AlGaN 0-100 30  850-1020 900 nida 0-60 40 32 GaN 0-200 80 700-900 820 nid 0-15 0 0-15 0 5 period MQW  43a GaN 0-100 25 700-900 770 nid 0-15 0 0-15 0 (range = 42 InGaN 10-50 25 700-900 770 nid 5-30 15 1-10 wells)  43c GaN 0-100 35 700-900 820 nid 0-15 0 0-15 0  43b GaN 0-300 35 700-900 820 n 0-15 0 0-15 0 30 GaN 50-400 250 700-900 820 n 0-15 0 0-15 0 10 period 41 GaN 5-100 30 700-900 780 n 0-15 0 0-15 0 Superlattice 40 InGaN 5-4.0 15 700-900 780 n 0-15 0 5-50 15 (range = 2-50 periods) 25 GaN 1-4 um 3 um 1000-1150 1090 n 26 SiN discontinuous  200-1100 700 n 22 AIGaN 0-0.5 um 0.3 um  800-1050 1000 n 5-25 12 24 Dot Cap discontinuous  800-1000 910 n 5-25 12 23 Dot Cap discontinuous  800-1000 910 n 21 SiC 2.6 um 3.6 um n Substrate anot intentionally doped

Table 1 is oriented similarly to FIG. 2. The numbers in parentheses represent acceptable ranges and the numbers outside the parentheses represent preferred values. Thus, the growth steps start at the bottom of the table and work toward the top. The first step is to add the GaN dots 23 and their AlGaN caps 24 to the substrate 21. The composition of the AlGaN caps is AlXGa1-XN in which 1>X>0, with X being between about 5 and 15 in preferred embodiments.

The aluminum gallium nitride buffer layer 22 is next grown to a thickness of about 3,000 Å at a temperature of about 1,000° C.

The Group III nitrides are preferably grown using metal-organic chemical vapor deposition (MOCVD). The general nature of MOCVD is well understood in this art and the steps recited herein can accordingly be practiced by those of ordinary skill in this art without undue experimentation. As noted earlier, the sophisticated nature of the technique will, however, normally require specific adjustments based on individual equipment and set-ups.

Following completion of the AlGaN buffer layer 22, the discontinuous layer of silicon nitride 26 is grown on the buffer layer 22 at a temperature of about 700° C. The Si3N4 can be deposited in situ or ex situ, and over a temperature range of 200-1100° C. The temperature should be low enough to help control (and in particular slow) the growth rate and thus control the quality and thickness of the discontinuous silicon nitride layer. Temperatures of about 700° C. are preferred. At higher temperatures, the layer tends to form more quickly making the growth and thickness somewhat, but not excessively, more difficult to control.

Following the growth of the buffer layer 22, and the discontinuous silicon nitride layer 26, the gallium nitride n-type layer 25 is grown using a series of steps. In particular, the purpose of the discontinuous layer of silicon nitride is to permit and encourage the growth technique referred to as “epitaxial lateral overgrowth” (or “ELO”) in which the GaN first grows on the surface of the buffer layer 22, but not on the Si3N4 portions. As upward growth from the buffer layer 22 proceeds adjacent the Si3N4 portions, the GaN tends to grow laterally across the Si3N4 portions. Because defects tend to propagate more easily vertically than horizontally, the lateral portions—and the vertical growth that follows—tend to exhibit reduced defect density. In a first part of this growth, a GaN layer approximately 30,000 Å thick is grown at about 1,090° C. (or a functionally equivalent temperature range), a temperature that encourages faster lateral growth and thus facilitates defect reduction. Specifically, the epitaxial lateral overgrowth of gallium nitride coalesces faster on the silicon nitride at such temperature. Exemplary (but not limiting) epitaxial lateral overgrowth techniques are set forth in U.S. Pat. Nos. 6,177,168 and 6,051,849 which are incorporated entirely herein by reference.

As Table 1 indicates, in preferred embodiments the superlattice includes between about 2 and 50 periods (10 periods being exemplary) formed by the indium gallium nitride 15 Å layer 42, and the gallium nitride 30 Å layer 43, both of which are doped n-type with silicon (Si). If desired, however, layers 42 and 43 can be undoped.

Following growth of the superlattice 27, the n-type gallium nitride layer 30 is grown in two steps. As Table 1 indicates, the first portion of layer 30 having a thickness of about 250 Å is grown with silicon doping at a temperature of about 820° C. A smaller, narrower portion of the layer is then grown without doping to help make sure that the undoped indium gallium nitride layer in the multiple quantum well 31 is segregated as much as possible from the silicon doping in the n-type layer 30.

The multiple quantum well 31 is then grown in the following fashion. First, the relatively thin approximately 25 Å undoped indium gallium nitride layer 42 is grown at a temperature of 770° C. following which a relatively thin undoped portion of GaN of about 25 Å is grown also at 770°. This is followed by a silicon doped portion of gallium nitride that is grown at the somewhat higher temperature of 820° C. to help increase the crystal quality of the gallium nitride. Stated differently, for gallium nitride layers above or near to indium gallium nitride layers, somewhat lower temperatures are preferred to protect the indium gallium nitride layers. Whenever possible, however, the gallium nitride is preferably grown at a somewhat higher temperature to improve its crystal quality.

In a functional sense, the temperatures used can be described as follows: The InGaN is grown at a first temperature that is low enough to incorporate the desired (but not an excessive) amount of indium, while high enough to get high quality growth for the amount of indium desired.

Next, a GaN layer is grown at this same first temperature to thereby cover the InGaN without undesirably heating the InGaN above the first temperature.

Next, the GaN layer is extended by growth at a second temperature that is higher than the first temperature. The second temperature is selected to be high enough to encourage higher quality growth of the GaN, but low enough to avoid degrading the nearby (though nonadjacent) InGaN well.

Next, another portion of the gallium nitride layer of approximately 35 Å is grown at the 840° C. temperature, but without doping for the same reasons stated earlier; i.e., to protect the next InGaN layer from unintentional doping. After the appropriate number of quantum wells are included, the quantum well portion 31 is finished with one final well of indium gallium nitride layer of about 25 Å thickness, again grown at about 770° C., and one final relatively thin layer of undoped gallium nitride, also grown at 770° C. to a thickness of about 25 Å.

Following completion of the MQW 31, the undoped GaN layer 32 is grown to a layer of about 80 Å at a temperature of about 820° C. and forms the cap on the last well. In an alternative embodiment, the GaN layer 32 can be doped with magnesium or silicon.

As the next step, the undoped AlGaN layer 33 is grown. This layer prevents as many electrons as possible from reaching the p-AlGaN and p-GaN layers 34 and 35 adjacent to the contact 36 and thus preventing such electrons from creating any undesirable emissions or diode behavior. The undoped AlGaN layer 33 is grown to a thickness of about 30 Å at a temperature of about 890° C.

The p-AlGaN layer 34 is next grown to a thickness of about 85 Å at a temperature of about 890° C. and is preferably doped with magnesium. Finally, the p-type GaN contact layer 35 is formed to a thickness of about 1800 Å at a temperature of about 980° C., again representing a somewhat higher temperature to improve the growth and crystal quality while refraining from overheating the InGaN portions of the device. The p-GaN contact layer 35 is likewise doped with magnesium. The p-type layers 34 and 35 provide the hole injection required for operation of the device. Although the preferred embodiment incorporates p-AlGaN and p-GaN for layers 34 and 35 respectively, these layers can be formed of the other Group III nitrides provided that they are incorporated in a manner consistent with the structure and function of the overall device.

In another aspect, the invention is a light emitting device that incorporates the UV LED with an appropriate phosphor to produce a desired visible output. Materials that fluoresce or phosphoresce in response to UV radiation (regardless of source) are generally well known in the relevant arts. For example, common fluorescent lights operate on the same principle; i.e., a portion of the bulb or fixture generates a UV emission that in turn excites a phosphor that emits visible white light. Exemplary phosphors that produce white (or near-white) emission in response to UV radiation are generally well known and understood in this art, and can be selected and incorporated without undue experimentation. Furthermore, it will be understood that although white light is an exemplary goal, other colors can be produced in this manner using other relevant phosphors, and the invention is not limited to the production of white light.

Claims

1. A method of fabricating an LED, the method comprising:

growing a first GaN layer on a SiC substrate having the a same conductivity type as said substrate;
growing a superlattice on said first GaN layer comprising a plurality of repeating sets (“periods”) of alternating layers selected from the group consisting of GaN, InxGa1-xN, where 0<x<1, and AlxInyGa1-x-yN, where x+y<1;
growing a second GaN layer on said superlattice having the same conductivity type as said first GaN layer;
growing a Group III nitride multiple quantum well on said superlattice second GaN layer;
growing a third GaN layer on said multiple quantum well;
growing a contact structure on said third GaN layer having the opposite conductivity type from said SiC substrate and said first GaN layer;
forming an a first ohmic contact to said SiC substrate at a first end of the LED; and
forming an a second ohmic contact to said contact structure at a second end of the LED that is opposite the first end of the LED.

2. A method of fabricating an LED according to claim 1 wherein layers formed of Group III nitrides are grown using metal-organic chemical vapor deposition (MOCVD).

3. A method of fabricating an LED according to claim 1 comprising:

growing the first GaN layer on the surface of the buffer layer, but not on the Si3N4 portions, to a thickness of about 30,000 Angstroms at temperature of about 1,090° C. such that the lateral growth rate of the first GaN layer is greater than its vertical growth rate;
thereafter reducing the temperature to about 1,030° C. for a period of time as the GaN layer grows and thereafter to about 790° C. for a period of time; and
thereafter gradually reducing the temperature in the final phase of the growth of the GaN layer to about 770° C. in order to prepare for the growth of the InxGa1-xN multiple quantum well.

4. A method of fabricating an LED according to claim 1 wherein the step of fabricating the superlattice comprises:

growing alternating layers of InxGa1-xN that are about 15 Angstroms thick and GaN that are about 30 Angstroms thick; and
doping both of the alternating layers with silicon to produce an n-type conductivity.

5. A method of fabricating an LED according to claim 1 comprising growing undoped layers of InxGa1-xN and GaN.

6. A method of fabricating an LED according to claim 1 comprising forming between two and fifty periods of the alternating layers of the superlattice.

7. A method of fabricating an LED according to claim 1 comprising:

forming the second GaN layer with a first portion having a thickness of about 250 Angstroms at a temperature of about 820° C.; and
doping the second GaN layer with silicon.

8. A method of fabricating an LED according to claim 1 comprising:

forming the second GaN layer with a second, narrower portion at a temperature of about 820° C. and without doping to thereby separate the undoped InxGa1-xN layer in said multiple quantum well from the doped portion of the second GaN layer.

9. A method of fabricating an LED according to claim 1 comprising fabricating a plurality of GaN dots with AlxGa1-xN caps on said SiC substrate, where 0<x<1.

10. A method of fabricating an LED according to claim 1 comprising growing an AlxGa1-xN buffer layer on the SiC substrate to a thickness of about 3,000 Angstroms at a temperature of about 1,000° C. and thereafter growing the first GaN layer on the AlxGa1-xN buffer layer.

11. A method according to claim 1 wherein the step of fabricating the multiple quantum well comprises:

growing an undoped layer of InxGa1-xN to a thickness of about 25 Angstroms at a first temperature of about 770° C.;
growing an undoped layer of GaN on the undoped layer of InxGa1-xN to a thickness of about 25 Angstroms at a temperature of about 770° C.;
growing another layer of GaN at a temperature of about 820° C., and doping the layer with silicon to help improve the conductivity of the GaN;
growing another undoped layer of GaN at a temperature of about 770° C.;
extending the undoped GaN layer by growing it at a second temperature higher than about 770° C., the second temperature being high enough to promote higher quality growth of the GaN, but low enough to avoid degrading the nearby, non-adjacent InxGa1-xN well; and
growing a final portion of the undoped layer of GaN to a thickness of about 35 Angstroms at a temperature of about 840° C.

12. A method according to claim 1 wherein the step of fabricating the contact structure comprises:

growing a first undoped AlxGa1-xN layer at a temperature of about 890° C. to a thickness of about 30 Angstroms;
growing a magnesium doped layer of AlxGa1-xN with p-type conductivity at a temperature of about 890° C. to a thickness of about 85 Angstroms; and
growing a GaN contact layer doped with magnesium to have a p-type conductivity at a temperature of about 980° C. to a thickness of about 1800 Angstroms.

13. A method of fabricating an LED according to claim 9 wherein x is between about 0.05 and 0.15.

14. A method of fabricating an LED according to claim 9 wherein x is about 0.10.

15. A method of fabricating an LED according to claim 10 further comprising growing a discontinuous layer of Si3N4 on the buffer layer over a temperature range of 200-1000° C. for the purpose of encouraging epitaxial lateral overgrowth (ELO) of the first GaN layer.

16. A method of fabricating an LED according to claim 15 comprising growing the discontinuous layer of Si3N4 on the buffer layer at a temperature of about 700° C.

17. A method of fabricating an LED according to claim 11 comprising repeating the steps of fabricating the multiple quantum well at least three times in order to fabricate three quantum wells.

18. A method of fabricating an LED according to claim 11 comprising repeating the steps of fabricating the multiple quantum well at least five times in order to fabricate five quantum wells.

19. A method of fabricating an LED according to claim 11 comprising repeating the steps of fabricating the multiple quantum well at least seven times in order to fabricate seven quantum wells.

20. A method of fabricating an LED according to claim 11 wherein fabricating the multiple quantum well comprises growing a final well of InxGa1-xN at a temperature of about 770° C. to a thickness of about 25 Angstroms and growing a final layer of undoped GaN at a temperature of about 770° C. to a thickness of about 25 Angstroms.

21. A method of fabricating an LED according to claim 11 comprising growing the third GaN layer on the multiple quantum well at a temperature of about 820° to a thickness of about 80 Angstroms.

22. A method of fabricating an LED according to claim 21 comprising doping the third GaN layer with magnesium to produce p-type conductivity.

23. A method of fabricating an LED according to claim 21 comprising doping said third GaN layer with silicon to produce n-type conductivity.

24. A method of fabricating an LED according to claim 12 wherein the p-type layers of the contact structure are fabricated using materials selected from the group of AlxGa1-xN, InxGa1-xN and GaN, where 0<x<1, as substitutes for the doped layer of AlxGa1-xN and the doped layer of GaN.

25. A method of fabricating an LED, the method comprising:

growing a superlattice on a first GaN layer, with the superlattice comprising a plurality of repeating sets of alternating layers selected from the group consisting of GaN, InxGa1-xN, where 0<x<1, and AlxGa1-xN, where x+y<1;
growing a second GaN layer on the superlattice, with the second GaN layer having the same conductivity as the first GaN layer;
growing a Group III nitride multiple quantum well on the second GaN layer;
growing a third GaN layer on the multiple quantum well;
growing a contact structure on the third GaN layer having the opposite conductivity type from the first GaN layer; and
forming a first ohmic contact to the contact structure at a first end of the LED; and
forming a second ohmic contact at a second end of the LED that is opposite the first end of the LED.

26. A method of fabricating an LED according to claim 25 comprising growing layers formed of Group III nitrides using metal-organic chemical vapor deposition (MOCVD).

27. A method of fabricating an LED according to claim 25 comprising:

growing the first GaN layer to a thickness of about 30,000 Angstroms at temperature of about 1,090° C. such that the lateral growth rate of the first GaN layer is greater than its vertical growth rate;
thereafter reducing the temperature to about 1,030° C. for a period of time as the GaN layer grows and thereafter to about 790° C. for a period of time; and
thereafter gradually reducing the temperature in the final phase of the growth of the GaN layer to about 770° C. in order to prepare for the growth of the InxGa1-xN multiple quantum well.

28. A method of fabricating an LED according to claim 25 wherein the step of fabricating the superlattice comprises:

growing alternating layers of InxGa1-xN that are about 15 Angstroms thick and GaN that are about 30 Angstroms thick; and
doping both of the alternating layers with silicon to produce an n-type conductivity.

29. A method of fabricating an LED according to claim 25 comprising growing undoped layers of InxGa1-xN and GaN.

30. A method of fabricating an LED according to claim 25 comprising forming between two and fifty periods of the alternating layers of the superlattice.

31. A method of fabricating an LED according to claim 25 comprising:

forming the second GaN layer with a first portion having a thickness of about 250 Angstroms at a temperature of about 820° C.; and
doping the second GaN layer with silicon.

32. A method of fabricating an LED according to claim 25 comprising:

forming the second GaN layer with a second, narrower portion at a temperature of about 820° C. and without doping to thereby separate the undoped InxGa1-xN layer in said multiple quantum well from the doped portion of the second GaN layer.

33. A method according to claim 25 wherein the step of fabricating the multiple quantum well comprises:

growing an undoped layer of InxGa1-xN to a thickness of about 25 Angstroms at a first temperature of about 770° C.;
growing an undoped layer of GaN on the undoped layer of InxGa1-xN to a thickness of about 25 Angstroms at a temperature of about 770° C.;
growing another layer of GaN at a temperature of about 820° C. and doping the layer with silicon to help improve the conductivity of the GaN;
growing another undoped layer of GaN at a temperature of about 770° C.; extending the undoped GaN layer by growing it at a second temperature higher than about 770° C., the second temperature being high enough to promote higher quality growth of the GaN, but low enough to avoid degrading the nearby, non-adjacent InxGa1-xN well; and
growing a final portion of the undoped layer of GaN to a thickness of about 35 Angstroms at a temperature of about 840° C.

34. A method of fabricating an LED according to claim 33 comprising repeating the steps of fabricating the multiple quantum well at least three times in order to fabricate three quantum wells.

35. A method of fabricating an LED according to claim 33 comprising repeating the steps of fabricating the multiple quantum well at least five times in order to fabricate five quantum wells.

36. A method of fabricating an LED according to claim 33 comprising repeating the steps of fabricating the multiple quantum well at least seven times in order to fabricate seven quantum wells.

37. A method of fabricating an LED according to claim 33 wherein fabricating the multiple quantum well comprises growing a final well of InxGa1-xN at a temperature of about 770° C. to a thickness of about 25 Angstroms and growing a final layer of undoped GaN at a temperature of about 770° C. to a thickness of about 25 Angstroms.

38. A method of fabricating an LED according to claim 33 comprising growing the third GaN layer on the multiple quantum well at a temperature of about 820° to a thickness of about 80 Angstroms.

39. A method of fabricating an LED according to claim 38 comprising doping the third GaN layer with magnesium to produce p-type conductivity.

40. A method of fabricating an LED according to claim 38 comprising doping said third GaN layer with silicon to produce n-type conductivity.

41. A method according to claim 25 wherein the step of fabricating the contact structure comprises:

growing a first undoped AlxGa1-xN layer at a temperature of about 890° C. to a thickness of about 30 Angstroms;
growing a magnesium doped layer of AlxGa1-xN with v-type conductivity at a temperature of about 890° C. to a thickness of about 85 Angstroms; and
growing a GaN contact layer doped with magnesium to have a p-type conductivity at a temperature of about 980° C. to a thickness of about 1800 Angstroms.

42. A method of fabricating an LED according to claim 41 wherein the p-type layers of the contact structure are fabricated using materials selected from the group of AlxGa1-xN, InxGa1-xN and GaN, where 0<x<1, as substitutes for the doped layer of AlxGa1-xN and the doped layer of GaN.

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Patent History
Patent number: RE43725
Type: Grant
Filed: May 11, 2006
Date of Patent: Oct 9, 2012
Assignee: Cree, Inc. (Durham, NC)
Inventors: David Todd Emerson (Chapel Hill, NC), Amber Christine Abare (Cary, NC), Michael John Bergmann (Chapel Hill, NC)
Primary Examiner: Kevin M Picardat
Attorney: Myers Bigel Sibley & Sajovec
Application Number: 11/432,793