Abstract: A component can include a substrate having a first surface and a second surface remote therefrom, an opening extending in a direction between the first and second surfaces, and a conductive via extending within the opening. The substrate can have a CTE less than 10 ppm/° C. The conductive via can include a plurality of base particles each including a first region of a first metal substantially covered by a layer of a second metal different from the first metal. The base particles can be metallurgically joined together and the second metal layers of the particles can be at least partially diffused into the first regions. The conductive via can include voids interspersed between the joined base particles. The voids can occupy 10% or more of a volume of the conductive via.

Abstract: A method of manufacturing an electronic component includes forming a resin layer over an underlying layer, pressing a conductor plate including a pattern formed on one major surface thereof against the resin layer, and embedding the pattern in the resin layer, and performing polishing, Chemical Mechanical Polishing, or cutting by the use of a diamond bit on another major surface of the conductor plate until the resin layer appears, and leaving the pattern in the resin layer as a conductor pattern.

Abstract: A wiring board having a penetrating hole formed by forming holes with different shapes from both surfaces of a substrate. In such a penetrating hole, the depth of a first opening portion formed in the first-surface side of the substrate is shallower than the depth of a second opening portion formed in the second-surface side, and the diameter of a first opening is greater than the diameter of a second opening. Even if the gravity line of the first opening portion and the gravity line of the second opening portion are shifted from each other, the region of the second opening portion inserted into the inner space of the first opening portion may be made larger.

Abstract: A wiring substrate includes a first wiring layer, a first insulating layer, a second wiring layer, and a first wiring pattern. The second wiring layer includes a first metal foil that is thinner than the first wiring layer. A first via in the first insulating layer connects the first and second wiring layers. The first via is arranged to fill a first through hole and a first recess. The first through hole extends through the first insulating layer and has a first open end with a first opening diameter and a second open end with a smaller second opening diameter. The first recess is in communication with the first through hole. The first recess has a larger diameter than the second opening diameter. The first metal foil includes a first opening communicating with the first through hole and having a larger opening diameter larger than the first opening diameter.

Abstract: Embodiments of the present wiring substrate include a stacked body including one or more insulation layers and one or more conductive layers, wherein the wiring substrate has a plurality of connection terminals formed on the stacked body, each connection terminal has a top surface whose area is smaller than that of each of opposite side surfaces thereof, and a filling member provided in a filling manner between the connection terminals. The top surface of each connection terminal has an area larger than that of a portion of each side surfaces portion exposed from the filling member, and a bonding layer containing a solder is formed on the top surface.

Abstract: A wiring board is configured by stacking one or more conductor wiring layers and one or more insulating resin layers and comprising one or more metal vias configured to penetrate the insulating resin layer, wherein the boundary surface between the metal via and the insulating resin layer has a concavo-convex boundary cross-section structure in which the metal via and the insulating resin layer are engaged with each other.

Abstract: The present invention relates to a circuit board. The circuit board includes: a first path is routed on a first layer of the circuit board for transferring a first signal; a second path is routed on a second layer of the circuit board for transferring a second signal; a third path is routed on third layer of the circuit board; a first via is coupled to the first and third paths, and the first via is removed when the second signal is transferred by the second path; a second via is coupled to the second and third paths, and the second via is removed when the first signal is transferred by the first path.

Abstract: A printed circuit board includes: a substrate; a land that is disposed on a surface of the substrate, and includes a central portion and a plurality of extended portions, the central portion having the same shape and the same size as a land of a surface mount device, and the extended portions being up-and-down symmetry and right-and-left symmetry with respect to a straight line which passes through the center of the central portion; gaps that are disposed on the surface of the substrate, each of the gaps being disposed on a periphery of the central portion and between the extended portions; and a resist that is disposed on the surface of the substrate, and has an opening portion formed at a position corresponding to the central portion and the gaps.

Abstract: A laminated circuit board includes a first wiring board that has a first land formed on a surface thereof; a second wiring board that has a second land formed on a surface thereof; a bonding layer that is laid between the first wiring board and the second wiring board and electrically connects the first land and the second land via a conducting material; and a plate that has a through-hole through which the first land is connected to the second land, wherein a diameter of the through-hole of the plate is larger than a diameter of a component that is made by filling the conducting material.

Abstract: A wiring board and method of forming a wiring board including a first substrate, a second substrate having a smaller mounting area than a mounting area of the first substrate, and a base substrate laminated between the first substrate and the second substrate, such that the first substrate extends beyond an edge of the second substrate. An IVH (Interstitial Via Hole) or through hole penetrates the base substrate and vias are formed in at least one of the first substrate or the second substrate.

Abstract: An interconnection component includes a substrate, and an active through-substrate via (TSV) penetrating through the substrate. Active metal connections are formed over the substrate and electrically connected to the active TSV. At least one of a dummy pad and a dummy solder bump are formed at surfaces of the interconnection component. The dummy pad is over the substrate and electrically connected to the active TSV and the active metal connections. The dummy solder bump is under the substrate and electrically connected to the active metal connections. The dummy pad and the dummy solder bump are open ended.

Abstract: A flex-rigid wiring board including a flexible wiring board, a first insulation layer positioned to a side of the flexible board and having a first hole through the first layer, a second insulation layer over the first layer and an end portion of the flexible board and with a second hole through the second layer along the axis of the first hole, a third insulation layer over the first layer and the end portion of the flexible board on the opposite side of the second layer and with a third hole through the third layer along the axis of the first hole, a first structure having a filled conductor in the first hole, a second structure having a filled conductor in the second hole along the axis of the first structure, and a third structure having a filled conductor in the third hole along the axis of the first structure.

Abstract: A manufacturing method of a package carrier is provided. An insulation substrate having an upper surface, a lower surface, plural cavities located at the lower surface and plural through holes passing through the insulation substrate and respectively communicating with the cavities is provided. Plural vias is defined by the cavities and the through holes. A conductive material filling up the vias is formed to define plural conductive posts. An insulation layer having a top surface and plural blind vias extending from the top surface to the conductive posts is formed on the upper surface. A patterned circuit layer filling up the blind vias, being connected to the conductive posts and exposing a portion of the top surface is formed on the top surface. A solder mask layer is formed on the patterned circuit layer and has plural openings exposing a portion of the patterned circuit layer to define plural pads.

Abstract: A wiring board and a method of forming a wiring board including a first substrate, a second substrate having a smaller mounting area than a mounting area of the first substrate, and a base substrate laminated between the first substrate and the second substrate such that the first substrate extends beyond an edge of the second substrate. An IVH (Interstitial Via Hole) penetrates the base substrate.

Abstract: A package substrate includes a main body having an upper surface and a lower surface opposite to the upper surface, a plurality of external terminals attached to the lower surface, and a plurality of grooves formed in regions of the lower surface to which the plurality of external terminals is not attached. The semiconductor package includes a package substrate, a semiconductor chip mounted on the upper surface of the semiconductor substrate, and a board providing a region mounted with the package substrate and being mounted with a plurality of mounting elements which are vertically aligned with the plurality of grooves and are inserted into the plurality of grooves.

Abstract: One aspect of the present invention is a method of processing a substrate. In one embodiment, the method comprises forming an electrical conductor on or in the substrate by providing a mixture comprising metal particles and an electroless deposition solution and electrolessly depositing a metal matrix and co-depositing the metal particles. In another embodiment, the method comprises forming an electrical conductor on or in the substrate by providing a mixture comprising metal particles and an electrochemical plating solution and electrochemically plating a metal matrix and co-depositing the metal particles. Another aspect of the present invention is a mixture for the formation of an electrical conductor on or in a substrate. Another aspect of the present invention is an electronic device.

Abstract: Glass interposer panels and methods for forming the same are described herein. The interposer panels include a glass substrate core formed from an ion-exchangeable glass. A first layer of compressive stress may extend from a first surface of the glass substrate into the thickness T of the glass substrate core to a first depth of layer D1. A second layer of compressive stress may be spaced apart from the first layer of compressive stress and extending from a second surface of the glass substrate core into the thickness T of the glass substrate core to a second depth of layer D2. A plurality of through-vias may extend through the thickness T of the glass substrate core. Each through-via is surrounded by an intermediate zone of compressive stress that extends from the first layer of compressive stress to the second layer of compressive stress adjacent to a sidewall of each through-via.

Abstract: A method for producing an arrangement of optoelectronic components (10) is specified, comprising the following steps: producing at least two fixing regions (2) on a first connection carrier (1); introducing solder material (3) into the fixing regions (2); applying a second connection carrier (4) to the fixing regions (2); and soldering the second connection carrier (4) onto the first connection carrier (1) with the solder material (3) in the fixing regions (2).

Abstract: A multilayer printed wiring board including a first interlayer resin insulation layer, a first conductive circuit formed on the first interlayer resin insulation layer, a second interlayer resin insulation layer formed on the first interlayer resin insulation layer and the first conductive circuit and having an opening portion exposing a portion of the first conductive circuit, a second conductive circuit formed on the second interlayer resin insulation layer, a via conductor formed in the opening portion of the second interlayer resin insulation layer and connecting the first conductive circuit and the second conductive circuit, and a coating layer having a metal layer and a coating film and formed between the first conductive circuit and the second interlayer resin insulation layer. The metal layer is formed on the surface of the first conductive circuit and the coating film is formed on the metal layer.

Abstract: A FPCB includes a signal layer, a ground layer, and a dielectric layer lying between the signal layer and the ground layer. At least one high speed signal transmission line is formed on the signal layer. The ground layer has a copper-removed area corresponding to the transmission line. Two ground lines are symmetrically disposed at two opposite sides of the signal transmission line and substantially parallel to the signal transmission line, each ground line and the signal transmission line is spaced at a first predetermined distance. Each ground line and the signal transmission line are spaced at a first predetermined distance.

Abstract: A printed wiring board including a wiring substrate provided with at least one conductor circuit, a solder resist layer provided on the surface of the wiring substrate, at least one conductor pad formed from a part of the conductor circuit exposed from an opening provided in the solder resist layer, and at least one solder bump for mounting electronic parts on the conductor pad. In the printed wiring board, since the at least one conductor pad is aligned at a pitch of about 200 ?m or less, and a ratio (W/D) of a diameter W of the solder bump to an opening diameter D of the opening formed in the solder resist layer is about 1.05 to about 1.7, connection reliability and insulation reliability can be easily improved.

Abstract: A wiring substrate includes: a substrate having a first surface and a second surface; a first insulating layer stacked on the first surface; a pad electrode stacked on the first insulating layer; a through electrode connected to the pad electrode; and a second insulating layer disposed between the substrate and the through electrode and between the first insulating layer and the through electrode, wherein a diameter of the through electrode in a connection section between the pad electrode and the through electrode is smaller than a diameter of the through electrode on the second surface side, the first insulating layer, the second insulating layer and the through electrode overlap with each other in a peripheral area of the connection section, when seen from a plan view, and the thickness of the first insulating layer in the area is thinner than the thickness of the first insulating layer in other areas.

Abstract: A circuit board includes an outer conductive layer, a number of inner conductive layers, at least one group of vias defined through the outer conductive layer and the inner conductive layers and electrically connected each conductive layers, at least one power supply element, and at least one electronic element. The at least one group of vias surrounds the at least one power supply element. When the least one power supply element outputs current to the at least one electronic element, a first portion of the output current flows to the inner conductive layers through the group of vias surrounding the at least one power supply element to be input to the at least one electronic element, and a second portion of the output current flows into the at least one electronic element through the outer conductive layer.

Abstract: The multilayer wiring substrate includes: a first insulating layer comprising a first surface and a second surface opposite to the first surface; a second insulating layer on the first surface of the first insulating layer; a first wiring pattern on the second surface of the first insulating layer; a second wiring pattern on a surface of the second insulating layer; a first via formed through the first insulating layer; a second via formed through the second insulating layer; and a third wiring pattern formed on the first surface of the first insulating layer and embedded in the second insulating layer, the third wiring pattern having a hole therethrough. A diameter of the hole is smaller than each diameter of the first and second vias. The first via and the second via are connected to each other through a metal filled in the hole of the third wiring pattern.

Abstract: The present invention provides a conductive paste comprising flake conductive fillers having a 99% cumulative particle size of 25 ?m or less and a binder resin as essential components. The flake conductive fillers are metal particles having a silver-copper alloy surface layer. The conductive paste according to the present invention is fused with a part of a copper foil circuit to which the conductive paste is to be connected during connection by heating and pressurization, and has high electrical conductivity and high fill ration in a via hole. Thus, the conductive paste according to the present invention provides a multilayer printed wiring board that has high reliability of connection and excellent interlayer connection.

Abstract: A method for repairing a disconnection in a wiring board includes positioning a substrate including an insulation layer and a conductive layer formed on the insulation layer, the conductive layer having a wiring line disconnected such that the wiring line has a disconnected portion formed between conductive patterns forming the wiring line, applying in the disconnected portion between the conductive patterns a conductive paste including a non-conductive material and conductive particles such that the conductive paste fills the disconnected portion between the conductive patterns and joins the conductive patterns forming the wiring line in the conductive layer, and irradiating laser upon the conductive paste applied in the disconnected portion such that at least a portion of the conductive paste in the disconnected portion is sintered and forms a sintered portion connecting the conductive patterns of the wiring line in the conductive layer.

Abstract: A multilayer wiring substrate includes a center wiring layer arranged in a center of the substrate in a thickness direction, and wiring layers stacked on one side of the center wiring layer and the other side of the center wiring layer via an insulating layer. The wiring layers on one side of the center wiring layer and the wiring layers on the other side are provided in a same layer number. The insulating layers on one side of the center wiring layer and the insulating layers on the other side are provided in a same layer number.

Abstract: A printed wiring board including an insulation layer, a conductive circuit on the insulation layer, an outermost interlayer resin insulation layer formed on the insulation layer and the conductive circuit and having a via-conductor opening connected to the conductive circuit, a land structure including a first land formed on the outermost interlayer resin insulation layer around the via-conductor opening and a second land formed on the outermost interlayer resin insulation layer around the first land, and a via conductor formed in the via-conductor opening through the outermost interlayer resin insulation layer such that the first land of the land structure on the outermost interlayer resin insulation layer is connected to the conductive circuit on the insulation layer. The land structure has a space between the first land and second land of the land structure, and the first land of the land structure is directly connected to the via conductor.

Abstract: A wiring board (package) has a structure in which multiple wiring layers are stacked one on top of another with insulating layers each interposed between corresponding two of the wiring layers, and the wiring layers are connected to one another through vias formed in each of the insulating layers. In a peripheral region of the package, reinforcing patterns are provided on the same surfaces where the corresponding wiring layers are provided, respectively. Each of the reinforcing patterns is formed of a conductive layer formed on the same surface where the corresponding one of the wiring layers is provided, and is provided in an intermittent ring-like shape when viewed in a planar view.

Abstract: A spar includes a conductive layer laminated and formed on a carbon-fiber prepreg, and a jumper formed of a conductor which penetrates through the conductive layer and the carbon-fiber prepreg.

Abstract: A multilayer electronic support structure comprising at least one pair of adjacent feature layers extending in an X-Y plane that are separated by a via layer; said via layer comprising a dielectric material that is sandwiched between the two adjacent feature layers and at least one one non-cylindrical via post that couples said pair of adjacent feature layers through the dielectric material in a Z direction perpendicular to the X-Y plane; wherein said at least one non-cylindrical via post is characterized by having a long dimension in the X-Y plane that is at least 3 times as long as a short dimension in the X-Y plane.

Abstract: An electromagnetic bandgap structure including: at least three conductive plates; a first stitching via, configured to electrically connect any one of the conductive plates to another conductive plate; and a second stitching via, configured to electrically connect the one conductive plate to yet another conductive plate, wherein the first stitching via electrically connects the one conductive plate to another conductive plate by allowing a part of the first stitching via to be connected through a planar surface above or below the one conductive plate, and the second stitching via electrically connects the one conductive plate to yet another conductive plate by allowing a part of the second stitching via to be connected through a planar surface that is different from the planar surface through which the part of the first stitching via is connected, the two planar surfaces being placed in a same direction based on the conductive plates.

Abstract: A manufacturing method of an interposed substrate is provided. A photoresist layer is formed on a metal carrier. The photoresist layer has plural of openings exposing a portion of the metal carrier. Plural of metal passivation pads and plural of conductive pillars are formed in the openings. The metal passivation pads cover a portion of the metal carrier exposed by openings. The conductive pillars are respectively stacked on the metal passivation pads. The photoresist layer is removed to expose another portion of the metal carrier. An insulating material layer is formed on the metal carrier. The insulating material layer covers the another portion of the metal carrier and encapsulates the conductive pillars and the metal passivation pads. An upper surface of the insulating material layer and a top surface of each conductive pillar are coplanar. The metal carrier is removed to expose a lower surface of the insulating material layer.

Abstract: A method for manufacturing a printed wiring board includes forming a metal film on a surface of an insulative board, a plating resist on the metal film, and a plated-metal film on the metal film exposed from the plating resist, covering a portion of the plated-metal film with an etching resist, etching to reduce thickness of the plated-metal film exposed from the etching resist, removing the etching and plating resists, and forming a wiring having a pad for wire-bonding an electrode of an electronic component and a conductive circuit thinner than the pad by removing the metal film exposed after the plating resist is removed, a solder-resist layer on the surface of the board and wiring, an opening in the layer exposing the pad and a portion of the circuit contiguous to the pad, and a metal coating on the pad and portion of the circuit exposed through the opening.

Abstract: A wiring board includes a substrate having a first penetrating hole penetrating through the substrate, a first through-hole conductor formed on the inner wall of the first penetrating hole, a filler filled inside the first conductor and forming a second penetrating hole, and a second through-hole conductor formed in the second penetrating hole, a first conductive circuit formed on a first surface of the substrate; a second conductive circuit formed on a second surface of the substrate; a first conductive portion formed on one end of the second penetrating hole, and a second conductive portion formed on the opposite end of the second penetrating hole. The first conductor is connecting the first and second circuits. The second conductor is connecting the first and second conductive portions. The first circuit has the thickness which is set greater than the thickness of the first conductive portion.

Abstract: A circuit board includes a pair of differential signal lines and a pair of test point pads, one test point pad coupled to one of the signal lines and another of the test point pads coupled to another of the signal lines. The two test point pads are staggered relative to each other and the two signal lines. The circuit board includes a plurality of conductive layers and a plurality of insulating layers. The conductive layers can be etched into conductive patterns, or traces, for connecting the electronic components, which are soldered to the circuit board. The conductive layers may be selectively connected together by vias. One or more of the conductive layers may be a metal plane for providing a ground plane and/or a power plane. To minimize or eliminate the capacitance generated between the test point pad and an underlying ground plane and/or power plane, portions of the ground plane and/or the portion of the power plane directly aligned with each test point pad are removed.

Abstract: A laminated circuit board includes a first wiring board that has a first land formed on a surface thereof; a second wiring board that has a second land formed on a surface thereof; a bonding layer that is made of a bonding resin, being laid between the first wiring board and the second wiring board, wherein the bonding layer electrically connects the first land and the second land via a conducting material; and a plate that has a through-hole into which the conducting material is supplied, wherein the plate has a resin accommodating space that accommodates therein an excess bonding resin that appears during layer stacking.

Abstract: There is provided a space transformer for a probe card, including: a substrate having a first surface and a second; a plurality of first pads formed on the first surface to be spaced apart from each other and connected to a printed circuit board of a probe card; a plurality of second pads formed on the second surface in positions corresponding to those of the first pads and receiving external electrical signals applied thereto; a plurality of via electrodes penetrating through the substrate and respectively connected to the plurality of first pads and the plurality of second pads formed in the positions corresponding to each other; a ground layer formed to cover the second surface and provided with a plurality of second pad exposure holes; and an insulating layer formed to cover the ground layer and the plurality of second pads.

Abstract: A device and method of heat sinking a surface mount device (SMD) component. In an example method through holes are formed in a printed circuit board (PCB), a first copper layer is electroless plated in the holes, a second copper layer is standard plated in the holes and surrounding surfaces of the PCB, a third copper layer is masked and pulse plated in the holes, the holes are filled with non-conductive material and then is sanded flush with the second copper layer. A fourth copper layer electroless plated on the PCB over the area of the holes, a fifth copper layer (or pad) plated on the PCB over the area of the holes, and a surface mount device is attached to the fifth copper layer.

Abstract: Abase substrate includes an insulator board comprising through holes penetrating between two opposed principal surfaces, penetrating electrodes provided within the through holes, and intermediate layers sandwiched between inner surfaces of the through holes and the penetrating electrodes and having surfaces with smaller concavities and convexities than those of the inner surfaces at the penetrating electrode sides.

Abstract: There is provided a circuit board including a substrate having a hole. Inside the hole, a metal wiring is formed. The wiring is made of a solder alloy having a melting point of 100 to 600° C., and the metal wiring includes a polycrystalline region of the solder alloy. The metal wiring of the present invention is superior in conductivity.

Abstract: A wiring board includes a plurality of wirings laid via an insulating resin layer, and a via-hole conductor provided for electrically connecting the wirings. The via-hole conductor includes metal and resin portions. The metal portion includes a region made of copper particles, a first metal region mainly composed of tin, a tin-copper alloy, or a tin-copper intermetallic compound, and a second metal region mainly composed of bismuth, and has Cu/Sn of from 1.59 to 21.43. The copper particles are in contact with one another, thereby electrically connecting the wirings, and at least part of the first metal region covers around and extends over the portions where the copper particles are in plane contact with one another.

Abstract: A printed wiring board including a substrate having first and second surfaces and a penetrating hole extending through the substrate between the surfaces, a first conductive circuit on the first surface, a second conductive circuit on the second surface, and a through-hole conductor in the hole and connecting the first and second conductive circuits. The conductor includes an electroless plated film on the inner-wall surface of the hole, a first electrolytic plated film formed on the electroless plated film and forming a first opening portion opening on the first surface and a second opening portion opening on the second surface, a second electrolytic plated film filling the first portion, and a third electrolytic plated film filling the second portion. The first and second portions taper toward the central portion of the hole with respect to the axis direction of the hole and have cross sections forming a substantially U-shape, respectively.

Abstract: An electrical feedthrough includes a ceramic body and a ribbon via extending through the ceramic body, an interface between the ribbon via and the ceramic body being sealed using partial transient liquid phase bonding. The ribbon via extends out of the ceramic body and makes an electrical connection with an external device.

Abstract: A wiring board has a first rigid wiring board having a first wiring layer on a first main surface, a second rigid wiring board having a second wiring layer on a second main surface, a first connection portion connecting the first wiring layer and the second wiring layer, and a first interlayer insulation layer formed on the first wiring layer, the second wiring layer and the first connection portion. In such a wiring board, the first rigid wiring board and the second rigid wiring board are positioned in such a way that the first main surface and the second main surface are set at substantially the same level, and the first wiring layer and the second wiring layer are electrically connected by the first connection portion.

Abstract: A circuit board includes layers, a pair of vias filled with a conductive material and extending through the layers, first and second pairs of conductive signal paths, and holes extending at least partially through the layers and located between the pair of vias. The first pair of conductive paths is connected to the pair of vias within a first layer; the second pair of conductive paths is connected to the pair of vias within a second layer. The pair of vias has a pair of via stubs defined between the second layer and a bottom layer. A differential signal is to be transmitted between the first and second pairs of conductive signal paths via the pair of vias. The holes have a lower dielectric constant than the layers to increase a resonant frequency of the pair of via stubs beyond the frequency of the differential signal.

Abstract: A wiring board includes a substrate having first and second surfaces, a first penetrating hole penetrating through the substrate, a first through-hole conductor formed on the inner wall of the first hole, a filler filled inside the first conductor and forming a second penetrating hole, and a second through-hole conductor formed in the second hole, a first conductive circuit on the first surface of the substrate, a second conductive circuit on the second surface of the substrate, a first conductive portion on one end of the second hole, and a second conductive portion on the opposite end of the second penetrating hole. The first conductor is connecting the first circuit and the second circuit. The second conductor is made of a conductive material filled in the second hole and is connecting the first conductive portion and the second conductive portion.

Abstract: A multilayer wiring board is capable of preventing the occurrence of cracking in the vicinity of a connection portion of a conductor pattern disposed inside a basic material layer and a via-hole conductor even when the conductor pattern is connected to the via-hole conductor. A multilayer wiring board includes basic material layers and the constraining layers that are alternately stacked. In the material layer, a via-hole conductor is connected to an intermediate conductor pattern. An extended portion is defined by extending an end of the via-hole conductor beyond the intermediate conductor pattern inside the basic material layer.

Abstract: A flex circuit package includes a package body enclosing an electronic component and a first surface of the substrate. Columns are physically and electrically connected to first traces of the substrate, the columns extending through the package body. A flexible circuit connector has first terminals connected to the columns. The flexible circuit connector further includes second terminals that provide an electrical interconnection structure for electrical connection to a second electronic component structure. By connecting the flexible circuit connector to the columns extending through the package body, special routing of traces of the substrate of the flex circuit package to provide an interface for the flexible circuit connector is avoided.

Abstract: A method for fabricating an interconnect function array includes forming a first plurality of conductive lines on a substrate, forming an insulator layer over the first plurality of conductive lines and the substrate, removing portions of the insulator layer to define cavities in the insulator layer that expose portions of the substrate and the first plurality of conductive lines, wherein the removal of the portions of the insulator layer results in a substantially random arrangement of cavities exposing portions of the substrate and the first plurality of conductive lines, depositing a conductive material in the cavities, and forming a second plurality of conductive lines on portions of the conductive material in the cavities and the insulator layer.