Abstract: Chip-scale packages and assemblies thereof are disclosed. The chip-scale package includes a core member of a metal or alloy having a recess for at least partially receiving a die therein and includes at least one flange member partially folded over another portion of the core member. Conductive traces extend from one side of the package over the at least one flange member to an opposing side of the package. Systems including the chip-scale packages and assemblies are also disclosed.

Abstract: A multilayer printed wiring board including a layered capacitor section provided on a first interlayer resin insulation layer and a high dielectric layer and first and second layered electrodes that sandwich the high dielectric layer. A second interlayer resin insulation layer is provided on the first insulation layer and the capacitor section, and a metal thin-film layer is provided over the capacitor section and on the second insulation layer. An outermost interlayer resin insulation layer is provided on the second insulation layer and the metal thin-film layer. A mounting section is provided on the outermost insulation layer and has first and second external terminals to mount a semiconductor element. Multiple via conductors penetrate each insulation layer. The via conductors include first via conductors that electrically connect the first layered electrode to the first external terminals. Second via conductors electrically connect the second layered electrode to the second external terminals.

Abstract: A method for manufacturing a wiring substrate includes forming a conductor circuit on an insulating layer, the conductor circuit including a pad, a circuit pattern connected to the pad, and a lead pattern connected to the pad. A solder resist layer is formed on the circuit pattern and on the insulating layer, and a plating resist layer is formed on the lead pattern and on the insulating layer and forming a metal film on a first portion of the conductor circuit not covered by the solder resist layer and not covered by the plating resist layer. The plating resist layer is removed to expose a second portion of the conductor circuit adjacent to the first portion of the conductor circuit and not covered with the metal film, and an etching resist layer is formed on the metal film and on the second portion of the conductor circuit. A third portion of the conductor circuit not covered by the etching resist layer is removed by etching, and the etching resist is removed.

Abstract: A printed wiring board including a substrate that includes wiring through-hole portions where wiring through-holes which each penetrate the substrate from a surface on a front side of the substrate to a surface on a back side of the substrate, the wiring through-hole portions being made using a dielectric material having a thermal expansion coefficient different from a thermal expansion coefficient of the substrate; and thermal-expansion adjusting portions produced by filling prepared-holes with the dielectric material, the prepared-holes being produced at a surface of the substrate. The surface is partitioned into predetermined blocks, in each of which the thermal-expansion adjusting portions are placed in a layout that minimizes a difference between a thermal expansion coefficient in the block in a length direction and a thermal expansion coefficient in the block in a width direction according to a placement of the wiring through-hole portions in the block.

Abstract: A printed circuit board (‘PCB’) with a capacitor integrated within a via of the PCB, the PCB including layers of laminate; a via that includes a via hole traversing layers of the PCB, the via hole characterized by a generally tubular inner surface; a capacitor integrated within the via, the capacitor including two capacitor plates, an inner plate and an outer plate, the two plates composed of electrically conductive material disposed upon the inner surface of the via hole, both plates traversing layers of the laminate, the inner plate traversing more layers of the laminate than are traversed by the outer plate; and a layer of dielectric material disposed between the two plates.

Abstract: A back drill verification feature is provided on a layer of a circuit board. Before a back drill operation is performed, an electrical connection exists between conductive material in a via hole and the back drill verification feature. After the back drill operation, the electrical connection is severed.

Abstract: The invention provides a printed circuit board capable of mounting BGA or other IC package of narrow terminal interval by using through-holes of conventional size. On one principal surface of printed circuit board (1), soldering lands (2a), (2b), (2c), and (2d) for connecting solder balls are disposed in lattice. Central point (B) of through-hole (3) is set eccentric to the side of soldering land (2a) at the same potential as through-hole (3), remote from intersection (A) formed by diagonal line (200ab) linking soldering lands (2a) and (2b) and diagonal line (200cd) linking soldering lands (2c) and (2d).

Abstract: A multilayer wiring board capable of feeding sufficient electric power to a circuit element, such as an IC chip. In one embodiment of the present invention, a multilayer wiring board is comprised of: a core board; a build up layer disposed on an upper surface of the core board; a build up layer disposed on a lower surface of the core board; and a power supply structure embedded in a through hole penetrating the core board and the build up layers. The power supply structure is comprised of: a conductive metal rod made of copper as a main material; a conductive metal tube made of copper as a main material and provided coaxially with the conductive metal rod; and an insulating material filling a gap between the conductive metal rod and the conductive metal tube.

Abstract: A printed circuit board includes a reference layer, at least one first hole defined in the reference layer and adjacent from a first pin in a first column of pins of an electronic component, and at least one second hole defined in the reference layer and adjacent from a second pin of the electronic component. The at least one second hole is defined in the reference layer and opposite to the at least one first hole. The second pin is in a neighboring second column of pins from the first column of pins. A diameter of the at least one first hole is greater than a diameter of the at least one second hole such that a difference in current flowing through the first pin and the second pin is reduced.

Abstract: A laminated circuit board includes a first wiring board that has a first land formed on a surface thereof; a second wiring board that has a second land formed on a surface thereof; a bonding layer that is made of a bonding resin, being laid between the first wiring board and the second wiring board, wherein the bonding layer electrically connects the first land and the second land via a conducting material; anda plate that has a through-hole into which the conducting material is supplied, wherein the plate has a resin accommodating space that accommodates therein an excess bonding resin that appears during layer stacking.

Abstract: A laminated circuit board includes a first wiring board that has a first land formed on a surface thereof; a second wiring board that has a second land formed on a surface thereof; a bonding layer that is laid between the first wiring board and the second wiring board and electrically connects the first land and the second land via a conducting material; and a plate that has a through-hole through which the first land is connected to the second land, wherein a diameter of the through-hole of the plate is larger than a diameter of a component that is made by filling the conducting material.

Abstract: A method of manufacturing a printed circuit board is disclosed. The method may include: sequentially stacking an acid-resistant first cover layer and an alkali-resistant second cover layer over a copper foil, for a copper clad laminate that includes the copper foil stacked over one side of an insulation layer; forming an intaglio groove by removing portions of the second cover layer, the first cover layer, and the copper clad laminate; stacking a seed layer over the intaglio groove and the second cover layer; removing a portion of the seed layer stacked over the second cover layer, by stripping the second cover layer; forming a plating layer, by plating an inside of the intaglio groove; stripping the first cover layer; and removing the copper foil exposed by the stripping of the first cover layer.

Abstract: An apparatus includes a substrate which includes an electronic component mounted on the substrate, the electronic component for processing a pair of signals, the substrate including a first wire for transmitting one of the signals, the first wire being formed on a first layer of the substrate, and a second wire for transmitting another one of the signals, the second wire being formed on a second layer of the substrate in a first region under the electronic component and being formed on a third layer in a second region of an other part of the first region.

Abstract: A flex-rigid wiring board includes a flexible board including a flexible substrate and a conductor pattern formed over the flexible substrate, a non-flexible substrate disposed adjacent to the flexible board, an insulating layer covering the flexible board and the non-flexible substrate and exposing one or more portions of the flexible board, a conductor pattern formed on the insulating layer, and a plating layer connecting the conductor pattern of the flexible board and the conductor pattern on the insulating layer.

Abstract: A wiring board includes a plurality of wirings laid via an insulating resin layer, and a via-hole conductor provided for electrically connecting the wirings. The via-hole conductor includes metal and resin portions. The metal portion includes a region made of copper particles, a first metal region mainly composed of tin, a tin-copper alloy, or a tin-copper intermetallic compound, and a second metal region mainly composed of bismuth, and has Cu/Sn of from 1.59 to 21.43. The copper particles are in contact with one another, thereby electrically connecting the wirings, and at least part of the first metal region covers around and extends over the portions where the copper particles are in plane contact with one another.

Abstract: In a laminated high-frequency module, a laminate includes a plurality of dielectric layers. In a lower layer region including some of the plurality of dielectric layers, a digital circuit is provided. In an interlayer region including some of the plurality of dielectric layers, a digital circuit and an analog circuit are arranged so that they do not overlap in plan view of the laminate. In an upper layer region including some of the plurality of dielectric layers, a digital circuit is provided. Digital ICs are mounted on the surface of the uppermost dielectric layer in the upper layer region. An inner-layer ground electrode is provided on substantially an entire boundary surface between the lower layer region and the interlayer region and on substantially an entire boundary surface between the interlayer region and the upper layer region. In the interlayer region, a digital line and an inner-layer ground electrode are alternately arranged in the lamination direction.

Abstract: A method of manufacturing a heat radiation substrate having a metal core, including injection-molding mixed powder of carbon nanotubes and metal in a die to fabricate a metal core having through holes; molding the entire metal core including the through holes with an insulating resin to fabricate a metal core substrate; processing the insulating resin provided in the through holes to form connection holes; and forming a circuit pattern on the metal core substrate in which the connection holes are formed.

Abstract: The invention provides a high density package substrate and a method for fabricating the same. A double-sided copper clad laminate containing an upper copper foil and a lower copper foil is provided. A bottom pad is disposed on the lower copper foil, aligned to a predetermined position of a through hole. The through hole is formed by laser drilling through the upper copper foil and the substrate, but not through the bottom pad. A seed layer is formed conformally lining the through hole, and a metal layer is formed on the seed layer by plating to form a plated through hole (PTH).

Abstract: A circuit board and a method for fabricating the same are provided. The circuit board includes a core board, a first bonding layer disposed on the core board, and a first wiring layer disposed on the first bonding layer. The first bonding layer enables the first wiring layer to be bonded to the core layer better, thereby preventing delamination and forming a fine-pitch wiring layer.

Abstract: A manufacturing method of a circuit board is provided. A metal core is provided. A conductive layer is formed on each of some carriers. The carriers and dielectric layers are laminated at both sides of the metal core to form a stacked structure. Each of the dielectric layers is located between the corresponding carrier and the metal core, and a portion of the conductive layer is embedded in the corresponding dielectric layer. Then, the carriers are removed. A blind via and/or a through via are/is formed in the stacked structure to connect the corresponding conductive layer and the metal core and/or connect the conductive layers at both sides of the metal core, wherein the through via penetrates the metal core. The conductive layer on a surface of the dielectric layer is removed.

Abstract: There is provided a multilayer ceramic substrate including a conductive via of a dual-layer structure capable of preventing loss in electrical conductivity and signal. The multilayer ceramic substrate includes: a plurality of dielectric layers; and a circuit pattern part formed on at least a portion of the dielectric layers, the circuit pattern part including at least one conductive via and conductive pattern, wherein the at least one conductive via comprises an outer peripheral portion and an inner peripheral portion, the outer peripheral portion formed along an inner wall of a via hole extending through the dielectric layers and formed of a first conductive material containing a metal, and the inner peripheral portion filled in the outer peripheral portion and formed of a second conductive material having a shrinkage initiation temperature higher than a shrinkage initiation temperature of the first conductive material.

Abstract: An IC package includes: a multi-layered PCB having a plurality of insulating layers and a plurality of conductive pattern layers stacked in sequence and a plurality of via-holes formed through the plurality of the insulating layers for an electrical connection between the layers; and an IC chip disposed in a core insulating layer of the plurality of the insulating layers to be embedded in the multi-layered PCB and including a plurality of input/output pads on their surface. The input/output pads disposed at an outermost area of the IC chip are coupled to outer terminals by connection members without passing through said via-hole, the remaining input/output pads except for the input/output pads disposed at the outermost area of the IC chip are coupled to the outer terminals through the via-hole.

Abstract: A metal core circuit board assembly includes a circuit board having a through hole in an embodiment. A shaft for a pin is inserted in the through hole such that cap of the pin abuts a foil layer on the circuit board. The shaft diameter is sufficiently smaller than the through hole diameter such that the shaft is electrically isolated from a metal core for the circuit board. The cap is undercut about the through hole to further isolate the pin from the non-electrically isolated portion of the metal core circuit board.

Abstract: The method uses a common optical, system and sequentially creates structures of different sizes in a polymer substrate by means of different laser processes is described. One process uses a laser beam that is tightly focussed on the substrate surface and is used for creating fine groove structures by semi-continuous direct write type beam movement. The second process uses a second laser beam that is used to form a larger size image on the substrate surface and is used to create blind pads and contact holes in the substrate in step and drill mode. A third optional process uses the second laser beam operating in direct writing mode to remove layers of the substrate over larger continuous areas or in a mesh type pattern.

Abstract: Disclosed is a printed circuit board having a buried solder bump, in which a circuit pattern and a solder bump formed on the circuit pattern are buried in an insulating layer, thus improving the degree of matching between the solder bump and the circuit pattern and obviating a need for an additional coining process of the solder bump. A manufacturing method thereof is also provided.

Abstract: A wiring substrate unit is provided. The unit includes: first and second wiring substrates, first and second input portions respectively formed in marginal portions of the first and second wiring substrates, and first and second output contact points respectively formed on one surfaces of the first and second wiring substrates. A through hole is formed in the first wiring substrate to correspond to the second output contact point; a cutout is formed either at a position adjacent to the first input portion of the marginal portion of the first wiring substrate or at a position adjacent to the second input portion of the marginal portion of the second wiring substrate; and one of the first and second input portions is exposed from the cutout.

Abstract: A wiring board includes a core substrate, a first laminated structure formed on a surface of the substrate and including conductive and insulation layers, and a second laminated structure formed on the opposite surface of the substrate and including conductive and insulation layers. The substrate has a connection conductor made of a plating. The insulation layers of the first laminated structure have connection conductors stacked one over another and made of platings. The insulation layers of the second laminated structure have connection conductors stacked one over another and made of platings. The connection conductors of the laminated structures are stacked on the connection conductor of the substrate. The connection conductors of the laminated structures include outer-layer connection conductors which have positions shifted in a substantially same direction from the position of the connection conductor of the substrate.

Abstract: A printed wiring board includes a core substrate having a penetrating hole, a first circuit on a first surface of the substrate, a second circuit on a second surface of the substrate, and a through-hole conductor in the hole connecting the first and second circuits. The hole has first and second opening portions. The first opening portion becomes thinner toward the second surface. The second opening portion becomes thinner toward the first surface. The first opening portion has first and second portions. The second opening portion has first and second portions. The first and second portions of the first opening portion form inner walls bending inward at the boundary between the first and second portions. The first and second portions of the second opening portion form inner walls bending inward at the boundary between the first and second portions.

Abstract: A method for manufacturing a multilayer printed wiring board, the method includes forming a group of first through holes in a first insulating substrate; forming a group of second through holes in a second insulating substrate that has the same shape and the same size as a shape and a size, respectively, of the first insulating substrate, the second through holes having the same shape and the same size as a shape and a size, respectively, of the first through holes and being formed at the same positions as positions at which the first through holes are formed. At least one of the first through holes is filled with a first conductive member and at least one of the second through holes is filled with a second conductive member. And stacking the first insulating substrate and the second insulating substrate together.

Abstract: In an electrode portion structure in which an electrode is formed in an end portion of a through-wiring, disconnection is prevented in an electrode portion. A through-hole that vertically pierces a substrate is made in the substrate, and a through-electrode is provided in the through-hole. The through-electrode is projected in s curved-surface manner from an upper surface of the substrate. The upper surface of the substrate 12 is coated with an insulating film, and a contact hole is made in the insulating film while aligned with the through-electrode. An opening diameter of the contact hole is lower than a sectional diameter of the through-electrode, and surroundings of an upper surface of the through-electrode are coated with the contact hole. A thickness Ddiel of the insulating film is equal to or lower than a projection length Dp of the through-electrode from the upper surface of the substrate at an opening edge of the contact hole.

Abstract: A printed wiring board comprises a wiring substrate provided with at least one conductor circuit, a solder resist layer provided on the surface of the wiring substrate, at least one conductor pad formed from a part of the conductor circuit exposed from an opening provided in the solder resist layer, and at least one solder bump for mounting electronic parts on the conductor pad. In the printed wiring board, since the at least one conductor pad is aligned at a pitch of about 200 ?m or less, and a ratio (W/D) of a diameter W of the solder bump to an opening diameter D of the opening formed in the solder resist layer is about 1.05 to about 1.7, connection reliability and insulation reliability can be easily improved.

Abstract: A wiring board includes a substrate having first and second surfaces, a first penetrating hole penetrating through the substrate, a first through-hole conductor formed on the inner wall of the first hole, a filler filled inside the first conductor and forming a second penetrating hole, and a second through-hole conductor formed in the second hole, a first conductive circuit on the first surface of the substrate, a second conductive circuit on the second surface of the substrate, a first conductive portion on one end of the second hole, and a second conductive portion on the opposite end of the second penetrating hole. The first conductor is connecting the first circuit and the second circuit. The second conductor is made of a conductive material filled in the second hole and is connecting the first conductive portion and the second conductive portion.

Abstract: There is provided a wiring substrate. The wiring substrate includes: a core substrate formed of a conductive material and having a through hole therein; an insulating layer formed on first and second surfaces of the core substrate; wiring patterns formed on the first and second surfaces via the insulating layer; and a via formed in the through hole and electrically connected to the wiring patterns. The via includes: a conductor ball and a conductor portion. The conductor ball has a conductive surface and an insulating member covering the conductive surface. A portion of the conductive surface is exposed from the insulating member. The conductor portion is electrically connected to the exposed conductive surface and the wiring patterns. At least one of the insulating member and the insulating layer is interposed between the via and the core substrate.

Abstract: Through holes 36 are formed to penetrate a core substrate 30 and lower interlayer resin insulating layers 50, and via holes 66 are formed right on the through holes 36, respectively. Due to this, the through holes 36 and the via holes 66 are arranged linearly, thereby making it possible to shorten wiring length and to accelerate signal transmission speed. Also, since the through holes 36 and the via holes 66 to be connected to solder bumps 76 (conductive connection pins 78), respectively, are directly connected to one another, excellent reliability in connection is ensured.

Abstract: A flexible printed circuit board includes a flexible sheet and a rigid substrate attached to the flexible printed circuit board. The flexible printed circuit board includes a first surface and an opposite second surface. A number of electrical connecting locations are defined on the first surface of the flexible printed circuit. The rigid substrate includes a third surface and an opposite fourth surface and is disposed on the flexible sheet with the fourth surface contacting the first surface of flexible sheet. The rigid substrate defines a number of through holes corresponding to the electrical connecting location to allow the electronic components to pass through.

Abstract: A wiring board includes a ceramic substrate including a plurality of stacked ceramic layers, an internal wiring, and an electrode electrically connected to the internal wiring, the electrode being exposed from a first surface of the ceramic substrate; and a silicon substrate including a wiring layer, the wiring layer including a wiring pattern and a via-fill, the wiring pattern being formed on a main surface of the silicon substrate, an end of the via-fill being electrically connected to the wiring pattern, another end of the via-fill being exposed from a rear surface of the silicon substrate positioned opposite to the main surface, wherein the another end of the via-fill is bonded to the electrode of the ceramic substrate via a metal layer.

Abstract: According to one aspect, the invention provides a method of providing conductive structures between two foils in a multi-foil system. The system comprises at least two foils, from which at least one foil comprises a terminal. The method comprises the steps of (in any order) providing at least one solid state adhesive layer, patterning adhesive layer with through-holes; filling the through-holes with conductive material, so as to form the conductive structure, connected to the terminal; and bonding the at least two foils. One advantage of the invention is that it may be used in a manufacturing process for multi-foil systems.

Abstract: A printed circuit board includes a substrate including through holes, pad portions arranged on surfaces of the substrate, and insulating areas. Each of the pad portions includes a first pad surrounding a corresponding through hole and a second pad. Each of the insulating areas is between each of the first pads and each of the second pads to electrically insulate each of the first pads and each of the second pads from each other. Attachment or removal of conductive layers to or from the insulating areas allows electrical connection or disconnection between the first pads and the second pads.

Abstract: A metal layer 18 is sandwiched between insulating layers 14 and 20 so that required strength is maintained. Hence it follows that the thickness of a core substrate 30 can be reduced and, therefore, the thickness of a multi-layer printed circuit board can be reduced. Formation of non-penetrating openings 22 which reach the metal layer 18 in the insulating layers 14 and 20 is simply required. Therefore, small non-penetrating openings 22 can easily be formed by applying laser beams. Thus, through holes 36 each having a small diameter can be formed.

Abstract: There is provided a method of manufacturing a multilayer ceramic circuit board. A multilayer ceramic circuit board according to an aspect of the invention may include: preparing a plurality of ceramic green sheets; forming a recess having a desired line shape and a via hole connected to the recess in at least one of the plurality of ceramic green sheets; forming a conductive via by filling the via hole with a conductive material; forming a circuit line connected to the conductive via by filling the recess with a conductive material; stacking the plurality of ceramic green sheets upon one another to thereby form a ceramic green sheet stack; and sintering the ceramic green sheet stack.

Abstract: A shielded cable interface module having cable receiving grooves extending laterally to an edge of the board, each including a center conductor groove, an insulator groove, and a shield groove. A center conductor via and a shield via extend through the board. A conductor plane on the cable termination side surrounds the cable receiving grooves. The conductor plane includes a non-conductor region within the conductor plane adjacent to each of the conductor center conductor grooves. Ground vias associated with the cable receiving grooves are spaced apart from and partially surround the center conductor via outside and adjacent to the non-conductor region, the ground vias extend through the printed circuit board from the cable termination side to the system interface side.

Abstract: A through-hole type laminated circuit board is given with high reliability of electrical connection using copper foil and conductive paste containing low melting point metal without generating harmful void and crack at boundary between the copper foil and conductive paste metal. The laminated circuit board is made by laminating a multiple number of resin boards with roughening treated copper foils at least on their one surface sides with roughening projection deposition of less than 150 mg/dm2 to make surface roughness Rz of 0.3 to 10 ?m and height of the projection to be 0.3 to 10 ?m. Surface roughness of the original foil is 0.1 to 5 ?m and the amount of copper metal atoms of roughening treated layer is set at 4 times or less than the amount of diffusible conductive paste metal atoms containing low melting point metal into the roughening treated layer on the foil surface.

Abstract: A multilayer printed wiring board including insulating layers and conductor layers being stacked alternately on each other. The conductor layers are electrically connected to each other through viaholes formed in the insulating layers. Each of the viaholes is formed to bulge in a direction generally orthogonal to the direction of thickness of the insulating layer. The multilayer printed wiring board is to have electronic components such as a capacitor, IC and the like mounted on the surface layer thereof.

Abstract: A printed circuit board using paste bumps and manufacturing method thereof are disclosed.

Abstract: Disclosed is a method of manufacturing a printed circuit board. The method of manufacturing a printed circuit board having a via for connecting one layer to another layer can include forming a circuit pattern on one surface of a carrier; processing a hole corresponding to the via on one surface of the carrier; compressing the surface of the carrier into one surface of an insulation body; removing the carrier; processing a via hole on the insulation body, corresponding to a position of the hole; and forming a conductive material in the via hole, to thereby easily process a hole for forming a via and have high design freedom.

Abstract: The multilayer wiring substrate includes: a first insulating layer comprising a first surface and a second surface opposite to the first surface; a second insulating layer on the first surface of the first insulating layer; a first wiring pattern on the second surface of the first insulating layer; a second wiring pattern on a surface of the second insulating layer; a first via formed through the first insulating layer; a second via formed through the second insulating layer; and a third wiring pattern formed on the first surface of the first insulating layer and embedded in the second insulating layer, the third wiring pattern having a hole therethrough. A diameter of the hole is smaller than each diameter of the first and second vias. The first via and the second via are connected to each other through a metal filled in the hole of the third wiring pattern.

Abstract: A wiring substrate of the invention comprises an electrical insulation substrate (1), a through-hole (3) formed in the electrical insulation substrate, electrically conductive paste (4) filled inside the through-hole, and wiring traces (11) formed on one or both surfaces of the electrical insulation substrate and electrically connected with the electrically conductive paste, wherein interfaces of the wiring traces in contact with the electrically conductive paste have at least one of an asperate surface and a smooth surface, and a plurality of granular bumps (14) formed further thereon.

Abstract: Novel boron nitride agglomerated powders are provided having controlled density and fracture strength features. In addition methods for producing same are provided. One method calls for providing a feedstock powder including boron nitride agglomerates, and heat treating the feedstock powder to form a heat treated boron nitride agglomerated powder. In one embodiment the feedstock powder has a controlled crystal size. In another, the feedstock powder is derived from a bulk source.

Abstract: An interposer (20) is used for decoupling a microchip (10) on a circuit board (30). The interposer (20) contains on its upper and lower surfaces structured metal layers (26a-26d) for attachment to the microchip (10) and the circuit board (30), respectively. Inside the interposer, there are two sets of mutually isolated metal structures (21, 22) extending substantially perpendicular to the upper and lower surfaces of said interposer (20). The first set (21) extends closer towards the upper surface than the second set (22), while said second set (22) extends closer towards the lower surface than said first set (21).

Abstract: A method for manufacturing an embedded wiring board is provided. An activating insulation layer is formed, in which the activating insulation layer includes a plurality of catalyst particles, and covers a first wiring layer. An intaglio pattern and at least one blind via partially exposing the first wiring layer are formed on the activating insulation layer, in which some of the catalyst particles are activated and exposed in the intaglio pattern and the blind via. The activating insulation layer is dipped in a first chemical plating solution, and a solid conductive pillar is formed in the blind via through electroless plating. The activating insulation layer is dipped in a second chemical plating solution after the solid conductive pillar is formed, and a second wiring layer is formed in the intaglio pattern through the electroless plating. Components of the first chemical plating solution and the second chemical plating solution are different.